1/*- 2 * Copyright (c) 2011 NetApp, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD: releng/10.1/lib/libvmmapi/vmmapi.c 309636 2016-12-06 18:49:59Z glebius $ 27 */ 28 29#include <sys/cdefs.h> 30__FBSDID("$FreeBSD: releng/10.1/lib/libvmmapi/vmmapi.c 309636 2016-12-06 18:49:59Z glebius $"); 31 32#include <sys/param.h> 33#include <sys/sysctl.h> 34#include <sys/ioctl.h> 35#include <sys/mman.h> 36#include <sys/_iovec.h> 37#include <sys/cpuset.h> 38 39#include <x86/segments.h> 40#include <machine/specialreg.h> 41#include <machine/param.h> 42 43#include <stdio.h> 44#include <stdlib.h> 45#include <assert.h> 46#include <string.h> 47#include <fcntl.h> 48#include <unistd.h> 49 50#include <libutil.h> 51 52#include <machine/vmm.h> 53#include <machine/vmm_dev.h> 54 55#include "vmmapi.h" 56 57#define MB (1024 * 1024UL) 58#define GB (1024 * 1024 * 1024UL) 59 60struct vmctx { 61 int fd; 62 uint32_t lowmem_limit; 63 enum vm_mmap_style vms; 64 int memflags; 65 size_t lowmem; 66 char *lowmem_addr; 67 size_t highmem; 68 char *highmem_addr; 69 char *name; 70}; 71 72#define CREATE(x) sysctlbyname("hw.vmm.create", NULL, NULL, (x), strlen((x))) 73#define DESTROY(x) sysctlbyname("hw.vmm.destroy", NULL, NULL, (x), strlen((x))) 74 75static int 76vm_device_open(const char *name) 77{ 78 int fd, len; 79 char *vmfile; 80 81 len = strlen("/dev/vmm/") + strlen(name) + 1; 82 vmfile = malloc(len); 83 assert(vmfile != NULL); 84 snprintf(vmfile, len, "/dev/vmm/%s", name); 85 86 /* Open the device file */ 87 fd = open(vmfile, O_RDWR, 0); 88 89 free(vmfile); 90 return (fd); 91} 92 93int 94vm_create(const char *name) 95{ 96 97 return (CREATE((char *)name)); 98} 99 100struct vmctx * 101vm_open(const char *name) 102{ 103 struct vmctx *vm; 104 105 vm = malloc(sizeof(struct vmctx) + strlen(name) + 1); 106 assert(vm != NULL); 107 108 vm->fd = -1; 109 vm->memflags = 0; 110 vm->lowmem_limit = 3 * GB; 111 vm->name = (char *)(vm + 1); 112 strcpy(vm->name, name); 113 114 if ((vm->fd = vm_device_open(vm->name)) < 0) 115 goto err; 116 117 return (vm); 118err: 119 vm_destroy(vm); 120 return (NULL); 121} 122 123void 124vm_destroy(struct vmctx *vm) 125{ 126 assert(vm != NULL); 127 128 if (vm->fd >= 0) 129 close(vm->fd); 130 DESTROY(vm->name); 131 132 free(vm); 133} 134 135int 136vm_parse_memsize(const char *optarg, size_t *ret_memsize) 137{ 138 char *endptr; 139 size_t optval; 140 int error; 141 142 optval = strtoul(optarg, &endptr, 0); 143 if (*optarg != '\0' && *endptr == '\0') { 144 /* 145 * For the sake of backward compatibility if the memory size 146 * specified on the command line is less than a megabyte then 147 * it is interpreted as being in units of MB. 148 */ 149 if (optval < MB) 150 optval *= MB; 151 *ret_memsize = optval; 152 error = 0; 153 } else 154 error = expand_number(optarg, ret_memsize); 155 156 return (error); 157} 158 159int 160vm_get_memory_seg(struct vmctx *ctx, vm_paddr_t gpa, size_t *ret_len, 161 int *wired) 162{ 163 int error; 164 struct vm_memory_segment seg; 165 166 bzero(&seg, sizeof(seg)); 167 seg.gpa = gpa; 168 error = ioctl(ctx->fd, VM_GET_MEMORY_SEG, &seg); 169 *ret_len = seg.len; 170 if (wired != NULL) 171 *wired = seg.wired; 172 return (error); 173} 174 175uint32_t 176vm_get_lowmem_limit(struct vmctx *ctx) 177{ 178 179 return (ctx->lowmem_limit); 180} 181 182void 183vm_set_lowmem_limit(struct vmctx *ctx, uint32_t limit) 184{ 185 186 ctx->lowmem_limit = limit; 187} 188 189void 190vm_set_memflags(struct vmctx *ctx, int flags) 191{ 192 193 ctx->memflags = flags; 194} 195 196static int 197setup_memory_segment(struct vmctx *ctx, vm_paddr_t gpa, size_t len, char **addr) 198{ 199 int error, mmap_flags; 200 struct vm_memory_segment seg; 201 202 /* 203 * Create and optionally map 'len' bytes of memory at guest 204 * physical address 'gpa' 205 */ 206 bzero(&seg, sizeof(seg)); 207 seg.gpa = gpa; 208 seg.len = len; 209 error = ioctl(ctx->fd, VM_MAP_MEMORY, &seg); 210 if (error == 0 && addr != NULL) { 211 mmap_flags = MAP_SHARED; 212 if ((ctx->memflags & VM_MEM_F_INCORE) == 0) 213 mmap_flags |= MAP_NOCORE; 214 *addr = mmap(NULL, len, PROT_READ | PROT_WRITE, mmap_flags, 215 ctx->fd, gpa); 216 } 217 return (error); 218} 219 220int 221vm_setup_memory(struct vmctx *ctx, size_t memsize, enum vm_mmap_style vms) 222{ 223 char **addr; 224 int error; 225 226 /* XXX VM_MMAP_SPARSE not implemented yet */ 227 assert(vms == VM_MMAP_NONE || vms == VM_MMAP_ALL); 228 ctx->vms = vms; 229 230 /* 231 * If 'memsize' cannot fit entirely in the 'lowmem' segment then 232 * create another 'highmem' segment above 4GB for the remainder. 233 */ 234 if (memsize > ctx->lowmem_limit) { 235 ctx->lowmem = ctx->lowmem_limit; 236 ctx->highmem = memsize - ctx->lowmem; 237 } else { 238 ctx->lowmem = memsize; 239 ctx->highmem = 0; 240 } 241 242 if (ctx->lowmem > 0) { 243 addr = (vms == VM_MMAP_ALL) ? &ctx->lowmem_addr : NULL; 244 error = setup_memory_segment(ctx, 0, ctx->lowmem, addr); 245 if (error) 246 return (error); 247 } 248 249 if (ctx->highmem > 0) { 250 addr = (vms == VM_MMAP_ALL) ? &ctx->highmem_addr : NULL; 251 error = setup_memory_segment(ctx, 4*GB, ctx->highmem, addr); 252 if (error) 253 return (error); 254 } 255 256 return (0); 257} 258 259void * 260vm_map_gpa(struct vmctx *ctx, vm_paddr_t gaddr, size_t len) 261{ 262 263 /* XXX VM_MMAP_SPARSE not implemented yet */ 264 assert(ctx->vms == VM_MMAP_ALL); 265 266 if (gaddr < ctx->lowmem && len <= ctx->lowmem && 267 gaddr + len <= ctx->lowmem) 268 return ((void *)(ctx->lowmem_addr + gaddr)); 269 270 if (gaddr >= 4*GB) { 271 gaddr -= 4*GB; 272 if (gaddr < ctx->highmem && len <= ctx->highmem && 273 gaddr + len <= ctx->highmem) 274 return ((void *)(ctx->highmem_addr + gaddr)); 275 } 276 277 return (NULL); 278} 279 280size_t 281vm_get_lowmem_size(struct vmctx *ctx) 282{ 283 284 return (ctx->lowmem); 285} 286 287size_t 288vm_get_highmem_size(struct vmctx *ctx) 289{ 290 291 return (ctx->highmem); 292} 293 294int 295vm_set_desc(struct vmctx *ctx, int vcpu, int reg, 296 uint64_t base, uint32_t limit, uint32_t access) 297{ 298 int error; 299 struct vm_seg_desc vmsegdesc; 300 301 bzero(&vmsegdesc, sizeof(vmsegdesc)); 302 vmsegdesc.cpuid = vcpu; 303 vmsegdesc.regnum = reg; 304 vmsegdesc.desc.base = base; 305 vmsegdesc.desc.limit = limit; 306 vmsegdesc.desc.access = access; 307 308 error = ioctl(ctx->fd, VM_SET_SEGMENT_DESCRIPTOR, &vmsegdesc); 309 return (error); 310} 311 312int 313vm_get_desc(struct vmctx *ctx, int vcpu, int reg, 314 uint64_t *base, uint32_t *limit, uint32_t *access) 315{ 316 int error; 317 struct vm_seg_desc vmsegdesc; 318 319 bzero(&vmsegdesc, sizeof(vmsegdesc)); 320 vmsegdesc.cpuid = vcpu; 321 vmsegdesc.regnum = reg; 322 323 error = ioctl(ctx->fd, VM_GET_SEGMENT_DESCRIPTOR, &vmsegdesc); 324 if (error == 0) { 325 *base = vmsegdesc.desc.base; 326 *limit = vmsegdesc.desc.limit; 327 *access = vmsegdesc.desc.access; 328 } 329 return (error); 330} 331 332int 333vm_get_seg_desc(struct vmctx *ctx, int vcpu, int reg, struct seg_desc *seg_desc) 334{ 335 int error; 336 337 error = vm_get_desc(ctx, vcpu, reg, &seg_desc->base, &seg_desc->limit, 338 &seg_desc->access); 339 return (error); 340} 341 342int 343vm_set_register(struct vmctx *ctx, int vcpu, int reg, uint64_t val) 344{ 345 int error; 346 struct vm_register vmreg; 347 348 bzero(&vmreg, sizeof(vmreg)); 349 vmreg.cpuid = vcpu; 350 vmreg.regnum = reg; 351 vmreg.regval = val; 352 353 error = ioctl(ctx->fd, VM_SET_REGISTER, &vmreg); 354 return (error); 355} 356 357int 358vm_get_register(struct vmctx *ctx, int vcpu, int reg, uint64_t *ret_val) 359{ 360 int error; 361 struct vm_register vmreg; 362 363 bzero(&vmreg, sizeof(vmreg)); 364 vmreg.cpuid = vcpu; 365 vmreg.regnum = reg; 366 367 error = ioctl(ctx->fd, VM_GET_REGISTER, &vmreg); 368 *ret_val = vmreg.regval; 369 return (error); 370} 371 372int 373vm_run(struct vmctx *ctx, int vcpu, uint64_t rip, struct vm_exit *vmexit) 374{ 375 int error; 376 struct vm_run vmrun; 377 378 bzero(&vmrun, sizeof(vmrun)); 379 vmrun.cpuid = vcpu; 380 vmrun.rip = rip; 381 382 error = ioctl(ctx->fd, VM_RUN, &vmrun); 383 bcopy(&vmrun.vm_exit, vmexit, sizeof(struct vm_exit)); 384 return (error); 385} 386 387int 388vm_suspend(struct vmctx *ctx, enum vm_suspend_how how) 389{ 390 struct vm_suspend vmsuspend; 391 392 bzero(&vmsuspend, sizeof(vmsuspend)); 393 vmsuspend.how = how; 394 return (ioctl(ctx->fd, VM_SUSPEND, &vmsuspend)); 395} 396 397int 398vm_reinit(struct vmctx *ctx) 399{ 400 401 return (ioctl(ctx->fd, VM_REINIT, 0)); 402} 403 404static int 405vm_inject_exception_real(struct vmctx *ctx, int vcpu, int vector, 406 int error_code, int error_code_valid) 407{ 408 struct vm_exception exc; 409 410 bzero(&exc, sizeof(exc)); 411 exc.cpuid = vcpu; 412 exc.vector = vector; 413 exc.error_code = error_code; 414 exc.error_code_valid = error_code_valid; 415 416 return (ioctl(ctx->fd, VM_INJECT_EXCEPTION, &exc)); 417} 418 419int 420vm_inject_exception(struct vmctx *ctx, int vcpu, int vector) 421{ 422 423 return (vm_inject_exception_real(ctx, vcpu, vector, 0, 0)); 424} 425 426int 427vm_inject_exception2(struct vmctx *ctx, int vcpu, int vector, int errcode) 428{ 429 430 return (vm_inject_exception_real(ctx, vcpu, vector, errcode, 1)); 431} 432 433int 434vm_apicid2vcpu(struct vmctx *ctx, int apicid) 435{ 436 /* 437 * The apic id associated with the 'vcpu' has the same numerical value 438 * as the 'vcpu' itself. 439 */ 440 return (apicid); 441} 442 443int 444vm_lapic_irq(struct vmctx *ctx, int vcpu, int vector) 445{ 446 struct vm_lapic_irq vmirq; 447 448 bzero(&vmirq, sizeof(vmirq)); 449 vmirq.cpuid = vcpu; 450 vmirq.vector = vector; 451 452 return (ioctl(ctx->fd, VM_LAPIC_IRQ, &vmirq)); 453} 454 455int 456vm_lapic_local_irq(struct vmctx *ctx, int vcpu, int vector) 457{ 458 struct vm_lapic_irq vmirq; 459 460 bzero(&vmirq, sizeof(vmirq)); 461 vmirq.cpuid = vcpu; 462 vmirq.vector = vector; 463 464 return (ioctl(ctx->fd, VM_LAPIC_LOCAL_IRQ, &vmirq)); 465} 466 467int 468vm_lapic_msi(struct vmctx *ctx, uint64_t addr, uint64_t msg) 469{ 470 struct vm_lapic_msi vmmsi; 471 472 bzero(&vmmsi, sizeof(vmmsi)); 473 vmmsi.addr = addr; 474 vmmsi.msg = msg; 475 476 return (ioctl(ctx->fd, VM_LAPIC_MSI, &vmmsi)); 477} 478 479int 480vm_ioapic_assert_irq(struct vmctx *ctx, int irq) 481{ 482 struct vm_ioapic_irq ioapic_irq; 483 484 bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq)); 485 ioapic_irq.irq = irq; 486 487 return (ioctl(ctx->fd, VM_IOAPIC_ASSERT_IRQ, &ioapic_irq)); 488} 489 490int 491vm_ioapic_deassert_irq(struct vmctx *ctx, int irq) 492{ 493 struct vm_ioapic_irq ioapic_irq; 494 495 bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq)); 496 ioapic_irq.irq = irq; 497 498 return (ioctl(ctx->fd, VM_IOAPIC_DEASSERT_IRQ, &ioapic_irq)); 499} 500 501int 502vm_ioapic_pulse_irq(struct vmctx *ctx, int irq) 503{ 504 struct vm_ioapic_irq ioapic_irq; 505 506 bzero(&ioapic_irq, sizeof(struct vm_ioapic_irq)); 507 ioapic_irq.irq = irq; 508 509 return (ioctl(ctx->fd, VM_IOAPIC_PULSE_IRQ, &ioapic_irq)); 510} 511 512int 513vm_ioapic_pincount(struct vmctx *ctx, int *pincount) 514{ 515 516 return (ioctl(ctx->fd, VM_IOAPIC_PINCOUNT, pincount)); 517} 518 519int 520vm_isa_assert_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq) 521{ 522 struct vm_isa_irq isa_irq; 523 524 bzero(&isa_irq, sizeof(struct vm_isa_irq)); 525 isa_irq.atpic_irq = atpic_irq; 526 isa_irq.ioapic_irq = ioapic_irq; 527 528 return (ioctl(ctx->fd, VM_ISA_ASSERT_IRQ, &isa_irq)); 529} 530 531int 532vm_isa_deassert_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq) 533{ 534 struct vm_isa_irq isa_irq; 535 536 bzero(&isa_irq, sizeof(struct vm_isa_irq)); 537 isa_irq.atpic_irq = atpic_irq; 538 isa_irq.ioapic_irq = ioapic_irq; 539 540 return (ioctl(ctx->fd, VM_ISA_DEASSERT_IRQ, &isa_irq)); 541} 542 543int 544vm_isa_pulse_irq(struct vmctx *ctx, int atpic_irq, int ioapic_irq) 545{ 546 struct vm_isa_irq isa_irq; 547 548 bzero(&isa_irq, sizeof(struct vm_isa_irq)); 549 isa_irq.atpic_irq = atpic_irq; 550 isa_irq.ioapic_irq = ioapic_irq; 551 552 return (ioctl(ctx->fd, VM_ISA_PULSE_IRQ, &isa_irq)); 553} 554 555int 556vm_isa_set_irq_trigger(struct vmctx *ctx, int atpic_irq, 557 enum vm_intr_trigger trigger) 558{ 559 struct vm_isa_irq_trigger isa_irq_trigger; 560 561 bzero(&isa_irq_trigger, sizeof(struct vm_isa_irq_trigger)); 562 isa_irq_trigger.atpic_irq = atpic_irq; 563 isa_irq_trigger.trigger = trigger; 564 565 return (ioctl(ctx->fd, VM_ISA_SET_IRQ_TRIGGER, &isa_irq_trigger)); 566} 567 568int 569vm_inject_nmi(struct vmctx *ctx, int vcpu) 570{ 571 struct vm_nmi vmnmi; 572 573 bzero(&vmnmi, sizeof(vmnmi)); 574 vmnmi.cpuid = vcpu; 575 576 return (ioctl(ctx->fd, VM_INJECT_NMI, &vmnmi)); 577} 578 579static struct { 580 const char *name; 581 int type; 582} capstrmap[] = { 583 { "hlt_exit", VM_CAP_HALT_EXIT }, 584 { "mtrap_exit", VM_CAP_MTRAP_EXIT }, 585 { "pause_exit", VM_CAP_PAUSE_EXIT }, 586 { "unrestricted_guest", VM_CAP_UNRESTRICTED_GUEST }, 587 { "enable_invpcid", VM_CAP_ENABLE_INVPCID }, 588 { 0 } 589}; 590 591int 592vm_capability_name2type(const char *capname) 593{ 594 int i; 595 596 for (i = 0; capstrmap[i].name != NULL && capname != NULL; i++) { 597 if (strcmp(capstrmap[i].name, capname) == 0) 598 return (capstrmap[i].type); 599 } 600 601 return (-1); 602} 603 604const char * 605vm_capability_type2name(int type) 606{ 607 int i; 608 609 for (i = 0; capstrmap[i].name != NULL; i++) { 610 if (capstrmap[i].type == type) 611 return (capstrmap[i].name); 612 } 613 614 return (NULL); 615} 616 617int 618vm_get_capability(struct vmctx *ctx, int vcpu, enum vm_cap_type cap, 619 int *retval) 620{ 621 int error; 622 struct vm_capability vmcap; 623 624 bzero(&vmcap, sizeof(vmcap)); 625 vmcap.cpuid = vcpu; 626 vmcap.captype = cap; 627 628 error = ioctl(ctx->fd, VM_GET_CAPABILITY, &vmcap); 629 *retval = vmcap.capval; 630 return (error); 631} 632 633int 634vm_set_capability(struct vmctx *ctx, int vcpu, enum vm_cap_type cap, int val) 635{ 636 struct vm_capability vmcap; 637 638 bzero(&vmcap, sizeof(vmcap)); 639 vmcap.cpuid = vcpu; 640 vmcap.captype = cap; 641 vmcap.capval = val; 642 643 return (ioctl(ctx->fd, VM_SET_CAPABILITY, &vmcap)); 644} 645 646int 647vm_assign_pptdev(struct vmctx *ctx, int bus, int slot, int func) 648{ 649 struct vm_pptdev pptdev; 650 651 bzero(&pptdev, sizeof(pptdev)); 652 pptdev.bus = bus; 653 pptdev.slot = slot; 654 pptdev.func = func; 655 656 return (ioctl(ctx->fd, VM_BIND_PPTDEV, &pptdev)); 657} 658 659int 660vm_unassign_pptdev(struct vmctx *ctx, int bus, int slot, int func) 661{ 662 struct vm_pptdev pptdev; 663 664 bzero(&pptdev, sizeof(pptdev)); 665 pptdev.bus = bus; 666 pptdev.slot = slot; 667 pptdev.func = func; 668 669 return (ioctl(ctx->fd, VM_UNBIND_PPTDEV, &pptdev)); 670} 671 672int 673vm_map_pptdev_mmio(struct vmctx *ctx, int bus, int slot, int func, 674 vm_paddr_t gpa, size_t len, vm_paddr_t hpa) 675{ 676 struct vm_pptdev_mmio pptmmio; 677 678 bzero(&pptmmio, sizeof(pptmmio)); 679 pptmmio.bus = bus; 680 pptmmio.slot = slot; 681 pptmmio.func = func; 682 pptmmio.gpa = gpa; 683 pptmmio.len = len; 684 pptmmio.hpa = hpa; 685 686 return (ioctl(ctx->fd, VM_MAP_PPTDEV_MMIO, &pptmmio)); 687} 688 689int 690vm_setup_pptdev_msi(struct vmctx *ctx, int vcpu, int bus, int slot, int func, 691 uint64_t addr, uint64_t msg, int numvec) 692{ 693 struct vm_pptdev_msi pptmsi; 694 695 bzero(&pptmsi, sizeof(pptmsi)); 696 pptmsi.vcpu = vcpu; 697 pptmsi.bus = bus; 698 pptmsi.slot = slot; 699 pptmsi.func = func; 700 pptmsi.msg = msg; 701 pptmsi.addr = addr; 702 pptmsi.numvec = numvec; 703 704 return (ioctl(ctx->fd, VM_PPTDEV_MSI, &pptmsi)); 705} 706 707int 708vm_setup_pptdev_msix(struct vmctx *ctx, int vcpu, int bus, int slot, int func, 709 int idx, uint64_t addr, uint64_t msg, uint32_t vector_control) 710{ 711 struct vm_pptdev_msix pptmsix; 712 713 bzero(&pptmsix, sizeof(pptmsix)); 714 pptmsix.vcpu = vcpu; 715 pptmsix.bus = bus; 716 pptmsix.slot = slot; 717 pptmsix.func = func; 718 pptmsix.idx = idx; 719 pptmsix.msg = msg; 720 pptmsix.addr = addr; 721 pptmsix.vector_control = vector_control; 722 723 return ioctl(ctx->fd, VM_PPTDEV_MSIX, &pptmsix); 724} 725 726uint64_t * 727vm_get_stats(struct vmctx *ctx, int vcpu, struct timeval *ret_tv, 728 int *ret_entries) 729{ 730 int error; 731 732 static struct vm_stats vmstats; 733 734 vmstats.cpuid = vcpu; 735 736 error = ioctl(ctx->fd, VM_STATS, &vmstats); 737 if (error == 0) { 738 if (ret_entries) 739 *ret_entries = vmstats.num_entries; 740 if (ret_tv) 741 *ret_tv = vmstats.tv; 742 return (vmstats.statbuf); 743 } else 744 return (NULL); 745} 746 747const char * 748vm_get_stat_desc(struct vmctx *ctx, int index) 749{ 750 static struct vm_stat_desc statdesc; 751 752 statdesc.index = index; 753 if (ioctl(ctx->fd, VM_STAT_DESC, &statdesc) == 0) 754 return (statdesc.desc); 755 else 756 return (NULL); 757} 758 759int 760vm_get_x2apic_state(struct vmctx *ctx, int vcpu, enum x2apic_state *state) 761{ 762 int error; 763 struct vm_x2apic x2apic; 764 765 bzero(&x2apic, sizeof(x2apic)); 766 x2apic.cpuid = vcpu; 767 768 error = ioctl(ctx->fd, VM_GET_X2APIC_STATE, &x2apic); 769 *state = x2apic.state; 770 return (error); 771} 772 773int 774vm_set_x2apic_state(struct vmctx *ctx, int vcpu, enum x2apic_state state) 775{ 776 int error; 777 struct vm_x2apic x2apic; 778 779 bzero(&x2apic, sizeof(x2apic)); 780 x2apic.cpuid = vcpu; 781 x2apic.state = state; 782 783 error = ioctl(ctx->fd, VM_SET_X2APIC_STATE, &x2apic); 784 785 return (error); 786} 787 788/* 789 * From Intel Vol 3a: 790 * Table 9-1. IA-32 Processor States Following Power-up, Reset or INIT 791 */ 792int 793vcpu_reset(struct vmctx *vmctx, int vcpu) 794{ 795 int error; 796 uint64_t rflags, rip, cr0, cr4, zero, desc_base, rdx; 797 uint32_t desc_access, desc_limit; 798 uint16_t sel; 799 800 zero = 0; 801 802 rflags = 0x2; 803 error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RFLAGS, rflags); 804 if (error) 805 goto done; 806 807 rip = 0xfff0; 808 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RIP, rip)) != 0) 809 goto done; 810 811 cr0 = CR0_NE; 812 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR0, cr0)) != 0) 813 goto done; 814 815 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR3, zero)) != 0) 816 goto done; 817 818 cr4 = 0; 819 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CR4, cr4)) != 0) 820 goto done; 821 822 /* 823 * CS: present, r/w, accessed, 16-bit, byte granularity, usable 824 */ 825 desc_base = 0xffff0000; 826 desc_limit = 0xffff; 827 desc_access = 0x0093; 828 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_CS, 829 desc_base, desc_limit, desc_access); 830 if (error) 831 goto done; 832 833 sel = 0xf000; 834 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_CS, sel)) != 0) 835 goto done; 836 837 /* 838 * SS,DS,ES,FS,GS: present, r/w, accessed, 16-bit, byte granularity 839 */ 840 desc_base = 0; 841 desc_limit = 0xffff; 842 desc_access = 0x0093; 843 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_SS, 844 desc_base, desc_limit, desc_access); 845 if (error) 846 goto done; 847 848 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_DS, 849 desc_base, desc_limit, desc_access); 850 if (error) 851 goto done; 852 853 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_ES, 854 desc_base, desc_limit, desc_access); 855 if (error) 856 goto done; 857 858 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_FS, 859 desc_base, desc_limit, desc_access); 860 if (error) 861 goto done; 862 863 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_GS, 864 desc_base, desc_limit, desc_access); 865 if (error) 866 goto done; 867 868 sel = 0; 869 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_SS, sel)) != 0) 870 goto done; 871 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_DS, sel)) != 0) 872 goto done; 873 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_ES, sel)) != 0) 874 goto done; 875 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_FS, sel)) != 0) 876 goto done; 877 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_GS, sel)) != 0) 878 goto done; 879 880 /* General purpose registers */ 881 rdx = 0xf00; 882 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RAX, zero)) != 0) 883 goto done; 884 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RBX, zero)) != 0) 885 goto done; 886 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RCX, zero)) != 0) 887 goto done; 888 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RDX, rdx)) != 0) 889 goto done; 890 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RSI, zero)) != 0) 891 goto done; 892 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RDI, zero)) != 0) 893 goto done; 894 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RBP, zero)) != 0) 895 goto done; 896 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_RSP, zero)) != 0) 897 goto done; 898 899 /* GDTR, IDTR */ 900 desc_base = 0; 901 desc_limit = 0xffff; 902 desc_access = 0; 903 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_GDTR, 904 desc_base, desc_limit, desc_access); 905 if (error != 0) 906 goto done; 907 908 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_IDTR, 909 desc_base, desc_limit, desc_access); 910 if (error != 0) 911 goto done; 912 913 /* TR */ 914 desc_base = 0; 915 desc_limit = 0xffff; 916 desc_access = 0x0000008b; 917 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_TR, 0, 0, desc_access); 918 if (error) 919 goto done; 920 921 sel = 0; 922 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_TR, sel)) != 0) 923 goto done; 924 925 /* LDTR */ 926 desc_base = 0; 927 desc_limit = 0xffff; 928 desc_access = 0x00000082; 929 error = vm_set_desc(vmctx, vcpu, VM_REG_GUEST_LDTR, desc_base, 930 desc_limit, desc_access); 931 if (error) 932 goto done; 933 934 sel = 0; 935 if ((error = vm_set_register(vmctx, vcpu, VM_REG_GUEST_LDTR, 0)) != 0) 936 goto done; 937 938 /* XXX cr2, debug registers */ 939 940 error = 0; 941done: 942 return (error); 943} 944 945int 946vm_get_gpa_pmap(struct vmctx *ctx, uint64_t gpa, uint64_t *pte, int *num) 947{ 948 int error, i; 949 struct vm_gpa_pte gpapte; 950 951 bzero(&gpapte, sizeof(gpapte)); 952 gpapte.gpa = gpa; 953 954 error = ioctl(ctx->fd, VM_GET_GPA_PMAP, &gpapte); 955 956 if (error == 0) { 957 *num = gpapte.ptenum; 958 for (i = 0; i < gpapte.ptenum; i++) 959 pte[i] = gpapte.pte[i]; 960 } 961 962 return (error); 963} 964 965int 966vm_get_hpet_capabilities(struct vmctx *ctx, uint32_t *capabilities) 967{ 968 int error; 969 struct vm_hpet_cap cap; 970 971 bzero(&cap, sizeof(struct vm_hpet_cap)); 972 error = ioctl(ctx->fd, VM_GET_HPET_CAPABILITIES, &cap); 973 if (capabilities != NULL) 974 *capabilities = cap.capabilities; 975 return (error); 976} 977 978static int 979gla2gpa(struct vmctx *ctx, int vcpu, struct vm_guest_paging *paging, 980 uint64_t gla, int prot, int *fault, uint64_t *gpa) 981{ 982 struct vm_gla2gpa gg; 983 int error; 984 985 bzero(&gg, sizeof(struct vm_gla2gpa)); 986 gg.vcpuid = vcpu; 987 gg.prot = prot; 988 gg.gla = gla; 989 gg.paging = *paging; 990 991 error = ioctl(ctx->fd, VM_GLA2GPA, &gg); 992 if (error == 0) { 993 *fault = gg.fault; 994 *gpa = gg.gpa; 995 } 996 return (error); 997} 998 999#ifndef min 1000#define min(a,b) (((a) < (b)) ? (a) : (b)) 1001#endif 1002 1003int 1004vm_copy_setup(struct vmctx *ctx, int vcpu, struct vm_guest_paging *paging, 1005 uint64_t gla, size_t len, int prot, struct iovec *iov, int iovcnt) 1006{ 1007 uint64_t gpa; 1008 int error, fault, i, n, off; 1009 1010 for (i = 0; i < iovcnt; i++) { 1011 iov[i].iov_base = 0; 1012 iov[i].iov_len = 0; 1013 } 1014 1015 while (len) { 1016 assert(iovcnt > 0); 1017 error = gla2gpa(ctx, vcpu, paging, gla, prot, &fault, &gpa); 1018 if (error) 1019 return (-1); 1020 if (fault) 1021 return (1); 1022 1023 off = gpa & PAGE_MASK; 1024 n = min(len, PAGE_SIZE - off); 1025 1026 iov->iov_base = (void *)gpa; 1027 iov->iov_len = n; 1028 iov++; 1029 iovcnt--; 1030 1031 gla += n; 1032 len -= n; 1033 } 1034 return (0); 1035} 1036 1037void 1038vm_copyin(struct vmctx *ctx, int vcpu, struct iovec *iov, void *vp, size_t len) 1039{ 1040 const char *src; 1041 char *dst; 1042 uint64_t gpa; 1043 size_t n; 1044 1045 dst = vp; 1046 while (len) { 1047 assert(iov->iov_len); 1048 gpa = (uint64_t)iov->iov_base; 1049 n = min(len, iov->iov_len); 1050 src = vm_map_gpa(ctx, gpa, n); 1051 bcopy(src, dst, n); 1052 1053 iov++; 1054 dst += n; 1055 len -= n; 1056 } 1057} 1058 1059void 1060vm_copyout(struct vmctx *ctx, int vcpu, const void *vp, struct iovec *iov, 1061 size_t len) 1062{ 1063 const char *src; 1064 char *dst; 1065 uint64_t gpa; 1066 size_t n; 1067 1068 src = vp; 1069 while (len) { 1070 assert(iov->iov_len); 1071 gpa = (uint64_t)iov->iov_base; 1072 n = min(len, iov->iov_len); 1073 dst = vm_map_gpa(ctx, gpa, n); 1074 bcopy(src, dst, n); 1075 1076 iov++; 1077 src += n; 1078 len -= n; 1079 } 1080} 1081 1082static int 1083vm_get_cpus(struct vmctx *ctx, int which, cpuset_t *cpus) 1084{ 1085 struct vm_cpuset vm_cpuset; 1086 int error; 1087 1088 bzero(&vm_cpuset, sizeof(struct vm_cpuset)); 1089 vm_cpuset.which = which; 1090 vm_cpuset.cpusetsize = sizeof(cpuset_t); 1091 vm_cpuset.cpus = cpus; 1092 1093 error = ioctl(ctx->fd, VM_GET_CPUS, &vm_cpuset); 1094 return (error); 1095} 1096 1097int 1098vm_active_cpus(struct vmctx *ctx, cpuset_t *cpus) 1099{ 1100 1101 return (vm_get_cpus(ctx, VM_ACTIVE_CPUS, cpus)); 1102} 1103 1104int 1105vm_suspended_cpus(struct vmctx *ctx, cpuset_t *cpus) 1106{ 1107 1108 return (vm_get_cpus(ctx, VM_SUSPENDED_CPUS, cpus)); 1109} 1110 1111int 1112vm_activate_cpu(struct vmctx *ctx, int vcpu) 1113{ 1114 struct vm_activate_cpu ac; 1115 int error; 1116 1117 bzero(&ac, sizeof(struct vm_activate_cpu)); 1118 ac.vcpuid = vcpu; 1119 error = ioctl(ctx->fd, VM_ACTIVATE_CPU, &ac); 1120 return (error); 1121} 1122 1123int 1124vm_get_intinfo(struct vmctx *ctx, int vcpu, uint64_t *info1, uint64_t *info2) 1125{ 1126 struct vm_intinfo vmii; 1127 int error; 1128 1129 bzero(&vmii, sizeof(struct vm_intinfo)); 1130 vmii.vcpuid = vcpu; 1131 error = ioctl(ctx->fd, VM_GET_INTINFO, &vmii); 1132 if (error == 0) { 1133 *info1 = vmii.info1; 1134 *info2 = vmii.info2; 1135 } 1136 return (error); 1137} 1138 1139int 1140vm_set_intinfo(struct vmctx *ctx, int vcpu, uint64_t info1) 1141{ 1142 struct vm_intinfo vmii; 1143 int error; 1144 1145 bzero(&vmii, sizeof(struct vm_intinfo)); 1146 vmii.vcpuid = vcpu; 1147 vmii.info1 = info1; 1148 error = ioctl(ctx->fd, VM_SET_INTINFO, &vmii); 1149 return (error); 1150} 1151