fpu_reg.S revision 91174
1/*- 2 * Copyright (c) 2002 by Thomas Moestl <tmm@FreeBSD.org>. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 17 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 18 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 19 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 20 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 21 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 22 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 23 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24 * 25 * $FreeBSD: head/lib/libc/sparc64/fpu/fpu_reg.S 91174 2002-02-23 21:37:18Z tmm $ 26 */ 27 28/* 29 * Define arrays of leaf functions to load/store fp registers to memory. See 30 * fpu_reg.h for the definitions to use this from C code. The function sizes 31 * defines there must be kept in sync with this file! 32 */ 33 34.macro ld32 reg 35 retl 36 ld [%o0], %f\reg 37.endm 38 39.macro st32 reg 40 retl 41 st %f\reg, [%o0] 42.endm 43 44.macro ld64 reg 45 retl 46 ldd [%o0], %f\reg 47.endm 48 49.macro st64 reg 50 retl 51 std %f\reg, [%o0] 52.endm 53 54/* The actual function arrays. */ 55 .globl __fpu_ld32 56__fpu_ld32: 57 ld32 0 58 ld32 1 59 ld32 2 60 ld32 3 61 ld32 4 62 ld32 5 63 ld32 6 64 ld32 7 65 ld32 8 66 ld32 9 67 ld32 10 68 ld32 11 69 ld32 12 70 ld32 13 71 ld32 14 72 ld32 15 73 ld32 16 74 ld32 17 75 ld32 18 76 ld32 19 77 ld32 20 78 ld32 21 79 ld32 22 80 ld32 23 81 ld32 24 82 ld32 25 83 ld32 26 84 ld32 27 85 ld32 28 86 ld32 29 87 ld32 30 88 ld32 31 89 90 .globl __fpu_st32 91__fpu_st32: 92 st32 0 93 st32 1 94 st32 2 95 st32 3 96 st32 4 97 st32 5 98 st32 6 99 st32 7 100 st32 8 101 st32 9 102 st32 10 103 st32 11 104 st32 12 105 st32 13 106 st32 14 107 st32 15 108 st32 16 109 st32 17 110 st32 18 111 st32 19 112 st32 20 113 st32 21 114 st32 22 115 st32 23 116 st32 24 117 st32 25 118 st32 26 119 st32 27 120 st32 28 121 st32 29 122 st32 30 123 st32 31 124 125 .globl __fpu_ld64 126__fpu_ld64: 127 ld64 0 128 ld64 2 129 ld64 4 130 ld64 6 131 ld64 8 132 ld64 10 133 ld64 12 134 ld64 14 135 ld64 16 136 ld64 18 137 ld64 20 138 ld64 22 139 ld64 24 140 ld64 26 141 ld64 28 142 ld64 30 143 ld64 32 144 ld64 34 145 ld64 36 146 ld64 38 147 ld64 40 148 ld64 42 149 ld64 44 150 ld64 46 151 ld64 48 152 ld64 50 153 ld64 52 154 ld64 54 155 ld64 56 156 ld64 58 157 ld64 60 158 ld64 62 159 160 .globl __fpu_st64 161__fpu_st64: 162 st64 0 163 st64 2 164 st64 4 165 st64 6 166 st64 8 167 st64 10 168 st64 12 169 st64 14 170 st64 16 171 st64 18 172 st64 20 173 st64 22 174 st64 24 175 st64 26 176 st64 28 177 st64 30 178 st64 32 179 st64 34 180 st64 36 181 st64 38 182 st64 40 183 st64 42 184 st64 44 185 st64 46 186 st64 48 187 st64 50 188 st64 52 189 st64 54 190 st64 56 191 st64 58 192 st64 60 193 st64 62 194