TargetInfo.cpp revision 208954
1//===---- TargetInfo.cpp - Encapsulate target details -----------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// These classes wrap the information about a call or function 11// definition used to handle ABI compliancy. 12// 13//===----------------------------------------------------------------------===// 14 15#include "TargetInfo.h" 16#include "ABIInfo.h" 17#include "CodeGenFunction.h" 18#include "clang/AST/RecordLayout.h" 19#include "llvm/Type.h" 20#include "llvm/ADT/StringExtras.h" 21#include "llvm/ADT/Triple.h" 22#include "llvm/Support/raw_ostream.h" 23using namespace clang; 24using namespace CodeGen; 25 26static void AssignToArrayRange(CodeGen::CGBuilderTy &Builder, 27 llvm::Value *Array, 28 llvm::Value *Value, 29 unsigned FirstIndex, 30 unsigned LastIndex) { 31 // Alternatively, we could emit this as a loop in the source. 32 for (unsigned I = FirstIndex; I <= LastIndex; ++I) { 33 llvm::Value *Cell = Builder.CreateConstInBoundsGEP1_32(Array, I); 34 Builder.CreateStore(Value, Cell); 35 } 36} 37 38ABIInfo::~ABIInfo() {} 39 40void ABIArgInfo::dump() const { 41 llvm::raw_ostream &OS = llvm::errs(); 42 OS << "(ABIArgInfo Kind="; 43 switch (TheKind) { 44 case Direct: 45 OS << "Direct"; 46 break; 47 case Extend: 48 OS << "Extend"; 49 break; 50 case Ignore: 51 OS << "Ignore"; 52 break; 53 case Coerce: 54 OS << "Coerce Type="; 55 getCoerceToType()->print(OS); 56 break; 57 case Indirect: 58 OS << "Indirect Align=" << getIndirectAlign() 59 << " Byal=" << getIndirectByVal(); 60 break; 61 case Expand: 62 OS << "Expand"; 63 break; 64 } 65 OS << ")\n"; 66} 67 68TargetCodeGenInfo::~TargetCodeGenInfo() { delete Info; } 69 70static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays); 71 72/// isEmptyField - Return true iff a the field is "empty", that is it 73/// is an unnamed bit-field or an (array of) empty record(s). 74static bool isEmptyField(ASTContext &Context, const FieldDecl *FD, 75 bool AllowArrays) { 76 if (FD->isUnnamedBitfield()) 77 return true; 78 79 QualType FT = FD->getType(); 80 81 // Constant arrays of empty records count as empty, strip them off. 82 if (AllowArrays) 83 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) 84 FT = AT->getElementType(); 85 86 const RecordType *RT = FT->getAs<RecordType>(); 87 if (!RT) 88 return false; 89 90 // C++ record fields are never empty, at least in the Itanium ABI. 91 // 92 // FIXME: We should use a predicate for whether this behavior is true in the 93 // current ABI. 94 if (isa<CXXRecordDecl>(RT->getDecl())) 95 return false; 96 97 return isEmptyRecord(Context, FT, AllowArrays); 98} 99 100/// isEmptyRecord - Return true iff a structure contains only empty 101/// fields. Note that a structure with a flexible array member is not 102/// considered empty. 103static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays) { 104 const RecordType *RT = T->getAs<RecordType>(); 105 if (!RT) 106 return 0; 107 const RecordDecl *RD = RT->getDecl(); 108 if (RD->hasFlexibleArrayMember()) 109 return false; 110 111 // If this is a C++ record, check the bases first. 112 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) 113 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 114 e = CXXRD->bases_end(); i != e; ++i) 115 if (!isEmptyRecord(Context, i->getType(), true)) 116 return false; 117 118 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 119 i != e; ++i) 120 if (!isEmptyField(Context, *i, AllowArrays)) 121 return false; 122 return true; 123} 124 125/// hasNonTrivialDestructorOrCopyConstructor - Determine if a type has either 126/// a non-trivial destructor or a non-trivial copy constructor. 127static bool hasNonTrivialDestructorOrCopyConstructor(const RecordType *RT) { 128 const CXXRecordDecl *RD = dyn_cast<CXXRecordDecl>(RT->getDecl()); 129 if (!RD) 130 return false; 131 132 return !RD->hasTrivialDestructor() || !RD->hasTrivialCopyConstructor(); 133} 134 135/// isRecordWithNonTrivialDestructorOrCopyConstructor - Determine if a type is 136/// a record type with either a non-trivial destructor or a non-trivial copy 137/// constructor. 138static bool isRecordWithNonTrivialDestructorOrCopyConstructor(QualType T) { 139 const RecordType *RT = T->getAs<RecordType>(); 140 if (!RT) 141 return false; 142 143 return hasNonTrivialDestructorOrCopyConstructor(RT); 144} 145 146/// isSingleElementStruct - Determine if a structure is a "single 147/// element struct", i.e. it has exactly one non-empty field or 148/// exactly one field which is itself a single element 149/// struct. Structures with flexible array members are never 150/// considered single element structs. 151/// 152/// \return The field declaration for the single non-empty field, if 153/// it exists. 154static const Type *isSingleElementStruct(QualType T, ASTContext &Context) { 155 const RecordType *RT = T->getAsStructureType(); 156 if (!RT) 157 return 0; 158 159 const RecordDecl *RD = RT->getDecl(); 160 if (RD->hasFlexibleArrayMember()) 161 return 0; 162 163 const Type *Found = 0; 164 165 // If this is a C++ record, check the bases first. 166 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 167 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 168 e = CXXRD->bases_end(); i != e; ++i) { 169 // Ignore empty records. 170 if (isEmptyRecord(Context, i->getType(), true)) 171 continue; 172 173 // If we already found an element then this isn't a single-element struct. 174 if (Found) 175 return 0; 176 177 // If this is non-empty and not a single element struct, the composite 178 // cannot be a single element struct. 179 Found = isSingleElementStruct(i->getType(), Context); 180 if (!Found) 181 return 0; 182 } 183 } 184 185 // Check for single element. 186 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 187 i != e; ++i) { 188 const FieldDecl *FD = *i; 189 QualType FT = FD->getType(); 190 191 // Ignore empty fields. 192 if (isEmptyField(Context, FD, true)) 193 continue; 194 195 // If we already found an element then this isn't a single-element 196 // struct. 197 if (Found) 198 return 0; 199 200 // Treat single element arrays as the element. 201 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) { 202 if (AT->getSize().getZExtValue() != 1) 203 break; 204 FT = AT->getElementType(); 205 } 206 207 if (!CodeGenFunction::hasAggregateLLVMType(FT)) { 208 Found = FT.getTypePtr(); 209 } else { 210 Found = isSingleElementStruct(FT, Context); 211 if (!Found) 212 return 0; 213 } 214 } 215 216 return Found; 217} 218 219static bool is32Or64BitBasicType(QualType Ty, ASTContext &Context) { 220 if (!Ty->getAs<BuiltinType>() && !Ty->hasPointerRepresentation() && 221 !Ty->isAnyComplexType() && !Ty->isEnumeralType() && 222 !Ty->isBlockPointerType()) 223 return false; 224 225 uint64_t Size = Context.getTypeSize(Ty); 226 return Size == 32 || Size == 64; 227} 228 229/// canExpandIndirectArgument - Test whether an argument type which is to be 230/// passed indirectly (on the stack) would have the equivalent layout if it was 231/// expanded into separate arguments. If so, we prefer to do the latter to avoid 232/// inhibiting optimizations. 233/// 234// FIXME: This predicate is missing many cases, currently it just follows 235// llvm-gcc (checks that all fields are 32-bit or 64-bit primitive types). We 236// should probably make this smarter, or better yet make the LLVM backend 237// capable of handling it. 238static bool canExpandIndirectArgument(QualType Ty, ASTContext &Context) { 239 // We can only expand structure types. 240 const RecordType *RT = Ty->getAs<RecordType>(); 241 if (!RT) 242 return false; 243 244 // We can only expand (C) structures. 245 // 246 // FIXME: This needs to be generalized to handle classes as well. 247 const RecordDecl *RD = RT->getDecl(); 248 if (!RD->isStruct() || isa<CXXRecordDecl>(RD)) 249 return false; 250 251 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 252 i != e; ++i) { 253 const FieldDecl *FD = *i; 254 255 if (!is32Or64BitBasicType(FD->getType(), Context)) 256 return false; 257 258 // FIXME: Reject bit-fields wholesale; there are two problems, we don't know 259 // how to expand them yet, and the predicate for telling if a bitfield still 260 // counts as "basic" is more complicated than what we were doing previously. 261 if (FD->isBitField()) 262 return false; 263 } 264 265 return true; 266} 267 268namespace { 269/// DefaultABIInfo - The default implementation for ABI specific 270/// details. This implementation provides information which results in 271/// self-consistent and sensible LLVM IR generation, but does not 272/// conform to any particular ABI. 273class DefaultABIInfo : public ABIInfo { 274 ABIArgInfo classifyReturnType(QualType RetTy, 275 ASTContext &Context, 276 llvm::LLVMContext &VMContext) const; 277 278 ABIArgInfo classifyArgumentType(QualType RetTy, 279 ASTContext &Context, 280 llvm::LLVMContext &VMContext) const; 281 282 virtual void computeInfo(CGFunctionInfo &FI, ASTContext &Context, 283 llvm::LLVMContext &VMContext) const { 284 FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), Context, 285 VMContext); 286 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 287 it != ie; ++it) 288 it->info = classifyArgumentType(it->type, Context, VMContext); 289 } 290 291 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 292 CodeGenFunction &CGF) const; 293}; 294 295class DefaultTargetCodeGenInfo : public TargetCodeGenInfo { 296public: 297 DefaultTargetCodeGenInfo():TargetCodeGenInfo(new DefaultABIInfo()) {} 298}; 299 300llvm::Value *DefaultABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 301 CodeGenFunction &CGF) const { 302 return 0; 303} 304 305ABIArgInfo DefaultABIInfo::classifyArgumentType(QualType Ty, 306 ASTContext &Context, 307 llvm::LLVMContext &VMContext) const { 308 if (CodeGenFunction::hasAggregateLLVMType(Ty)) 309 return ABIArgInfo::getIndirect(0); 310 311 // Treat an enum type as its underlying type. 312 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 313 Ty = EnumTy->getDecl()->getIntegerType(); 314 315 return (Ty->isPromotableIntegerType() ? 316 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 317} 318 319/// X86_32ABIInfo - The X86-32 ABI information. 320class X86_32ABIInfo : public ABIInfo { 321 ASTContext &Context; 322 bool IsDarwinVectorABI; 323 bool IsSmallStructInRegABI; 324 325 static bool isRegisterSize(unsigned Size) { 326 return (Size == 8 || Size == 16 || Size == 32 || Size == 64); 327 } 328 329 static bool shouldReturnTypeInRegister(QualType Ty, ASTContext &Context); 330 331 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 332 /// such that the argument will be passed in memory. 333 ABIArgInfo getIndirectResult(QualType Ty, ASTContext &Context, 334 bool ByVal = true) const; 335 336public: 337 ABIArgInfo classifyReturnType(QualType RetTy, 338 ASTContext &Context, 339 llvm::LLVMContext &VMContext) const; 340 341 ABIArgInfo classifyArgumentType(QualType RetTy, 342 ASTContext &Context, 343 llvm::LLVMContext &VMContext) const; 344 345 virtual void computeInfo(CGFunctionInfo &FI, ASTContext &Context, 346 llvm::LLVMContext &VMContext) const { 347 FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), Context, 348 VMContext); 349 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 350 it != ie; ++it) 351 it->info = classifyArgumentType(it->type, Context, VMContext); 352 } 353 354 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 355 CodeGenFunction &CGF) const; 356 357 X86_32ABIInfo(ASTContext &Context, bool d, bool p) 358 : ABIInfo(), Context(Context), IsDarwinVectorABI(d), 359 IsSmallStructInRegABI(p) {} 360}; 361 362class X86_32TargetCodeGenInfo : public TargetCodeGenInfo { 363public: 364 X86_32TargetCodeGenInfo(ASTContext &Context, bool d, bool p) 365 :TargetCodeGenInfo(new X86_32ABIInfo(Context, d, p)) {} 366 367 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 368 CodeGen::CodeGenModule &CGM) const; 369 370 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 371 // Darwin uses different dwarf register numbers for EH. 372 if (CGM.isTargetDarwin()) return 5; 373 374 return 4; 375 } 376 377 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 378 llvm::Value *Address) const; 379}; 380 381} 382 383/// shouldReturnTypeInRegister - Determine if the given type should be 384/// passed in a register (for the Darwin ABI). 385bool X86_32ABIInfo::shouldReturnTypeInRegister(QualType Ty, 386 ASTContext &Context) { 387 uint64_t Size = Context.getTypeSize(Ty); 388 389 // Type must be register sized. 390 if (!isRegisterSize(Size)) 391 return false; 392 393 if (Ty->isVectorType()) { 394 // 64- and 128- bit vectors inside structures are not returned in 395 // registers. 396 if (Size == 64 || Size == 128) 397 return false; 398 399 return true; 400 } 401 402 // If this is a builtin, pointer, enum, complex type, member pointer, or 403 // member function pointer it is ok. 404 if (Ty->getAs<BuiltinType>() || Ty->hasPointerRepresentation() || 405 Ty->isAnyComplexType() || Ty->isEnumeralType() || 406 Ty->isBlockPointerType() || Ty->isMemberPointerType()) 407 return true; 408 409 // Arrays are treated like records. 410 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) 411 return shouldReturnTypeInRegister(AT->getElementType(), Context); 412 413 // Otherwise, it must be a record type. 414 const RecordType *RT = Ty->getAs<RecordType>(); 415 if (!RT) return false; 416 417 // FIXME: Traverse bases here too. 418 419 // Structure types are passed in register if all fields would be 420 // passed in a register. 421 for (RecordDecl::field_iterator i = RT->getDecl()->field_begin(), 422 e = RT->getDecl()->field_end(); i != e; ++i) { 423 const FieldDecl *FD = *i; 424 425 // Empty fields are ignored. 426 if (isEmptyField(Context, FD, true)) 427 continue; 428 429 // Check fields recursively. 430 if (!shouldReturnTypeInRegister(FD->getType(), Context)) 431 return false; 432 } 433 434 return true; 435} 436 437ABIArgInfo X86_32ABIInfo::classifyReturnType(QualType RetTy, 438 ASTContext &Context, 439 llvm::LLVMContext &VMContext) const { 440 if (RetTy->isVoidType()) { 441 return ABIArgInfo::getIgnore(); 442 } else if (const VectorType *VT = RetTy->getAs<VectorType>()) { 443 // On Darwin, some vectors are returned in registers. 444 if (IsDarwinVectorABI) { 445 uint64_t Size = Context.getTypeSize(RetTy); 446 447 // 128-bit vectors are a special case; they are returned in 448 // registers and we need to make sure to pick a type the LLVM 449 // backend will like. 450 if (Size == 128) 451 return ABIArgInfo::getCoerce(llvm::VectorType::get( 452 llvm::Type::getInt64Ty(VMContext), 2)); 453 454 // Always return in register if it fits in a general purpose 455 // register, or if it is 64 bits and has a single element. 456 if ((Size == 8 || Size == 16 || Size == 32) || 457 (Size == 64 && VT->getNumElements() == 1)) 458 return ABIArgInfo::getCoerce(llvm::IntegerType::get(VMContext, Size)); 459 460 return ABIArgInfo::getIndirect(0); 461 } 462 463 return ABIArgInfo::getDirect(); 464 } else if (CodeGenFunction::hasAggregateLLVMType(RetTy)) { 465 if (const RecordType *RT = RetTy->getAs<RecordType>()) { 466 // Structures with either a non-trivial destructor or a non-trivial 467 // copy constructor are always indirect. 468 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 469 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 470 471 // Structures with flexible arrays are always indirect. 472 if (RT->getDecl()->hasFlexibleArrayMember()) 473 return ABIArgInfo::getIndirect(0); 474 } 475 476 // If specified, structs and unions are always indirect. 477 if (!IsSmallStructInRegABI && !RetTy->isAnyComplexType()) 478 return ABIArgInfo::getIndirect(0); 479 480 // Classify "single element" structs as their element type. 481 if (const Type *SeltTy = isSingleElementStruct(RetTy, Context)) { 482 if (const BuiltinType *BT = SeltTy->getAs<BuiltinType>()) { 483 if (BT->isIntegerType()) { 484 // We need to use the size of the structure, padding 485 // bit-fields can adjust that to be larger than the single 486 // element type. 487 uint64_t Size = Context.getTypeSize(RetTy); 488 return ABIArgInfo::getCoerce( 489 llvm::IntegerType::get(VMContext, (unsigned) Size)); 490 } else if (BT->getKind() == BuiltinType::Float) { 491 assert(Context.getTypeSize(RetTy) == Context.getTypeSize(SeltTy) && 492 "Unexpect single element structure size!"); 493 return ABIArgInfo::getCoerce(llvm::Type::getFloatTy(VMContext)); 494 } else if (BT->getKind() == BuiltinType::Double) { 495 assert(Context.getTypeSize(RetTy) == Context.getTypeSize(SeltTy) && 496 "Unexpect single element structure size!"); 497 return ABIArgInfo::getCoerce(llvm::Type::getDoubleTy(VMContext)); 498 } 499 } else if (SeltTy->isPointerType()) { 500 // FIXME: It would be really nice if this could come out as the proper 501 // pointer type. 502 const llvm::Type *PtrTy = llvm::Type::getInt8PtrTy(VMContext); 503 return ABIArgInfo::getCoerce(PtrTy); 504 } else if (SeltTy->isVectorType()) { 505 // 64- and 128-bit vectors are never returned in a 506 // register when inside a structure. 507 uint64_t Size = Context.getTypeSize(RetTy); 508 if (Size == 64 || Size == 128) 509 return ABIArgInfo::getIndirect(0); 510 511 return classifyReturnType(QualType(SeltTy, 0), Context, VMContext); 512 } 513 } 514 515 // Small structures which are register sized are generally returned 516 // in a register. 517 if (X86_32ABIInfo::shouldReturnTypeInRegister(RetTy, Context)) { 518 uint64_t Size = Context.getTypeSize(RetTy); 519 return ABIArgInfo::getCoerce(llvm::IntegerType::get(VMContext, Size)); 520 } 521 522 return ABIArgInfo::getIndirect(0); 523 } else { 524 // Treat an enum type as its underlying type. 525 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 526 RetTy = EnumTy->getDecl()->getIntegerType(); 527 528 return (RetTy->isPromotableIntegerType() ? 529 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 530 } 531} 532 533ABIArgInfo X86_32ABIInfo::getIndirectResult(QualType Ty, 534 ASTContext &Context, 535 bool ByVal) const { 536 if (!ByVal) 537 return ABIArgInfo::getIndirect(0, false); 538 539 // Compute the byval alignment. We trust the back-end to honor the 540 // minimum ABI alignment for byval, to make cleaner IR. 541 const unsigned MinABIAlign = 4; 542 unsigned Align = Context.getTypeAlign(Ty) / 8; 543 if (Align > MinABIAlign) 544 return ABIArgInfo::getIndirect(Align); 545 return ABIArgInfo::getIndirect(0); 546} 547 548ABIArgInfo X86_32ABIInfo::classifyArgumentType(QualType Ty, 549 ASTContext &Context, 550 llvm::LLVMContext &VMContext) const { 551 // FIXME: Set alignment on indirect arguments. 552 if (CodeGenFunction::hasAggregateLLVMType(Ty)) { 553 // Structures with flexible arrays are always indirect. 554 if (const RecordType *RT = Ty->getAs<RecordType>()) { 555 // Structures with either a non-trivial destructor or a non-trivial 556 // copy constructor are always indirect. 557 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 558 return getIndirectResult(Ty, Context, /*ByVal=*/false); 559 560 if (RT->getDecl()->hasFlexibleArrayMember()) 561 return getIndirectResult(Ty, Context); 562 } 563 564 // Ignore empty structs. 565 if (Ty->isStructureType() && Context.getTypeSize(Ty) == 0) 566 return ABIArgInfo::getIgnore(); 567 568 // Expand small (<= 128-bit) record types when we know that the stack layout 569 // of those arguments will match the struct. This is important because the 570 // LLVM backend isn't smart enough to remove byval, which inhibits many 571 // optimizations. 572 if (Context.getTypeSize(Ty) <= 4*32 && 573 canExpandIndirectArgument(Ty, Context)) 574 return ABIArgInfo::getExpand(); 575 576 return getIndirectResult(Ty, Context); 577 } else { 578 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 579 Ty = EnumTy->getDecl()->getIntegerType(); 580 581 return (Ty->isPromotableIntegerType() ? 582 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 583 } 584} 585 586llvm::Value *X86_32ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 587 CodeGenFunction &CGF) const { 588 const llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 589 const llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 590 591 CGBuilderTy &Builder = CGF.Builder; 592 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 593 "ap"); 594 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 595 llvm::Type *PTy = 596 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 597 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 598 599 uint64_t Offset = 600 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4); 601 llvm::Value *NextAddr = 602 Builder.CreateGEP(Addr, llvm::ConstantInt::get( 603 llvm::Type::getInt32Ty(CGF.getLLVMContext()), Offset), 604 "ap.next"); 605 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 606 607 return AddrTyped; 608} 609 610void X86_32TargetCodeGenInfo::SetTargetAttributes(const Decl *D, 611 llvm::GlobalValue *GV, 612 CodeGen::CodeGenModule &CGM) const { 613 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) { 614 if (FD->hasAttr<X86ForceAlignArgPointerAttr>()) { 615 // Get the LLVM function. 616 llvm::Function *Fn = cast<llvm::Function>(GV); 617 618 // Now add the 'alignstack' attribute with a value of 16. 619 Fn->addFnAttr(llvm::Attribute::constructStackAlignmentFromInt(16)); 620 } 621 } 622} 623 624bool X86_32TargetCodeGenInfo::initDwarfEHRegSizeTable( 625 CodeGen::CodeGenFunction &CGF, 626 llvm::Value *Address) const { 627 CodeGen::CGBuilderTy &Builder = CGF.Builder; 628 llvm::LLVMContext &Context = CGF.getLLVMContext(); 629 630 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 631 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 632 633 // 0-7 are the eight integer registers; the order is different 634 // on Darwin (for EH), but the range is the same. 635 // 8 is %eip. 636 AssignToArrayRange(Builder, Address, Four8, 0, 8); 637 638 if (CGF.CGM.isTargetDarwin()) { 639 // 12-16 are st(0..4). Not sure why we stop at 4. 640 // These have size 16, which is sizeof(long double) on 641 // platforms with 8-byte alignment for that type. 642 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16); 643 AssignToArrayRange(Builder, Address, Sixteen8, 12, 16); 644 645 } else { 646 // 9 is %eflags, which doesn't get a size on Darwin for some 647 // reason. 648 Builder.CreateStore(Four8, Builder.CreateConstInBoundsGEP1_32(Address, 9)); 649 650 // 11-16 are st(0..5). Not sure why we stop at 5. 651 // These have size 12, which is sizeof(long double) on 652 // platforms with 4-byte alignment for that type. 653 llvm::Value *Twelve8 = llvm::ConstantInt::get(i8, 12); 654 AssignToArrayRange(Builder, Address, Twelve8, 11, 16); 655 } 656 657 return false; 658} 659 660namespace { 661/// X86_64ABIInfo - The X86_64 ABI information. 662class X86_64ABIInfo : public ABIInfo { 663 enum Class { 664 Integer = 0, 665 SSE, 666 SSEUp, 667 X87, 668 X87Up, 669 ComplexX87, 670 NoClass, 671 Memory 672 }; 673 674 /// merge - Implement the X86_64 ABI merging algorithm. 675 /// 676 /// Merge an accumulating classification \arg Accum with a field 677 /// classification \arg Field. 678 /// 679 /// \param Accum - The accumulating classification. This should 680 /// always be either NoClass or the result of a previous merge 681 /// call. In addition, this should never be Memory (the caller 682 /// should just return Memory for the aggregate). 683 Class merge(Class Accum, Class Field) const; 684 685 /// classify - Determine the x86_64 register classes in which the 686 /// given type T should be passed. 687 /// 688 /// \param Lo - The classification for the parts of the type 689 /// residing in the low word of the containing object. 690 /// 691 /// \param Hi - The classification for the parts of the type 692 /// residing in the high word of the containing object. 693 /// 694 /// \param OffsetBase - The bit offset of this type in the 695 /// containing object. Some parameters are classified different 696 /// depending on whether they straddle an eightbyte boundary. 697 /// 698 /// If a word is unused its result will be NoClass; if a type should 699 /// be passed in Memory then at least the classification of \arg Lo 700 /// will be Memory. 701 /// 702 /// The \arg Lo class will be NoClass iff the argument is ignored. 703 /// 704 /// If the \arg Lo class is ComplexX87, then the \arg Hi class will 705 /// also be ComplexX87. 706 void classify(QualType T, ASTContext &Context, uint64_t OffsetBase, 707 Class &Lo, Class &Hi) const; 708 709 /// getCoerceResult - Given a source type \arg Ty and an LLVM type 710 /// to coerce to, chose the best way to pass Ty in the same place 711 /// that \arg CoerceTo would be passed, but while keeping the 712 /// emitted code as simple as possible. 713 /// 714 /// FIXME: Note, this should be cleaned up to just take an enumeration of all 715 /// the ways we might want to pass things, instead of constructing an LLVM 716 /// type. This makes this code more explicit, and it makes it clearer that we 717 /// are also doing this for correctness in the case of passing scalar types. 718 ABIArgInfo getCoerceResult(QualType Ty, 719 const llvm::Type *CoerceTo, 720 ASTContext &Context) const; 721 722 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 723 /// such that the argument will be returned in memory. 724 ABIArgInfo getIndirectReturnResult(QualType Ty, ASTContext &Context) const; 725 726 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 727 /// such that the argument will be passed in memory. 728 ABIArgInfo getIndirectResult(QualType Ty, ASTContext &Context) const; 729 730 ABIArgInfo classifyReturnType(QualType RetTy, 731 ASTContext &Context, 732 llvm::LLVMContext &VMContext) const; 733 734 ABIArgInfo classifyArgumentType(QualType Ty, 735 ASTContext &Context, 736 llvm::LLVMContext &VMContext, 737 unsigned &neededInt, 738 unsigned &neededSSE) const; 739 740public: 741 virtual void computeInfo(CGFunctionInfo &FI, ASTContext &Context, 742 llvm::LLVMContext &VMContext) const; 743 744 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 745 CodeGenFunction &CGF) const; 746}; 747 748class X86_64TargetCodeGenInfo : public TargetCodeGenInfo { 749public: 750 X86_64TargetCodeGenInfo():TargetCodeGenInfo(new X86_64ABIInfo()) {} 751 752 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 753 return 7; 754 } 755 756 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 757 llvm::Value *Address) const { 758 CodeGen::CGBuilderTy &Builder = CGF.Builder; 759 llvm::LLVMContext &Context = CGF.getLLVMContext(); 760 761 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 762 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 763 764 // 0-15 are the 16 integer registers. 765 // 16 is %rip. 766 AssignToArrayRange(Builder, Address, Eight8, 0, 16); 767 768 return false; 769 } 770}; 771 772} 773 774X86_64ABIInfo::Class X86_64ABIInfo::merge(Class Accum, 775 Class Field) const { 776 // AMD64-ABI 3.2.3p2: Rule 4. Each field of an object is 777 // classified recursively so that always two fields are 778 // considered. The resulting class is calculated according to 779 // the classes of the fields in the eightbyte: 780 // 781 // (a) If both classes are equal, this is the resulting class. 782 // 783 // (b) If one of the classes is NO_CLASS, the resulting class is 784 // the other class. 785 // 786 // (c) If one of the classes is MEMORY, the result is the MEMORY 787 // class. 788 // 789 // (d) If one of the classes is INTEGER, the result is the 790 // INTEGER. 791 // 792 // (e) If one of the classes is X87, X87UP, COMPLEX_X87 class, 793 // MEMORY is used as class. 794 // 795 // (f) Otherwise class SSE is used. 796 797 // Accum should never be memory (we should have returned) or 798 // ComplexX87 (because this cannot be passed in a structure). 799 assert((Accum != Memory && Accum != ComplexX87) && 800 "Invalid accumulated classification during merge."); 801 if (Accum == Field || Field == NoClass) 802 return Accum; 803 else if (Field == Memory) 804 return Memory; 805 else if (Accum == NoClass) 806 return Field; 807 else if (Accum == Integer || Field == Integer) 808 return Integer; 809 else if (Field == X87 || Field == X87Up || Field == ComplexX87 || 810 Accum == X87 || Accum == X87Up) 811 return Memory; 812 else 813 return SSE; 814} 815 816void X86_64ABIInfo::classify(QualType Ty, 817 ASTContext &Context, 818 uint64_t OffsetBase, 819 Class &Lo, Class &Hi) const { 820 // FIXME: This code can be simplified by introducing a simple value class for 821 // Class pairs with appropriate constructor methods for the various 822 // situations. 823 824 // FIXME: Some of the split computations are wrong; unaligned vectors 825 // shouldn't be passed in registers for example, so there is no chance they 826 // can straddle an eightbyte. Verify & simplify. 827 828 Lo = Hi = NoClass; 829 830 Class &Current = OffsetBase < 64 ? Lo : Hi; 831 Current = Memory; 832 833 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) { 834 BuiltinType::Kind k = BT->getKind(); 835 836 if (k == BuiltinType::Void) { 837 Current = NoClass; 838 } else if (k == BuiltinType::Int128 || k == BuiltinType::UInt128) { 839 Lo = Integer; 840 Hi = Integer; 841 } else if (k >= BuiltinType::Bool && k <= BuiltinType::LongLong) { 842 Current = Integer; 843 } else if (k == BuiltinType::Float || k == BuiltinType::Double) { 844 Current = SSE; 845 } else if (k == BuiltinType::LongDouble) { 846 Lo = X87; 847 Hi = X87Up; 848 } 849 // FIXME: _Decimal32 and _Decimal64 are SSE. 850 // FIXME: _float128 and _Decimal128 are (SSE, SSEUp). 851 } else if (const EnumType *ET = Ty->getAs<EnumType>()) { 852 // Classify the underlying integer type. 853 classify(ET->getDecl()->getIntegerType(), Context, OffsetBase, Lo, Hi); 854 } else if (Ty->hasPointerRepresentation()) { 855 Current = Integer; 856 } else if (Ty->isMemberPointerType()) { 857 if (Ty->isMemberFunctionPointerType()) 858 Lo = Hi = Integer; 859 else 860 Current = Integer; 861 } else if (const VectorType *VT = Ty->getAs<VectorType>()) { 862 uint64_t Size = Context.getTypeSize(VT); 863 if (Size == 32) { 864 // gcc passes all <4 x char>, <2 x short>, <1 x int>, <1 x 865 // float> as integer. 866 Current = Integer; 867 868 // If this type crosses an eightbyte boundary, it should be 869 // split. 870 uint64_t EB_Real = (OffsetBase) / 64; 871 uint64_t EB_Imag = (OffsetBase + Size - 1) / 64; 872 if (EB_Real != EB_Imag) 873 Hi = Lo; 874 } else if (Size == 64) { 875 // gcc passes <1 x double> in memory. :( 876 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::Double)) 877 return; 878 879 // gcc passes <1 x long long> as INTEGER. 880 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::LongLong)) 881 Current = Integer; 882 else 883 Current = SSE; 884 885 // If this type crosses an eightbyte boundary, it should be 886 // split. 887 if (OffsetBase && OffsetBase != 64) 888 Hi = Lo; 889 } else if (Size == 128) { 890 Lo = SSE; 891 Hi = SSEUp; 892 } 893 } else if (const ComplexType *CT = Ty->getAs<ComplexType>()) { 894 QualType ET = Context.getCanonicalType(CT->getElementType()); 895 896 uint64_t Size = Context.getTypeSize(Ty); 897 if (ET->isIntegralType()) { 898 if (Size <= 64) 899 Current = Integer; 900 else if (Size <= 128) 901 Lo = Hi = Integer; 902 } else if (ET == Context.FloatTy) 903 Current = SSE; 904 else if (ET == Context.DoubleTy) 905 Lo = Hi = SSE; 906 else if (ET == Context.LongDoubleTy) 907 Current = ComplexX87; 908 909 // If this complex type crosses an eightbyte boundary then it 910 // should be split. 911 uint64_t EB_Real = (OffsetBase) / 64; 912 uint64_t EB_Imag = (OffsetBase + Context.getTypeSize(ET)) / 64; 913 if (Hi == NoClass && EB_Real != EB_Imag) 914 Hi = Lo; 915 } else if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) { 916 // Arrays are treated like structures. 917 918 uint64_t Size = Context.getTypeSize(Ty); 919 920 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger 921 // than two eightbytes, ..., it has class MEMORY. 922 if (Size > 128) 923 return; 924 925 // AMD64-ABI 3.2.3p2: Rule 1. If ..., or it contains unaligned 926 // fields, it has class MEMORY. 927 // 928 // Only need to check alignment of array base. 929 if (OffsetBase % Context.getTypeAlign(AT->getElementType())) 930 return; 931 932 // Otherwise implement simplified merge. We could be smarter about 933 // this, but it isn't worth it and would be harder to verify. 934 Current = NoClass; 935 uint64_t EltSize = Context.getTypeSize(AT->getElementType()); 936 uint64_t ArraySize = AT->getSize().getZExtValue(); 937 for (uint64_t i=0, Offset=OffsetBase; i<ArraySize; ++i, Offset += EltSize) { 938 Class FieldLo, FieldHi; 939 classify(AT->getElementType(), Context, Offset, FieldLo, FieldHi); 940 Lo = merge(Lo, FieldLo); 941 Hi = merge(Hi, FieldHi); 942 if (Lo == Memory || Hi == Memory) 943 break; 944 } 945 946 // Do post merger cleanup (see below). Only case we worry about is Memory. 947 if (Hi == Memory) 948 Lo = Memory; 949 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp array classification."); 950 } else if (const RecordType *RT = Ty->getAs<RecordType>()) { 951 uint64_t Size = Context.getTypeSize(Ty); 952 953 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger 954 // than two eightbytes, ..., it has class MEMORY. 955 if (Size > 128) 956 return; 957 958 // AMD64-ABI 3.2.3p2: Rule 2. If a C++ object has either a non-trivial 959 // copy constructor or a non-trivial destructor, it is passed by invisible 960 // reference. 961 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 962 return; 963 964 const RecordDecl *RD = RT->getDecl(); 965 966 // Assume variable sized types are passed in memory. 967 if (RD->hasFlexibleArrayMember()) 968 return; 969 970 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD); 971 972 // Reset Lo class, this will be recomputed. 973 Current = NoClass; 974 975 // If this is a C++ record, classify the bases first. 976 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 977 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 978 e = CXXRD->bases_end(); i != e; ++i) { 979 assert(!i->isVirtual() && !i->getType()->isDependentType() && 980 "Unexpected base class!"); 981 const CXXRecordDecl *Base = 982 cast<CXXRecordDecl>(i->getType()->getAs<RecordType>()->getDecl()); 983 984 // Classify this field. 985 // 986 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate exceeds a 987 // single eightbyte, each is classified separately. Each eightbyte gets 988 // initialized to class NO_CLASS. 989 Class FieldLo, FieldHi; 990 uint64_t Offset = OffsetBase + Layout.getBaseClassOffset(Base); 991 classify(i->getType(), Context, Offset, FieldLo, FieldHi); 992 Lo = merge(Lo, FieldLo); 993 Hi = merge(Hi, FieldHi); 994 if (Lo == Memory || Hi == Memory) 995 break; 996 } 997 998 // If this record has no fields but isn't empty, classify as INTEGER. 999 if (RD->field_empty() && Size) 1000 Current = Integer; 1001 } 1002 1003 // Classify the fields one at a time, merging the results. 1004 unsigned idx = 0; 1005 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 1006 i != e; ++i, ++idx) { 1007 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx); 1008 bool BitField = i->isBitField(); 1009 1010 // AMD64-ABI 3.2.3p2: Rule 1. If ..., or it contains unaligned 1011 // fields, it has class MEMORY. 1012 // 1013 // Note, skip this test for bit-fields, see below. 1014 if (!BitField && Offset % Context.getTypeAlign(i->getType())) { 1015 Lo = Memory; 1016 return; 1017 } 1018 1019 // Classify this field. 1020 // 1021 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate 1022 // exceeds a single eightbyte, each is classified 1023 // separately. Each eightbyte gets initialized to class 1024 // NO_CLASS. 1025 Class FieldLo, FieldHi; 1026 1027 // Bit-fields require special handling, they do not force the 1028 // structure to be passed in memory even if unaligned, and 1029 // therefore they can straddle an eightbyte. 1030 if (BitField) { 1031 // Ignore padding bit-fields. 1032 if (i->isUnnamedBitfield()) 1033 continue; 1034 1035 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx); 1036 uint64_t Size = i->getBitWidth()->EvaluateAsInt(Context).getZExtValue(); 1037 1038 uint64_t EB_Lo = Offset / 64; 1039 uint64_t EB_Hi = (Offset + Size - 1) / 64; 1040 FieldLo = FieldHi = NoClass; 1041 if (EB_Lo) { 1042 assert(EB_Hi == EB_Lo && "Invalid classification, type > 16 bytes."); 1043 FieldLo = NoClass; 1044 FieldHi = Integer; 1045 } else { 1046 FieldLo = Integer; 1047 FieldHi = EB_Hi ? Integer : NoClass; 1048 } 1049 } else 1050 classify(i->getType(), Context, Offset, FieldLo, FieldHi); 1051 Lo = merge(Lo, FieldLo); 1052 Hi = merge(Hi, FieldHi); 1053 if (Lo == Memory || Hi == Memory) 1054 break; 1055 } 1056 1057 // AMD64-ABI 3.2.3p2: Rule 5. Then a post merger cleanup is done: 1058 // 1059 // (a) If one of the classes is MEMORY, the whole argument is 1060 // passed in memory. 1061 // 1062 // (b) If SSEUP is not preceeded by SSE, it is converted to SSE. 1063 1064 // The first of these conditions is guaranteed by how we implement 1065 // the merge (just bail). 1066 // 1067 // The second condition occurs in the case of unions; for example 1068 // union { _Complex double; unsigned; }. 1069 if (Hi == Memory) 1070 Lo = Memory; 1071 if (Hi == SSEUp && Lo != SSE) 1072 Hi = SSE; 1073 } 1074} 1075 1076ABIArgInfo X86_64ABIInfo::getCoerceResult(QualType Ty, 1077 const llvm::Type *CoerceTo, 1078 ASTContext &Context) const { 1079 if (CoerceTo == llvm::Type::getInt64Ty(CoerceTo->getContext())) { 1080 // Integer and pointer types will end up in a general purpose 1081 // register. 1082 1083 // Treat an enum type as its underlying type. 1084 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1085 Ty = EnumTy->getDecl()->getIntegerType(); 1086 1087 if (Ty->isIntegralType() || Ty->hasPointerRepresentation()) 1088 return (Ty->isPromotableIntegerType() ? 1089 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1090 } else if (CoerceTo == llvm::Type::getDoubleTy(CoerceTo->getContext())) { 1091 assert(Ty.isCanonical() && "should always have a canonical type here"); 1092 assert(!Ty.hasQualifiers() && "should never have a qualified type here"); 1093 1094 // Float and double end up in a single SSE reg. 1095 if (Ty == Context.FloatTy || Ty == Context.DoubleTy) 1096 return ABIArgInfo::getDirect(); 1097 1098 } 1099 1100 return ABIArgInfo::getCoerce(CoerceTo); 1101} 1102 1103ABIArgInfo X86_64ABIInfo::getIndirectReturnResult(QualType Ty, 1104 ASTContext &Context) const { 1105 // If this is a scalar LLVM value then assume LLVM will pass it in the right 1106 // place naturally. 1107 if (!CodeGenFunction::hasAggregateLLVMType(Ty)) { 1108 // Treat an enum type as its underlying type. 1109 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1110 Ty = EnumTy->getDecl()->getIntegerType(); 1111 1112 return (Ty->isPromotableIntegerType() ? 1113 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1114 } 1115 1116 return ABIArgInfo::getIndirect(0); 1117} 1118 1119ABIArgInfo X86_64ABIInfo::getIndirectResult(QualType Ty, 1120 ASTContext &Context) const { 1121 // If this is a scalar LLVM value then assume LLVM will pass it in the right 1122 // place naturally. 1123 if (!CodeGenFunction::hasAggregateLLVMType(Ty)) { 1124 // Treat an enum type as its underlying type. 1125 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1126 Ty = EnumTy->getDecl()->getIntegerType(); 1127 1128 return (Ty->isPromotableIntegerType() ? 1129 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1130 } 1131 1132 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 1133 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 1134 1135 // Compute the byval alignment. We trust the back-end to honor the 1136 // minimum ABI alignment for byval, to make cleaner IR. 1137 const unsigned MinABIAlign = 8; 1138 unsigned Align = Context.getTypeAlign(Ty) / 8; 1139 if (Align > MinABIAlign) 1140 return ABIArgInfo::getIndirect(Align); 1141 return ABIArgInfo::getIndirect(0); 1142} 1143 1144ABIArgInfo X86_64ABIInfo::classifyReturnType(QualType RetTy, 1145 ASTContext &Context, 1146 llvm::LLVMContext &VMContext) const { 1147 // AMD64-ABI 3.2.3p4: Rule 1. Classify the return type with the 1148 // classification algorithm. 1149 X86_64ABIInfo::Class Lo, Hi; 1150 classify(RetTy, Context, 0, Lo, Hi); 1151 1152 // Check some invariants. 1153 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification."); 1154 assert((Lo != NoClass || Hi == NoClass) && "Invalid null classification."); 1155 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification."); 1156 1157 const llvm::Type *ResType = 0; 1158 switch (Lo) { 1159 case NoClass: 1160 return ABIArgInfo::getIgnore(); 1161 1162 case SSEUp: 1163 case X87Up: 1164 assert(0 && "Invalid classification for lo word."); 1165 1166 // AMD64-ABI 3.2.3p4: Rule 2. Types of class memory are returned via 1167 // hidden argument. 1168 case Memory: 1169 return getIndirectReturnResult(RetTy, Context); 1170 1171 // AMD64-ABI 3.2.3p4: Rule 3. If the class is INTEGER, the next 1172 // available register of the sequence %rax, %rdx is used. 1173 case Integer: 1174 ResType = llvm::Type::getInt64Ty(VMContext); break; 1175 1176 // AMD64-ABI 3.2.3p4: Rule 4. If the class is SSE, the next 1177 // available SSE register of the sequence %xmm0, %xmm1 is used. 1178 case SSE: 1179 ResType = llvm::Type::getDoubleTy(VMContext); break; 1180 1181 // AMD64-ABI 3.2.3p4: Rule 6. If the class is X87, the value is 1182 // returned on the X87 stack in %st0 as 80-bit x87 number. 1183 case X87: 1184 ResType = llvm::Type::getX86_FP80Ty(VMContext); break; 1185 1186 // AMD64-ABI 3.2.3p4: Rule 8. If the class is COMPLEX_X87, the real 1187 // part of the value is returned in %st0 and the imaginary part in 1188 // %st1. 1189 case ComplexX87: 1190 assert(Hi == ComplexX87 && "Unexpected ComplexX87 classification."); 1191 ResType = llvm::StructType::get(VMContext, 1192 llvm::Type::getX86_FP80Ty(VMContext), 1193 llvm::Type::getX86_FP80Ty(VMContext), 1194 NULL); 1195 break; 1196 } 1197 1198 switch (Hi) { 1199 // Memory was handled previously and X87 should 1200 // never occur as a hi class. 1201 case Memory: 1202 case X87: 1203 assert(0 && "Invalid classification for hi word."); 1204 1205 case ComplexX87: // Previously handled. 1206 case NoClass: break; 1207 1208 case Integer: 1209 ResType = llvm::StructType::get(VMContext, ResType, 1210 llvm::Type::getInt64Ty(VMContext), NULL); 1211 break; 1212 case SSE: 1213 ResType = llvm::StructType::get(VMContext, ResType, 1214 llvm::Type::getDoubleTy(VMContext), NULL); 1215 break; 1216 1217 // AMD64-ABI 3.2.3p4: Rule 5. If the class is SSEUP, the eightbyte 1218 // is passed in the upper half of the last used SSE register. 1219 // 1220 // SSEUP should always be preceeded by SSE, just widen. 1221 case SSEUp: 1222 assert(Lo == SSE && "Unexpected SSEUp classification."); 1223 ResType = llvm::VectorType::get(llvm::Type::getDoubleTy(VMContext), 2); 1224 break; 1225 1226 // AMD64-ABI 3.2.3p4: Rule 7. If the class is X87UP, the value is 1227 // returned together with the previous X87 value in %st0. 1228 case X87Up: 1229 // If X87Up is preceeded by X87, we don't need to do 1230 // anything. However, in some cases with unions it may not be 1231 // preceeded by X87. In such situations we follow gcc and pass the 1232 // extra bits in an SSE reg. 1233 if (Lo != X87) 1234 ResType = llvm::StructType::get(VMContext, ResType, 1235 llvm::Type::getDoubleTy(VMContext), NULL); 1236 break; 1237 } 1238 1239 return getCoerceResult(RetTy, ResType, Context); 1240} 1241 1242ABIArgInfo X86_64ABIInfo::classifyArgumentType(QualType Ty, ASTContext &Context, 1243 llvm::LLVMContext &VMContext, 1244 unsigned &neededInt, 1245 unsigned &neededSSE) const { 1246 X86_64ABIInfo::Class Lo, Hi; 1247 classify(Ty, Context, 0, Lo, Hi); 1248 1249 // Check some invariants. 1250 // FIXME: Enforce these by construction. 1251 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification."); 1252 assert((Lo != NoClass || Hi == NoClass) && "Invalid null classification."); 1253 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification."); 1254 1255 neededInt = 0; 1256 neededSSE = 0; 1257 const llvm::Type *ResType = 0; 1258 switch (Lo) { 1259 case NoClass: 1260 return ABIArgInfo::getIgnore(); 1261 1262 // AMD64-ABI 3.2.3p3: Rule 1. If the class is MEMORY, pass the argument 1263 // on the stack. 1264 case Memory: 1265 1266 // AMD64-ABI 3.2.3p3: Rule 5. If the class is X87, X87UP or 1267 // COMPLEX_X87, it is passed in memory. 1268 case X87: 1269 case ComplexX87: 1270 return getIndirectResult(Ty, Context); 1271 1272 case SSEUp: 1273 case X87Up: 1274 assert(0 && "Invalid classification for lo word."); 1275 1276 // AMD64-ABI 3.2.3p3: Rule 2. If the class is INTEGER, the next 1277 // available register of the sequence %rdi, %rsi, %rdx, %rcx, %r8 1278 // and %r9 is used. 1279 case Integer: 1280 ++neededInt; 1281 ResType = llvm::Type::getInt64Ty(VMContext); 1282 break; 1283 1284 // AMD64-ABI 3.2.3p3: Rule 3. If the class is SSE, the next 1285 // available SSE register is used, the registers are taken in the 1286 // order from %xmm0 to %xmm7. 1287 case SSE: 1288 ++neededSSE; 1289 ResType = llvm::Type::getDoubleTy(VMContext); 1290 break; 1291 } 1292 1293 switch (Hi) { 1294 // Memory was handled previously, ComplexX87 and X87 should 1295 // never occur as hi classes, and X87Up must be preceed by X87, 1296 // which is passed in memory. 1297 case Memory: 1298 case X87: 1299 case ComplexX87: 1300 assert(0 && "Invalid classification for hi word."); 1301 break; 1302 1303 case NoClass: break; 1304 case Integer: 1305 ResType = llvm::StructType::get(VMContext, ResType, 1306 llvm::Type::getInt64Ty(VMContext), NULL); 1307 ++neededInt; 1308 break; 1309 1310 // X87Up generally doesn't occur here (long double is passed in 1311 // memory), except in situations involving unions. 1312 case X87Up: 1313 case SSE: 1314 ResType = llvm::StructType::get(VMContext, ResType, 1315 llvm::Type::getDoubleTy(VMContext), NULL); 1316 ++neededSSE; 1317 break; 1318 1319 // AMD64-ABI 3.2.3p3: Rule 4. If the class is SSEUP, the 1320 // eightbyte is passed in the upper half of the last used SSE 1321 // register. 1322 case SSEUp: 1323 assert(Lo == SSE && "Unexpected SSEUp classification."); 1324 ResType = llvm::VectorType::get(llvm::Type::getDoubleTy(VMContext), 2); 1325 break; 1326 } 1327 1328 return getCoerceResult(Ty, ResType, Context); 1329} 1330 1331void X86_64ABIInfo::computeInfo(CGFunctionInfo &FI, ASTContext &Context, 1332 llvm::LLVMContext &VMContext) const { 1333 FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), 1334 Context, VMContext); 1335 1336 // Keep track of the number of assigned registers. 1337 unsigned freeIntRegs = 6, freeSSERegs = 8; 1338 1339 // If the return value is indirect, then the hidden argument is consuming one 1340 // integer register. 1341 if (FI.getReturnInfo().isIndirect()) 1342 --freeIntRegs; 1343 1344 // AMD64-ABI 3.2.3p3: Once arguments are classified, the registers 1345 // get assigned (in left-to-right order) for passing as follows... 1346 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 1347 it != ie; ++it) { 1348 unsigned neededInt, neededSSE; 1349 it->info = classifyArgumentType(it->type, Context, VMContext, 1350 neededInt, neededSSE); 1351 1352 // AMD64-ABI 3.2.3p3: If there are no registers available for any 1353 // eightbyte of an argument, the whole argument is passed on the 1354 // stack. If registers have already been assigned for some 1355 // eightbytes of such an argument, the assignments get reverted. 1356 if (freeIntRegs >= neededInt && freeSSERegs >= neededSSE) { 1357 freeIntRegs -= neededInt; 1358 freeSSERegs -= neededSSE; 1359 } else { 1360 it->info = getIndirectResult(it->type, Context); 1361 } 1362 } 1363} 1364 1365static llvm::Value *EmitVAArgFromMemory(llvm::Value *VAListAddr, 1366 QualType Ty, 1367 CodeGenFunction &CGF) { 1368 llvm::Value *overflow_arg_area_p = 1369 CGF.Builder.CreateStructGEP(VAListAddr, 2, "overflow_arg_area_p"); 1370 llvm::Value *overflow_arg_area = 1371 CGF.Builder.CreateLoad(overflow_arg_area_p, "overflow_arg_area"); 1372 1373 // AMD64-ABI 3.5.7p5: Step 7. Align l->overflow_arg_area upwards to a 16 1374 // byte boundary if alignment needed by type exceeds 8 byte boundary. 1375 uint64_t Align = CGF.getContext().getTypeAlign(Ty) / 8; 1376 if (Align > 8) { 1377 // Note that we follow the ABI & gcc here, even though the type 1378 // could in theory have an alignment greater than 16. This case 1379 // shouldn't ever matter in practice. 1380 1381 // overflow_arg_area = (overflow_arg_area + 15) & ~15; 1382 llvm::Value *Offset = 1383 llvm::ConstantInt::get(llvm::Type::getInt32Ty(CGF.getLLVMContext()), 15); 1384 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset); 1385 llvm::Value *AsInt = CGF.Builder.CreatePtrToInt(overflow_arg_area, 1386 llvm::Type::getInt64Ty(CGF.getLLVMContext())); 1387 llvm::Value *Mask = llvm::ConstantInt::get( 1388 llvm::Type::getInt64Ty(CGF.getLLVMContext()), ~15LL); 1389 overflow_arg_area = 1390 CGF.Builder.CreateIntToPtr(CGF.Builder.CreateAnd(AsInt, Mask), 1391 overflow_arg_area->getType(), 1392 "overflow_arg_area.align"); 1393 } 1394 1395 // AMD64-ABI 3.5.7p5: Step 8. Fetch type from l->overflow_arg_area. 1396 const llvm::Type *LTy = CGF.ConvertTypeForMem(Ty); 1397 llvm::Value *Res = 1398 CGF.Builder.CreateBitCast(overflow_arg_area, 1399 llvm::PointerType::getUnqual(LTy)); 1400 1401 // AMD64-ABI 3.5.7p5: Step 9. Set l->overflow_arg_area to: 1402 // l->overflow_arg_area + sizeof(type). 1403 // AMD64-ABI 3.5.7p5: Step 10. Align l->overflow_arg_area upwards to 1404 // an 8 byte boundary. 1405 1406 uint64_t SizeInBytes = (CGF.getContext().getTypeSize(Ty) + 7) / 8; 1407 llvm::Value *Offset = 1408 llvm::ConstantInt::get(llvm::Type::getInt32Ty(CGF.getLLVMContext()), 1409 (SizeInBytes + 7) & ~7); 1410 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset, 1411 "overflow_arg_area.next"); 1412 CGF.Builder.CreateStore(overflow_arg_area, overflow_arg_area_p); 1413 1414 // AMD64-ABI 3.5.7p5: Step 11. Return the fetched type. 1415 return Res; 1416} 1417 1418llvm::Value *X86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1419 CodeGenFunction &CGF) const { 1420 llvm::LLVMContext &VMContext = CGF.getLLVMContext(); 1421 const llvm::Type *i32Ty = llvm::Type::getInt32Ty(VMContext); 1422 const llvm::Type *DoubleTy = llvm::Type::getDoubleTy(VMContext); 1423 1424 // Assume that va_list type is correct; should be pointer to LLVM type: 1425 // struct { 1426 // i32 gp_offset; 1427 // i32 fp_offset; 1428 // i8* overflow_arg_area; 1429 // i8* reg_save_area; 1430 // }; 1431 unsigned neededInt, neededSSE; 1432 1433 Ty = CGF.getContext().getCanonicalType(Ty); 1434 ABIArgInfo AI = classifyArgumentType(Ty, CGF.getContext(), VMContext, 1435 neededInt, neededSSE); 1436 1437 // AMD64-ABI 3.5.7p5: Step 1. Determine whether type may be passed 1438 // in the registers. If not go to step 7. 1439 if (!neededInt && !neededSSE) 1440 return EmitVAArgFromMemory(VAListAddr, Ty, CGF); 1441 1442 // AMD64-ABI 3.5.7p5: Step 2. Compute num_gp to hold the number of 1443 // general purpose registers needed to pass type and num_fp to hold 1444 // the number of floating point registers needed. 1445 1446 // AMD64-ABI 3.5.7p5: Step 3. Verify whether arguments fit into 1447 // registers. In the case: l->gp_offset > 48 - num_gp * 8 or 1448 // l->fp_offset > 304 - num_fp * 16 go to step 7. 1449 // 1450 // NOTE: 304 is a typo, there are (6 * 8 + 8 * 16) = 176 bytes of 1451 // register save space). 1452 1453 llvm::Value *InRegs = 0; 1454 llvm::Value *gp_offset_p = 0, *gp_offset = 0; 1455 llvm::Value *fp_offset_p = 0, *fp_offset = 0; 1456 if (neededInt) { 1457 gp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 0, "gp_offset_p"); 1458 gp_offset = CGF.Builder.CreateLoad(gp_offset_p, "gp_offset"); 1459 InRegs = 1460 CGF.Builder.CreateICmpULE(gp_offset, 1461 llvm::ConstantInt::get(i32Ty, 1462 48 - neededInt * 8), 1463 "fits_in_gp"); 1464 } 1465 1466 if (neededSSE) { 1467 fp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 1, "fp_offset_p"); 1468 fp_offset = CGF.Builder.CreateLoad(fp_offset_p, "fp_offset"); 1469 llvm::Value *FitsInFP = 1470 CGF.Builder.CreateICmpULE(fp_offset, 1471 llvm::ConstantInt::get(i32Ty, 1472 176 - neededSSE * 16), 1473 "fits_in_fp"); 1474 InRegs = InRegs ? CGF.Builder.CreateAnd(InRegs, FitsInFP) : FitsInFP; 1475 } 1476 1477 llvm::BasicBlock *InRegBlock = CGF.createBasicBlock("vaarg.in_reg"); 1478 llvm::BasicBlock *InMemBlock = CGF.createBasicBlock("vaarg.in_mem"); 1479 llvm::BasicBlock *ContBlock = CGF.createBasicBlock("vaarg.end"); 1480 CGF.Builder.CreateCondBr(InRegs, InRegBlock, InMemBlock); 1481 1482 // Emit code to load the value if it was passed in registers. 1483 1484 CGF.EmitBlock(InRegBlock); 1485 1486 // AMD64-ABI 3.5.7p5: Step 4. Fetch type from l->reg_save_area with 1487 // an offset of l->gp_offset and/or l->fp_offset. This may require 1488 // copying to a temporary location in case the parameter is passed 1489 // in different register classes or requires an alignment greater 1490 // than 8 for general purpose registers and 16 for XMM registers. 1491 // 1492 // FIXME: This really results in shameful code when we end up needing to 1493 // collect arguments from different places; often what should result in a 1494 // simple assembling of a structure from scattered addresses has many more 1495 // loads than necessary. Can we clean this up? 1496 const llvm::Type *LTy = CGF.ConvertTypeForMem(Ty); 1497 llvm::Value *RegAddr = 1498 CGF.Builder.CreateLoad(CGF.Builder.CreateStructGEP(VAListAddr, 3), 1499 "reg_save_area"); 1500 if (neededInt && neededSSE) { 1501 // FIXME: Cleanup. 1502 assert(AI.isCoerce() && "Unexpected ABI info for mixed regs"); 1503 const llvm::StructType *ST = cast<llvm::StructType>(AI.getCoerceToType()); 1504 llvm::Value *Tmp = CGF.CreateTempAlloca(ST); 1505 assert(ST->getNumElements() == 2 && "Unexpected ABI info for mixed regs"); 1506 const llvm::Type *TyLo = ST->getElementType(0); 1507 const llvm::Type *TyHi = ST->getElementType(1); 1508 assert((TyLo->isFloatingPointTy() ^ TyHi->isFloatingPointTy()) && 1509 "Unexpected ABI info for mixed regs"); 1510 const llvm::Type *PTyLo = llvm::PointerType::getUnqual(TyLo); 1511 const llvm::Type *PTyHi = llvm::PointerType::getUnqual(TyHi); 1512 llvm::Value *GPAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset); 1513 llvm::Value *FPAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset); 1514 llvm::Value *RegLoAddr = TyLo->isFloatingPointTy() ? FPAddr : GPAddr; 1515 llvm::Value *RegHiAddr = TyLo->isFloatingPointTy() ? GPAddr : FPAddr; 1516 llvm::Value *V = 1517 CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegLoAddr, PTyLo)); 1518 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0)); 1519 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegHiAddr, PTyHi)); 1520 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1)); 1521 1522 RegAddr = CGF.Builder.CreateBitCast(Tmp, 1523 llvm::PointerType::getUnqual(LTy)); 1524 } else if (neededInt) { 1525 RegAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset); 1526 RegAddr = CGF.Builder.CreateBitCast(RegAddr, 1527 llvm::PointerType::getUnqual(LTy)); 1528 } else { 1529 if (neededSSE == 1) { 1530 RegAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset); 1531 RegAddr = CGF.Builder.CreateBitCast(RegAddr, 1532 llvm::PointerType::getUnqual(LTy)); 1533 } else { 1534 assert(neededSSE == 2 && "Invalid number of needed registers!"); 1535 // SSE registers are spaced 16 bytes apart in the register save 1536 // area, we need to collect the two eightbytes together. 1537 llvm::Value *RegAddrLo = CGF.Builder.CreateGEP(RegAddr, fp_offset); 1538 llvm::Value *RegAddrHi = 1539 CGF.Builder.CreateGEP(RegAddrLo, 1540 llvm::ConstantInt::get(i32Ty, 16)); 1541 const llvm::Type *DblPtrTy = 1542 llvm::PointerType::getUnqual(DoubleTy); 1543 const llvm::StructType *ST = llvm::StructType::get(VMContext, DoubleTy, 1544 DoubleTy, NULL); 1545 llvm::Value *V, *Tmp = CGF.CreateTempAlloca(ST); 1546 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrLo, 1547 DblPtrTy)); 1548 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0)); 1549 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrHi, 1550 DblPtrTy)); 1551 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1)); 1552 RegAddr = CGF.Builder.CreateBitCast(Tmp, 1553 llvm::PointerType::getUnqual(LTy)); 1554 } 1555 } 1556 1557 // AMD64-ABI 3.5.7p5: Step 5. Set: 1558 // l->gp_offset = l->gp_offset + num_gp * 8 1559 // l->fp_offset = l->fp_offset + num_fp * 16. 1560 if (neededInt) { 1561 llvm::Value *Offset = llvm::ConstantInt::get(i32Ty, neededInt * 8); 1562 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(gp_offset, Offset), 1563 gp_offset_p); 1564 } 1565 if (neededSSE) { 1566 llvm::Value *Offset = llvm::ConstantInt::get(i32Ty, neededSSE * 16); 1567 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(fp_offset, Offset), 1568 fp_offset_p); 1569 } 1570 CGF.EmitBranch(ContBlock); 1571 1572 // Emit code to load the value if it was passed in memory. 1573 1574 CGF.EmitBlock(InMemBlock); 1575 llvm::Value *MemAddr = EmitVAArgFromMemory(VAListAddr, Ty, CGF); 1576 1577 // Return the appropriate result. 1578 1579 CGF.EmitBlock(ContBlock); 1580 llvm::PHINode *ResAddr = CGF.Builder.CreatePHI(RegAddr->getType(), 1581 "vaarg.addr"); 1582 ResAddr->reserveOperandSpace(2); 1583 ResAddr->addIncoming(RegAddr, InRegBlock); 1584 ResAddr->addIncoming(MemAddr, InMemBlock); 1585 1586 return ResAddr; 1587} 1588 1589// PIC16 ABI Implementation 1590 1591namespace { 1592 1593class PIC16ABIInfo : public ABIInfo { 1594 ABIArgInfo classifyReturnType(QualType RetTy, 1595 ASTContext &Context, 1596 llvm::LLVMContext &VMContext) const; 1597 1598 ABIArgInfo classifyArgumentType(QualType RetTy, 1599 ASTContext &Context, 1600 llvm::LLVMContext &VMContext) const; 1601 1602 virtual void computeInfo(CGFunctionInfo &FI, ASTContext &Context, 1603 llvm::LLVMContext &VMContext) const { 1604 FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), Context, 1605 VMContext); 1606 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 1607 it != ie; ++it) 1608 it->info = classifyArgumentType(it->type, Context, VMContext); 1609 } 1610 1611 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1612 CodeGenFunction &CGF) const; 1613}; 1614 1615class PIC16TargetCodeGenInfo : public TargetCodeGenInfo { 1616public: 1617 PIC16TargetCodeGenInfo():TargetCodeGenInfo(new PIC16ABIInfo()) {} 1618}; 1619 1620} 1621 1622ABIArgInfo PIC16ABIInfo::classifyReturnType(QualType RetTy, 1623 ASTContext &Context, 1624 llvm::LLVMContext &VMContext) const { 1625 if (RetTy->isVoidType()) { 1626 return ABIArgInfo::getIgnore(); 1627 } else { 1628 return ABIArgInfo::getDirect(); 1629 } 1630} 1631 1632ABIArgInfo PIC16ABIInfo::classifyArgumentType(QualType Ty, 1633 ASTContext &Context, 1634 llvm::LLVMContext &VMContext) const { 1635 return ABIArgInfo::getDirect(); 1636} 1637 1638llvm::Value *PIC16ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1639 CodeGenFunction &CGF) const { 1640 const llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 1641 const llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 1642 1643 CGBuilderTy &Builder = CGF.Builder; 1644 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 1645 "ap"); 1646 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 1647 llvm::Type *PTy = 1648 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 1649 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 1650 1651 uint64_t Offset = CGF.getContext().getTypeSize(Ty) / 8; 1652 1653 llvm::Value *NextAddr = 1654 Builder.CreateGEP(Addr, llvm::ConstantInt::get( 1655 llvm::Type::getInt32Ty(CGF.getLLVMContext()), Offset), 1656 "ap.next"); 1657 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 1658 1659 return AddrTyped; 1660} 1661 1662 1663// PowerPC-32 1664 1665namespace { 1666class PPC32TargetCodeGenInfo : public DefaultTargetCodeGenInfo { 1667public: 1668 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 1669 // This is recovered from gcc output. 1670 return 1; // r1 is the dedicated stack pointer 1671 } 1672 1673 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 1674 llvm::Value *Address) const; 1675}; 1676 1677} 1678 1679bool 1680PPC32TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 1681 llvm::Value *Address) const { 1682 // This is calculated from the LLVM and GCC tables and verified 1683 // against gcc output. AFAIK all ABIs use the same encoding. 1684 1685 CodeGen::CGBuilderTy &Builder = CGF.Builder; 1686 llvm::LLVMContext &Context = CGF.getLLVMContext(); 1687 1688 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 1689 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 1690 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 1691 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16); 1692 1693 // 0-31: r0-31, the 4-byte general-purpose registers 1694 AssignToArrayRange(Builder, Address, Four8, 0, 31); 1695 1696 // 32-63: fp0-31, the 8-byte floating-point registers 1697 AssignToArrayRange(Builder, Address, Eight8, 32, 63); 1698 1699 // 64-76 are various 4-byte special-purpose registers: 1700 // 64: mq 1701 // 65: lr 1702 // 66: ctr 1703 // 67: ap 1704 // 68-75 cr0-7 1705 // 76: xer 1706 AssignToArrayRange(Builder, Address, Four8, 64, 76); 1707 1708 // 77-108: v0-31, the 16-byte vector registers 1709 AssignToArrayRange(Builder, Address, Sixteen8, 77, 108); 1710 1711 // 109: vrsave 1712 // 110: vscr 1713 // 111: spe_acc 1714 // 112: spefscr 1715 // 113: sfp 1716 AssignToArrayRange(Builder, Address, Four8, 109, 113); 1717 1718 return false; 1719} 1720 1721 1722// ARM ABI Implementation 1723 1724namespace { 1725 1726class ARMABIInfo : public ABIInfo { 1727public: 1728 enum ABIKind { 1729 APCS = 0, 1730 AAPCS = 1, 1731 AAPCS_VFP 1732 }; 1733 1734private: 1735 ABIKind Kind; 1736 1737public: 1738 ARMABIInfo(ABIKind _Kind) : Kind(_Kind) {} 1739 1740private: 1741 ABIKind getABIKind() const { return Kind; } 1742 1743 ABIArgInfo classifyReturnType(QualType RetTy, 1744 ASTContext &Context, 1745 llvm::LLVMContext &VMCOntext) const; 1746 1747 ABIArgInfo classifyArgumentType(QualType RetTy, 1748 ASTContext &Context, 1749 llvm::LLVMContext &VMContext) const; 1750 1751 virtual void computeInfo(CGFunctionInfo &FI, ASTContext &Context, 1752 llvm::LLVMContext &VMContext) const; 1753 1754 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1755 CodeGenFunction &CGF) const; 1756}; 1757 1758class ARMTargetCodeGenInfo : public TargetCodeGenInfo { 1759public: 1760 ARMTargetCodeGenInfo(ARMABIInfo::ABIKind K) 1761 :TargetCodeGenInfo(new ARMABIInfo(K)) {} 1762 1763 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 1764 return 13; 1765 } 1766}; 1767 1768} 1769 1770void ARMABIInfo::computeInfo(CGFunctionInfo &FI, ASTContext &Context, 1771 llvm::LLVMContext &VMContext) const { 1772 FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), Context, 1773 VMContext); 1774 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 1775 it != ie; ++it) { 1776 it->info = classifyArgumentType(it->type, Context, VMContext); 1777 } 1778 1779 // ARM always overrides the calling convention. 1780 switch (getABIKind()) { 1781 case APCS: 1782 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_APCS); 1783 break; 1784 1785 case AAPCS: 1786 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_AAPCS); 1787 break; 1788 1789 case AAPCS_VFP: 1790 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_AAPCS_VFP); 1791 break; 1792 } 1793} 1794 1795ABIArgInfo ARMABIInfo::classifyArgumentType(QualType Ty, 1796 ASTContext &Context, 1797 llvm::LLVMContext &VMContext) const { 1798 if (!CodeGenFunction::hasAggregateLLVMType(Ty)) { 1799 // Treat an enum type as its underlying type. 1800 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1801 Ty = EnumTy->getDecl()->getIntegerType(); 1802 1803 return (Ty->isPromotableIntegerType() ? 1804 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1805 } 1806 1807 // Ignore empty records. 1808 if (isEmptyRecord(Context, Ty, true)) 1809 return ABIArgInfo::getIgnore(); 1810 1811 // FIXME: This is kind of nasty... but there isn't much choice because the ARM 1812 // backend doesn't support byval. 1813 // FIXME: This doesn't handle alignment > 64 bits. 1814 const llvm::Type* ElemTy; 1815 unsigned SizeRegs; 1816 if (Context.getTypeAlign(Ty) > 32) { 1817 ElemTy = llvm::Type::getInt64Ty(VMContext); 1818 SizeRegs = (Context.getTypeSize(Ty) + 63) / 64; 1819 } else { 1820 ElemTy = llvm::Type::getInt32Ty(VMContext); 1821 SizeRegs = (Context.getTypeSize(Ty) + 31) / 32; 1822 } 1823 std::vector<const llvm::Type*> LLVMFields; 1824 LLVMFields.push_back(llvm::ArrayType::get(ElemTy, SizeRegs)); 1825 const llvm::Type* STy = llvm::StructType::get(VMContext, LLVMFields, true); 1826 return ABIArgInfo::getCoerce(STy); 1827} 1828 1829static bool isIntegerLikeType(QualType Ty, 1830 ASTContext &Context, 1831 llvm::LLVMContext &VMContext) { 1832 // APCS, C Language Calling Conventions, Non-Simple Return Values: A structure 1833 // is called integer-like if its size is less than or equal to one word, and 1834 // the offset of each of its addressable sub-fields is zero. 1835 1836 uint64_t Size = Context.getTypeSize(Ty); 1837 1838 // Check that the type fits in a word. 1839 if (Size > 32) 1840 return false; 1841 1842 // FIXME: Handle vector types! 1843 if (Ty->isVectorType()) 1844 return false; 1845 1846 // Float types are never treated as "integer like". 1847 if (Ty->isRealFloatingType()) 1848 return false; 1849 1850 // If this is a builtin or pointer type then it is ok. 1851 if (Ty->getAs<BuiltinType>() || Ty->isPointerType()) 1852 return true; 1853 1854 // Small complex integer types are "integer like". 1855 if (const ComplexType *CT = Ty->getAs<ComplexType>()) 1856 return isIntegerLikeType(CT->getElementType(), Context, VMContext); 1857 1858 // Single element and zero sized arrays should be allowed, by the definition 1859 // above, but they are not. 1860 1861 // Otherwise, it must be a record type. 1862 const RecordType *RT = Ty->getAs<RecordType>(); 1863 if (!RT) return false; 1864 1865 // Ignore records with flexible arrays. 1866 const RecordDecl *RD = RT->getDecl(); 1867 if (RD->hasFlexibleArrayMember()) 1868 return false; 1869 1870 // Check that all sub-fields are at offset 0, and are themselves "integer 1871 // like". 1872 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD); 1873 1874 bool HadField = false; 1875 unsigned idx = 0; 1876 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 1877 i != e; ++i, ++idx) { 1878 const FieldDecl *FD = *i; 1879 1880 // Bit-fields are not addressable, we only need to verify they are "integer 1881 // like". We still have to disallow a subsequent non-bitfield, for example: 1882 // struct { int : 0; int x } 1883 // is non-integer like according to gcc. 1884 if (FD->isBitField()) { 1885 if (!RD->isUnion()) 1886 HadField = true; 1887 1888 if (!isIntegerLikeType(FD->getType(), Context, VMContext)) 1889 return false; 1890 1891 continue; 1892 } 1893 1894 // Check if this field is at offset 0. 1895 if (Layout.getFieldOffset(idx) != 0) 1896 return false; 1897 1898 if (!isIntegerLikeType(FD->getType(), Context, VMContext)) 1899 return false; 1900 1901 // Only allow at most one field in a structure. This doesn't match the 1902 // wording above, but follows gcc in situations with a field following an 1903 // empty structure. 1904 if (!RD->isUnion()) { 1905 if (HadField) 1906 return false; 1907 1908 HadField = true; 1909 } 1910 } 1911 1912 return true; 1913} 1914 1915ABIArgInfo ARMABIInfo::classifyReturnType(QualType RetTy, 1916 ASTContext &Context, 1917 llvm::LLVMContext &VMContext) const { 1918 if (RetTy->isVoidType()) 1919 return ABIArgInfo::getIgnore(); 1920 1921 if (!CodeGenFunction::hasAggregateLLVMType(RetTy)) { 1922 // Treat an enum type as its underlying type. 1923 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 1924 RetTy = EnumTy->getDecl()->getIntegerType(); 1925 1926 return (RetTy->isPromotableIntegerType() ? 1927 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1928 } 1929 1930 // Are we following APCS? 1931 if (getABIKind() == APCS) { 1932 if (isEmptyRecord(Context, RetTy, false)) 1933 return ABIArgInfo::getIgnore(); 1934 1935 // Complex types are all returned as packed integers. 1936 // 1937 // FIXME: Consider using 2 x vector types if the back end handles them 1938 // correctly. 1939 if (RetTy->isAnyComplexType()) 1940 return ABIArgInfo::getCoerce(llvm::IntegerType::get( 1941 VMContext, Context.getTypeSize(RetTy))); 1942 1943 // Integer like structures are returned in r0. 1944 if (isIntegerLikeType(RetTy, Context, VMContext)) { 1945 // Return in the smallest viable integer type. 1946 uint64_t Size = Context.getTypeSize(RetTy); 1947 if (Size <= 8) 1948 return ABIArgInfo::getCoerce(llvm::Type::getInt8Ty(VMContext)); 1949 if (Size <= 16) 1950 return ABIArgInfo::getCoerce(llvm::Type::getInt16Ty(VMContext)); 1951 return ABIArgInfo::getCoerce(llvm::Type::getInt32Ty(VMContext)); 1952 } 1953 1954 // Otherwise return in memory. 1955 return ABIArgInfo::getIndirect(0); 1956 } 1957 1958 // Otherwise this is an AAPCS variant. 1959 1960 if (isEmptyRecord(Context, RetTy, true)) 1961 return ABIArgInfo::getIgnore(); 1962 1963 // Aggregates <= 4 bytes are returned in r0; other aggregates 1964 // are returned indirectly. 1965 uint64_t Size = Context.getTypeSize(RetTy); 1966 if (Size <= 32) { 1967 // Return in the smallest viable integer type. 1968 if (Size <= 8) 1969 return ABIArgInfo::getCoerce(llvm::Type::getInt8Ty(VMContext)); 1970 if (Size <= 16) 1971 return ABIArgInfo::getCoerce(llvm::Type::getInt16Ty(VMContext)); 1972 return ABIArgInfo::getCoerce(llvm::Type::getInt32Ty(VMContext)); 1973 } 1974 1975 return ABIArgInfo::getIndirect(0); 1976} 1977 1978llvm::Value *ARMABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1979 CodeGenFunction &CGF) const { 1980 // FIXME: Need to handle alignment 1981 const llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 1982 const llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 1983 1984 CGBuilderTy &Builder = CGF.Builder; 1985 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 1986 "ap"); 1987 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 1988 llvm::Type *PTy = 1989 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 1990 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 1991 1992 uint64_t Offset = 1993 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4); 1994 llvm::Value *NextAddr = 1995 Builder.CreateGEP(Addr, llvm::ConstantInt::get( 1996 llvm::Type::getInt32Ty(CGF.getLLVMContext()), Offset), 1997 "ap.next"); 1998 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 1999 2000 return AddrTyped; 2001} 2002 2003ABIArgInfo DefaultABIInfo::classifyReturnType(QualType RetTy, 2004 ASTContext &Context, 2005 llvm::LLVMContext &VMContext) const { 2006 if (RetTy->isVoidType()) { 2007 return ABIArgInfo::getIgnore(); 2008 } else if (CodeGenFunction::hasAggregateLLVMType(RetTy)) { 2009 return ABIArgInfo::getIndirect(0); 2010 } else { 2011 // Treat an enum type as its underlying type. 2012 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 2013 RetTy = EnumTy->getDecl()->getIntegerType(); 2014 2015 return (RetTy->isPromotableIntegerType() ? 2016 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2017 } 2018} 2019 2020// SystemZ ABI Implementation 2021 2022namespace { 2023 2024class SystemZABIInfo : public ABIInfo { 2025 bool isPromotableIntegerType(QualType Ty) const; 2026 2027 ABIArgInfo classifyReturnType(QualType RetTy, ASTContext &Context, 2028 llvm::LLVMContext &VMContext) const; 2029 2030 ABIArgInfo classifyArgumentType(QualType RetTy, ASTContext &Context, 2031 llvm::LLVMContext &VMContext) const; 2032 2033 virtual void computeInfo(CGFunctionInfo &FI, ASTContext &Context, 2034 llvm::LLVMContext &VMContext) const { 2035 FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), 2036 Context, VMContext); 2037 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2038 it != ie; ++it) 2039 it->info = classifyArgumentType(it->type, Context, VMContext); 2040 } 2041 2042 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2043 CodeGenFunction &CGF) const; 2044}; 2045 2046class SystemZTargetCodeGenInfo : public TargetCodeGenInfo { 2047public: 2048 SystemZTargetCodeGenInfo():TargetCodeGenInfo(new SystemZABIInfo()) {} 2049}; 2050 2051} 2052 2053bool SystemZABIInfo::isPromotableIntegerType(QualType Ty) const { 2054 // SystemZ ABI requires all 8, 16 and 32 bit quantities to be extended. 2055 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) 2056 switch (BT->getKind()) { 2057 case BuiltinType::Bool: 2058 case BuiltinType::Char_S: 2059 case BuiltinType::Char_U: 2060 case BuiltinType::SChar: 2061 case BuiltinType::UChar: 2062 case BuiltinType::Short: 2063 case BuiltinType::UShort: 2064 case BuiltinType::Int: 2065 case BuiltinType::UInt: 2066 return true; 2067 default: 2068 return false; 2069 } 2070 return false; 2071} 2072 2073llvm::Value *SystemZABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2074 CodeGenFunction &CGF) const { 2075 // FIXME: Implement 2076 return 0; 2077} 2078 2079 2080ABIArgInfo SystemZABIInfo::classifyReturnType(QualType RetTy, 2081 ASTContext &Context, 2082 llvm::LLVMContext &VMContext) const { 2083 if (RetTy->isVoidType()) { 2084 return ABIArgInfo::getIgnore(); 2085 } else if (CodeGenFunction::hasAggregateLLVMType(RetTy)) { 2086 return ABIArgInfo::getIndirect(0); 2087 } else { 2088 return (isPromotableIntegerType(RetTy) ? 2089 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2090 } 2091} 2092 2093ABIArgInfo SystemZABIInfo::classifyArgumentType(QualType Ty, 2094 ASTContext &Context, 2095 llvm::LLVMContext &VMContext) const { 2096 if (CodeGenFunction::hasAggregateLLVMType(Ty)) { 2097 return ABIArgInfo::getIndirect(0); 2098 } else { 2099 return (isPromotableIntegerType(Ty) ? 2100 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2101 } 2102} 2103 2104// MSP430 ABI Implementation 2105 2106namespace { 2107 2108class MSP430TargetCodeGenInfo : public TargetCodeGenInfo { 2109public: 2110 MSP430TargetCodeGenInfo():TargetCodeGenInfo(new DefaultABIInfo()) {} 2111 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 2112 CodeGen::CodeGenModule &M) const; 2113}; 2114 2115} 2116 2117void MSP430TargetCodeGenInfo::SetTargetAttributes(const Decl *D, 2118 llvm::GlobalValue *GV, 2119 CodeGen::CodeGenModule &M) const { 2120 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) { 2121 if (const MSP430InterruptAttr *attr = FD->getAttr<MSP430InterruptAttr>()) { 2122 // Handle 'interrupt' attribute: 2123 llvm::Function *F = cast<llvm::Function>(GV); 2124 2125 // Step 1: Set ISR calling convention. 2126 F->setCallingConv(llvm::CallingConv::MSP430_INTR); 2127 2128 // Step 2: Add attributes goodness. 2129 F->addFnAttr(llvm::Attribute::NoInline); 2130 2131 // Step 3: Emit ISR vector alias. 2132 unsigned Num = attr->getNumber() + 0xffe0; 2133 new llvm::GlobalAlias(GV->getType(), llvm::Function::ExternalLinkage, 2134 "vector_" + 2135 llvm::LowercaseString(llvm::utohexstr(Num)), 2136 GV, &M.getModule()); 2137 } 2138 } 2139} 2140 2141// MIPS ABI Implementation. This works for both little-endian and 2142// big-endian variants. 2143namespace { 2144class MIPSTargetCodeGenInfo : public TargetCodeGenInfo { 2145public: 2146 MIPSTargetCodeGenInfo(): TargetCodeGenInfo(new DefaultABIInfo()) {} 2147 2148 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 2149 return 29; 2150 } 2151 2152 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2153 llvm::Value *Address) const; 2154}; 2155} 2156 2157bool 2158MIPSTargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2159 llvm::Value *Address) const { 2160 // This information comes from gcc's implementation, which seems to 2161 // as canonical as it gets. 2162 2163 CodeGen::CGBuilderTy &Builder = CGF.Builder; 2164 llvm::LLVMContext &Context = CGF.getLLVMContext(); 2165 2166 // Everything on MIPS is 4 bytes. Double-precision FP registers 2167 // are aliased to pairs of single-precision FP registers. 2168 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 2169 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 2170 2171 // 0-31 are the general purpose registers, $0 - $31. 2172 // 32-63 are the floating-point registers, $f0 - $f31. 2173 // 64 and 65 are the multiply/divide registers, $hi and $lo. 2174 // 66 is the (notional, I think) register for signal-handler return. 2175 AssignToArrayRange(Builder, Address, Four8, 0, 65); 2176 2177 // 67-74 are the floating-point status registers, $fcc0 - $fcc7. 2178 // They are one bit wide and ignored here. 2179 2180 // 80-111 are the coprocessor 0 registers, $c0r0 - $c0r31. 2181 // (coprocessor 1 is the FP unit) 2182 // 112-143 are the coprocessor 2 registers, $c2r0 - $c2r31. 2183 // 144-175 are the coprocessor 3 registers, $c3r0 - $c3r31. 2184 // 176-181 are the DSP accumulator registers. 2185 AssignToArrayRange(Builder, Address, Four8, 80, 181); 2186 2187 return false; 2188} 2189 2190 2191const TargetCodeGenInfo &CodeGenModule::getTargetCodeGenInfo() const { 2192 if (TheTargetCodeGenInfo) 2193 return *TheTargetCodeGenInfo; 2194 2195 // For now we just cache the TargetCodeGenInfo in CodeGenModule and don't 2196 // free it. 2197 2198 const llvm::Triple &Triple(getContext().Target.getTriple()); 2199 switch (Triple.getArch()) { 2200 default: 2201 return *(TheTargetCodeGenInfo = new DefaultTargetCodeGenInfo); 2202 2203 case llvm::Triple::mips: 2204 case llvm::Triple::mipsel: 2205 return *(TheTargetCodeGenInfo = new MIPSTargetCodeGenInfo()); 2206 2207 case llvm::Triple::arm: 2208 case llvm::Triple::thumb: 2209 // FIXME: We want to know the float calling convention as well. 2210 if (strcmp(getContext().Target.getABI(), "apcs-gnu") == 0) 2211 return *(TheTargetCodeGenInfo = 2212 new ARMTargetCodeGenInfo(ARMABIInfo::APCS)); 2213 2214 return *(TheTargetCodeGenInfo = 2215 new ARMTargetCodeGenInfo(ARMABIInfo::AAPCS)); 2216 2217 case llvm::Triple::pic16: 2218 return *(TheTargetCodeGenInfo = new PIC16TargetCodeGenInfo()); 2219 2220 case llvm::Triple::ppc: 2221 return *(TheTargetCodeGenInfo = new PPC32TargetCodeGenInfo()); 2222 2223 case llvm::Triple::systemz: 2224 return *(TheTargetCodeGenInfo = new SystemZTargetCodeGenInfo()); 2225 2226 case llvm::Triple::msp430: 2227 return *(TheTargetCodeGenInfo = new MSP430TargetCodeGenInfo()); 2228 2229 case llvm::Triple::x86: 2230 switch (Triple.getOS()) { 2231 case llvm::Triple::Darwin: 2232 return *(TheTargetCodeGenInfo = 2233 new X86_32TargetCodeGenInfo(Context, true, true)); 2234 case llvm::Triple::Cygwin: 2235 case llvm::Triple::MinGW32: 2236 case llvm::Triple::MinGW64: 2237 case llvm::Triple::AuroraUX: 2238 case llvm::Triple::DragonFly: 2239 case llvm::Triple::FreeBSD: 2240 case llvm::Triple::OpenBSD: 2241 return *(TheTargetCodeGenInfo = 2242 new X86_32TargetCodeGenInfo(Context, false, true)); 2243 2244 default: 2245 return *(TheTargetCodeGenInfo = 2246 new X86_32TargetCodeGenInfo(Context, false, false)); 2247 } 2248 2249 case llvm::Triple::x86_64: 2250 return *(TheTargetCodeGenInfo = new X86_64TargetCodeGenInfo()); 2251 } 2252} 2253