TargetInfo.cpp revision 204793
1//===---- TargetInfo.cpp - Encapsulate target details -----------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// These classes wrap the information about a call or function 11// definition used to handle ABI compliancy. 12// 13//===----------------------------------------------------------------------===// 14 15#include "TargetInfo.h" 16#include "ABIInfo.h" 17#include "CodeGenFunction.h" 18#include "clang/AST/RecordLayout.h" 19#include "llvm/Type.h" 20#include "llvm/ADT/StringExtras.h" 21#include "llvm/ADT/Triple.h" 22#include "llvm/Support/raw_ostream.h" 23using namespace clang; 24using namespace CodeGen; 25 26ABIInfo::~ABIInfo() {} 27 28void ABIArgInfo::dump() const { 29 llvm::raw_ostream &OS = llvm::errs(); 30 OS << "(ABIArgInfo Kind="; 31 switch (TheKind) { 32 case Direct: 33 OS << "Direct"; 34 break; 35 case Extend: 36 OS << "Extend"; 37 break; 38 case Ignore: 39 OS << "Ignore"; 40 break; 41 case Coerce: 42 OS << "Coerce Type="; 43 getCoerceToType()->print(OS); 44 break; 45 case Indirect: 46 OS << "Indirect Align=" << getIndirectAlign(); 47 break; 48 case Expand: 49 OS << "Expand"; 50 break; 51 } 52 OS << ")\n"; 53} 54 55TargetCodeGenInfo::~TargetCodeGenInfo() { delete Info; } 56 57static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays); 58 59/// isEmptyField - Return true iff a the field is "empty", that is it 60/// is an unnamed bit-field or an (array of) empty record(s). 61static bool isEmptyField(ASTContext &Context, const FieldDecl *FD, 62 bool AllowArrays) { 63 if (FD->isUnnamedBitfield()) 64 return true; 65 66 QualType FT = FD->getType(); 67 68 // Constant arrays of empty records count as empty, strip them off. 69 if (AllowArrays) 70 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) 71 FT = AT->getElementType(); 72 73 return isEmptyRecord(Context, FT, AllowArrays); 74} 75 76/// isEmptyRecord - Return true iff a structure contains only empty 77/// fields. Note that a structure with a flexible array member is not 78/// considered empty. 79static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays) { 80 const RecordType *RT = T->getAs<RecordType>(); 81 if (!RT) 82 return 0; 83 const RecordDecl *RD = RT->getDecl(); 84 if (RD->hasFlexibleArrayMember()) 85 return false; 86 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 87 i != e; ++i) 88 if (!isEmptyField(Context, *i, AllowArrays)) 89 return false; 90 return true; 91} 92 93/// hasNonTrivialDestructorOrCopyConstructor - Determine if a type has either 94/// a non-trivial destructor or a non-trivial copy constructor. 95static bool hasNonTrivialDestructorOrCopyConstructor(const RecordType *RT) { 96 const CXXRecordDecl *RD = dyn_cast<CXXRecordDecl>(RT->getDecl()); 97 if (!RD) 98 return false; 99 100 return !RD->hasTrivialDestructor() || !RD->hasTrivialCopyConstructor(); 101} 102 103/// isRecordWithNonTrivialDestructorOrCopyConstructor - Determine if a type is 104/// a record type with either a non-trivial destructor or a non-trivial copy 105/// constructor. 106static bool isRecordWithNonTrivialDestructorOrCopyConstructor(QualType T) { 107 const RecordType *RT = T->getAs<RecordType>(); 108 if (!RT) 109 return false; 110 111 return hasNonTrivialDestructorOrCopyConstructor(RT); 112} 113 114/// isSingleElementStruct - Determine if a structure is a "single 115/// element struct", i.e. it has exactly one non-empty field or 116/// exactly one field which is itself a single element 117/// struct. Structures with flexible array members are never 118/// considered single element structs. 119/// 120/// \return The field declaration for the single non-empty field, if 121/// it exists. 122static const Type *isSingleElementStruct(QualType T, ASTContext &Context) { 123 const RecordType *RT = T->getAsStructureType(); 124 if (!RT) 125 return 0; 126 127 const RecordDecl *RD = RT->getDecl(); 128 if (RD->hasFlexibleArrayMember()) 129 return 0; 130 131 const Type *Found = 0; 132 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 133 i != e; ++i) { 134 const FieldDecl *FD = *i; 135 QualType FT = FD->getType(); 136 137 // Ignore empty fields. 138 if (isEmptyField(Context, FD, true)) 139 continue; 140 141 // If we already found an element then this isn't a single-element 142 // struct. 143 if (Found) 144 return 0; 145 146 // Treat single element arrays as the element. 147 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) { 148 if (AT->getSize().getZExtValue() != 1) 149 break; 150 FT = AT->getElementType(); 151 } 152 153 if (!CodeGenFunction::hasAggregateLLVMType(FT)) { 154 Found = FT.getTypePtr(); 155 } else { 156 Found = isSingleElementStruct(FT, Context); 157 if (!Found) 158 return 0; 159 } 160 } 161 162 return Found; 163} 164 165static bool is32Or64BitBasicType(QualType Ty, ASTContext &Context) { 166 if (!Ty->getAs<BuiltinType>() && !Ty->isAnyPointerType() && 167 !Ty->isAnyComplexType() && !Ty->isEnumeralType() && 168 !Ty->isBlockPointerType()) 169 return false; 170 171 uint64_t Size = Context.getTypeSize(Ty); 172 return Size == 32 || Size == 64; 173} 174 175/// canExpandIndirectArgument - Test whether an argument type which is to be 176/// passed indirectly (on the stack) would have the equivalent layout if it was 177/// expanded into separate arguments. If so, we prefer to do the latter to avoid 178/// inhibiting optimizations. 179/// 180// FIXME: This predicate is missing many cases, currently it just follows 181// llvm-gcc (checks that all fields are 32-bit or 64-bit primitive types). We 182// should probably make this smarter, or better yet make the LLVM backend 183// capable of handling it. 184static bool canExpandIndirectArgument(QualType Ty, ASTContext &Context) { 185 // We can only expand structure types. 186 const RecordType *RT = Ty->getAs<RecordType>(); 187 if (!RT) 188 return false; 189 190 // We can only expand (C) structures. 191 // 192 // FIXME: This needs to be generalized to handle classes as well. 193 const RecordDecl *RD = RT->getDecl(); 194 if (!RD->isStruct() || isa<CXXRecordDecl>(RD)) 195 return false; 196 197 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 198 i != e; ++i) { 199 const FieldDecl *FD = *i; 200 201 if (!is32Or64BitBasicType(FD->getType(), Context)) 202 return false; 203 204 // FIXME: Reject bit-fields wholesale; there are two problems, we don't know 205 // how to expand them yet, and the predicate for telling if a bitfield still 206 // counts as "basic" is more complicated than what we were doing previously. 207 if (FD->isBitField()) 208 return false; 209 } 210 211 return true; 212} 213 214static bool typeContainsSSEVector(const RecordDecl *RD, ASTContext &Context) { 215 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 216 i != e; ++i) { 217 const FieldDecl *FD = *i; 218 219 if (FD->getType()->isVectorType() && 220 Context.getTypeSize(FD->getType()) >= 128) 221 return true; 222 223 if (const RecordType* RT = FD->getType()->getAs<RecordType>()) 224 if (typeContainsSSEVector(RT->getDecl(), Context)) 225 return true; 226 } 227 228 return false; 229} 230 231namespace { 232/// DefaultABIInfo - The default implementation for ABI specific 233/// details. This implementation provides information which results in 234/// self-consistent and sensible LLVM IR generation, but does not 235/// conform to any particular ABI. 236class DefaultABIInfo : public ABIInfo { 237 ABIArgInfo classifyReturnType(QualType RetTy, 238 ASTContext &Context, 239 llvm::LLVMContext &VMContext) const; 240 241 ABIArgInfo classifyArgumentType(QualType RetTy, 242 ASTContext &Context, 243 llvm::LLVMContext &VMContext) const; 244 245 virtual void computeInfo(CGFunctionInfo &FI, ASTContext &Context, 246 llvm::LLVMContext &VMContext) const { 247 FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), Context, 248 VMContext); 249 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 250 it != ie; ++it) 251 it->info = classifyArgumentType(it->type, Context, VMContext); 252 } 253 254 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 255 CodeGenFunction &CGF) const; 256}; 257 258class DefaultTargetCodeGenInfo : public TargetCodeGenInfo { 259public: 260 DefaultTargetCodeGenInfo():TargetCodeGenInfo(new DefaultABIInfo()) {} 261}; 262 263llvm::Value *DefaultABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 264 CodeGenFunction &CGF) const { 265 return 0; 266} 267 268ABIArgInfo DefaultABIInfo::classifyArgumentType(QualType Ty, 269 ASTContext &Context, 270 llvm::LLVMContext &VMContext) const { 271 if (CodeGenFunction::hasAggregateLLVMType(Ty)) { 272 return ABIArgInfo::getIndirect(0); 273 } else { 274 // Treat an enum type as its underlying type. 275 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 276 Ty = EnumTy->getDecl()->getIntegerType(); 277 278 return (Ty->isPromotableIntegerType() ? 279 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 280 } 281} 282 283/// X86_32ABIInfo - The X86-32 ABI information. 284class X86_32ABIInfo : public ABIInfo { 285 ASTContext &Context; 286 bool IsDarwinVectorABI; 287 bool IsSmallStructInRegABI; 288 289 static bool isRegisterSize(unsigned Size) { 290 return (Size == 8 || Size == 16 || Size == 32 || Size == 64); 291 } 292 293 static bool shouldReturnTypeInRegister(QualType Ty, ASTContext &Context); 294 295 static unsigned getIndirectArgumentAlignment(QualType Ty, 296 ASTContext &Context); 297 298public: 299 ABIArgInfo classifyReturnType(QualType RetTy, 300 ASTContext &Context, 301 llvm::LLVMContext &VMContext) const; 302 303 ABIArgInfo classifyArgumentType(QualType RetTy, 304 ASTContext &Context, 305 llvm::LLVMContext &VMContext) const; 306 307 virtual void computeInfo(CGFunctionInfo &FI, ASTContext &Context, 308 llvm::LLVMContext &VMContext) const { 309 FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), Context, 310 VMContext); 311 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 312 it != ie; ++it) 313 it->info = classifyArgumentType(it->type, Context, VMContext); 314 } 315 316 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 317 CodeGenFunction &CGF) const; 318 319 X86_32ABIInfo(ASTContext &Context, bool d, bool p) 320 : ABIInfo(), Context(Context), IsDarwinVectorABI(d), 321 IsSmallStructInRegABI(p) {} 322}; 323 324class X86_32TargetCodeGenInfo : public TargetCodeGenInfo { 325public: 326 X86_32TargetCodeGenInfo(ASTContext &Context, bool d, bool p) 327 :TargetCodeGenInfo(new X86_32ABIInfo(Context, d, p)) {} 328 329 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 330 CodeGen::CodeGenModule &CGM) const; 331 332 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 333 // Darwin uses different dwarf register numbers for EH. 334 if (CGM.isTargetDarwin()) return 5; 335 336 return 4; 337 } 338 339 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 340 llvm::Value *Address) const; 341}; 342 343} 344 345/// shouldReturnTypeInRegister - Determine if the given type should be 346/// passed in a register (for the Darwin ABI). 347bool X86_32ABIInfo::shouldReturnTypeInRegister(QualType Ty, 348 ASTContext &Context) { 349 uint64_t Size = Context.getTypeSize(Ty); 350 351 // Type must be register sized. 352 if (!isRegisterSize(Size)) 353 return false; 354 355 if (Ty->isVectorType()) { 356 // 64- and 128- bit vectors inside structures are not returned in 357 // registers. 358 if (Size == 64 || Size == 128) 359 return false; 360 361 return true; 362 } 363 364 // If this is a builtin, pointer, enum, or complex type, it is ok. 365 if (Ty->getAs<BuiltinType>() || Ty->isAnyPointerType() || 366 Ty->isAnyComplexType() || Ty->isEnumeralType() || 367 Ty->isBlockPointerType()) 368 return true; 369 370 // Arrays are treated like records. 371 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) 372 return shouldReturnTypeInRegister(AT->getElementType(), Context); 373 374 // Otherwise, it must be a record type. 375 const RecordType *RT = Ty->getAs<RecordType>(); 376 if (!RT) return false; 377 378 // FIXME: Traverse bases here too. 379 380 // Structure types are passed in register if all fields would be 381 // passed in a register. 382 for (RecordDecl::field_iterator i = RT->getDecl()->field_begin(), 383 e = RT->getDecl()->field_end(); i != e; ++i) { 384 const FieldDecl *FD = *i; 385 386 // Empty fields are ignored. 387 if (isEmptyField(Context, FD, true)) 388 continue; 389 390 // Check fields recursively. 391 if (!shouldReturnTypeInRegister(FD->getType(), Context)) 392 return false; 393 } 394 395 return true; 396} 397 398ABIArgInfo X86_32ABIInfo::classifyReturnType(QualType RetTy, 399 ASTContext &Context, 400 llvm::LLVMContext &VMContext) const { 401 if (RetTy->isVoidType()) { 402 return ABIArgInfo::getIgnore(); 403 } else if (const VectorType *VT = RetTy->getAs<VectorType>()) { 404 // On Darwin, some vectors are returned in registers. 405 if (IsDarwinVectorABI) { 406 uint64_t Size = Context.getTypeSize(RetTy); 407 408 // 128-bit vectors are a special case; they are returned in 409 // registers and we need to make sure to pick a type the LLVM 410 // backend will like. 411 if (Size == 128) 412 return ABIArgInfo::getCoerce(llvm::VectorType::get( 413 llvm::Type::getInt64Ty(VMContext), 2)); 414 415 // Always return in register if it fits in a general purpose 416 // register, or if it is 64 bits and has a single element. 417 if ((Size == 8 || Size == 16 || Size == 32) || 418 (Size == 64 && VT->getNumElements() == 1)) 419 return ABIArgInfo::getCoerce(llvm::IntegerType::get(VMContext, Size)); 420 421 return ABIArgInfo::getIndirect(0); 422 } 423 424 return ABIArgInfo::getDirect(); 425 } else if (CodeGenFunction::hasAggregateLLVMType(RetTy)) { 426 if (const RecordType *RT = RetTy->getAs<RecordType>()) { 427 // Structures with either a non-trivial destructor or a non-trivial 428 // copy constructor are always indirect. 429 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 430 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 431 432 // Structures with flexible arrays are always indirect. 433 if (RT->getDecl()->hasFlexibleArrayMember()) 434 return ABIArgInfo::getIndirect(0); 435 } 436 437 // If specified, structs and unions are always indirect. 438 if (!IsSmallStructInRegABI && !RetTy->isAnyComplexType()) 439 return ABIArgInfo::getIndirect(0); 440 441 // Classify "single element" structs as their element type. 442 if (const Type *SeltTy = isSingleElementStruct(RetTy, Context)) { 443 if (const BuiltinType *BT = SeltTy->getAs<BuiltinType>()) { 444 if (BT->isIntegerType()) { 445 // We need to use the size of the structure, padding 446 // bit-fields can adjust that to be larger than the single 447 // element type. 448 uint64_t Size = Context.getTypeSize(RetTy); 449 return ABIArgInfo::getCoerce( 450 llvm::IntegerType::get(VMContext, (unsigned) Size)); 451 } else if (BT->getKind() == BuiltinType::Float) { 452 assert(Context.getTypeSize(RetTy) == Context.getTypeSize(SeltTy) && 453 "Unexpect single element structure size!"); 454 return ABIArgInfo::getCoerce(llvm::Type::getFloatTy(VMContext)); 455 } else if (BT->getKind() == BuiltinType::Double) { 456 assert(Context.getTypeSize(RetTy) == Context.getTypeSize(SeltTy) && 457 "Unexpect single element structure size!"); 458 return ABIArgInfo::getCoerce(llvm::Type::getDoubleTy(VMContext)); 459 } 460 } else if (SeltTy->isPointerType()) { 461 // FIXME: It would be really nice if this could come out as the proper 462 // pointer type. 463 const llvm::Type *PtrTy = llvm::Type::getInt8PtrTy(VMContext); 464 return ABIArgInfo::getCoerce(PtrTy); 465 } else if (SeltTy->isVectorType()) { 466 // 64- and 128-bit vectors are never returned in a 467 // register when inside a structure. 468 uint64_t Size = Context.getTypeSize(RetTy); 469 if (Size == 64 || Size == 128) 470 return ABIArgInfo::getIndirect(0); 471 472 return classifyReturnType(QualType(SeltTy, 0), Context, VMContext); 473 } 474 } 475 476 // Small structures which are register sized are generally returned 477 // in a register. 478 if (X86_32ABIInfo::shouldReturnTypeInRegister(RetTy, Context)) { 479 uint64_t Size = Context.getTypeSize(RetTy); 480 return ABIArgInfo::getCoerce(llvm::IntegerType::get(VMContext, Size)); 481 } 482 483 return ABIArgInfo::getIndirect(0); 484 } else { 485 // Treat an enum type as its underlying type. 486 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 487 RetTy = EnumTy->getDecl()->getIntegerType(); 488 489 return (RetTy->isPromotableIntegerType() ? 490 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 491 } 492} 493 494unsigned X86_32ABIInfo::getIndirectArgumentAlignment(QualType Ty, 495 ASTContext &Context) { 496 unsigned Align = Context.getTypeAlign(Ty); 497 if (Align < 128) return 0; 498 if (const RecordType* RT = Ty->getAs<RecordType>()) 499 if (typeContainsSSEVector(RT->getDecl(), Context)) 500 return 16; 501 return 0; 502} 503 504ABIArgInfo X86_32ABIInfo::classifyArgumentType(QualType Ty, 505 ASTContext &Context, 506 llvm::LLVMContext &VMContext) const { 507 // FIXME: Set alignment on indirect arguments. 508 if (CodeGenFunction::hasAggregateLLVMType(Ty)) { 509 // Structures with flexible arrays are always indirect. 510 if (const RecordType *RT = Ty->getAs<RecordType>()) { 511 // Structures with either a non-trivial destructor or a non-trivial 512 // copy constructor are always indirect. 513 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 514 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 515 516 if (RT->getDecl()->hasFlexibleArrayMember()) 517 return ABIArgInfo::getIndirect(getIndirectArgumentAlignment(Ty, 518 Context)); 519 } 520 521 // Ignore empty structs. 522 if (Ty->isStructureType() && Context.getTypeSize(Ty) == 0) 523 return ABIArgInfo::getIgnore(); 524 525 // Expand small (<= 128-bit) record types when we know that the stack layout 526 // of those arguments will match the struct. This is important because the 527 // LLVM backend isn't smart enough to remove byval, which inhibits many 528 // optimizations. 529 if (Context.getTypeSize(Ty) <= 4*32 && 530 canExpandIndirectArgument(Ty, Context)) 531 return ABIArgInfo::getExpand(); 532 533 return ABIArgInfo::getIndirect(getIndirectArgumentAlignment(Ty, Context)); 534 } else { 535 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 536 Ty = EnumTy->getDecl()->getIntegerType(); 537 538 return (Ty->isPromotableIntegerType() ? 539 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 540 } 541} 542 543llvm::Value *X86_32ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 544 CodeGenFunction &CGF) const { 545 const llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 546 const llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 547 548 CGBuilderTy &Builder = CGF.Builder; 549 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 550 "ap"); 551 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 552 llvm::Type *PTy = 553 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 554 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 555 556 uint64_t Offset = 557 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4); 558 llvm::Value *NextAddr = 559 Builder.CreateGEP(Addr, llvm::ConstantInt::get( 560 llvm::Type::getInt32Ty(CGF.getLLVMContext()), Offset), 561 "ap.next"); 562 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 563 564 return AddrTyped; 565} 566 567void X86_32TargetCodeGenInfo::SetTargetAttributes(const Decl *D, 568 llvm::GlobalValue *GV, 569 CodeGen::CodeGenModule &CGM) const { 570 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) { 571 if (FD->hasAttr<X86ForceAlignArgPointerAttr>()) { 572 // Get the LLVM function. 573 llvm::Function *Fn = cast<llvm::Function>(GV); 574 575 // Now add the 'alignstack' attribute with a value of 16. 576 Fn->addFnAttr(llvm::Attribute::constructStackAlignmentFromInt(16)); 577 } 578 } 579} 580 581bool X86_32TargetCodeGenInfo::initDwarfEHRegSizeTable( 582 CodeGen::CodeGenFunction &CGF, 583 llvm::Value *Address) const { 584 CodeGen::CGBuilderTy &Builder = CGF.Builder; 585 llvm::LLVMContext &Context = CGF.getLLVMContext(); 586 587 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 588 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 589 590 // 0-7 are the eight integer registers; the order is different 591 // on Darwin (for EH), but the range is the same. 592 // 8 is %eip. 593 for (unsigned I = 0, E = 9; I != E; ++I) { 594 llvm::Value *Slot = Builder.CreateConstInBoundsGEP1_32(Address, I); 595 Builder.CreateStore(Four8, Slot); 596 } 597 598 if (CGF.CGM.isTargetDarwin()) { 599 // 12-16 are st(0..4). Not sure why we stop at 4. 600 // These have size 16, which is sizeof(long double) on 601 // platforms with 8-byte alignment for that type. 602 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16); 603 for (unsigned I = 12, E = 17; I != E; ++I) { 604 llvm::Value *Slot = Builder.CreateConstInBoundsGEP1_32(Address, I); 605 Builder.CreateStore(Sixteen8, Slot); 606 } 607 608 } else { 609 // 9 is %eflags, which doesn't get a size on Darwin for some 610 // reason. 611 Builder.CreateStore(Four8, Builder.CreateConstInBoundsGEP1_32(Address, 9)); 612 613 // 11-16 are st(0..5). Not sure why we stop at 5. 614 // These have size 12, which is sizeof(long double) on 615 // platforms with 4-byte alignment for that type. 616 llvm::Value *Twelve8 = llvm::ConstantInt::get(i8, 12); 617 for (unsigned I = 11, E = 17; I != E; ++I) { 618 llvm::Value *Slot = Builder.CreateConstInBoundsGEP1_32(Address, I); 619 Builder.CreateStore(Twelve8, Slot); 620 } 621 } 622 623 return false; 624} 625 626namespace { 627/// X86_64ABIInfo - The X86_64 ABI information. 628class X86_64ABIInfo : public ABIInfo { 629 enum Class { 630 Integer = 0, 631 SSE, 632 SSEUp, 633 X87, 634 X87Up, 635 ComplexX87, 636 NoClass, 637 Memory 638 }; 639 640 /// merge - Implement the X86_64 ABI merging algorithm. 641 /// 642 /// Merge an accumulating classification \arg Accum with a field 643 /// classification \arg Field. 644 /// 645 /// \param Accum - The accumulating classification. This should 646 /// always be either NoClass or the result of a previous merge 647 /// call. In addition, this should never be Memory (the caller 648 /// should just return Memory for the aggregate). 649 Class merge(Class Accum, Class Field) const; 650 651 /// classify - Determine the x86_64 register classes in which the 652 /// given type T should be passed. 653 /// 654 /// \param Lo - The classification for the parts of the type 655 /// residing in the low word of the containing object. 656 /// 657 /// \param Hi - The classification for the parts of the type 658 /// residing in the high word of the containing object. 659 /// 660 /// \param OffsetBase - The bit offset of this type in the 661 /// containing object. Some parameters are classified different 662 /// depending on whether they straddle an eightbyte boundary. 663 /// 664 /// If a word is unused its result will be NoClass; if a type should 665 /// be passed in Memory then at least the classification of \arg Lo 666 /// will be Memory. 667 /// 668 /// The \arg Lo class will be NoClass iff the argument is ignored. 669 /// 670 /// If the \arg Lo class is ComplexX87, then the \arg Hi class will 671 /// also be ComplexX87. 672 void classify(QualType T, ASTContext &Context, uint64_t OffsetBase, 673 Class &Lo, Class &Hi) const; 674 675 /// getCoerceResult - Given a source type \arg Ty and an LLVM type 676 /// to coerce to, chose the best way to pass Ty in the same place 677 /// that \arg CoerceTo would be passed, but while keeping the 678 /// emitted code as simple as possible. 679 /// 680 /// FIXME: Note, this should be cleaned up to just take an enumeration of all 681 /// the ways we might want to pass things, instead of constructing an LLVM 682 /// type. This makes this code more explicit, and it makes it clearer that we 683 /// are also doing this for correctness in the case of passing scalar types. 684 ABIArgInfo getCoerceResult(QualType Ty, 685 const llvm::Type *CoerceTo, 686 ASTContext &Context) const; 687 688 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 689 /// such that the argument will be passed in memory. 690 ABIArgInfo getIndirectResult(QualType Ty, 691 ASTContext &Context) const; 692 693 ABIArgInfo classifyReturnType(QualType RetTy, 694 ASTContext &Context, 695 llvm::LLVMContext &VMContext) const; 696 697 ABIArgInfo classifyArgumentType(QualType Ty, 698 ASTContext &Context, 699 llvm::LLVMContext &VMContext, 700 unsigned &neededInt, 701 unsigned &neededSSE) const; 702 703public: 704 virtual void computeInfo(CGFunctionInfo &FI, ASTContext &Context, 705 llvm::LLVMContext &VMContext) const; 706 707 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 708 CodeGenFunction &CGF) const; 709}; 710 711class X86_64TargetCodeGenInfo : public TargetCodeGenInfo { 712public: 713 X86_64TargetCodeGenInfo():TargetCodeGenInfo(new X86_64ABIInfo()) {} 714 715 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 716 return 7; 717 } 718 719 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 720 llvm::Value *Address) const { 721 CodeGen::CGBuilderTy &Builder = CGF.Builder; 722 llvm::LLVMContext &Context = CGF.getLLVMContext(); 723 724 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 725 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 726 727 // 0-16 are the 16 integer registers. 728 // 17 is %rip. 729 for (unsigned I = 0, E = 17; I != E; ++I) { 730 llvm::Value *Slot = Builder.CreateConstInBoundsGEP1_32(Address, I); 731 Builder.CreateStore(Eight8, Slot); 732 } 733 734 return false; 735 } 736}; 737 738} 739 740X86_64ABIInfo::Class X86_64ABIInfo::merge(Class Accum, 741 Class Field) const { 742 // AMD64-ABI 3.2.3p2: Rule 4. Each field of an object is 743 // classified recursively so that always two fields are 744 // considered. The resulting class is calculated according to 745 // the classes of the fields in the eightbyte: 746 // 747 // (a) If both classes are equal, this is the resulting class. 748 // 749 // (b) If one of the classes is NO_CLASS, the resulting class is 750 // the other class. 751 // 752 // (c) If one of the classes is MEMORY, the result is the MEMORY 753 // class. 754 // 755 // (d) If one of the classes is INTEGER, the result is the 756 // INTEGER. 757 // 758 // (e) If one of the classes is X87, X87UP, COMPLEX_X87 class, 759 // MEMORY is used as class. 760 // 761 // (f) Otherwise class SSE is used. 762 763 // Accum should never be memory (we should have returned) or 764 // ComplexX87 (because this cannot be passed in a structure). 765 assert((Accum != Memory && Accum != ComplexX87) && 766 "Invalid accumulated classification during merge."); 767 if (Accum == Field || Field == NoClass) 768 return Accum; 769 else if (Field == Memory) 770 return Memory; 771 else if (Accum == NoClass) 772 return Field; 773 else if (Accum == Integer || Field == Integer) 774 return Integer; 775 else if (Field == X87 || Field == X87Up || Field == ComplexX87 || 776 Accum == X87 || Accum == X87Up) 777 return Memory; 778 else 779 return SSE; 780} 781 782void X86_64ABIInfo::classify(QualType Ty, 783 ASTContext &Context, 784 uint64_t OffsetBase, 785 Class &Lo, Class &Hi) const { 786 // FIXME: This code can be simplified by introducing a simple value class for 787 // Class pairs with appropriate constructor methods for the various 788 // situations. 789 790 // FIXME: Some of the split computations are wrong; unaligned vectors 791 // shouldn't be passed in registers for example, so there is no chance they 792 // can straddle an eightbyte. Verify & simplify. 793 794 Lo = Hi = NoClass; 795 796 Class &Current = OffsetBase < 64 ? Lo : Hi; 797 Current = Memory; 798 799 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) { 800 BuiltinType::Kind k = BT->getKind(); 801 802 if (k == BuiltinType::Void) { 803 Current = NoClass; 804 } else if (k == BuiltinType::Int128 || k == BuiltinType::UInt128) { 805 Lo = Integer; 806 Hi = Integer; 807 } else if (k >= BuiltinType::Bool && k <= BuiltinType::LongLong) { 808 Current = Integer; 809 } else if (k == BuiltinType::Float || k == BuiltinType::Double) { 810 Current = SSE; 811 } else if (k == BuiltinType::LongDouble) { 812 Lo = X87; 813 Hi = X87Up; 814 } 815 // FIXME: _Decimal32 and _Decimal64 are SSE. 816 // FIXME: _float128 and _Decimal128 are (SSE, SSEUp). 817 } else if (const EnumType *ET = Ty->getAs<EnumType>()) { 818 // Classify the underlying integer type. 819 classify(ET->getDecl()->getIntegerType(), Context, OffsetBase, Lo, Hi); 820 } else if (Ty->hasPointerRepresentation()) { 821 Current = Integer; 822 } else if (const VectorType *VT = Ty->getAs<VectorType>()) { 823 uint64_t Size = Context.getTypeSize(VT); 824 if (Size == 32) { 825 // gcc passes all <4 x char>, <2 x short>, <1 x int>, <1 x 826 // float> as integer. 827 Current = Integer; 828 829 // If this type crosses an eightbyte boundary, it should be 830 // split. 831 uint64_t EB_Real = (OffsetBase) / 64; 832 uint64_t EB_Imag = (OffsetBase + Size - 1) / 64; 833 if (EB_Real != EB_Imag) 834 Hi = Lo; 835 } else if (Size == 64) { 836 // gcc passes <1 x double> in memory. :( 837 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::Double)) 838 return; 839 840 // gcc passes <1 x long long> as INTEGER. 841 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::LongLong)) 842 Current = Integer; 843 else 844 Current = SSE; 845 846 // If this type crosses an eightbyte boundary, it should be 847 // split. 848 if (OffsetBase && OffsetBase != 64) 849 Hi = Lo; 850 } else if (Size == 128) { 851 Lo = SSE; 852 Hi = SSEUp; 853 } 854 } else if (const ComplexType *CT = Ty->getAs<ComplexType>()) { 855 QualType ET = Context.getCanonicalType(CT->getElementType()); 856 857 uint64_t Size = Context.getTypeSize(Ty); 858 if (ET->isIntegralType()) { 859 if (Size <= 64) 860 Current = Integer; 861 else if (Size <= 128) 862 Lo = Hi = Integer; 863 } else if (ET == Context.FloatTy) 864 Current = SSE; 865 else if (ET == Context.DoubleTy) 866 Lo = Hi = SSE; 867 else if (ET == Context.LongDoubleTy) 868 Current = ComplexX87; 869 870 // If this complex type crosses an eightbyte boundary then it 871 // should be split. 872 uint64_t EB_Real = (OffsetBase) / 64; 873 uint64_t EB_Imag = (OffsetBase + Context.getTypeSize(ET)) / 64; 874 if (Hi == NoClass && EB_Real != EB_Imag) 875 Hi = Lo; 876 } else if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) { 877 // Arrays are treated like structures. 878 879 uint64_t Size = Context.getTypeSize(Ty); 880 881 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger 882 // than two eightbytes, ..., it has class MEMORY. 883 if (Size > 128) 884 return; 885 886 // AMD64-ABI 3.2.3p2: Rule 1. If ..., or it contains unaligned 887 // fields, it has class MEMORY. 888 // 889 // Only need to check alignment of array base. 890 if (OffsetBase % Context.getTypeAlign(AT->getElementType())) 891 return; 892 893 // Otherwise implement simplified merge. We could be smarter about 894 // this, but it isn't worth it and would be harder to verify. 895 Current = NoClass; 896 uint64_t EltSize = Context.getTypeSize(AT->getElementType()); 897 uint64_t ArraySize = AT->getSize().getZExtValue(); 898 for (uint64_t i=0, Offset=OffsetBase; i<ArraySize; ++i, Offset += EltSize) { 899 Class FieldLo, FieldHi; 900 classify(AT->getElementType(), Context, Offset, FieldLo, FieldHi); 901 Lo = merge(Lo, FieldLo); 902 Hi = merge(Hi, FieldHi); 903 if (Lo == Memory || Hi == Memory) 904 break; 905 } 906 907 // Do post merger cleanup (see below). Only case we worry about is Memory. 908 if (Hi == Memory) 909 Lo = Memory; 910 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp array classification."); 911 } else if (const RecordType *RT = Ty->getAs<RecordType>()) { 912 uint64_t Size = Context.getTypeSize(Ty); 913 914 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger 915 // than two eightbytes, ..., it has class MEMORY. 916 if (Size > 128) 917 return; 918 919 // AMD64-ABI 3.2.3p2: Rule 2. If a C++ object has either a non-trivial 920 // copy constructor or a non-trivial destructor, it is passed by invisible 921 // reference. 922 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 923 return; 924 925 const RecordDecl *RD = RT->getDecl(); 926 927 // Assume variable sized types are passed in memory. 928 if (RD->hasFlexibleArrayMember()) 929 return; 930 931 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD); 932 933 // Reset Lo class, this will be recomputed. 934 Current = NoClass; 935 936 // If this is a C++ record, classify the bases first. 937 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 938 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 939 e = CXXRD->bases_end(); i != e; ++i) { 940 assert(!i->isVirtual() && !i->getType()->isDependentType() && 941 "Unexpected base class!"); 942 const CXXRecordDecl *Base = 943 cast<CXXRecordDecl>(i->getType()->getAs<RecordType>()->getDecl()); 944 945 // Classify this field. 946 // 947 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate exceeds a 948 // single eightbyte, each is classified separately. Each eightbyte gets 949 // initialized to class NO_CLASS. 950 Class FieldLo, FieldHi; 951 uint64_t Offset = OffsetBase + Layout.getBaseClassOffset(Base); 952 classify(i->getType(), Context, Offset, FieldLo, FieldHi); 953 Lo = merge(Lo, FieldLo); 954 Hi = merge(Hi, FieldHi); 955 if (Lo == Memory || Hi == Memory) 956 break; 957 } 958 959 // If this record has no fields but isn't empty, classify as INTEGER. 960 if (RD->field_empty() && Size) 961 Current = Integer; 962 } 963 964 // Classify the fields one at a time, merging the results. 965 unsigned idx = 0; 966 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 967 i != e; ++i, ++idx) { 968 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx); 969 bool BitField = i->isBitField(); 970 971 // AMD64-ABI 3.2.3p2: Rule 1. If ..., or it contains unaligned 972 // fields, it has class MEMORY. 973 // 974 // Note, skip this test for bit-fields, see below. 975 if (!BitField && Offset % Context.getTypeAlign(i->getType())) { 976 Lo = Memory; 977 return; 978 } 979 980 // Classify this field. 981 // 982 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate 983 // exceeds a single eightbyte, each is classified 984 // separately. Each eightbyte gets initialized to class 985 // NO_CLASS. 986 Class FieldLo, FieldHi; 987 988 // Bit-fields require special handling, they do not force the 989 // structure to be passed in memory even if unaligned, and 990 // therefore they can straddle an eightbyte. 991 if (BitField) { 992 // Ignore padding bit-fields. 993 if (i->isUnnamedBitfield()) 994 continue; 995 996 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx); 997 uint64_t Size = i->getBitWidth()->EvaluateAsInt(Context).getZExtValue(); 998 999 uint64_t EB_Lo = Offset / 64; 1000 uint64_t EB_Hi = (Offset + Size - 1) / 64; 1001 FieldLo = FieldHi = NoClass; 1002 if (EB_Lo) { 1003 assert(EB_Hi == EB_Lo && "Invalid classification, type > 16 bytes."); 1004 FieldLo = NoClass; 1005 FieldHi = Integer; 1006 } else { 1007 FieldLo = Integer; 1008 FieldHi = EB_Hi ? Integer : NoClass; 1009 } 1010 } else 1011 classify(i->getType(), Context, Offset, FieldLo, FieldHi); 1012 Lo = merge(Lo, FieldLo); 1013 Hi = merge(Hi, FieldHi); 1014 if (Lo == Memory || Hi == Memory) 1015 break; 1016 } 1017 1018 // AMD64-ABI 3.2.3p2: Rule 5. Then a post merger cleanup is done: 1019 // 1020 // (a) If one of the classes is MEMORY, the whole argument is 1021 // passed in memory. 1022 // 1023 // (b) If SSEUP is not preceeded by SSE, it is converted to SSE. 1024 1025 // The first of these conditions is guaranteed by how we implement 1026 // the merge (just bail). 1027 // 1028 // The second condition occurs in the case of unions; for example 1029 // union { _Complex double; unsigned; }. 1030 if (Hi == Memory) 1031 Lo = Memory; 1032 if (Hi == SSEUp && Lo != SSE) 1033 Hi = SSE; 1034 } 1035} 1036 1037ABIArgInfo X86_64ABIInfo::getCoerceResult(QualType Ty, 1038 const llvm::Type *CoerceTo, 1039 ASTContext &Context) const { 1040 if (CoerceTo == llvm::Type::getInt64Ty(CoerceTo->getContext())) { 1041 // Integer and pointer types will end up in a general purpose 1042 // register. 1043 1044 // Treat an enum type as its underlying type. 1045 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1046 Ty = EnumTy->getDecl()->getIntegerType(); 1047 1048 if (Ty->isIntegralType() || Ty->hasPointerRepresentation()) 1049 return (Ty->isPromotableIntegerType() ? 1050 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1051 } else if (CoerceTo == llvm::Type::getDoubleTy(CoerceTo->getContext())) { 1052 assert(Ty.isCanonical() && "should always have a canonical type here"); 1053 assert(!Ty.hasQualifiers() && "should never have a qualified type here"); 1054 1055 // Float and double end up in a single SSE reg. 1056 if (Ty == Context.FloatTy || Ty == Context.DoubleTy) 1057 return ABIArgInfo::getDirect(); 1058 1059 } 1060 1061 return ABIArgInfo::getCoerce(CoerceTo); 1062} 1063 1064ABIArgInfo X86_64ABIInfo::getIndirectResult(QualType Ty, 1065 ASTContext &Context) const { 1066 // If this is a scalar LLVM value then assume LLVM will pass it in the right 1067 // place naturally. 1068 if (!CodeGenFunction::hasAggregateLLVMType(Ty)) { 1069 // Treat an enum type as its underlying type. 1070 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1071 Ty = EnumTy->getDecl()->getIntegerType(); 1072 1073 return (Ty->isPromotableIntegerType() ? 1074 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1075 } 1076 1077 bool ByVal = !isRecordWithNonTrivialDestructorOrCopyConstructor(Ty); 1078 1079 // FIXME: Set alignment correctly. 1080 return ABIArgInfo::getIndirect(0, ByVal); 1081} 1082 1083ABIArgInfo X86_64ABIInfo::classifyReturnType(QualType RetTy, 1084 ASTContext &Context, 1085 llvm::LLVMContext &VMContext) const { 1086 // AMD64-ABI 3.2.3p4: Rule 1. Classify the return type with the 1087 // classification algorithm. 1088 X86_64ABIInfo::Class Lo, Hi; 1089 classify(RetTy, Context, 0, Lo, Hi); 1090 1091 // Check some invariants. 1092 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification."); 1093 assert((Lo != NoClass || Hi == NoClass) && "Invalid null classification."); 1094 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification."); 1095 1096 const llvm::Type *ResType = 0; 1097 switch (Lo) { 1098 case NoClass: 1099 return ABIArgInfo::getIgnore(); 1100 1101 case SSEUp: 1102 case X87Up: 1103 assert(0 && "Invalid classification for lo word."); 1104 1105 // AMD64-ABI 3.2.3p4: Rule 2. Types of class memory are returned via 1106 // hidden argument. 1107 case Memory: 1108 return getIndirectResult(RetTy, Context); 1109 1110 // AMD64-ABI 3.2.3p4: Rule 3. If the class is INTEGER, the next 1111 // available register of the sequence %rax, %rdx is used. 1112 case Integer: 1113 ResType = llvm::Type::getInt64Ty(VMContext); break; 1114 1115 // AMD64-ABI 3.2.3p4: Rule 4. If the class is SSE, the next 1116 // available SSE register of the sequence %xmm0, %xmm1 is used. 1117 case SSE: 1118 ResType = llvm::Type::getDoubleTy(VMContext); break; 1119 1120 // AMD64-ABI 3.2.3p4: Rule 6. If the class is X87, the value is 1121 // returned on the X87 stack in %st0 as 80-bit x87 number. 1122 case X87: 1123 ResType = llvm::Type::getX86_FP80Ty(VMContext); break; 1124 1125 // AMD64-ABI 3.2.3p4: Rule 8. If the class is COMPLEX_X87, the real 1126 // part of the value is returned in %st0 and the imaginary part in 1127 // %st1. 1128 case ComplexX87: 1129 assert(Hi == ComplexX87 && "Unexpected ComplexX87 classification."); 1130 ResType = llvm::StructType::get(VMContext, llvm::Type::getX86_FP80Ty(VMContext), 1131 llvm::Type::getX86_FP80Ty(VMContext), 1132 NULL); 1133 break; 1134 } 1135 1136 switch (Hi) { 1137 // Memory was handled previously and X87 should 1138 // never occur as a hi class. 1139 case Memory: 1140 case X87: 1141 assert(0 && "Invalid classification for hi word."); 1142 1143 case ComplexX87: // Previously handled. 1144 case NoClass: break; 1145 1146 case Integer: 1147 ResType = llvm::StructType::get(VMContext, ResType, 1148 llvm::Type::getInt64Ty(VMContext), NULL); 1149 break; 1150 case SSE: 1151 ResType = llvm::StructType::get(VMContext, ResType, 1152 llvm::Type::getDoubleTy(VMContext), NULL); 1153 break; 1154 1155 // AMD64-ABI 3.2.3p4: Rule 5. If the class is SSEUP, the eightbyte 1156 // is passed in the upper half of the last used SSE register. 1157 // 1158 // SSEUP should always be preceeded by SSE, just widen. 1159 case SSEUp: 1160 assert(Lo == SSE && "Unexpected SSEUp classification."); 1161 ResType = llvm::VectorType::get(llvm::Type::getDoubleTy(VMContext), 2); 1162 break; 1163 1164 // AMD64-ABI 3.2.3p4: Rule 7. If the class is X87UP, the value is 1165 // returned together with the previous X87 value in %st0. 1166 case X87Up: 1167 // If X87Up is preceeded by X87, we don't need to do 1168 // anything. However, in some cases with unions it may not be 1169 // preceeded by X87. In such situations we follow gcc and pass the 1170 // extra bits in an SSE reg. 1171 if (Lo != X87) 1172 ResType = llvm::StructType::get(VMContext, ResType, 1173 llvm::Type::getDoubleTy(VMContext), NULL); 1174 break; 1175 } 1176 1177 return getCoerceResult(RetTy, ResType, Context); 1178} 1179 1180ABIArgInfo X86_64ABIInfo::classifyArgumentType(QualType Ty, ASTContext &Context, 1181 llvm::LLVMContext &VMContext, 1182 unsigned &neededInt, 1183 unsigned &neededSSE) const { 1184 X86_64ABIInfo::Class Lo, Hi; 1185 classify(Ty, Context, 0, Lo, Hi); 1186 1187 // Check some invariants. 1188 // FIXME: Enforce these by construction. 1189 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification."); 1190 assert((Lo != NoClass || Hi == NoClass) && "Invalid null classification."); 1191 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification."); 1192 1193 neededInt = 0; 1194 neededSSE = 0; 1195 const llvm::Type *ResType = 0; 1196 switch (Lo) { 1197 case NoClass: 1198 return ABIArgInfo::getIgnore(); 1199 1200 // AMD64-ABI 3.2.3p3: Rule 1. If the class is MEMORY, pass the argument 1201 // on the stack. 1202 case Memory: 1203 1204 // AMD64-ABI 3.2.3p3: Rule 5. If the class is X87, X87UP or 1205 // COMPLEX_X87, it is passed in memory. 1206 case X87: 1207 case ComplexX87: 1208 return getIndirectResult(Ty, Context); 1209 1210 case SSEUp: 1211 case X87Up: 1212 assert(0 && "Invalid classification for lo word."); 1213 1214 // AMD64-ABI 3.2.3p3: Rule 2. If the class is INTEGER, the next 1215 // available register of the sequence %rdi, %rsi, %rdx, %rcx, %r8 1216 // and %r9 is used. 1217 case Integer: 1218 ++neededInt; 1219 ResType = llvm::Type::getInt64Ty(VMContext); 1220 break; 1221 1222 // AMD64-ABI 3.2.3p3: Rule 3. If the class is SSE, the next 1223 // available SSE register is used, the registers are taken in the 1224 // order from %xmm0 to %xmm7. 1225 case SSE: 1226 ++neededSSE; 1227 ResType = llvm::Type::getDoubleTy(VMContext); 1228 break; 1229 } 1230 1231 switch (Hi) { 1232 // Memory was handled previously, ComplexX87 and X87 should 1233 // never occur as hi classes, and X87Up must be preceed by X87, 1234 // which is passed in memory. 1235 case Memory: 1236 case X87: 1237 case ComplexX87: 1238 assert(0 && "Invalid classification for hi word."); 1239 break; 1240 1241 case NoClass: break; 1242 case Integer: 1243 ResType = llvm::StructType::get(VMContext, ResType, 1244 llvm::Type::getInt64Ty(VMContext), NULL); 1245 ++neededInt; 1246 break; 1247 1248 // X87Up generally doesn't occur here (long double is passed in 1249 // memory), except in situations involving unions. 1250 case X87Up: 1251 case SSE: 1252 ResType = llvm::StructType::get(VMContext, ResType, 1253 llvm::Type::getDoubleTy(VMContext), NULL); 1254 ++neededSSE; 1255 break; 1256 1257 // AMD64-ABI 3.2.3p3: Rule 4. If the class is SSEUP, the 1258 // eightbyte is passed in the upper half of the last used SSE 1259 // register. 1260 case SSEUp: 1261 assert(Lo == SSE && "Unexpected SSEUp classification."); 1262 ResType = llvm::VectorType::get(llvm::Type::getDoubleTy(VMContext), 2); 1263 break; 1264 } 1265 1266 return getCoerceResult(Ty, ResType, Context); 1267} 1268 1269void X86_64ABIInfo::computeInfo(CGFunctionInfo &FI, ASTContext &Context, 1270 llvm::LLVMContext &VMContext) const { 1271 FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), 1272 Context, VMContext); 1273 1274 // Keep track of the number of assigned registers. 1275 unsigned freeIntRegs = 6, freeSSERegs = 8; 1276 1277 // If the return value is indirect, then the hidden argument is consuming one 1278 // integer register. 1279 if (FI.getReturnInfo().isIndirect()) 1280 --freeIntRegs; 1281 1282 // AMD64-ABI 3.2.3p3: Once arguments are classified, the registers 1283 // get assigned (in left-to-right order) for passing as follows... 1284 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 1285 it != ie; ++it) { 1286 unsigned neededInt, neededSSE; 1287 it->info = classifyArgumentType(it->type, Context, VMContext, 1288 neededInt, neededSSE); 1289 1290 // AMD64-ABI 3.2.3p3: If there are no registers available for any 1291 // eightbyte of an argument, the whole argument is passed on the 1292 // stack. If registers have already been assigned for some 1293 // eightbytes of such an argument, the assignments get reverted. 1294 if (freeIntRegs >= neededInt && freeSSERegs >= neededSSE) { 1295 freeIntRegs -= neededInt; 1296 freeSSERegs -= neededSSE; 1297 } else { 1298 it->info = getIndirectResult(it->type, Context); 1299 } 1300 } 1301} 1302 1303static llvm::Value *EmitVAArgFromMemory(llvm::Value *VAListAddr, 1304 QualType Ty, 1305 CodeGenFunction &CGF) { 1306 llvm::Value *overflow_arg_area_p = 1307 CGF.Builder.CreateStructGEP(VAListAddr, 2, "overflow_arg_area_p"); 1308 llvm::Value *overflow_arg_area = 1309 CGF.Builder.CreateLoad(overflow_arg_area_p, "overflow_arg_area"); 1310 1311 // AMD64-ABI 3.5.7p5: Step 7. Align l->overflow_arg_area upwards to a 16 1312 // byte boundary if alignment needed by type exceeds 8 byte boundary. 1313 uint64_t Align = CGF.getContext().getTypeAlign(Ty) / 8; 1314 if (Align > 8) { 1315 // Note that we follow the ABI & gcc here, even though the type 1316 // could in theory have an alignment greater than 16. This case 1317 // shouldn't ever matter in practice. 1318 1319 // overflow_arg_area = (overflow_arg_area + 15) & ~15; 1320 llvm::Value *Offset = 1321 llvm::ConstantInt::get(llvm::Type::getInt32Ty(CGF.getLLVMContext()), 15); 1322 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset); 1323 llvm::Value *AsInt = CGF.Builder.CreatePtrToInt(overflow_arg_area, 1324 llvm::Type::getInt64Ty(CGF.getLLVMContext())); 1325 llvm::Value *Mask = llvm::ConstantInt::get( 1326 llvm::Type::getInt64Ty(CGF.getLLVMContext()), ~15LL); 1327 overflow_arg_area = 1328 CGF.Builder.CreateIntToPtr(CGF.Builder.CreateAnd(AsInt, Mask), 1329 overflow_arg_area->getType(), 1330 "overflow_arg_area.align"); 1331 } 1332 1333 // AMD64-ABI 3.5.7p5: Step 8. Fetch type from l->overflow_arg_area. 1334 const llvm::Type *LTy = CGF.ConvertTypeForMem(Ty); 1335 llvm::Value *Res = 1336 CGF.Builder.CreateBitCast(overflow_arg_area, 1337 llvm::PointerType::getUnqual(LTy)); 1338 1339 // AMD64-ABI 3.5.7p5: Step 9. Set l->overflow_arg_area to: 1340 // l->overflow_arg_area + sizeof(type). 1341 // AMD64-ABI 3.5.7p5: Step 10. Align l->overflow_arg_area upwards to 1342 // an 8 byte boundary. 1343 1344 uint64_t SizeInBytes = (CGF.getContext().getTypeSize(Ty) + 7) / 8; 1345 llvm::Value *Offset = 1346 llvm::ConstantInt::get(llvm::Type::getInt32Ty(CGF.getLLVMContext()), 1347 (SizeInBytes + 7) & ~7); 1348 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset, 1349 "overflow_arg_area.next"); 1350 CGF.Builder.CreateStore(overflow_arg_area, overflow_arg_area_p); 1351 1352 // AMD64-ABI 3.5.7p5: Step 11. Return the fetched type. 1353 return Res; 1354} 1355 1356llvm::Value *X86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1357 CodeGenFunction &CGF) const { 1358 llvm::LLVMContext &VMContext = CGF.getLLVMContext(); 1359 const llvm::Type *i32Ty = llvm::Type::getInt32Ty(VMContext); 1360 const llvm::Type *DoubleTy = llvm::Type::getDoubleTy(VMContext); 1361 1362 // Assume that va_list type is correct; should be pointer to LLVM type: 1363 // struct { 1364 // i32 gp_offset; 1365 // i32 fp_offset; 1366 // i8* overflow_arg_area; 1367 // i8* reg_save_area; 1368 // }; 1369 unsigned neededInt, neededSSE; 1370 ABIArgInfo AI = classifyArgumentType(Ty, CGF.getContext(), VMContext, 1371 neededInt, neededSSE); 1372 1373 // AMD64-ABI 3.5.7p5: Step 1. Determine whether type may be passed 1374 // in the registers. If not go to step 7. 1375 if (!neededInt && !neededSSE) 1376 return EmitVAArgFromMemory(VAListAddr, Ty, CGF); 1377 1378 // AMD64-ABI 3.5.7p5: Step 2. Compute num_gp to hold the number of 1379 // general purpose registers needed to pass type and num_fp to hold 1380 // the number of floating point registers needed. 1381 1382 // AMD64-ABI 3.5.7p5: Step 3. Verify whether arguments fit into 1383 // registers. In the case: l->gp_offset > 48 - num_gp * 8 or 1384 // l->fp_offset > 304 - num_fp * 16 go to step 7. 1385 // 1386 // NOTE: 304 is a typo, there are (6 * 8 + 8 * 16) = 176 bytes of 1387 // register save space). 1388 1389 llvm::Value *InRegs = 0; 1390 llvm::Value *gp_offset_p = 0, *gp_offset = 0; 1391 llvm::Value *fp_offset_p = 0, *fp_offset = 0; 1392 if (neededInt) { 1393 gp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 0, "gp_offset_p"); 1394 gp_offset = CGF.Builder.CreateLoad(gp_offset_p, "gp_offset"); 1395 InRegs = 1396 CGF.Builder.CreateICmpULE(gp_offset, 1397 llvm::ConstantInt::get(i32Ty, 1398 48 - neededInt * 8), 1399 "fits_in_gp"); 1400 } 1401 1402 if (neededSSE) { 1403 fp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 1, "fp_offset_p"); 1404 fp_offset = CGF.Builder.CreateLoad(fp_offset_p, "fp_offset"); 1405 llvm::Value *FitsInFP = 1406 CGF.Builder.CreateICmpULE(fp_offset, 1407 llvm::ConstantInt::get(i32Ty, 1408 176 - neededSSE * 16), 1409 "fits_in_fp"); 1410 InRegs = InRegs ? CGF.Builder.CreateAnd(InRegs, FitsInFP) : FitsInFP; 1411 } 1412 1413 llvm::BasicBlock *InRegBlock = CGF.createBasicBlock("vaarg.in_reg"); 1414 llvm::BasicBlock *InMemBlock = CGF.createBasicBlock("vaarg.in_mem"); 1415 llvm::BasicBlock *ContBlock = CGF.createBasicBlock("vaarg.end"); 1416 CGF.Builder.CreateCondBr(InRegs, InRegBlock, InMemBlock); 1417 1418 // Emit code to load the value if it was passed in registers. 1419 1420 CGF.EmitBlock(InRegBlock); 1421 1422 // AMD64-ABI 3.5.7p5: Step 4. Fetch type from l->reg_save_area with 1423 // an offset of l->gp_offset and/or l->fp_offset. This may require 1424 // copying to a temporary location in case the parameter is passed 1425 // in different register classes or requires an alignment greater 1426 // than 8 for general purpose registers and 16 for XMM registers. 1427 // 1428 // FIXME: This really results in shameful code when we end up needing to 1429 // collect arguments from different places; often what should result in a 1430 // simple assembling of a structure from scattered addresses has many more 1431 // loads than necessary. Can we clean this up? 1432 const llvm::Type *LTy = CGF.ConvertTypeForMem(Ty); 1433 llvm::Value *RegAddr = 1434 CGF.Builder.CreateLoad(CGF.Builder.CreateStructGEP(VAListAddr, 3), 1435 "reg_save_area"); 1436 if (neededInt && neededSSE) { 1437 // FIXME: Cleanup. 1438 assert(AI.isCoerce() && "Unexpected ABI info for mixed regs"); 1439 const llvm::StructType *ST = cast<llvm::StructType>(AI.getCoerceToType()); 1440 llvm::Value *Tmp = CGF.CreateTempAlloca(ST); 1441 assert(ST->getNumElements() == 2 && "Unexpected ABI info for mixed regs"); 1442 const llvm::Type *TyLo = ST->getElementType(0); 1443 const llvm::Type *TyHi = ST->getElementType(1); 1444 assert((TyLo->isFloatingPointTy() ^ TyHi->isFloatingPointTy()) && 1445 "Unexpected ABI info for mixed regs"); 1446 const llvm::Type *PTyLo = llvm::PointerType::getUnqual(TyLo); 1447 const llvm::Type *PTyHi = llvm::PointerType::getUnqual(TyHi); 1448 llvm::Value *GPAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset); 1449 llvm::Value *FPAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset); 1450 llvm::Value *RegLoAddr = TyLo->isFloatingPointTy() ? FPAddr : GPAddr; 1451 llvm::Value *RegHiAddr = TyLo->isFloatingPointTy() ? GPAddr : FPAddr; 1452 llvm::Value *V = 1453 CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegLoAddr, PTyLo)); 1454 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0)); 1455 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegHiAddr, PTyHi)); 1456 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1)); 1457 1458 RegAddr = CGF.Builder.CreateBitCast(Tmp, 1459 llvm::PointerType::getUnqual(LTy)); 1460 } else if (neededInt) { 1461 RegAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset); 1462 RegAddr = CGF.Builder.CreateBitCast(RegAddr, 1463 llvm::PointerType::getUnqual(LTy)); 1464 } else { 1465 if (neededSSE == 1) { 1466 RegAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset); 1467 RegAddr = CGF.Builder.CreateBitCast(RegAddr, 1468 llvm::PointerType::getUnqual(LTy)); 1469 } else { 1470 assert(neededSSE == 2 && "Invalid number of needed registers!"); 1471 // SSE registers are spaced 16 bytes apart in the register save 1472 // area, we need to collect the two eightbytes together. 1473 llvm::Value *RegAddrLo = CGF.Builder.CreateGEP(RegAddr, fp_offset); 1474 llvm::Value *RegAddrHi = 1475 CGF.Builder.CreateGEP(RegAddrLo, 1476 llvm::ConstantInt::get(i32Ty, 16)); 1477 const llvm::Type *DblPtrTy = 1478 llvm::PointerType::getUnqual(DoubleTy); 1479 const llvm::StructType *ST = llvm::StructType::get(VMContext, DoubleTy, 1480 DoubleTy, NULL); 1481 llvm::Value *V, *Tmp = CGF.CreateTempAlloca(ST); 1482 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrLo, 1483 DblPtrTy)); 1484 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0)); 1485 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrHi, 1486 DblPtrTy)); 1487 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1)); 1488 RegAddr = CGF.Builder.CreateBitCast(Tmp, 1489 llvm::PointerType::getUnqual(LTy)); 1490 } 1491 } 1492 1493 // AMD64-ABI 3.5.7p5: Step 5. Set: 1494 // l->gp_offset = l->gp_offset + num_gp * 8 1495 // l->fp_offset = l->fp_offset + num_fp * 16. 1496 if (neededInt) { 1497 llvm::Value *Offset = llvm::ConstantInt::get(i32Ty, neededInt * 8); 1498 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(gp_offset, Offset), 1499 gp_offset_p); 1500 } 1501 if (neededSSE) { 1502 llvm::Value *Offset = llvm::ConstantInt::get(i32Ty, neededSSE * 16); 1503 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(fp_offset, Offset), 1504 fp_offset_p); 1505 } 1506 CGF.EmitBranch(ContBlock); 1507 1508 // Emit code to load the value if it was passed in memory. 1509 1510 CGF.EmitBlock(InMemBlock); 1511 llvm::Value *MemAddr = EmitVAArgFromMemory(VAListAddr, Ty, CGF); 1512 1513 // Return the appropriate result. 1514 1515 CGF.EmitBlock(ContBlock); 1516 llvm::PHINode *ResAddr = CGF.Builder.CreatePHI(RegAddr->getType(), 1517 "vaarg.addr"); 1518 ResAddr->reserveOperandSpace(2); 1519 ResAddr->addIncoming(RegAddr, InRegBlock); 1520 ResAddr->addIncoming(MemAddr, InMemBlock); 1521 1522 return ResAddr; 1523} 1524 1525// PIC16 ABI Implementation 1526 1527namespace { 1528 1529class PIC16ABIInfo : public ABIInfo { 1530 ABIArgInfo classifyReturnType(QualType RetTy, 1531 ASTContext &Context, 1532 llvm::LLVMContext &VMContext) const; 1533 1534 ABIArgInfo classifyArgumentType(QualType RetTy, 1535 ASTContext &Context, 1536 llvm::LLVMContext &VMContext) const; 1537 1538 virtual void computeInfo(CGFunctionInfo &FI, ASTContext &Context, 1539 llvm::LLVMContext &VMContext) const { 1540 FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), Context, 1541 VMContext); 1542 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 1543 it != ie; ++it) 1544 it->info = classifyArgumentType(it->type, Context, VMContext); 1545 } 1546 1547 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1548 CodeGenFunction &CGF) const; 1549}; 1550 1551class PIC16TargetCodeGenInfo : public TargetCodeGenInfo { 1552public: 1553 PIC16TargetCodeGenInfo():TargetCodeGenInfo(new PIC16ABIInfo()) {} 1554}; 1555 1556} 1557 1558ABIArgInfo PIC16ABIInfo::classifyReturnType(QualType RetTy, 1559 ASTContext &Context, 1560 llvm::LLVMContext &VMContext) const { 1561 if (RetTy->isVoidType()) { 1562 return ABIArgInfo::getIgnore(); 1563 } else { 1564 return ABIArgInfo::getDirect(); 1565 } 1566} 1567 1568ABIArgInfo PIC16ABIInfo::classifyArgumentType(QualType Ty, 1569 ASTContext &Context, 1570 llvm::LLVMContext &VMContext) const { 1571 return ABIArgInfo::getDirect(); 1572} 1573 1574llvm::Value *PIC16ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1575 CodeGenFunction &CGF) const { 1576 const llvm::Type *BP = llvm::PointerType::getUnqual(llvm::Type::getInt8Ty(CGF.getLLVMContext())); 1577 const llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 1578 1579 CGBuilderTy &Builder = CGF.Builder; 1580 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 1581 "ap"); 1582 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 1583 llvm::Type *PTy = 1584 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 1585 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 1586 1587 uint64_t Offset = CGF.getContext().getTypeSize(Ty) / 8; 1588 1589 llvm::Value *NextAddr = 1590 Builder.CreateGEP(Addr, llvm::ConstantInt::get( 1591 llvm::Type::getInt32Ty(CGF.getLLVMContext()), Offset), 1592 "ap.next"); 1593 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 1594 1595 return AddrTyped; 1596} 1597 1598 1599// ARM ABI Implementation 1600 1601namespace { 1602 1603class ARMABIInfo : public ABIInfo { 1604public: 1605 enum ABIKind { 1606 APCS = 0, 1607 AAPCS = 1, 1608 AAPCS_VFP 1609 }; 1610 1611private: 1612 ABIKind Kind; 1613 1614public: 1615 ARMABIInfo(ABIKind _Kind) : Kind(_Kind) {} 1616 1617private: 1618 ABIKind getABIKind() const { return Kind; } 1619 1620 ABIArgInfo classifyReturnType(QualType RetTy, 1621 ASTContext &Context, 1622 llvm::LLVMContext &VMCOntext) const; 1623 1624 ABIArgInfo classifyArgumentType(QualType RetTy, 1625 ASTContext &Context, 1626 llvm::LLVMContext &VMContext) const; 1627 1628 virtual void computeInfo(CGFunctionInfo &FI, ASTContext &Context, 1629 llvm::LLVMContext &VMContext) const; 1630 1631 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1632 CodeGenFunction &CGF) const; 1633}; 1634 1635class ARMTargetCodeGenInfo : public TargetCodeGenInfo { 1636public: 1637 ARMTargetCodeGenInfo(ARMABIInfo::ABIKind K) 1638 :TargetCodeGenInfo(new ARMABIInfo(K)) {} 1639 1640 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 1641 return 13; 1642 } 1643}; 1644 1645} 1646 1647void ARMABIInfo::computeInfo(CGFunctionInfo &FI, ASTContext &Context, 1648 llvm::LLVMContext &VMContext) const { 1649 FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), Context, 1650 VMContext); 1651 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 1652 it != ie; ++it) { 1653 it->info = classifyArgumentType(it->type, Context, VMContext); 1654 } 1655 1656 // ARM always overrides the calling convention. 1657 switch (getABIKind()) { 1658 case APCS: 1659 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_APCS); 1660 break; 1661 1662 case AAPCS: 1663 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_AAPCS); 1664 break; 1665 1666 case AAPCS_VFP: 1667 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_AAPCS_VFP); 1668 break; 1669 } 1670} 1671 1672ABIArgInfo ARMABIInfo::classifyArgumentType(QualType Ty, 1673 ASTContext &Context, 1674 llvm::LLVMContext &VMContext) const { 1675 if (!CodeGenFunction::hasAggregateLLVMType(Ty)) { 1676 // Treat an enum type as its underlying type. 1677 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1678 Ty = EnumTy->getDecl()->getIntegerType(); 1679 1680 return (Ty->isPromotableIntegerType() ? 1681 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1682 } 1683 1684 // Ignore empty records. 1685 if (isEmptyRecord(Context, Ty, true)) 1686 return ABIArgInfo::getIgnore(); 1687 1688 // FIXME: This is kind of nasty... but there isn't much choice because the ARM 1689 // backend doesn't support byval. 1690 // FIXME: This doesn't handle alignment > 64 bits. 1691 const llvm::Type* ElemTy; 1692 unsigned SizeRegs; 1693 if (Context.getTypeAlign(Ty) > 32) { 1694 ElemTy = llvm::Type::getInt64Ty(VMContext); 1695 SizeRegs = (Context.getTypeSize(Ty) + 63) / 64; 1696 } else { 1697 ElemTy = llvm::Type::getInt32Ty(VMContext); 1698 SizeRegs = (Context.getTypeSize(Ty) + 31) / 32; 1699 } 1700 std::vector<const llvm::Type*> LLVMFields; 1701 LLVMFields.push_back(llvm::ArrayType::get(ElemTy, SizeRegs)); 1702 const llvm::Type* STy = llvm::StructType::get(VMContext, LLVMFields, true); 1703 return ABIArgInfo::getCoerce(STy); 1704} 1705 1706static bool isIntegerLikeType(QualType Ty, 1707 ASTContext &Context, 1708 llvm::LLVMContext &VMContext) { 1709 // APCS, C Language Calling Conventions, Non-Simple Return Values: A structure 1710 // is called integer-like if its size is less than or equal to one word, and 1711 // the offset of each of its addressable sub-fields is zero. 1712 1713 uint64_t Size = Context.getTypeSize(Ty); 1714 1715 // Check that the type fits in a word. 1716 if (Size > 32) 1717 return false; 1718 1719 // FIXME: Handle vector types! 1720 if (Ty->isVectorType()) 1721 return false; 1722 1723 // Float types are never treated as "integer like". 1724 if (Ty->isRealFloatingType()) 1725 return false; 1726 1727 // If this is a builtin or pointer type then it is ok. 1728 if (Ty->getAs<BuiltinType>() || Ty->isPointerType()) 1729 return true; 1730 1731 // Small complex integer types are "integer like". 1732 if (const ComplexType *CT = Ty->getAs<ComplexType>()) 1733 return isIntegerLikeType(CT->getElementType(), Context, VMContext); 1734 1735 // Single element and zero sized arrays should be allowed, by the definition 1736 // above, but they are not. 1737 1738 // Otherwise, it must be a record type. 1739 const RecordType *RT = Ty->getAs<RecordType>(); 1740 if (!RT) return false; 1741 1742 // Ignore records with flexible arrays. 1743 const RecordDecl *RD = RT->getDecl(); 1744 if (RD->hasFlexibleArrayMember()) 1745 return false; 1746 1747 // Check that all sub-fields are at offset 0, and are themselves "integer 1748 // like". 1749 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD); 1750 1751 bool HadField = false; 1752 unsigned idx = 0; 1753 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 1754 i != e; ++i, ++idx) { 1755 const FieldDecl *FD = *i; 1756 1757 // Bit-fields are not addressable, we only need to verify they are "integer 1758 // like". We still have to disallow a subsequent non-bitfield, for example: 1759 // struct { int : 0; int x } 1760 // is non-integer like according to gcc. 1761 if (FD->isBitField()) { 1762 if (!RD->isUnion()) 1763 HadField = true; 1764 1765 if (!isIntegerLikeType(FD->getType(), Context, VMContext)) 1766 return false; 1767 1768 continue; 1769 } 1770 1771 // Check if this field is at offset 0. 1772 if (Layout.getFieldOffset(idx) != 0) 1773 return false; 1774 1775 if (!isIntegerLikeType(FD->getType(), Context, VMContext)) 1776 return false; 1777 1778 // Only allow at most one field in a structure. This doesn't match the 1779 // wording above, but follows gcc in situations with a field following an 1780 // empty structure. 1781 if (!RD->isUnion()) { 1782 if (HadField) 1783 return false; 1784 1785 HadField = true; 1786 } 1787 } 1788 1789 return true; 1790} 1791 1792ABIArgInfo ARMABIInfo::classifyReturnType(QualType RetTy, 1793 ASTContext &Context, 1794 llvm::LLVMContext &VMContext) const { 1795 if (RetTy->isVoidType()) 1796 return ABIArgInfo::getIgnore(); 1797 1798 if (!CodeGenFunction::hasAggregateLLVMType(RetTy)) { 1799 // Treat an enum type as its underlying type. 1800 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 1801 RetTy = EnumTy->getDecl()->getIntegerType(); 1802 1803 return (RetTy->isPromotableIntegerType() ? 1804 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1805 } 1806 1807 // Are we following APCS? 1808 if (getABIKind() == APCS) { 1809 if (isEmptyRecord(Context, RetTy, false)) 1810 return ABIArgInfo::getIgnore(); 1811 1812 // Complex types are all returned as packed integers. 1813 // 1814 // FIXME: Consider using 2 x vector types if the back end handles them 1815 // correctly. 1816 if (RetTy->isAnyComplexType()) 1817 return ABIArgInfo::getCoerce(llvm::IntegerType::get( 1818 VMContext, Context.getTypeSize(RetTy))); 1819 1820 // Integer like structures are returned in r0. 1821 if (isIntegerLikeType(RetTy, Context, VMContext)) { 1822 // Return in the smallest viable integer type. 1823 uint64_t Size = Context.getTypeSize(RetTy); 1824 if (Size <= 8) 1825 return ABIArgInfo::getCoerce(llvm::Type::getInt8Ty(VMContext)); 1826 if (Size <= 16) 1827 return ABIArgInfo::getCoerce(llvm::Type::getInt16Ty(VMContext)); 1828 return ABIArgInfo::getCoerce(llvm::Type::getInt32Ty(VMContext)); 1829 } 1830 1831 // Otherwise return in memory. 1832 return ABIArgInfo::getIndirect(0); 1833 } 1834 1835 // Otherwise this is an AAPCS variant. 1836 1837 if (isEmptyRecord(Context, RetTy, true)) 1838 return ABIArgInfo::getIgnore(); 1839 1840 // Aggregates <= 4 bytes are returned in r0; other aggregates 1841 // are returned indirectly. 1842 uint64_t Size = Context.getTypeSize(RetTy); 1843 if (Size <= 32) { 1844 // Return in the smallest viable integer type. 1845 if (Size <= 8) 1846 return ABIArgInfo::getCoerce(llvm::Type::getInt8Ty(VMContext)); 1847 if (Size <= 16) 1848 return ABIArgInfo::getCoerce(llvm::Type::getInt16Ty(VMContext)); 1849 return ABIArgInfo::getCoerce(llvm::Type::getInt32Ty(VMContext)); 1850 } 1851 1852 return ABIArgInfo::getIndirect(0); 1853} 1854 1855llvm::Value *ARMABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1856 CodeGenFunction &CGF) const { 1857 // FIXME: Need to handle alignment 1858 const llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 1859 const llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 1860 1861 CGBuilderTy &Builder = CGF.Builder; 1862 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 1863 "ap"); 1864 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 1865 llvm::Type *PTy = 1866 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 1867 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 1868 1869 uint64_t Offset = 1870 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4); 1871 llvm::Value *NextAddr = 1872 Builder.CreateGEP(Addr, llvm::ConstantInt::get( 1873 llvm::Type::getInt32Ty(CGF.getLLVMContext()), Offset), 1874 "ap.next"); 1875 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 1876 1877 return AddrTyped; 1878} 1879 1880ABIArgInfo DefaultABIInfo::classifyReturnType(QualType RetTy, 1881 ASTContext &Context, 1882 llvm::LLVMContext &VMContext) const { 1883 if (RetTy->isVoidType()) { 1884 return ABIArgInfo::getIgnore(); 1885 } else if (CodeGenFunction::hasAggregateLLVMType(RetTy)) { 1886 return ABIArgInfo::getIndirect(0); 1887 } else { 1888 // Treat an enum type as its underlying type. 1889 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 1890 RetTy = EnumTy->getDecl()->getIntegerType(); 1891 1892 return (RetTy->isPromotableIntegerType() ? 1893 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1894 } 1895} 1896 1897// SystemZ ABI Implementation 1898 1899namespace { 1900 1901class SystemZABIInfo : public ABIInfo { 1902 bool isPromotableIntegerType(QualType Ty) const; 1903 1904 ABIArgInfo classifyReturnType(QualType RetTy, ASTContext &Context, 1905 llvm::LLVMContext &VMContext) const; 1906 1907 ABIArgInfo classifyArgumentType(QualType RetTy, ASTContext &Context, 1908 llvm::LLVMContext &VMContext) const; 1909 1910 virtual void computeInfo(CGFunctionInfo &FI, ASTContext &Context, 1911 llvm::LLVMContext &VMContext) const { 1912 FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), 1913 Context, VMContext); 1914 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 1915 it != ie; ++it) 1916 it->info = classifyArgumentType(it->type, Context, VMContext); 1917 } 1918 1919 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1920 CodeGenFunction &CGF) const; 1921}; 1922 1923class SystemZTargetCodeGenInfo : public TargetCodeGenInfo { 1924public: 1925 SystemZTargetCodeGenInfo():TargetCodeGenInfo(new SystemZABIInfo()) {} 1926}; 1927 1928} 1929 1930bool SystemZABIInfo::isPromotableIntegerType(QualType Ty) const { 1931 // SystemZ ABI requires all 8, 16 and 32 bit quantities to be extended. 1932 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) 1933 switch (BT->getKind()) { 1934 case BuiltinType::Bool: 1935 case BuiltinType::Char_S: 1936 case BuiltinType::Char_U: 1937 case BuiltinType::SChar: 1938 case BuiltinType::UChar: 1939 case BuiltinType::Short: 1940 case BuiltinType::UShort: 1941 case BuiltinType::Int: 1942 case BuiltinType::UInt: 1943 return true; 1944 default: 1945 return false; 1946 } 1947 return false; 1948} 1949 1950llvm::Value *SystemZABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1951 CodeGenFunction &CGF) const { 1952 // FIXME: Implement 1953 return 0; 1954} 1955 1956 1957ABIArgInfo SystemZABIInfo::classifyReturnType(QualType RetTy, 1958 ASTContext &Context, 1959 llvm::LLVMContext &VMContext) const { 1960 if (RetTy->isVoidType()) { 1961 return ABIArgInfo::getIgnore(); 1962 } else if (CodeGenFunction::hasAggregateLLVMType(RetTy)) { 1963 return ABIArgInfo::getIndirect(0); 1964 } else { 1965 return (isPromotableIntegerType(RetTy) ? 1966 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1967 } 1968} 1969 1970ABIArgInfo SystemZABIInfo::classifyArgumentType(QualType Ty, 1971 ASTContext &Context, 1972 llvm::LLVMContext &VMContext) const { 1973 if (CodeGenFunction::hasAggregateLLVMType(Ty)) { 1974 return ABIArgInfo::getIndirect(0); 1975 } else { 1976 return (isPromotableIntegerType(Ty) ? 1977 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1978 } 1979} 1980 1981// MSP430 ABI Implementation 1982 1983namespace { 1984 1985class MSP430TargetCodeGenInfo : public TargetCodeGenInfo { 1986public: 1987 MSP430TargetCodeGenInfo():TargetCodeGenInfo(new DefaultABIInfo()) {} 1988 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 1989 CodeGen::CodeGenModule &M) const; 1990}; 1991 1992} 1993 1994void MSP430TargetCodeGenInfo::SetTargetAttributes(const Decl *D, 1995 llvm::GlobalValue *GV, 1996 CodeGen::CodeGenModule &M) const { 1997 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) { 1998 if (const MSP430InterruptAttr *attr = FD->getAttr<MSP430InterruptAttr>()) { 1999 // Handle 'interrupt' attribute: 2000 llvm::Function *F = cast<llvm::Function>(GV); 2001 2002 // Step 1: Set ISR calling convention. 2003 F->setCallingConv(llvm::CallingConv::MSP430_INTR); 2004 2005 // Step 2: Add attributes goodness. 2006 F->addFnAttr(llvm::Attribute::NoInline); 2007 2008 // Step 3: Emit ISR vector alias. 2009 unsigned Num = attr->getNumber() + 0xffe0; 2010 new llvm::GlobalAlias(GV->getType(), llvm::Function::ExternalLinkage, 2011 "vector_" + 2012 llvm::LowercaseString(llvm::utohexstr(Num)), 2013 GV, &M.getModule()); 2014 } 2015 } 2016} 2017 2018const TargetCodeGenInfo &CodeGenModule::getTargetCodeGenInfo() const { 2019 if (TheTargetCodeGenInfo) 2020 return *TheTargetCodeGenInfo; 2021 2022 // For now we just cache the TargetCodeGenInfo in CodeGenModule and don't 2023 // free it. 2024 2025 const llvm::Triple &Triple(getContext().Target.getTriple()); 2026 switch (Triple.getArch()) { 2027 default: 2028 return *(TheTargetCodeGenInfo = new DefaultTargetCodeGenInfo); 2029 2030 case llvm::Triple::arm: 2031 case llvm::Triple::thumb: 2032 // FIXME: We want to know the float calling convention as well. 2033 if (strcmp(getContext().Target.getABI(), "apcs-gnu") == 0) 2034 return *(TheTargetCodeGenInfo = 2035 new ARMTargetCodeGenInfo(ARMABIInfo::APCS)); 2036 2037 return *(TheTargetCodeGenInfo = 2038 new ARMTargetCodeGenInfo(ARMABIInfo::AAPCS)); 2039 2040 case llvm::Triple::pic16: 2041 return *(TheTargetCodeGenInfo = new PIC16TargetCodeGenInfo()); 2042 2043 case llvm::Triple::systemz: 2044 return *(TheTargetCodeGenInfo = new SystemZTargetCodeGenInfo()); 2045 2046 case llvm::Triple::msp430: 2047 return *(TheTargetCodeGenInfo = new MSP430TargetCodeGenInfo()); 2048 2049 case llvm::Triple::x86: 2050 switch (Triple.getOS()) { 2051 case llvm::Triple::Darwin: 2052 return *(TheTargetCodeGenInfo = 2053 new X86_32TargetCodeGenInfo(Context, true, true)); 2054 case llvm::Triple::Cygwin: 2055 case llvm::Triple::MinGW32: 2056 case llvm::Triple::MinGW64: 2057 case llvm::Triple::AuroraUX: 2058 case llvm::Triple::DragonFly: 2059 case llvm::Triple::FreeBSD: 2060 case llvm::Triple::OpenBSD: 2061 return *(TheTargetCodeGenInfo = 2062 new X86_32TargetCodeGenInfo(Context, false, true)); 2063 2064 default: 2065 return *(TheTargetCodeGenInfo = 2066 new X86_32TargetCodeGenInfo(Context, false, false)); 2067 } 2068 2069 case llvm::Triple::x86_64: 2070 return *(TheTargetCodeGenInfo = new X86_64TargetCodeGenInfo()); 2071 } 2072} 2073