1193323Sed//===-- XCoreTargetMachine.cpp - Define TargetMachine for XCore -----------===//
2193323Sed//
3193323Sed//                     The LLVM Compiler Infrastructure
4193323Sed//
5193323Sed// This file is distributed under the University of Illinois Open Source
6193323Sed// License. See LICENSE.TXT for details.
7193323Sed//
8193323Sed//===----------------------------------------------------------------------===//
9193323Sed//
10193323Sed//
11193323Sed//===----------------------------------------------------------------------===//
12193323Sed
13193323Sed#include "XCoreTargetMachine.h"
14193323Sed#include "XCore.h"
15249423Sdim#include "llvm/CodeGen/Passes.h"
16249423Sdim#include "llvm/IR/Module.h"
17193323Sed#include "llvm/PassManager.h"
18226633Sdim#include "llvm/Support/TargetRegistry.h"
19193323Sedusing namespace llvm;
20193323Sed
21193323Sed/// XCoreTargetMachine ctor - Create an ILP32 architecture model
22193323Sed///
23226633SdimXCoreTargetMachine::XCoreTargetMachine(const Target &T, StringRef TT,
24226633Sdim                                       StringRef CPU, StringRef FS,
25234353Sdim                                       const TargetOptions &Options,
26234353Sdim                                       Reloc::Model RM, CodeModel::Model CM,
27234353Sdim                                       CodeGenOpt::Level OL)
28234353Sdim  : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
29224145Sdim    Subtarget(TT, CPU, FS),
30243830Sdim    DL("e-p:32:32:32-a0:0:32-f32:32:32-f64:32:32-i1:8:32-i8:8:32-"
31199481Srdivacky               "i16:16:32-i32:32:32-i64:32:32-n32"),
32193323Sed    InstrInfo(),
33218893Sdim    FrameLowering(Subtarget),
34208599Srdivacky    TLInfo(*this),
35249423Sdim    TSInfo(*this) {
36263508Sdim  initAsmInfo();
37193323Sed}
38193323Sed
39234353Sdimnamespace {
40234353Sdim/// XCore Code Generator Pass Configuration Options.
41234353Sdimclass XCorePassConfig : public TargetPassConfig {
42234353Sdimpublic:
43234353Sdim  XCorePassConfig(XCoreTargetMachine *TM, PassManagerBase &PM)
44234353Sdim    : TargetPassConfig(TM, PM) {}
45234353Sdim
46234353Sdim  XCoreTargetMachine &getXCoreTargetMachine() const {
47234353Sdim    return getTM<XCoreTargetMachine>();
48234353Sdim  }
49234353Sdim
50251662Sdim  virtual bool addPreISel();
51234353Sdim  virtual bool addInstSelector();
52234353Sdim};
53234353Sdim} // namespace
54234353Sdim
55234353SdimTargetPassConfig *XCoreTargetMachine::createPassConfig(PassManagerBase &PM) {
56234353Sdim  return new XCorePassConfig(this, PM);
57234353Sdim}
58234353Sdim
59251662Sdimbool XCorePassConfig::addPreISel() {
60251662Sdim  addPass(createXCoreLowerThreadLocalPass());
61251662Sdim  return false;
62251662Sdim}
63251662Sdim
64234353Sdimbool XCorePassConfig::addInstSelector() {
65239462Sdim  addPass(createXCoreISelDag(getXCoreTargetMachine(), getOptLevel()));
66193323Sed  return false;
67193323Sed}
68193323Sed
69198090Srdivacky// Force static initialization.
70198090Srdivackyextern "C" void LLVMInitializeXCoreTarget() {
71198090Srdivacky  RegisterTargetMachine<XCoreTargetMachine> X(TheXCoreTarget);
72193323Sed}
73263508Sdim
74263508Sdimvoid XCoreTargetMachine::addAnalysisPasses(PassManagerBase &PM) {
75263508Sdim  // Add first the target-independent BasicTTI pass, then our XCore pass. This
76263508Sdim  // allows the XCore pass to delegate to the target independent layer when
77263508Sdim  // appropriate.
78263508Sdim  PM.add(createBasicTargetTransformInfoPass(this));
79263508Sdim  PM.add(createXCoreTargetTransformInfoPass(this));
80263508Sdim}
81