1249259Sdim//===-- AMDGPU.h - MachineFunction passes hw codegen --------------*- C++ -*-=// 2249259Sdim// 3249259Sdim// The LLVM Compiler Infrastructure 4249259Sdim// 5249259Sdim// This file is distributed under the University of Illinois Open Source 6249259Sdim// License. See LICENSE.TXT for details. 7249259Sdim// 8249259Sdim/// \file 9249259Sdim//===----------------------------------------------------------------------===// 10249259Sdim 11249259Sdim#ifndef AMDGPU_H 12249259Sdim#define AMDGPU_H 13249259Sdim 14249259Sdim#include "llvm/Support/TargetRegistry.h" 15249259Sdim#include "llvm/Target/TargetMachine.h" 16249259Sdim 17249259Sdimnamespace llvm { 18249259Sdim 19263508Sdimclass AMDGPUInstrPrinter; 20263508Sdimclass AMDGPUTargetMachine; 21249259Sdimclass FunctionPass; 22263508Sdimclass MCAsmInfo; 23263508Sdimclass raw_ostream; 24263508Sdimclass Target; 25263508Sdimclass TargetMachine; 26249259Sdim 27249259Sdim// R600 Passes 28263508SdimFunctionPass *createR600VectorRegMerger(TargetMachine &tm); 29263508SdimFunctionPass *createR600TextureIntrinsicsReplacer(); 30249259SdimFunctionPass *createR600ExpandSpecialInstrsPass(TargetMachine &tm); 31249259SdimFunctionPass *createR600EmitClauseMarkers(TargetMachine &tm); 32263508SdimFunctionPass *createR600ClauseMergePass(TargetMachine &tm); 33251662SdimFunctionPass *createR600Packetizer(TargetMachine &tm); 34249259SdimFunctionPass *createR600ControlFlowFinalizer(TargetMachine &tm); 35263508SdimFunctionPass *createAMDGPUCFGStructurizerPass(TargetMachine &tm); 36249259Sdim 37249259Sdim// SI Passes 38263508SdimFunctionPass *createSITypeRewriter(); 39249259SdimFunctionPass *createSIAnnotateControlFlowPass(); 40249259SdimFunctionPass *createSILowerControlFlowPass(TargetMachine &tm); 41263508SdimFunctionPass *createSIFixSGPRCopiesPass(TargetMachine &tm); 42249259SdimFunctionPass *createSICodeEmitterPass(formatted_raw_ostream &OS); 43249259SdimFunctionPass *createSIInsertWaits(TargetMachine &tm); 44249259Sdim 45249259Sdim// Passes common to R600 and SI 46249259SdimPass *createAMDGPUStructurizeCFGPass(); 47249259SdimFunctionPass *createAMDGPUConvertToISAPass(TargetMachine &tm); 48263508SdimFunctionPass *createAMDGPUISelDag(TargetMachine &tm); 49249259Sdim 50263508Sdim/// \brief Creates an AMDGPU-specific Target Transformation Info pass. 51263508SdimImmutablePass * 52263508SdimcreateAMDGPUTargetTransformInfoPass(const AMDGPUTargetMachine *TM); 53263508Sdim 54263508Sdimextern Target TheAMDGPUTarget; 55263508Sdim 56249259Sdim} // End namespace llvm 57249259Sdim 58249259Sdimnamespace ShaderType { 59249259Sdim enum Type { 60249259Sdim PIXEL = 0, 61249259Sdim VERTEX = 1, 62249259Sdim GEOMETRY = 2, 63249259Sdim COMPUTE = 3 64249259Sdim }; 65249259Sdim} 66249259Sdim 67263508Sdim/// OpenCL uses address spaces to differentiate between 68263508Sdim/// various memory regions on the hardware. On the CPU 69263508Sdim/// all of the address spaces point to the same memory, 70263508Sdim/// however on the GPU, each address space points to 71263508Sdim/// a seperate piece of memory that is unique from other 72263508Sdim/// memory locations. 73263508Sdimnamespace AMDGPUAS { 74263508Sdimenum AddressSpaces { 75263508Sdim PRIVATE_ADDRESS = 0, ///< Address space for private memory. 76263508Sdim GLOBAL_ADDRESS = 1, ///< Address space for global memory (RAT0, VTX0). 77263508Sdim CONSTANT_ADDRESS = 2, ///< Address space for constant memory 78263508Sdim LOCAL_ADDRESS = 3, ///< Address space for local memory. 79263508Sdim REGION_ADDRESS = 4, ///< Address space for region memory. 80263508Sdim ADDRESS_NONE = 5, ///< Address space for unknown memory. 81263508Sdim PARAM_D_ADDRESS = 6, ///< Address space for direct addressible parameter memory (CONST0) 82263508Sdim PARAM_I_ADDRESS = 7, ///< Address space for indirect addressible parameter memory (VTX1) 83263508Sdim 84263508Sdim // Do not re-order the CONSTANT_BUFFER_* enums. Several places depend on this 85263508Sdim // order to be able to dynamically index a constant buffer, for example: 86263508Sdim // 87263508Sdim // ConstantBufferAS = CONSTANT_BUFFER_0 + CBIdx 88263508Sdim 89263508Sdim CONSTANT_BUFFER_0 = 8, 90263508Sdim CONSTANT_BUFFER_1 = 9, 91263508Sdim CONSTANT_BUFFER_2 = 10, 92263508Sdim CONSTANT_BUFFER_3 = 11, 93263508Sdim CONSTANT_BUFFER_4 = 12, 94263508Sdim CONSTANT_BUFFER_5 = 13, 95263508Sdim CONSTANT_BUFFER_6 = 14, 96263508Sdim CONSTANT_BUFFER_7 = 15, 97263508Sdim CONSTANT_BUFFER_8 = 16, 98263508Sdim CONSTANT_BUFFER_9 = 17, 99263508Sdim CONSTANT_BUFFER_10 = 18, 100263508Sdim CONSTANT_BUFFER_11 = 19, 101263508Sdim CONSTANT_BUFFER_12 = 20, 102263508Sdim CONSTANT_BUFFER_13 = 21, 103263508Sdim CONSTANT_BUFFER_14 = 22, 104263508Sdim CONSTANT_BUFFER_15 = 23, 105263508Sdim LAST_ADDRESS = 24 106263508Sdim}; 107263508Sdim 108263508Sdim} // namespace AMDGPUAS 109263508Sdim 110249259Sdim#endif // AMDGPU_H 111