PPCTargetMachine.cpp revision 198090 
1//===-- PPCTargetMachine.cpp - Define TargetMachine for PowerPC -----------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// Top-level implementation for the PowerPC target.
11//
12//===----------------------------------------------------------------------===//
13
14#include "PPC.h"
15#include "PPCMCAsmInfo.h"
16#include "PPCTargetMachine.h"
17#include "llvm/PassManager.h"
18#include "llvm/Target/TargetOptions.h"
19#include "llvm/Target/TargetRegistry.h"
20#include "llvm/Support/FormattedStream.h"
21using namespace llvm;
22
23static const MCAsmInfo *createMCAsmInfo(const Target &T,
24                                                const StringRef &TT) {
25  Triple TheTriple(TT);
26  bool isPPC64 = TheTriple.getArch() == Triple::ppc64;
27  if (TheTriple.getOS() == Triple::Darwin)
28    return new PPCMCAsmInfoDarwin(isPPC64);
29  return new PPCLinuxMCAsmInfo(isPPC64);
30
31}
32
33extern "C" void LLVMInitializePowerPCTarget() {
34  // Register the targets
35  RegisterTargetMachine<PPC32TargetMachine> A(ThePPC32Target);
36  RegisterTargetMachine<PPC64TargetMachine> B(ThePPC64Target);
37
38  RegisterAsmInfoFn C(ThePPC32Target, createMCAsmInfo);
39  RegisterAsmInfoFn D(ThePPC64Target, createMCAsmInfo);
40}
41
42
43PPCTargetMachine::PPCTargetMachine(const Target &T, const std::string &TT,
44                                   const std::string &FS, bool is64Bit)
45  : LLVMTargetMachine(T, TT),
46    Subtarget(TT, FS, is64Bit),
47    DataLayout(Subtarget.getTargetDataString()), InstrInfo(*this),
48    FrameInfo(*this, is64Bit), JITInfo(*this, is64Bit), TLInfo(*this),
49    InstrItins(Subtarget.getInstrItineraryData()), MachOWriterInfo(*this) {
50
51  if (getRelocationModel() == Reloc::Default) {
52    if (Subtarget.isDarwin())
53      setRelocationModel(Reloc::DynamicNoPIC);
54    else
55      setRelocationModel(Reloc::Static);
56  }
57}
58
59/// Override this for PowerPC.  Tail merging happily breaks up instruction issue
60/// groups, which typically degrades performance.
61bool PPCTargetMachine::getEnableTailMergeDefault() const { return false; }
62
63PPC32TargetMachine::PPC32TargetMachine(const Target &T, const std::string &TT,
64                                       const std::string &FS)
65  : PPCTargetMachine(T, TT, FS, false) {
66}
67
68
69PPC64TargetMachine::PPC64TargetMachine(const Target &T, const std::string &TT,
70                                       const std::string &FS)
71  : PPCTargetMachine(T, TT, FS, true) {
72}
73
74
75//===----------------------------------------------------------------------===//
76// Pass Pipeline Configuration
77//===----------------------------------------------------------------------===//
78
79bool PPCTargetMachine::addInstSelector(PassManagerBase &PM,
80                                       CodeGenOpt::Level OptLevel) {
81  // Install an instruction selector.
82  PM.add(createPPCISelDag(*this));
83  return false;
84}
85
86bool PPCTargetMachine::addPreEmitPass(PassManagerBase &PM,
87                                      CodeGenOpt::Level OptLevel) {
88  // Must run branch selection immediately preceding the asm printer.
89  PM.add(createPPCBranchSelectionPass());
90  return false;
91}
92
93bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM,
94                                      CodeGenOpt::Level OptLevel,
95                                      MachineCodeEmitter &MCE) {
96  // The JIT should use the static relocation model in ppc32 mode, PIC in ppc64.
97  // FIXME: This should be moved to TargetJITInfo!!
98  if (Subtarget.isPPC64()) {
99    // We use PIC codegen in ppc64 mode, because otherwise we'd have to use many
100    // instructions to materialize arbitrary global variable + function +
101    // constant pool addresses.
102    setRelocationModel(Reloc::PIC_);
103    // Temporary workaround for the inability of PPC64 JIT to handle jump
104    // tables.
105    DisableJumpTables = true;
106  } else {
107    setRelocationModel(Reloc::Static);
108  }
109
110  // Inform the subtarget that we are in JIT mode.  FIXME: does this break macho
111  // writing?
112  Subtarget.SetJITMode();
113
114  // Machine code emitter pass for PowerPC.
115  PM.add(createPPCCodeEmitterPass(*this, MCE));
116
117  return false;
118}
119
120bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM,
121                                      CodeGenOpt::Level OptLevel,
122                                      JITCodeEmitter &JCE) {
123  // The JIT should use the static relocation model in ppc32 mode, PIC in ppc64.
124  // FIXME: This should be moved to TargetJITInfo!!
125  if (Subtarget.isPPC64()) {
126    // We use PIC codegen in ppc64 mode, because otherwise we'd have to use many
127    // instructions to materialize arbitrary global variable + function +
128    // constant pool addresses.
129    setRelocationModel(Reloc::PIC_);
130    // Temporary workaround for the inability of PPC64 JIT to handle jump
131    // tables.
132    DisableJumpTables = true;
133  } else {
134    setRelocationModel(Reloc::Static);
135  }
136
137  // Inform the subtarget that we are in JIT mode.  FIXME: does this break macho
138  // writing?
139  Subtarget.SetJITMode();
140
141  // Machine code emitter pass for PowerPC.
142  PM.add(createPPCJITCodeEmitterPass(*this, JCE));
143
144  return false;
145}
146
147bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM,
148                                      CodeGenOpt::Level OptLevel,
149                                      ObjectCodeEmitter &OCE) {
150  // The JIT should use the static relocation model in ppc32 mode, PIC in ppc64.
151  // FIXME: This should be moved to TargetJITInfo!!
152  if (Subtarget.isPPC64()) {
153    // We use PIC codegen in ppc64 mode, because otherwise we'd have to use many
154    // instructions to materialize arbitrary global variable + function +
155    // constant pool addresses.
156    setRelocationModel(Reloc::PIC_);
157    // Temporary workaround for the inability of PPC64 JIT to handle jump
158    // tables.
159    DisableJumpTables = true;
160  } else {
161    setRelocationModel(Reloc::Static);
162  }
163
164  // Inform the subtarget that we are in JIT mode.  FIXME: does this break macho
165  // writing?
166  Subtarget.SetJITMode();
167
168  // Machine code emitter pass for PowerPC.
169  PM.add(createPPCObjectCodeEmitterPass(*this, OCE));
170
171  return false;
172}
173
174bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
175                                            CodeGenOpt::Level OptLevel,
176                                            MachineCodeEmitter &MCE) {
177  // Machine code emitter pass for PowerPC.
178  PM.add(createPPCCodeEmitterPass(*this, MCE));
179  return false;
180}
181
182bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
183                                            CodeGenOpt::Level OptLevel,
184                                            JITCodeEmitter &JCE) {
185  // Machine code emitter pass for PowerPC.
186  PM.add(createPPCJITCodeEmitterPass(*this, JCE));
187  return false;
188}
189
190bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
191                                            CodeGenOpt::Level OptLevel,
192                                            ObjectCodeEmitter &OCE) {
193  // Machine code emitter pass for PowerPC.
194  PM.add(createPPCObjectCodeEmitterPass(*this, OCE));
195  return false;
196}
197
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199