AArch64InstPrinter.h revision 263508
1168404Spjd//===-- AArch64InstPrinter.h - Convert AArch64 MCInst to assembly syntax --===// 2168404Spjd// 3168404Spjd// The LLVM Compiler Infrastructure 4168404Spjd// 5168404Spjd// This file is distributed under the University of Illinois Open Source 6168404Spjd// License. See LICENSE.TXT for details. 7168404Spjd// 8168404Spjd//===----------------------------------------------------------------------===// 9168404Spjd// 10168404Spjd// This class prints an AArch64 MCInst to a .s file. 11168404Spjd// 12168404Spjd//===----------------------------------------------------------------------===// 13168404Spjd 14168404Spjd#ifndef LLVM_AARCH64INSTPRINTER_H 15168404Spjd#define LLVM_AARCH64INSTPRINTER_H 16168404Spjd 17168404Spjd#include "MCTargetDesc/AArch64MCTargetDesc.h" 18168404Spjd#include "Utils/AArch64BaseInfo.h" 19168404Spjd#include "llvm/MC/MCInstPrinter.h" 20168404Spjd#include "llvm/MC/MCSubtargetInfo.h" 21168404Spjd 22185029Spjdnamespace llvm { 23168404Spjd 24168404Spjdclass MCOperand; 25168404Spjd 26168404Spjdclass AArch64InstPrinter : public MCInstPrinter { 27168404Spjdpublic: 28168404Spjd AArch64InstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII, 29168404Spjd const MCRegisterInfo &MRI, const MCSubtargetInfo &STI); 30168404Spjd 31168404Spjd // Autogenerated by tblgen 32168404Spjd void printInstruction(const MCInst *MI, raw_ostream &O); 33168404Spjd bool printAliasInstr(const MCInst *MI, raw_ostream &O); 34168404Spjd static const char *getRegisterName(unsigned RegNo); 35168404Spjd static const char *getInstructionName(unsigned Opcode); 36168404Spjd 37168404Spjd void printRegName(raw_ostream &O, unsigned RegNum) const; 38168404Spjd 39168404Spjd template<unsigned MemSize, unsigned RmSize> 40168404Spjd void printAddrRegExtendOperand(const MCInst *MI, unsigned OpNum, 41168404Spjd raw_ostream &O) { 42168404Spjd printAddrRegExtendOperand(MI, OpNum, O, MemSize, RmSize); 43168404Spjd } 44168404Spjd 45168404Spjd 46168404Spjd void printAddrRegExtendOperand(const MCInst *MI, unsigned OpNum, 47168404Spjd raw_ostream &O, unsigned MemSize, 48168404Spjd unsigned RmSize); 49168404Spjd 50168404Spjd void printAddSubImmLSL0Operand(const MCInst *MI, 51168404Spjd unsigned OpNum, raw_ostream &O); 52168404Spjd void printAddSubImmLSL12Operand(const MCInst *MI, 53168404Spjd unsigned OpNum, raw_ostream &O); 54168404Spjd 55168404Spjd void printBareImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 56168404Spjd 57168404Spjd template<unsigned RegWidth> 58168404Spjd void printBFILSBOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 59168404Spjd void printBFIWidthOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 60168404Spjd void printBFXWidthOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 61168404Spjd 62168404Spjd 63168404Spjd void printCondCodeOperand(const MCInst *MI, unsigned OpNum, 64168404Spjd raw_ostream &O); 65168404Spjd 66168404Spjd void printCRxOperand(const MCInst *MI, unsigned OpNum, 67168404Spjd raw_ostream &O); 68168404Spjd 69168404Spjd void printCVTFixedPosOperand(const MCInst *MI, unsigned OpNum, 70168404Spjd raw_ostream &O); 71168404Spjd 72168404Spjd void printFPImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &o); 73168404Spjd 74168404Spjd void printFPZeroOperand(const MCInst *MI, unsigned OpNum, raw_ostream &o); 75168404Spjd 76168404Spjd template<int MemScale> 77168404Spjd void printOffsetUImm12Operand(const MCInst *MI, 78168404Spjd unsigned OpNum, raw_ostream &o) { 79168404Spjd printOffsetUImm12Operand(MI, OpNum, o, MemScale); 80168404Spjd } 81168404Spjd 82168404Spjd void printOffsetUImm12Operand(const MCInst *MI, unsigned OpNum, 83168404Spjd raw_ostream &o, int MemScale); 84168404Spjd 85168404Spjd template<unsigned field_width, unsigned scale> 86168404Spjd void printLabelOperand(const MCInst *MI, unsigned OpNum, 87168404Spjd raw_ostream &O); 88168404Spjd 89168404Spjd template<unsigned RegWidth> 90168404Spjd void printLogicalImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 91168404Spjd 92168404Spjd template<typename SomeNamedImmMapper> 93185029Spjd void printNamedImmOperand(const MCInst *MI, unsigned OpNum, 94168404Spjd raw_ostream &O) { 95168404Spjd printNamedImmOperand(SomeNamedImmMapper(), MI, OpNum, O); 96168404Spjd } 97168404Spjd 98168404Spjd void printNamedImmOperand(const NamedImmMapper &Mapper, 99168404Spjd const MCInst *MI, unsigned OpNum, 100168404Spjd raw_ostream &O); 101168404Spjd 102168404Spjd void printSysRegOperand(const A64SysReg::SysRegMapper &Mapper, 103168404Spjd const MCInst *MI, unsigned OpNum, 104168404Spjd raw_ostream &O); 105168404Spjd 106168404Spjd void printMRSOperand(const MCInst *MI, unsigned OpNum, 107168404Spjd raw_ostream &O) { 108168404Spjd printSysRegOperand(A64SysReg::MRSMapper(), MI, OpNum, O); 109168404Spjd } 110168404Spjd 111168404Spjd void printMSROperand(const MCInst *MI, unsigned OpNum, 112168404Spjd raw_ostream &O) { 113168404Spjd printSysRegOperand(A64SysReg::MSRMapper(), MI, OpNum, O); 114168404Spjd } 115168404Spjd 116168404Spjd void printShiftOperand(const char *name, const MCInst *MI, 117168404Spjd unsigned OpIdx, raw_ostream &O); 118168404Spjd 119168404Spjd void printLSLOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 120168404Spjd 121168404Spjd void printLSROperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) { 122168404Spjd printShiftOperand("lsr", MI, OpNum, O); 123168404Spjd } 124168404Spjd void printASROperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) { 125168404Spjd printShiftOperand("asr", MI, OpNum, O); 126168404Spjd } 127168404Spjd void printROROperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) { 128168404Spjd printShiftOperand("ror", MI, OpNum, O); 129168404Spjd } 130185029Spjd 131185029Spjd template<A64SE::ShiftExtSpecifiers Shift> 132185029Spjd void printShiftOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O) { 133185029Spjd printShiftOperand(MI, OpNum, O, Shift); 134185029Spjd } 135185029Spjd 136185029Spjd void printShiftOperand(const MCInst *MI, unsigned OpNum, 137185029Spjd raw_ostream &O, A64SE::ShiftExtSpecifiers Sh); 138185029Spjd 139168404Spjd 140185029Spjd void printMoveWideImmOperand(const MCInst *MI, unsigned OpNum, 141185029Spjd raw_ostream &O); 142168404Spjd 143168404Spjd template<int MemSize> void 144168404Spjd printSImm7ScaledOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 145168404Spjd 146168404Spjd void printOffsetSImm9Operand(const MCInst *MI, unsigned OpNum, 147168404Spjd raw_ostream &O); 148168404Spjd 149168404Spjd void printPRFMOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 150168404Spjd 151168404Spjd template<A64SE::ShiftExtSpecifiers EXT> 152168404Spjd void printRegExtendOperand(const MCInst *MI, unsigned OpNum, 153168404Spjd raw_ostream &O) { 154185029Spjd printRegExtendOperand(MI, OpNum, O, EXT); 155185029Spjd } 156185029Spjd 157185029Spjd void printRegExtendOperand(const MCInst *MI, unsigned OpNum, 158185029Spjd raw_ostream &O, A64SE::ShiftExtSpecifiers Ext); 159185029Spjd 160185029Spjd void printVPRRegister(const MCInst *MI, unsigned OpNo, raw_ostream &O); 161168404Spjd void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); 162168404Spjd virtual void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot); 163168404Spjd 164168404Spjd bool isStackReg(unsigned RegNo) { 165168404Spjd return RegNo == AArch64::XSP || RegNo == AArch64::WSP; 166168404Spjd } 167168404Spjd 168168404Spjd template <A64SE::ShiftExtSpecifiers Ext, bool IsHalf> 169168404Spjd void printNeonMovImmShiftOperand(const MCInst *MI, unsigned OpNum, 170168404Spjd raw_ostream &O); 171168404Spjd void printNeonUImm0Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 172168404Spjd void printUImmHexOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 173168404Spjd void printUImmBareOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 174168404Spjd void printNeonUImm64MaskOperand(const MCInst *MI, unsigned OpNum, 175168404Spjd raw_ostream &O); 176168404Spjd 177168404Spjd template <A64Layout::VectorLayout Layout, unsigned Count> 178168404Spjd void printVectorList(const MCInst *MI, unsigned OpNum, raw_ostream &O); 179185029Spjd}; 180168404Spjd} 181168404Spjd 182168404Spjd#endif 183185029Spjd