SelectionDAGBuilder.h revision 234353
1199989Srdivacky//===-- SelectionDAGBuilder.h - Selection-DAG building --------------------===// 2199989Srdivacky// 3199989Srdivacky// The LLVM Compiler Infrastructure 4199989Srdivacky// 5199989Srdivacky// This file is distributed under the University of Illinois Open Source 6199989Srdivacky// License. See LICENSE.TXT for details. 7199989Srdivacky// 8199989Srdivacky//===----------------------------------------------------------------------===// 9199989Srdivacky// 10199989Srdivacky// This implements routines for translating from LLVM IR into SelectionDAG IR. 11199989Srdivacky// 12199989Srdivacky//===----------------------------------------------------------------------===// 13199989Srdivacky 14199989Srdivacky#ifndef SELECTIONDAGBUILDER_H 15199989Srdivacky#define SELECTIONDAGBUILDER_H 16199989Srdivacky 17199989Srdivacky#include "llvm/Constants.h" 18199989Srdivacky#include "llvm/CodeGen/SelectionDAG.h" 19199989Srdivacky#include "llvm/ADT/APInt.h" 20199989Srdivacky#include "llvm/ADT/DenseMap.h" 21199989Srdivacky#include "llvm/CodeGen/SelectionDAGNodes.h" 22199989Srdivacky#include "llvm/CodeGen/ValueTypes.h" 23199989Srdivacky#include "llvm/Support/CallSite.h" 24199989Srdivacky#include "llvm/Support/ErrorHandling.h" 25199989Srdivacky#include <vector> 26199989Srdivacky 27199989Srdivackynamespace llvm { 28199989Srdivacky 29199989Srdivackyclass AliasAnalysis; 30199989Srdivackyclass AllocaInst; 31199989Srdivackyclass BasicBlock; 32199989Srdivackyclass BitCastInst; 33199989Srdivackyclass BranchInst; 34199989Srdivackyclass CallInst; 35207618Srdivackyclass DbgValueInst; 36199989Srdivackyclass ExtractElementInst; 37199989Srdivackyclass ExtractValueInst; 38199989Srdivackyclass FCmpInst; 39199989Srdivackyclass FPExtInst; 40199989Srdivackyclass FPToSIInst; 41199989Srdivackyclass FPToUIInst; 42199989Srdivackyclass FPTruncInst; 43199989Srdivackyclass Function; 44199989Srdivackyclass FunctionLoweringInfo; 45199989Srdivackyclass GetElementPtrInst; 46199989Srdivackyclass GCFunctionInfo; 47199989Srdivackyclass ICmpInst; 48199989Srdivackyclass IntToPtrInst; 49199989Srdivackyclass IndirectBrInst; 50199989Srdivackyclass InvokeInst; 51199989Srdivackyclass InsertElementInst; 52199989Srdivackyclass InsertValueInst; 53199989Srdivackyclass Instruction; 54199989Srdivackyclass LoadInst; 55199989Srdivackyclass MachineBasicBlock; 56199989Srdivackyclass MachineInstr; 57199989Srdivackyclass MachineRegisterInfo; 58207618Srdivackyclass MDNode; 59199989Srdivackyclass PHINode; 60199989Srdivackyclass PtrToIntInst; 61199989Srdivackyclass ReturnInst; 62212904Sdimclass SDDbgValue; 63199989Srdivackyclass SExtInst; 64199989Srdivackyclass SelectInst; 65199989Srdivackyclass ShuffleVectorInst; 66199989Srdivackyclass SIToFPInst; 67199989Srdivackyclass StoreInst; 68199989Srdivackyclass SwitchInst; 69199989Srdivackyclass TargetData; 70234353Sdimclass TargetLibraryInfo; 71199989Srdivackyclass TargetLowering; 72199989Srdivackyclass TruncInst; 73199989Srdivackyclass UIToFPInst; 74199989Srdivackyclass UnreachableInst; 75199989Srdivackyclass VAArgInst; 76199989Srdivackyclass ZExtInst; 77199989Srdivacky 78199989Srdivacky//===----------------------------------------------------------------------===// 79199989Srdivacky/// SelectionDAGBuilder - This is the common target-independent lowering 80199989Srdivacky/// implementation that is parameterized by a TargetLowering object. 81199989Srdivacky/// 82199989Srdivackyclass SelectionDAGBuilder { 83199989Srdivacky /// CurDebugLoc - current file + line number. Changes as we build the DAG. 84199989Srdivacky DebugLoc CurDebugLoc; 85199989Srdivacky 86199989Srdivacky DenseMap<const Value*, SDValue> NodeMap; 87210299Sed 88210299Sed /// UnusedArgNodeMap - Maps argument value for unused arguments. This is used 89210299Sed /// to preserve debug information for incoming arguments. 90210299Sed DenseMap<const Value*, SDValue> UnusedArgNodeMap; 91199989Srdivacky 92212904Sdim /// DanglingDebugInfo - Helper type for DanglingDebugInfoMap. 93212904Sdim class DanglingDebugInfo { 94212904Sdim const DbgValueInst* DI; 95212904Sdim DebugLoc dl; 96212904Sdim unsigned SDNodeOrder; 97212904Sdim public: 98212904Sdim DanglingDebugInfo() : DI(0), dl(DebugLoc()), SDNodeOrder(0) { } 99212904Sdim DanglingDebugInfo(const DbgValueInst *di, DebugLoc DL, unsigned SDNO) : 100212904Sdim DI(di), dl(DL), SDNodeOrder(SDNO) { } 101212904Sdim const DbgValueInst* getDI() { return DI; } 102212904Sdim DebugLoc getdl() { return dl; } 103212904Sdim unsigned getSDNodeOrder() { return SDNodeOrder; } 104212904Sdim }; 105212904Sdim 106212904Sdim /// DanglingDebugInfoMap - Keeps track of dbg_values for which we have not 107212904Sdim /// yet seen the referent. We defer handling these until we do see it. 108212904Sdim DenseMap<const Value*, DanglingDebugInfo> DanglingDebugInfoMap; 109212904Sdim 110201360Srdivackypublic: 111199989Srdivacky /// PendingLoads - Loads are not emitted to the program immediately. We bunch 112199989Srdivacky /// them up and then emit token factor nodes when possible. This allows us to 113199989Srdivacky /// get simple disambiguation between loads without worrying about alias 114199989Srdivacky /// analysis. 115199989Srdivacky SmallVector<SDValue, 8> PendingLoads; 116201360Srdivackyprivate: 117199989Srdivacky 118199989Srdivacky /// PendingExports - CopyToReg nodes that copy values to virtual registers 119199989Srdivacky /// for export to other blocks need to be emitted before any terminator 120199989Srdivacky /// instruction, but they have no other ordering requirements. We bunch them 121199989Srdivacky /// up and the emit a single tokenfactor for them just before terminator 122199989Srdivacky /// instructions. 123199989Srdivacky SmallVector<SDValue, 8> PendingExports; 124199989Srdivacky 125201360Srdivacky /// SDNodeOrder - A unique monotonically increasing number used to order the 126201360Srdivacky /// SDNodes we create. 127201360Srdivacky unsigned SDNodeOrder; 128201360Srdivacky 129199989Srdivacky /// Case - A struct to record the Value for a switch case, and the 130199989Srdivacky /// case's target basic block. 131199989Srdivacky struct Case { 132234353Sdim const Constant *Low; 133234353Sdim const Constant *High; 134199989Srdivacky MachineBasicBlock* BB; 135226633Sdim uint32_t ExtraWeight; 136199989Srdivacky 137226633Sdim Case() : Low(0), High(0), BB(0), ExtraWeight(0) { } 138234353Sdim Case(const Constant *low, const Constant *high, MachineBasicBlock *bb, 139226633Sdim uint32_t extraweight) : Low(low), High(high), BB(bb), 140226633Sdim ExtraWeight(extraweight) { } 141226633Sdim 142199989Srdivacky APInt size() const { 143199989Srdivacky const APInt &rHigh = cast<ConstantInt>(High)->getValue(); 144199989Srdivacky const APInt &rLow = cast<ConstantInt>(Low)->getValue(); 145199989Srdivacky return (rHigh - rLow + 1ULL); 146199989Srdivacky } 147199989Srdivacky }; 148199989Srdivacky 149199989Srdivacky struct CaseBits { 150199989Srdivacky uint64_t Mask; 151199989Srdivacky MachineBasicBlock* BB; 152199989Srdivacky unsigned Bits; 153199989Srdivacky 154199989Srdivacky CaseBits(uint64_t mask, MachineBasicBlock* bb, unsigned bits): 155199989Srdivacky Mask(mask), BB(bb), Bits(bits) { } 156199989Srdivacky }; 157199989Srdivacky 158199989Srdivacky typedef std::vector<Case> CaseVector; 159199989Srdivacky typedef std::vector<CaseBits> CaseBitsVector; 160199989Srdivacky typedef CaseVector::iterator CaseItr; 161199989Srdivacky typedef std::pair<CaseItr, CaseItr> CaseRange; 162199989Srdivacky 163199989Srdivacky /// CaseRec - A struct with ctor used in lowering switches to a binary tree 164199989Srdivacky /// of conditional branches. 165199989Srdivacky struct CaseRec { 166207618Srdivacky CaseRec(MachineBasicBlock *bb, const Constant *lt, const Constant *ge, 167207618Srdivacky CaseRange r) : 168199989Srdivacky CaseBB(bb), LT(lt), GE(ge), Range(r) {} 169199989Srdivacky 170199989Srdivacky /// CaseBB - The MBB in which to emit the compare and branch 171199989Srdivacky MachineBasicBlock *CaseBB; 172199989Srdivacky /// LT, GE - If nonzero, we know the current case value must be less-than or 173199989Srdivacky /// greater-than-or-equal-to these Constants. 174207618Srdivacky const Constant *LT; 175207618Srdivacky const Constant *GE; 176199989Srdivacky /// Range - A pair of iterators representing the range of case values to be 177199989Srdivacky /// processed at this point in the binary search tree. 178199989Srdivacky CaseRange Range; 179199989Srdivacky }; 180199989Srdivacky 181199989Srdivacky typedef std::vector<CaseRec> CaseRecVector; 182199989Srdivacky 183199989Srdivacky /// The comparison function for sorting the switch case values in the vector. 184199989Srdivacky /// WARNING: Case ranges should be disjoint! 185199989Srdivacky struct CaseCmp { 186202375Srdivacky bool operator()(const Case &C1, const Case &C2) { 187199989Srdivacky assert(isa<ConstantInt>(C1.Low) && isa<ConstantInt>(C2.High)); 188199989Srdivacky const ConstantInt* CI1 = cast<const ConstantInt>(C1.Low); 189199989Srdivacky const ConstantInt* CI2 = cast<const ConstantInt>(C2.High); 190199989Srdivacky return CI1->getValue().slt(CI2->getValue()); 191199989Srdivacky } 192199989Srdivacky }; 193199989Srdivacky 194199989Srdivacky struct CaseBitsCmp { 195202375Srdivacky bool operator()(const CaseBits &C1, const CaseBits &C2) { 196199989Srdivacky return C1.Bits > C2.Bits; 197199989Srdivacky } 198199989Srdivacky }; 199199989Srdivacky 200202375Srdivacky size_t Clusterify(CaseVector &Cases, const SwitchInst &SI); 201199989Srdivacky 202199989Srdivacky /// CaseBlock - This structure is used to communicate between 203199989Srdivacky /// SelectionDAGBuilder and SDISel for the code generation of additional basic 204199989Srdivacky /// blocks needed by multi-case switch statements. 205199989Srdivacky struct CaseBlock { 206207618Srdivacky CaseBlock(ISD::CondCode cc, const Value *cmplhs, const Value *cmprhs, 207207618Srdivacky const Value *cmpmiddle, 208199989Srdivacky MachineBasicBlock *truebb, MachineBasicBlock *falsebb, 209226633Sdim MachineBasicBlock *me, 210226633Sdim uint32_t trueweight = 0, uint32_t falseweight = 0) 211199989Srdivacky : CC(cc), CmpLHS(cmplhs), CmpMHS(cmpmiddle), CmpRHS(cmprhs), 212226633Sdim TrueBB(truebb), FalseBB(falsebb), ThisBB(me), 213226633Sdim TrueWeight(trueweight), FalseWeight(falseweight) { } 214226633Sdim 215199989Srdivacky // CC - the condition code to use for the case block's setcc node 216199989Srdivacky ISD::CondCode CC; 217226633Sdim 218199989Srdivacky // CmpLHS/CmpRHS/CmpMHS - The LHS/MHS/RHS of the comparison to emit. 219199989Srdivacky // Emit by default LHS op RHS. MHS is used for range comparisons: 220199989Srdivacky // If MHS is not null: (LHS <= MHS) and (MHS <= RHS). 221207618Srdivacky const Value *CmpLHS, *CmpMHS, *CmpRHS; 222226633Sdim 223199989Srdivacky // TrueBB/FalseBB - the block to branch to if the setcc is true/false. 224199989Srdivacky MachineBasicBlock *TrueBB, *FalseBB; 225226633Sdim 226199989Srdivacky // ThisBB - the block into which to emit the code for the setcc and branches 227199989Srdivacky MachineBasicBlock *ThisBB; 228226633Sdim 229226633Sdim // TrueWeight/FalseWeight - branch weights. 230226633Sdim uint32_t TrueWeight, FalseWeight; 231199989Srdivacky }; 232226633Sdim 233199989Srdivacky struct JumpTable { 234199989Srdivacky JumpTable(unsigned R, unsigned J, MachineBasicBlock *M, 235199989Srdivacky MachineBasicBlock *D): Reg(R), JTI(J), MBB(M), Default(D) {} 236199989Srdivacky 237199989Srdivacky /// Reg - the virtual register containing the index of the jump table entry 238199989Srdivacky //. to jump to. 239199989Srdivacky unsigned Reg; 240199989Srdivacky /// JTI - the JumpTableIndex for this jump table in the function. 241199989Srdivacky unsigned JTI; 242199989Srdivacky /// MBB - the MBB into which to emit the code for the indirect jump. 243199989Srdivacky MachineBasicBlock *MBB; 244199989Srdivacky /// Default - the MBB of the default bb, which is a successor of the range 245199989Srdivacky /// check MBB. This is when updating PHI nodes in successors. 246199989Srdivacky MachineBasicBlock *Default; 247199989Srdivacky }; 248199989Srdivacky struct JumpTableHeader { 249207618Srdivacky JumpTableHeader(APInt F, APInt L, const Value *SV, MachineBasicBlock *H, 250199989Srdivacky bool E = false): 251199989Srdivacky First(F), Last(L), SValue(SV), HeaderBB(H), Emitted(E) {} 252199989Srdivacky APInt First; 253199989Srdivacky APInt Last; 254207618Srdivacky const Value *SValue; 255199989Srdivacky MachineBasicBlock *HeaderBB; 256199989Srdivacky bool Emitted; 257199989Srdivacky }; 258199989Srdivacky typedef std::pair<JumpTableHeader, JumpTable> JumpTableBlock; 259199989Srdivacky 260199989Srdivacky struct BitTestCase { 261199989Srdivacky BitTestCase(uint64_t M, MachineBasicBlock* T, MachineBasicBlock* Tr): 262199989Srdivacky Mask(M), ThisBB(T), TargetBB(Tr) { } 263199989Srdivacky uint64_t Mask; 264202375Srdivacky MachineBasicBlock *ThisBB; 265202375Srdivacky MachineBasicBlock *TargetBB; 266199989Srdivacky }; 267199989Srdivacky 268199989Srdivacky typedef SmallVector<BitTestCase, 3> BitTestInfo; 269199989Srdivacky 270199989Srdivacky struct BitTestBlock { 271207618Srdivacky BitTestBlock(APInt F, APInt R, const Value* SV, 272218893Sdim unsigned Rg, EVT RgVT, bool E, 273199989Srdivacky MachineBasicBlock* P, MachineBasicBlock* D, 274199989Srdivacky const BitTestInfo& C): 275218893Sdim First(F), Range(R), SValue(SV), Reg(Rg), RegVT(RgVT), Emitted(E), 276199989Srdivacky Parent(P), Default(D), Cases(C) { } 277199989Srdivacky APInt First; 278199989Srdivacky APInt Range; 279207618Srdivacky const Value *SValue; 280199989Srdivacky unsigned Reg; 281218893Sdim EVT RegVT; 282199989Srdivacky bool Emitted; 283199989Srdivacky MachineBasicBlock *Parent; 284199989Srdivacky MachineBasicBlock *Default; 285199989Srdivacky BitTestInfo Cases; 286199989Srdivacky }; 287199989Srdivacky 288199989Srdivackypublic: 289199989Srdivacky // TLI - This is information that describes the available target features we 290199989Srdivacky // need for lowering. This indicates when operations are unavailable, 291199989Srdivacky // implemented with a libcall, etc. 292207618Srdivacky const TargetMachine &TM; 293207618Srdivacky const TargetLowering &TLI; 294199989Srdivacky SelectionDAG &DAG; 295199989Srdivacky const TargetData *TD; 296199989Srdivacky AliasAnalysis *AA; 297234353Sdim const TargetLibraryInfo *LibInfo; 298199989Srdivacky 299199989Srdivacky /// SwitchCases - Vector of CaseBlock structures used to communicate 300199989Srdivacky /// SwitchInst code generation information. 301199989Srdivacky std::vector<CaseBlock> SwitchCases; 302199989Srdivacky /// JTCases - Vector of JumpTable structures used to communicate 303199989Srdivacky /// SwitchInst code generation information. 304199989Srdivacky std::vector<JumpTableBlock> JTCases; 305199989Srdivacky /// BitTestCases - Vector of BitTestBlock structures used to communicate 306199989Srdivacky /// SwitchInst code generation information. 307199989Srdivacky std::vector<BitTestBlock> BitTestCases; 308199989Srdivacky 309199989Srdivacky // Emit PHI-node-operand constants only once even if used by multiple 310199989Srdivacky // PHI nodes. 311207618Srdivacky DenseMap<const Constant *, unsigned> ConstantsOut; 312199989Srdivacky 313199989Srdivacky /// FuncInfo - Information about the function as a whole. 314199989Srdivacky /// 315199989Srdivacky FunctionLoweringInfo &FuncInfo; 316199989Srdivacky 317199989Srdivacky /// OptLevel - What optimization level we're generating code for. 318199989Srdivacky /// 319199989Srdivacky CodeGenOpt::Level OptLevel; 320199989Srdivacky 321199989Srdivacky /// GFI - Garbage collection metadata for the function. 322199989Srdivacky GCFunctionInfo *GFI; 323199989Srdivacky 324226633Sdim /// LPadToCallSiteMap - Map a landing pad to the call site indexes. 325226633Sdim DenseMap<MachineBasicBlock*, SmallVector<unsigned, 4> > LPadToCallSiteMap; 326226633Sdim 327199989Srdivacky /// HasTailCall - This is set to true if a call in the current 328199989Srdivacky /// block has been translated as a tail call. In this case, 329199989Srdivacky /// no subsequent DAG nodes should be created. 330199989Srdivacky /// 331199989Srdivacky bool HasTailCall; 332199989Srdivacky 333199989Srdivacky LLVMContext *Context; 334199989Srdivacky 335207618Srdivacky SelectionDAGBuilder(SelectionDAG &dag, FunctionLoweringInfo &funcinfo, 336199989Srdivacky CodeGenOpt::Level ol) 337207618Srdivacky : SDNodeOrder(0), TM(dag.getTarget()), TLI(dag.getTargetLoweringInfo()), 338207618Srdivacky DAG(dag), FuncInfo(funcinfo), OptLevel(ol), 339206124Srdivacky HasTailCall(false), Context(dag.getContext()) { 340199989Srdivacky } 341199989Srdivacky 342234353Sdim void init(GCFunctionInfo *gfi, AliasAnalysis &aa, 343234353Sdim const TargetLibraryInfo *li); 344199989Srdivacky 345207618Srdivacky /// clear - Clear out the current SelectionDAG and the associated 346199989Srdivacky /// state and prepare this SelectionDAGBuilder object to be used 347199989Srdivacky /// for a new block. This doesn't clear out information about 348199989Srdivacky /// additional blocks that are needed to complete switch lowering 349199989Srdivacky /// or PHI node updating; that information is cleared out as it is 350199989Srdivacky /// consumed. 351199989Srdivacky void clear(); 352199989Srdivacky 353223017Sdim /// clearDanglingDebugInfo - Clear the dangling debug information 354223017Sdim /// map. This function is seperated from the clear so that debug 355223017Sdim /// information that is dangling in a basic block can be properly 356223017Sdim /// resolved in a different basic block. This allows the 357223017Sdim /// SelectionDAG to resolve dangling debug information attached 358223017Sdim /// to PHI nodes. 359223017Sdim void clearDanglingDebugInfo(); 360223017Sdim 361199989Srdivacky /// getRoot - Return the current virtual root of the Selection DAG, 362199989Srdivacky /// flushing any PendingLoad items. This must be done before emitting 363199989Srdivacky /// a store or any other node that may need to be ordered after any 364199989Srdivacky /// prior load instructions. 365199989Srdivacky /// 366199989Srdivacky SDValue getRoot(); 367199989Srdivacky 368199989Srdivacky /// getControlRoot - Similar to getRoot, but instead of flushing all the 369199989Srdivacky /// PendingLoad items, flush all the PendingExports items. It is necessary 370199989Srdivacky /// to do this before emitting a terminator instruction. 371199989Srdivacky /// 372199989Srdivacky SDValue getControlRoot(); 373199989Srdivacky 374199989Srdivacky DebugLoc getCurDebugLoc() const { return CurDebugLoc; } 375219077Sdim 376201360Srdivacky unsigned getSDNodeOrder() const { return SDNodeOrder; } 377201360Srdivacky 378207618Srdivacky void CopyValueToVirtualRegister(const Value *V, unsigned Reg); 379199989Srdivacky 380203954Srdivacky /// AssignOrderingToNode - Assign an ordering to the node. The order is gotten 381203954Srdivacky /// from how the code appeared in the source. The ordering is used by the 382203954Srdivacky /// scheduler to effectively turn off scheduling. 383203954Srdivacky void AssignOrderingToNode(const SDNode *Node); 384203954Srdivacky 385207618Srdivacky void visit(const Instruction &I); 386199989Srdivacky 387207618Srdivacky void visit(unsigned Opcode, const User &I); 388199989Srdivacky 389212904Sdim // resolveDanglingDebugInfo - if we saw an earlier dbg_value referring to V, 390212904Sdim // generate the debug data structures now that we've seen its definition. 391212904Sdim void resolveDanglingDebugInfo(const Value *V, SDValue Val); 392199989Srdivacky SDValue getValue(const Value *V); 393210299Sed SDValue getNonRegisterValue(const Value *V); 394210299Sed SDValue getValueImpl(const Value *V); 395199989Srdivacky 396199989Srdivacky void setValue(const Value *V, SDValue NewN) { 397199989Srdivacky SDValue &N = NodeMap[V]; 398199989Srdivacky assert(N.getNode() == 0 && "Already set a value for this node!"); 399199989Srdivacky N = NewN; 400199989Srdivacky } 401199989Srdivacky 402210299Sed void setUnusedArgValue(const Value *V, SDValue NewN) { 403210299Sed SDValue &N = UnusedArgNodeMap[V]; 404210299Sed assert(N.getNode() == 0 && "Already set a value for this node!"); 405210299Sed N = NewN; 406210299Sed } 407199989Srdivacky 408207618Srdivacky void FindMergedConditions(const Value *Cond, MachineBasicBlock *TBB, 409199989Srdivacky MachineBasicBlock *FBB, MachineBasicBlock *CurBB, 410207618Srdivacky MachineBasicBlock *SwitchBB, unsigned Opc); 411207618Srdivacky void EmitBranchForMergedCondition(const Value *Cond, MachineBasicBlock *TBB, 412199989Srdivacky MachineBasicBlock *FBB, 413207618Srdivacky MachineBasicBlock *CurBB, 414207618Srdivacky MachineBasicBlock *SwitchBB); 415199989Srdivacky bool ShouldEmitAsBranches(const std::vector<CaseBlock> &Cases); 416207618Srdivacky bool isExportableFromCurrentBlock(const Value *V, const BasicBlock *FromBB); 417207618Srdivacky void CopyToExportRegsIfNeeded(const Value *V); 418207618Srdivacky void ExportFromCurrentBlock(const Value *V); 419207618Srdivacky void LowerCallTo(ImmutableCallSite CS, SDValue Callee, bool IsTailCall, 420199989Srdivacky MachineBasicBlock *LandingPad = NULL); 421199989Srdivacky 422218893Sdim /// UpdateSplitBlock - When an MBB was split during scheduling, update the 423218893Sdim /// references that ned to refer to the last resulting block. 424218893Sdim void UpdateSplitBlock(MachineBasicBlock *First, MachineBasicBlock *Last); 425218893Sdim 426199989Srdivackyprivate: 427199989Srdivacky // Terminator instructions. 428207618Srdivacky void visitRet(const ReturnInst &I); 429207618Srdivacky void visitBr(const BranchInst &I); 430207618Srdivacky void visitSwitch(const SwitchInst &I); 431207618Srdivacky void visitIndirectBr(const IndirectBrInst &I); 432207618Srdivacky void visitUnreachable(const UnreachableInst &I) { /* noop */ } 433199989Srdivacky 434199989Srdivacky // Helpers for visitSwitch 435199989Srdivacky bool handleSmallSwitchRange(CaseRec& CR, 436199989Srdivacky CaseRecVector& WorkList, 437207618Srdivacky const Value* SV, 438207618Srdivacky MachineBasicBlock* Default, 439207618Srdivacky MachineBasicBlock *SwitchBB); 440199989Srdivacky bool handleJTSwitchCase(CaseRec& CR, 441199989Srdivacky CaseRecVector& WorkList, 442207618Srdivacky const Value* SV, 443207618Srdivacky MachineBasicBlock* Default, 444207618Srdivacky MachineBasicBlock *SwitchBB); 445199989Srdivacky bool handleBTSplitSwitchCase(CaseRec& CR, 446199989Srdivacky CaseRecVector& WorkList, 447207618Srdivacky const Value* SV, 448207618Srdivacky MachineBasicBlock* Default, 449207618Srdivacky MachineBasicBlock *SwitchBB); 450199989Srdivacky bool handleBitTestsSwitchCase(CaseRec& CR, 451199989Srdivacky CaseRecVector& WorkList, 452207618Srdivacky const Value* SV, 453207618Srdivacky MachineBasicBlock* Default, 454207618Srdivacky MachineBasicBlock *SwitchBB); 455224145Sdim 456234353Sdim uint32_t getEdgeWeight(const MachineBasicBlock *Src, 457234353Sdim const MachineBasicBlock *Dst) const; 458226633Sdim void addSuccessorWithWeight(MachineBasicBlock *Src, MachineBasicBlock *Dst, 459226633Sdim uint32_t Weight = 0); 460199989Srdivackypublic: 461207618Srdivacky void visitSwitchCase(CaseBlock &CB, 462207618Srdivacky MachineBasicBlock *SwitchBB); 463207618Srdivacky void visitBitTestHeader(BitTestBlock &B, MachineBasicBlock *SwitchBB); 464218893Sdim void visitBitTestCase(BitTestBlock &BB, 465218893Sdim MachineBasicBlock* NextMBB, 466199989Srdivacky unsigned Reg, 467207618Srdivacky BitTestCase &B, 468207618Srdivacky MachineBasicBlock *SwitchBB); 469199989Srdivacky void visitJumpTable(JumpTable &JT); 470207618Srdivacky void visitJumpTableHeader(JumpTable &JT, JumpTableHeader &JTH, 471207618Srdivacky MachineBasicBlock *SwitchBB); 472199989Srdivacky 473199989Srdivackyprivate: 474199989Srdivacky // These all get lowered before this pass. 475207618Srdivacky void visitInvoke(const InvokeInst &I); 476226633Sdim void visitResume(const ResumeInst &I); 477199989Srdivacky 478207618Srdivacky void visitBinary(const User &I, unsigned OpCode); 479207618Srdivacky void visitShift(const User &I, unsigned Opcode); 480207618Srdivacky void visitAdd(const User &I) { visitBinary(I, ISD::ADD); } 481207618Srdivacky void visitFAdd(const User &I) { visitBinary(I, ISD::FADD); } 482207618Srdivacky void visitSub(const User &I) { visitBinary(I, ISD::SUB); } 483207618Srdivacky void visitFSub(const User &I); 484207618Srdivacky void visitMul(const User &I) { visitBinary(I, ISD::MUL); } 485207618Srdivacky void visitFMul(const User &I) { visitBinary(I, ISD::FMUL); } 486207618Srdivacky void visitURem(const User &I) { visitBinary(I, ISD::UREM); } 487207618Srdivacky void visitSRem(const User &I) { visitBinary(I, ISD::SREM); } 488207618Srdivacky void visitFRem(const User &I) { visitBinary(I, ISD::FREM); } 489207618Srdivacky void visitUDiv(const User &I) { visitBinary(I, ISD::UDIV); } 490224145Sdim void visitSDiv(const User &I); 491207618Srdivacky void visitFDiv(const User &I) { visitBinary(I, ISD::FDIV); } 492207618Srdivacky void visitAnd (const User &I) { visitBinary(I, ISD::AND); } 493207618Srdivacky void visitOr (const User &I) { visitBinary(I, ISD::OR); } 494207618Srdivacky void visitXor (const User &I) { visitBinary(I, ISD::XOR); } 495207618Srdivacky void visitShl (const User &I) { visitShift(I, ISD::SHL); } 496207618Srdivacky void visitLShr(const User &I) { visitShift(I, ISD::SRL); } 497207618Srdivacky void visitAShr(const User &I) { visitShift(I, ISD::SRA); } 498207618Srdivacky void visitICmp(const User &I); 499207618Srdivacky void visitFCmp(const User &I); 500199989Srdivacky // Visit the conversion instructions 501207618Srdivacky void visitTrunc(const User &I); 502207618Srdivacky void visitZExt(const User &I); 503207618Srdivacky void visitSExt(const User &I); 504207618Srdivacky void visitFPTrunc(const User &I); 505207618Srdivacky void visitFPExt(const User &I); 506207618Srdivacky void visitFPToUI(const User &I); 507207618Srdivacky void visitFPToSI(const User &I); 508207618Srdivacky void visitUIToFP(const User &I); 509207618Srdivacky void visitSIToFP(const User &I); 510207618Srdivacky void visitPtrToInt(const User &I); 511207618Srdivacky void visitIntToPtr(const User &I); 512207618Srdivacky void visitBitCast(const User &I); 513199989Srdivacky 514207618Srdivacky void visitExtractElement(const User &I); 515207618Srdivacky void visitInsertElement(const User &I); 516207618Srdivacky void visitShuffleVector(const User &I); 517199989Srdivacky 518207618Srdivacky void visitExtractValue(const ExtractValueInst &I); 519207618Srdivacky void visitInsertValue(const InsertValueInst &I); 520226633Sdim void visitLandingPad(const LandingPadInst &I); 521199989Srdivacky 522207618Srdivacky void visitGetElementPtr(const User &I); 523207618Srdivacky void visitSelect(const User &I); 524199989Srdivacky 525207618Srdivacky void visitAlloca(const AllocaInst &I); 526207618Srdivacky void visitLoad(const LoadInst &I); 527207618Srdivacky void visitStore(const StoreInst &I); 528226633Sdim void visitAtomicCmpXchg(const AtomicCmpXchgInst &I); 529226633Sdim void visitAtomicRMW(const AtomicRMWInst &I); 530226633Sdim void visitFence(const FenceInst &I); 531207618Srdivacky void visitPHI(const PHINode &I); 532207618Srdivacky void visitCall(const CallInst &I); 533207618Srdivacky bool visitMemCmpCall(const CallInst &I); 534226633Sdim void visitAtomicLoad(const LoadInst &I); 535226633Sdim void visitAtomicStore(const StoreInst &I); 536226633Sdim 537207618Srdivacky void visitInlineAsm(ImmutableCallSite CS); 538207618Srdivacky const char *visitIntrinsicCall(const CallInst &I, unsigned Intrinsic); 539207618Srdivacky void visitTargetIntrinsic(const CallInst &I, unsigned Intrinsic); 540199989Srdivacky 541207618Srdivacky void visitPow(const CallInst &I); 542207618Srdivacky void visitExp2(const CallInst &I); 543207618Srdivacky void visitExp(const CallInst &I); 544207618Srdivacky void visitLog(const CallInst &I); 545207618Srdivacky void visitLog2(const CallInst &I); 546207618Srdivacky void visitLog10(const CallInst &I); 547199989Srdivacky 548207618Srdivacky void visitVAStart(const CallInst &I); 549207618Srdivacky void visitVAArg(const VAArgInst &I); 550207618Srdivacky void visitVAEnd(const CallInst &I); 551207618Srdivacky void visitVACopy(const CallInst &I); 552199989Srdivacky 553207618Srdivacky void visitUserOp1(const Instruction &I) { 554199989Srdivacky llvm_unreachable("UserOp1 should not exist at instruction selection time!"); 555199989Srdivacky } 556207618Srdivacky void visitUserOp2(const Instruction &I) { 557199989Srdivacky llvm_unreachable("UserOp2 should not exist at instruction selection time!"); 558199989Srdivacky } 559207618Srdivacky 560207618Srdivacky void HandlePHINodesInSuccessorBlocks(const BasicBlock *LLVMBB); 561207618Srdivacky 562212904Sdim /// EmitFuncArgumentDbgValue - If V is an function argument then create 563212904Sdim /// corresponding DBG_VALUE machine instruction for it now. At the end of 564212904Sdim /// instruction selection, they will be inserted to the entry BB. 565212904Sdim bool EmitFuncArgumentDbgValue(const Value *V, MDNode *Variable, 566212904Sdim int64_t Offset, const SDValue &N); 567199989Srdivacky}; 568199989Srdivacky 569199989Srdivacky} // end namespace llvm 570199989Srdivacky 571199989Srdivacky#endif 572