SelectionDAGBuilder.h revision 207618
1199989Srdivacky//===-- SelectionDAGBuilder.h - Selection-DAG building --------------------===// 2199989Srdivacky// 3199989Srdivacky// The LLVM Compiler Infrastructure 4199989Srdivacky// 5199989Srdivacky// This file is distributed under the University of Illinois Open Source 6199989Srdivacky// License. See LICENSE.TXT for details. 7199989Srdivacky// 8199989Srdivacky//===----------------------------------------------------------------------===// 9199989Srdivacky// 10199989Srdivacky// This implements routines for translating from LLVM IR into SelectionDAG IR. 11199989Srdivacky// 12199989Srdivacky//===----------------------------------------------------------------------===// 13199989Srdivacky 14199989Srdivacky#ifndef SELECTIONDAGBUILDER_H 15199989Srdivacky#define SELECTIONDAGBUILDER_H 16199989Srdivacky 17199989Srdivacky#include "llvm/Constants.h" 18199989Srdivacky#include "llvm/CodeGen/SelectionDAG.h" 19199989Srdivacky#include "llvm/ADT/APInt.h" 20199989Srdivacky#include "llvm/ADT/DenseMap.h" 21199989Srdivacky#ifndef NDEBUG 22199989Srdivacky#include "llvm/ADT/SmallSet.h" 23199989Srdivacky#endif 24199989Srdivacky#include "llvm/CodeGen/SelectionDAGNodes.h" 25199989Srdivacky#include "llvm/CodeGen/ValueTypes.h" 26199989Srdivacky#include "llvm/Support/CallSite.h" 27199989Srdivacky#include "llvm/Support/ErrorHandling.h" 28199989Srdivacky#include <vector> 29199989Srdivacky#include <set> 30199989Srdivacky 31199989Srdivackynamespace llvm { 32199989Srdivacky 33199989Srdivackyclass AliasAnalysis; 34199989Srdivackyclass AllocaInst; 35199989Srdivackyclass BasicBlock; 36199989Srdivackyclass BitCastInst; 37199989Srdivackyclass BranchInst; 38199989Srdivackyclass CallInst; 39207618Srdivackyclass DbgValueInst; 40199989Srdivackyclass ExtractElementInst; 41199989Srdivackyclass ExtractValueInst; 42199989Srdivackyclass FCmpInst; 43199989Srdivackyclass FPExtInst; 44199989Srdivackyclass FPToSIInst; 45199989Srdivackyclass FPToUIInst; 46199989Srdivackyclass FPTruncInst; 47199989Srdivackyclass Function; 48199989Srdivackyclass FunctionLoweringInfo; 49199989Srdivackyclass GetElementPtrInst; 50199989Srdivackyclass GCFunctionInfo; 51199989Srdivackyclass ICmpInst; 52199989Srdivackyclass IntToPtrInst; 53199989Srdivackyclass IndirectBrInst; 54199989Srdivackyclass InvokeInst; 55199989Srdivackyclass InsertElementInst; 56199989Srdivackyclass InsertValueInst; 57199989Srdivackyclass Instruction; 58199989Srdivackyclass LoadInst; 59199989Srdivackyclass MachineBasicBlock; 60199989Srdivackyclass MachineInstr; 61199989Srdivackyclass MachineRegisterInfo; 62207618Srdivackyclass MDNode; 63199989Srdivackyclass PHINode; 64199989Srdivackyclass PtrToIntInst; 65199989Srdivackyclass ReturnInst; 66199989Srdivackyclass SDISelAsmOperandInfo; 67199989Srdivackyclass SExtInst; 68199989Srdivackyclass SelectInst; 69199989Srdivackyclass ShuffleVectorInst; 70199989Srdivackyclass SIToFPInst; 71199989Srdivackyclass StoreInst; 72199989Srdivackyclass SwitchInst; 73199989Srdivackyclass TargetData; 74199989Srdivackyclass TargetLowering; 75199989Srdivackyclass TruncInst; 76199989Srdivackyclass UIToFPInst; 77199989Srdivackyclass UnreachableInst; 78199989Srdivackyclass UnwindInst; 79199989Srdivackyclass VAArgInst; 80199989Srdivackyclass ZExtInst; 81199989Srdivacky 82199989Srdivacky//===----------------------------------------------------------------------===// 83199989Srdivacky/// SelectionDAGBuilder - This is the common target-independent lowering 84199989Srdivacky/// implementation that is parameterized by a TargetLowering object. 85199989Srdivacky/// 86199989Srdivackyclass SelectionDAGBuilder { 87199989Srdivacky /// CurDebugLoc - current file + line number. Changes as we build the DAG. 88199989Srdivacky DebugLoc CurDebugLoc; 89199989Srdivacky 90199989Srdivacky DenseMap<const Value*, SDValue> NodeMap; 91199989Srdivacky 92201360Srdivackypublic: 93199989Srdivacky /// PendingLoads - Loads are not emitted to the program immediately. We bunch 94199989Srdivacky /// them up and then emit token factor nodes when possible. This allows us to 95199989Srdivacky /// get simple disambiguation between loads without worrying about alias 96199989Srdivacky /// analysis. 97199989Srdivacky SmallVector<SDValue, 8> PendingLoads; 98201360Srdivackyprivate: 99199989Srdivacky 100199989Srdivacky /// PendingExports - CopyToReg nodes that copy values to virtual registers 101199989Srdivacky /// for export to other blocks need to be emitted before any terminator 102199989Srdivacky /// instruction, but they have no other ordering requirements. We bunch them 103199989Srdivacky /// up and the emit a single tokenfactor for them just before terminator 104199989Srdivacky /// instructions. 105199989Srdivacky SmallVector<SDValue, 8> PendingExports; 106199989Srdivacky 107201360Srdivacky /// SDNodeOrder - A unique monotonically increasing number used to order the 108201360Srdivacky /// SDNodes we create. 109201360Srdivacky unsigned SDNodeOrder; 110201360Srdivacky 111199989Srdivacky /// Case - A struct to record the Value for a switch case, and the 112199989Srdivacky /// case's target basic block. 113199989Srdivacky struct Case { 114199989Srdivacky Constant* Low; 115199989Srdivacky Constant* High; 116199989Srdivacky MachineBasicBlock* BB; 117199989Srdivacky 118199989Srdivacky Case() : Low(0), High(0), BB(0) { } 119199989Srdivacky Case(Constant* low, Constant* high, MachineBasicBlock* bb) : 120199989Srdivacky Low(low), High(high), BB(bb) { } 121199989Srdivacky APInt size() const { 122199989Srdivacky const APInt &rHigh = cast<ConstantInt>(High)->getValue(); 123199989Srdivacky const APInt &rLow = cast<ConstantInt>(Low)->getValue(); 124199989Srdivacky return (rHigh - rLow + 1ULL); 125199989Srdivacky } 126199989Srdivacky }; 127199989Srdivacky 128199989Srdivacky struct CaseBits { 129199989Srdivacky uint64_t Mask; 130199989Srdivacky MachineBasicBlock* BB; 131199989Srdivacky unsigned Bits; 132199989Srdivacky 133199989Srdivacky CaseBits(uint64_t mask, MachineBasicBlock* bb, unsigned bits): 134199989Srdivacky Mask(mask), BB(bb), Bits(bits) { } 135199989Srdivacky }; 136199989Srdivacky 137199989Srdivacky typedef std::vector<Case> CaseVector; 138199989Srdivacky typedef std::vector<CaseBits> CaseBitsVector; 139199989Srdivacky typedef CaseVector::iterator CaseItr; 140199989Srdivacky typedef std::pair<CaseItr, CaseItr> CaseRange; 141199989Srdivacky 142199989Srdivacky /// CaseRec - A struct with ctor used in lowering switches to a binary tree 143199989Srdivacky /// of conditional branches. 144199989Srdivacky struct CaseRec { 145207618Srdivacky CaseRec(MachineBasicBlock *bb, const Constant *lt, const Constant *ge, 146207618Srdivacky CaseRange r) : 147199989Srdivacky CaseBB(bb), LT(lt), GE(ge), Range(r) {} 148199989Srdivacky 149199989Srdivacky /// CaseBB - The MBB in which to emit the compare and branch 150199989Srdivacky MachineBasicBlock *CaseBB; 151199989Srdivacky /// LT, GE - If nonzero, we know the current case value must be less-than or 152199989Srdivacky /// greater-than-or-equal-to these Constants. 153207618Srdivacky const Constant *LT; 154207618Srdivacky const Constant *GE; 155199989Srdivacky /// Range - A pair of iterators representing the range of case values to be 156199989Srdivacky /// processed at this point in the binary search tree. 157199989Srdivacky CaseRange Range; 158199989Srdivacky }; 159199989Srdivacky 160199989Srdivacky typedef std::vector<CaseRec> CaseRecVector; 161199989Srdivacky 162199989Srdivacky /// The comparison function for sorting the switch case values in the vector. 163199989Srdivacky /// WARNING: Case ranges should be disjoint! 164199989Srdivacky struct CaseCmp { 165202375Srdivacky bool operator()(const Case &C1, const Case &C2) { 166199989Srdivacky assert(isa<ConstantInt>(C1.Low) && isa<ConstantInt>(C2.High)); 167199989Srdivacky const ConstantInt* CI1 = cast<const ConstantInt>(C1.Low); 168199989Srdivacky const ConstantInt* CI2 = cast<const ConstantInt>(C2.High); 169199989Srdivacky return CI1->getValue().slt(CI2->getValue()); 170199989Srdivacky } 171199989Srdivacky }; 172199989Srdivacky 173199989Srdivacky struct CaseBitsCmp { 174202375Srdivacky bool operator()(const CaseBits &C1, const CaseBits &C2) { 175199989Srdivacky return C1.Bits > C2.Bits; 176199989Srdivacky } 177199989Srdivacky }; 178199989Srdivacky 179202375Srdivacky size_t Clusterify(CaseVector &Cases, const SwitchInst &SI); 180199989Srdivacky 181199989Srdivacky /// CaseBlock - This structure is used to communicate between 182199989Srdivacky /// SelectionDAGBuilder and SDISel for the code generation of additional basic 183199989Srdivacky /// blocks needed by multi-case switch statements. 184199989Srdivacky struct CaseBlock { 185207618Srdivacky CaseBlock(ISD::CondCode cc, const Value *cmplhs, const Value *cmprhs, 186207618Srdivacky const Value *cmpmiddle, 187199989Srdivacky MachineBasicBlock *truebb, MachineBasicBlock *falsebb, 188199989Srdivacky MachineBasicBlock *me) 189199989Srdivacky : CC(cc), CmpLHS(cmplhs), CmpMHS(cmpmiddle), CmpRHS(cmprhs), 190199989Srdivacky TrueBB(truebb), FalseBB(falsebb), ThisBB(me) {} 191199989Srdivacky // CC - the condition code to use for the case block's setcc node 192199989Srdivacky ISD::CondCode CC; 193199989Srdivacky // CmpLHS/CmpRHS/CmpMHS - The LHS/MHS/RHS of the comparison to emit. 194199989Srdivacky // Emit by default LHS op RHS. MHS is used for range comparisons: 195199989Srdivacky // If MHS is not null: (LHS <= MHS) and (MHS <= RHS). 196207618Srdivacky const Value *CmpLHS, *CmpMHS, *CmpRHS; 197199989Srdivacky // TrueBB/FalseBB - the block to branch to if the setcc is true/false. 198199989Srdivacky MachineBasicBlock *TrueBB, *FalseBB; 199199989Srdivacky // ThisBB - the block into which to emit the code for the setcc and branches 200199989Srdivacky MachineBasicBlock *ThisBB; 201199989Srdivacky }; 202199989Srdivacky struct JumpTable { 203199989Srdivacky JumpTable(unsigned R, unsigned J, MachineBasicBlock *M, 204199989Srdivacky MachineBasicBlock *D): Reg(R), JTI(J), MBB(M), Default(D) {} 205199989Srdivacky 206199989Srdivacky /// Reg - the virtual register containing the index of the jump table entry 207199989Srdivacky //. to jump to. 208199989Srdivacky unsigned Reg; 209199989Srdivacky /// JTI - the JumpTableIndex for this jump table in the function. 210199989Srdivacky unsigned JTI; 211199989Srdivacky /// MBB - the MBB into which to emit the code for the indirect jump. 212199989Srdivacky MachineBasicBlock *MBB; 213199989Srdivacky /// Default - the MBB of the default bb, which is a successor of the range 214199989Srdivacky /// check MBB. This is when updating PHI nodes in successors. 215199989Srdivacky MachineBasicBlock *Default; 216199989Srdivacky }; 217199989Srdivacky struct JumpTableHeader { 218207618Srdivacky JumpTableHeader(APInt F, APInt L, const Value *SV, MachineBasicBlock *H, 219199989Srdivacky bool E = false): 220199989Srdivacky First(F), Last(L), SValue(SV), HeaderBB(H), Emitted(E) {} 221199989Srdivacky APInt First; 222199989Srdivacky APInt Last; 223207618Srdivacky const Value *SValue; 224199989Srdivacky MachineBasicBlock *HeaderBB; 225199989Srdivacky bool Emitted; 226199989Srdivacky }; 227199989Srdivacky typedef std::pair<JumpTableHeader, JumpTable> JumpTableBlock; 228199989Srdivacky 229199989Srdivacky struct BitTestCase { 230199989Srdivacky BitTestCase(uint64_t M, MachineBasicBlock* T, MachineBasicBlock* Tr): 231199989Srdivacky Mask(M), ThisBB(T), TargetBB(Tr) { } 232199989Srdivacky uint64_t Mask; 233202375Srdivacky MachineBasicBlock *ThisBB; 234202375Srdivacky MachineBasicBlock *TargetBB; 235199989Srdivacky }; 236199989Srdivacky 237199989Srdivacky typedef SmallVector<BitTestCase, 3> BitTestInfo; 238199989Srdivacky 239199989Srdivacky struct BitTestBlock { 240207618Srdivacky BitTestBlock(APInt F, APInt R, const Value* SV, 241199989Srdivacky unsigned Rg, bool E, 242199989Srdivacky MachineBasicBlock* P, MachineBasicBlock* D, 243199989Srdivacky const BitTestInfo& C): 244199989Srdivacky First(F), Range(R), SValue(SV), Reg(Rg), Emitted(E), 245199989Srdivacky Parent(P), Default(D), Cases(C) { } 246199989Srdivacky APInt First; 247199989Srdivacky APInt Range; 248207618Srdivacky const Value *SValue; 249199989Srdivacky unsigned Reg; 250199989Srdivacky bool Emitted; 251199989Srdivacky MachineBasicBlock *Parent; 252199989Srdivacky MachineBasicBlock *Default; 253199989Srdivacky BitTestInfo Cases; 254199989Srdivacky }; 255199989Srdivacky 256199989Srdivackypublic: 257199989Srdivacky // TLI - This is information that describes the available target features we 258199989Srdivacky // need for lowering. This indicates when operations are unavailable, 259199989Srdivacky // implemented with a libcall, etc. 260207618Srdivacky const TargetMachine &TM; 261207618Srdivacky const TargetLowering &TLI; 262199989Srdivacky SelectionDAG &DAG; 263199989Srdivacky const TargetData *TD; 264199989Srdivacky AliasAnalysis *AA; 265199989Srdivacky 266199989Srdivacky /// SwitchCases - Vector of CaseBlock structures used to communicate 267199989Srdivacky /// SwitchInst code generation information. 268199989Srdivacky std::vector<CaseBlock> SwitchCases; 269199989Srdivacky /// JTCases - Vector of JumpTable structures used to communicate 270199989Srdivacky /// SwitchInst code generation information. 271199989Srdivacky std::vector<JumpTableBlock> JTCases; 272199989Srdivacky /// BitTestCases - Vector of BitTestBlock structures used to communicate 273199989Srdivacky /// SwitchInst code generation information. 274199989Srdivacky std::vector<BitTestBlock> BitTestCases; 275199989Srdivacky 276199989Srdivacky // Emit PHI-node-operand constants only once even if used by multiple 277199989Srdivacky // PHI nodes. 278207618Srdivacky DenseMap<const Constant *, unsigned> ConstantsOut; 279199989Srdivacky 280199989Srdivacky /// FuncInfo - Information about the function as a whole. 281199989Srdivacky /// 282199989Srdivacky FunctionLoweringInfo &FuncInfo; 283199989Srdivacky 284199989Srdivacky /// OptLevel - What optimization level we're generating code for. 285199989Srdivacky /// 286199989Srdivacky CodeGenOpt::Level OptLevel; 287199989Srdivacky 288199989Srdivacky /// GFI - Garbage collection metadata for the function. 289199989Srdivacky GCFunctionInfo *GFI; 290199989Srdivacky 291199989Srdivacky /// HasTailCall - This is set to true if a call in the current 292199989Srdivacky /// block has been translated as a tail call. In this case, 293199989Srdivacky /// no subsequent DAG nodes should be created. 294199989Srdivacky /// 295199989Srdivacky bool HasTailCall; 296199989Srdivacky 297199989Srdivacky LLVMContext *Context; 298199989Srdivacky 299207618Srdivacky SelectionDAGBuilder(SelectionDAG &dag, FunctionLoweringInfo &funcinfo, 300199989Srdivacky CodeGenOpt::Level ol) 301207618Srdivacky : SDNodeOrder(0), TM(dag.getTarget()), TLI(dag.getTargetLoweringInfo()), 302207618Srdivacky DAG(dag), FuncInfo(funcinfo), OptLevel(ol), 303206124Srdivacky HasTailCall(false), Context(dag.getContext()) { 304199989Srdivacky } 305199989Srdivacky 306199989Srdivacky void init(GCFunctionInfo *gfi, AliasAnalysis &aa); 307199989Srdivacky 308207618Srdivacky /// clear - Clear out the current SelectionDAG and the associated 309199989Srdivacky /// state and prepare this SelectionDAGBuilder object to be used 310199989Srdivacky /// for a new block. This doesn't clear out information about 311199989Srdivacky /// additional blocks that are needed to complete switch lowering 312199989Srdivacky /// or PHI node updating; that information is cleared out as it is 313199989Srdivacky /// consumed. 314199989Srdivacky void clear(); 315199989Srdivacky 316199989Srdivacky /// getRoot - Return the current virtual root of the Selection DAG, 317199989Srdivacky /// flushing any PendingLoad items. This must be done before emitting 318199989Srdivacky /// a store or any other node that may need to be ordered after any 319199989Srdivacky /// prior load instructions. 320199989Srdivacky /// 321199989Srdivacky SDValue getRoot(); 322199989Srdivacky 323199989Srdivacky /// getControlRoot - Similar to getRoot, but instead of flushing all the 324199989Srdivacky /// PendingLoad items, flush all the PendingExports items. It is necessary 325199989Srdivacky /// to do this before emitting a terminator instruction. 326199989Srdivacky /// 327199989Srdivacky SDValue getControlRoot(); 328199989Srdivacky 329199989Srdivacky DebugLoc getCurDebugLoc() const { return CurDebugLoc; } 330199989Srdivacky 331201360Srdivacky unsigned getSDNodeOrder() const { return SDNodeOrder; } 332201360Srdivacky 333207618Srdivacky void CopyValueToVirtualRegister(const Value *V, unsigned Reg); 334199989Srdivacky 335203954Srdivacky /// AssignOrderingToNode - Assign an ordering to the node. The order is gotten 336203954Srdivacky /// from how the code appeared in the source. The ordering is used by the 337203954Srdivacky /// scheduler to effectively turn off scheduling. 338203954Srdivacky void AssignOrderingToNode(const SDNode *Node); 339203954Srdivacky 340207618Srdivacky void visit(const Instruction &I); 341199989Srdivacky 342207618Srdivacky void visit(unsigned Opcode, const User &I); 343199989Srdivacky 344199989Srdivacky SDValue getValue(const Value *V); 345199989Srdivacky 346199989Srdivacky void setValue(const Value *V, SDValue NewN) { 347199989Srdivacky SDValue &N = NodeMap[V]; 348199989Srdivacky assert(N.getNode() == 0 && "Already set a value for this node!"); 349199989Srdivacky N = NewN; 350199989Srdivacky } 351199989Srdivacky 352199989Srdivacky void GetRegistersForValue(SDISelAsmOperandInfo &OpInfo, 353199989Srdivacky std::set<unsigned> &OutputRegs, 354199989Srdivacky std::set<unsigned> &InputRegs); 355199989Srdivacky 356207618Srdivacky void FindMergedConditions(const Value *Cond, MachineBasicBlock *TBB, 357199989Srdivacky MachineBasicBlock *FBB, MachineBasicBlock *CurBB, 358207618Srdivacky MachineBasicBlock *SwitchBB, unsigned Opc); 359207618Srdivacky void EmitBranchForMergedCondition(const Value *Cond, MachineBasicBlock *TBB, 360199989Srdivacky MachineBasicBlock *FBB, 361207618Srdivacky MachineBasicBlock *CurBB, 362207618Srdivacky MachineBasicBlock *SwitchBB); 363199989Srdivacky bool ShouldEmitAsBranches(const std::vector<CaseBlock> &Cases); 364207618Srdivacky bool isExportableFromCurrentBlock(const Value *V, const BasicBlock *FromBB); 365207618Srdivacky void CopyToExportRegsIfNeeded(const Value *V); 366207618Srdivacky void ExportFromCurrentBlock(const Value *V); 367207618Srdivacky void LowerCallTo(ImmutableCallSite CS, SDValue Callee, bool IsTailCall, 368199989Srdivacky MachineBasicBlock *LandingPad = NULL); 369199989Srdivacky 370199989Srdivackyprivate: 371199989Srdivacky // Terminator instructions. 372207618Srdivacky void visitRet(const ReturnInst &I); 373207618Srdivacky void visitBr(const BranchInst &I); 374207618Srdivacky void visitSwitch(const SwitchInst &I); 375207618Srdivacky void visitIndirectBr(const IndirectBrInst &I); 376207618Srdivacky void visitUnreachable(const UnreachableInst &I) { /* noop */ } 377199989Srdivacky 378199989Srdivacky // Helpers for visitSwitch 379199989Srdivacky bool handleSmallSwitchRange(CaseRec& CR, 380199989Srdivacky CaseRecVector& WorkList, 381207618Srdivacky const Value* SV, 382207618Srdivacky MachineBasicBlock* Default, 383207618Srdivacky MachineBasicBlock *SwitchBB); 384199989Srdivacky bool handleJTSwitchCase(CaseRec& CR, 385199989Srdivacky CaseRecVector& WorkList, 386207618Srdivacky const Value* SV, 387207618Srdivacky MachineBasicBlock* Default, 388207618Srdivacky MachineBasicBlock *SwitchBB); 389199989Srdivacky bool handleBTSplitSwitchCase(CaseRec& CR, 390199989Srdivacky CaseRecVector& WorkList, 391207618Srdivacky const Value* SV, 392207618Srdivacky MachineBasicBlock* Default, 393207618Srdivacky MachineBasicBlock *SwitchBB); 394199989Srdivacky bool handleBitTestsSwitchCase(CaseRec& CR, 395199989Srdivacky CaseRecVector& WorkList, 396207618Srdivacky const Value* SV, 397207618Srdivacky MachineBasicBlock* Default, 398207618Srdivacky MachineBasicBlock *SwitchBB); 399199989Srdivackypublic: 400207618Srdivacky void visitSwitchCase(CaseBlock &CB, 401207618Srdivacky MachineBasicBlock *SwitchBB); 402207618Srdivacky void visitBitTestHeader(BitTestBlock &B, MachineBasicBlock *SwitchBB); 403199989Srdivacky void visitBitTestCase(MachineBasicBlock* NextMBB, 404199989Srdivacky unsigned Reg, 405207618Srdivacky BitTestCase &B, 406207618Srdivacky MachineBasicBlock *SwitchBB); 407199989Srdivacky void visitJumpTable(JumpTable &JT); 408207618Srdivacky void visitJumpTableHeader(JumpTable &JT, JumpTableHeader &JTH, 409207618Srdivacky MachineBasicBlock *SwitchBB); 410199989Srdivacky 411199989Srdivackyprivate: 412199989Srdivacky // These all get lowered before this pass. 413207618Srdivacky void visitInvoke(const InvokeInst &I); 414207618Srdivacky void visitUnwind(const UnwindInst &I); 415199989Srdivacky 416207618Srdivacky void visitBinary(const User &I, unsigned OpCode); 417207618Srdivacky void visitShift(const User &I, unsigned Opcode); 418207618Srdivacky void visitAdd(const User &I) { visitBinary(I, ISD::ADD); } 419207618Srdivacky void visitFAdd(const User &I) { visitBinary(I, ISD::FADD); } 420207618Srdivacky void visitSub(const User &I) { visitBinary(I, ISD::SUB); } 421207618Srdivacky void visitFSub(const User &I); 422207618Srdivacky void visitMul(const User &I) { visitBinary(I, ISD::MUL); } 423207618Srdivacky void visitFMul(const User &I) { visitBinary(I, ISD::FMUL); } 424207618Srdivacky void visitURem(const User &I) { visitBinary(I, ISD::UREM); } 425207618Srdivacky void visitSRem(const User &I) { visitBinary(I, ISD::SREM); } 426207618Srdivacky void visitFRem(const User &I) { visitBinary(I, ISD::FREM); } 427207618Srdivacky void visitUDiv(const User &I) { visitBinary(I, ISD::UDIV); } 428207618Srdivacky void visitSDiv(const User &I) { visitBinary(I, ISD::SDIV); } 429207618Srdivacky void visitFDiv(const User &I) { visitBinary(I, ISD::FDIV); } 430207618Srdivacky void visitAnd (const User &I) { visitBinary(I, ISD::AND); } 431207618Srdivacky void visitOr (const User &I) { visitBinary(I, ISD::OR); } 432207618Srdivacky void visitXor (const User &I) { visitBinary(I, ISD::XOR); } 433207618Srdivacky void visitShl (const User &I) { visitShift(I, ISD::SHL); } 434207618Srdivacky void visitLShr(const User &I) { visitShift(I, ISD::SRL); } 435207618Srdivacky void visitAShr(const User &I) { visitShift(I, ISD::SRA); } 436207618Srdivacky void visitICmp(const User &I); 437207618Srdivacky void visitFCmp(const User &I); 438199989Srdivacky // Visit the conversion instructions 439207618Srdivacky void visitTrunc(const User &I); 440207618Srdivacky void visitZExt(const User &I); 441207618Srdivacky void visitSExt(const User &I); 442207618Srdivacky void visitFPTrunc(const User &I); 443207618Srdivacky void visitFPExt(const User &I); 444207618Srdivacky void visitFPToUI(const User &I); 445207618Srdivacky void visitFPToSI(const User &I); 446207618Srdivacky void visitUIToFP(const User &I); 447207618Srdivacky void visitSIToFP(const User &I); 448207618Srdivacky void visitPtrToInt(const User &I); 449207618Srdivacky void visitIntToPtr(const User &I); 450207618Srdivacky void visitBitCast(const User &I); 451199989Srdivacky 452207618Srdivacky void visitExtractElement(const User &I); 453207618Srdivacky void visitInsertElement(const User &I); 454207618Srdivacky void visitShuffleVector(const User &I); 455199989Srdivacky 456207618Srdivacky void visitExtractValue(const ExtractValueInst &I); 457207618Srdivacky void visitInsertValue(const InsertValueInst &I); 458199989Srdivacky 459207618Srdivacky void visitGetElementPtr(const User &I); 460207618Srdivacky void visitSelect(const User &I); 461199989Srdivacky 462207618Srdivacky void visitAlloca(const AllocaInst &I); 463207618Srdivacky void visitLoad(const LoadInst &I); 464207618Srdivacky void visitStore(const StoreInst &I); 465207618Srdivacky void visitPHI(const PHINode &I); 466207618Srdivacky void visitCall(const CallInst &I); 467207618Srdivacky bool visitMemCmpCall(const CallInst &I); 468201360Srdivacky 469207618Srdivacky void visitInlineAsm(ImmutableCallSite CS); 470207618Srdivacky const char *visitIntrinsicCall(const CallInst &I, unsigned Intrinsic); 471207618Srdivacky void visitTargetIntrinsic(const CallInst &I, unsigned Intrinsic); 472199989Srdivacky 473207618Srdivacky void visitPow(const CallInst &I); 474207618Srdivacky void visitExp2(const CallInst &I); 475207618Srdivacky void visitExp(const CallInst &I); 476207618Srdivacky void visitLog(const CallInst &I); 477207618Srdivacky void visitLog2(const CallInst &I); 478207618Srdivacky void visitLog10(const CallInst &I); 479199989Srdivacky 480207618Srdivacky void visitVAStart(const CallInst &I); 481207618Srdivacky void visitVAArg(const VAArgInst &I); 482207618Srdivacky void visitVAEnd(const CallInst &I); 483207618Srdivacky void visitVACopy(const CallInst &I); 484199989Srdivacky 485207618Srdivacky void visitUserOp1(const Instruction &I) { 486199989Srdivacky llvm_unreachable("UserOp1 should not exist at instruction selection time!"); 487199989Srdivacky } 488207618Srdivacky void visitUserOp2(const Instruction &I) { 489199989Srdivacky llvm_unreachable("UserOp2 should not exist at instruction selection time!"); 490199989Srdivacky } 491199989Srdivacky 492207618Srdivacky const char *implVisitBinaryAtomic(const CallInst& I, ISD::NodeType Op); 493207618Srdivacky const char *implVisitAluOverflow(const CallInst &I, ISD::NodeType Op); 494207618Srdivacky 495207618Srdivacky void HandlePHINodesInSuccessorBlocks(const BasicBlock *LLVMBB); 496207618Srdivacky 497207618Srdivacky /// EmitFuncArgumentDbgValue - If the DbgValueInst is a dbg_value of a 498207618Srdivacky /// function argument, create the corresponding DBG_VALUE machine instruction 499207618Srdivacky /// for it now. At the end of instruction selection, they will be inserted to 500207618Srdivacky /// the entry BB. 501207618Srdivacky bool EmitFuncArgumentDbgValue(const DbgValueInst &DI, 502207618Srdivacky const Value *V, MDNode *Variable, 503207618Srdivacky uint64_t Offset, const SDValue &N); 504199989Srdivacky}; 505199989Srdivacky 506199989Srdivacky} // end namespace llvm 507199989Srdivacky 508199989Srdivacky#endif 509