reg-stack.c revision 132718
1/* Register to Stack convert for GNU compiler. 2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 3 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. 4 5 This file is part of GCC. 6 7 GCC is free software; you can redistribute it and/or modify it 8 under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 2, or (at your option) 10 any later version. 11 12 GCC is distributed in the hope that it will be useful, but WITHOUT 13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 15 License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with GCC; see the file COPYING. If not, write to the Free 19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA 20 02111-1307, USA. */ 21 22/* This pass converts stack-like registers from the "flat register 23 file" model that gcc uses, to a stack convention that the 387 uses. 24 25 * The form of the input: 26 27 On input, the function consists of insn that have had their 28 registers fully allocated to a set of "virtual" registers. Note that 29 the word "virtual" is used differently here than elsewhere in gcc: for 30 each virtual stack reg, there is a hard reg, but the mapping between 31 them is not known until this pass is run. On output, hard register 32 numbers have been substituted, and various pop and exchange insns have 33 been emitted. The hard register numbers and the virtual register 34 numbers completely overlap - before this pass, all stack register 35 numbers are virtual, and afterward they are all hard. 36 37 The virtual registers can be manipulated normally by gcc, and their 38 semantics are the same as for normal registers. After the hard 39 register numbers are substituted, the semantics of an insn containing 40 stack-like regs are not the same as for an insn with normal regs: for 41 instance, it is not safe to delete an insn that appears to be a no-op 42 move. In general, no insn containing hard regs should be changed 43 after this pass is done. 44 45 * The form of the output: 46 47 After this pass, hard register numbers represent the distance from 48 the current top of stack to the desired register. A reference to 49 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1, 50 represents the register just below that, and so forth. Also, REG_DEAD 51 notes indicate whether or not a stack register should be popped. 52 53 A "swap" insn looks like a parallel of two patterns, where each 54 pattern is a SET: one sets A to B, the other B to A. 55 56 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG 57 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS, 58 will replace the existing stack top, not push a new value. 59 60 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose 61 SET_SRC is REG or MEM. 62 63 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG 64 appears ambiguous. As a special case, the presence of a REG_DEAD note 65 for FIRST_STACK_REG differentiates between a load insn and a pop. 66 67 If a REG_DEAD is present, the insn represents a "pop" that discards 68 the top of the register stack. If there is no REG_DEAD note, then the 69 insn represents a "dup" or a push of the current top of stack onto the 70 stack. 71 72 * Methodology: 73 74 Existing REG_DEAD and REG_UNUSED notes for stack registers are 75 deleted and recreated from scratch. REG_DEAD is never created for a 76 SET_DEST, only REG_UNUSED. 77 78 * asm_operands: 79 80 There are several rules on the usage of stack-like regs in 81 asm_operands insns. These rules apply only to the operands that are 82 stack-like regs: 83 84 1. Given a set of input regs that die in an asm_operands, it is 85 necessary to know which are implicitly popped by the asm, and 86 which must be explicitly popped by gcc. 87 88 An input reg that is implicitly popped by the asm must be 89 explicitly clobbered, unless it is constrained to match an 90 output operand. 91 92 2. For any input reg that is implicitly popped by an asm, it is 93 necessary to know how to adjust the stack to compensate for the pop. 94 If any non-popped input is closer to the top of the reg-stack than 95 the implicitly popped reg, it would not be possible to know what the 96 stack looked like - it's not clear how the rest of the stack "slides 97 up". 98 99 All implicitly popped input regs must be closer to the top of 100 the reg-stack than any input that is not implicitly popped. 101 102 3. It is possible that if an input dies in an insn, reload might 103 use the input reg for an output reload. Consider this example: 104 105 asm ("foo" : "=t" (a) : "f" (b)); 106 107 This asm says that input B is not popped by the asm, and that 108 the asm pushes a result onto the reg-stack, ie, the stack is one 109 deeper after the asm than it was before. But, it is possible that 110 reload will think that it can use the same reg for both the input and 111 the output, if input B dies in this insn. 112 113 If any input operand uses the "f" constraint, all output reg 114 constraints must use the "&" earlyclobber. 115 116 The asm above would be written as 117 118 asm ("foo" : "=&t" (a) : "f" (b)); 119 120 4. Some operands need to be in particular places on the stack. All 121 output operands fall in this category - there is no other way to 122 know which regs the outputs appear in unless the user indicates 123 this in the constraints. 124 125 Output operands must specifically indicate which reg an output 126 appears in after an asm. "=f" is not allowed: the operand 127 constraints must select a class with a single reg. 128 129 5. Output operands may not be "inserted" between existing stack regs. 130 Since no 387 opcode uses a read/write operand, all output operands 131 are dead before the asm_operands, and are pushed by the asm_operands. 132 It makes no sense to push anywhere but the top of the reg-stack. 133 134 Output operands must start at the top of the reg-stack: output 135 operands may not "skip" a reg. 136 137 6. Some asm statements may need extra stack space for internal 138 calculations. This can be guaranteed by clobbering stack registers 139 unrelated to the inputs and outputs. 140 141 Here are a couple of reasonable asms to want to write. This asm 142 takes one input, which is internally popped, and produces two outputs. 143 144 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp)); 145 146 This asm takes two inputs, which are popped by the fyl2xp1 opcode, 147 and replaces them with one output. The user must code the "st(1)" 148 clobber for reg-stack.c to know that fyl2xp1 pops both inputs. 149 150 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)"); 151 152*/ 153 154#include "config.h" 155#include "system.h" 156#include "coretypes.h" 157#include "tm.h" 158#include "tree.h" 159#include "rtl.h" 160#include "tm_p.h" 161#include "function.h" 162#include "insn-config.h" 163#include "regs.h" 164#include "hard-reg-set.h" 165#include "flags.h" 166#include "toplev.h" 167#include "recog.h" 168#include "output.h" 169#include "basic-block.h" 170#include "varray.h" 171#include "reload.h" 172#include "ggc.h" 173 174/* We use this array to cache info about insns, because otherwise we 175 spend too much time in stack_regs_mentioned_p. 176 177 Indexed by insn UIDs. A value of zero is uninitialized, one indicates 178 the insn uses stack registers, two indicates the insn does not use 179 stack registers. */ 180static GTY(()) varray_type stack_regs_mentioned_data; 181 182#ifdef STACK_REGS 183 184#define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1) 185 186/* This is the basic stack record. TOP is an index into REG[] such 187 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty. 188 189 If TOP is -2, REG[] is not yet initialized. Stack initialization 190 consists of placing each live reg in array `reg' and setting `top' 191 appropriately. 192 193 REG_SET indicates which registers are live. */ 194 195typedef struct stack_def 196{ 197 int top; /* index to top stack element */ 198 HARD_REG_SET reg_set; /* set of live registers */ 199 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */ 200} *stack; 201 202/* This is used to carry information about basic blocks. It is 203 attached to the AUX field of the standard CFG block. */ 204 205typedef struct block_info_def 206{ 207 struct stack_def stack_in; /* Input stack configuration. */ 208 struct stack_def stack_out; /* Output stack configuration. */ 209 HARD_REG_SET out_reg_set; /* Stack regs live on output. */ 210 int done; /* True if block already converted. */ 211 int predecessors; /* Number of predecessors that needs 212 to be visited. */ 213} *block_info; 214 215#define BLOCK_INFO(B) ((block_info) (B)->aux) 216 217/* Passed to change_stack to indicate where to emit insns. */ 218enum emit_where 219{ 220 EMIT_AFTER, 221 EMIT_BEFORE 222}; 223 224/* The block we're currently working on. */ 225static basic_block current_block; 226 227/* This is the register file for all register after conversion. */ 228static rtx 229 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE]; 230 231#define FP_MODE_REG(regno,mode) \ 232 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int) (mode)]) 233 234/* Used to initialize uninitialized registers. */ 235static rtx nan; 236 237/* Forward declarations */ 238 239static int stack_regs_mentioned_p (rtx pat); 240static void straighten_stack (rtx, stack); 241static void pop_stack (stack, int); 242static rtx *get_true_reg (rtx *); 243 244static int check_asm_stack_operands (rtx); 245static int get_asm_operand_n_inputs (rtx); 246static rtx stack_result (tree); 247static void replace_reg (rtx *, int); 248static void remove_regno_note (rtx, enum reg_note, unsigned int); 249static int get_hard_regnum (stack, rtx); 250static rtx emit_pop_insn (rtx, stack, rtx, enum emit_where); 251static void emit_swap_insn (rtx, stack, rtx); 252static bool move_for_stack_reg (rtx, stack, rtx); 253static int swap_rtx_condition_1 (rtx); 254static int swap_rtx_condition (rtx); 255static void compare_for_stack_reg (rtx, stack, rtx); 256static bool subst_stack_regs_pat (rtx, stack, rtx); 257static void subst_asm_stack_regs (rtx, stack); 258static bool subst_stack_regs (rtx, stack); 259static void change_stack (rtx, stack, stack, enum emit_where); 260static int convert_regs_entry (void); 261static void convert_regs_exit (void); 262static int convert_regs_1 (FILE *, basic_block); 263static int convert_regs_2 (FILE *, basic_block); 264static int convert_regs (FILE *); 265static void print_stack (FILE *, stack); 266static rtx next_flags_user (rtx); 267static void record_label_references (rtx, rtx); 268static bool compensate_edge (edge, FILE *); 269 270/* Return nonzero if any stack register is mentioned somewhere within PAT. */ 271 272static int 273stack_regs_mentioned_p (rtx pat) 274{ 275 const char *fmt; 276 int i; 277 278 if (STACK_REG_P (pat)) 279 return 1; 280 281 fmt = GET_RTX_FORMAT (GET_CODE (pat)); 282 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) 283 { 284 if (fmt[i] == 'E') 285 { 286 int j; 287 288 for (j = XVECLEN (pat, i) - 1; j >= 0; j--) 289 if (stack_regs_mentioned_p (XVECEXP (pat, i, j))) 290 return 1; 291 } 292 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i))) 293 return 1; 294 } 295 296 return 0; 297} 298 299/* Return nonzero if INSN mentions stacked registers, else return zero. */ 300 301int 302stack_regs_mentioned (rtx insn) 303{ 304 unsigned int uid, max; 305 int test; 306 307 if (! INSN_P (insn) || !stack_regs_mentioned_data) 308 return 0; 309 310 uid = INSN_UID (insn); 311 max = VARRAY_SIZE (stack_regs_mentioned_data); 312 if (uid >= max) 313 { 314 /* Allocate some extra size to avoid too many reallocs, but 315 do not grow too quickly. */ 316 max = uid + uid / 20; 317 VARRAY_GROW (stack_regs_mentioned_data, max); 318 } 319 320 test = VARRAY_CHAR (stack_regs_mentioned_data, uid); 321 if (test == 0) 322 { 323 /* This insn has yet to be examined. Do so now. */ 324 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2; 325 VARRAY_CHAR (stack_regs_mentioned_data, uid) = test; 326 } 327 328 return test == 1; 329} 330 331static rtx ix86_flags_rtx; 332 333static rtx 334next_flags_user (rtx insn) 335{ 336 /* Search forward looking for the first use of this value. 337 Stop at block boundaries. */ 338 339 while (insn != BB_END (current_block)) 340 { 341 insn = NEXT_INSN (insn); 342 343 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn))) 344 return insn; 345 346 if (GET_CODE (insn) == CALL_INSN) 347 return NULL_RTX; 348 } 349 return NULL_RTX; 350} 351 352/* Reorganize the stack into ascending numbers, 353 after this insn. */ 354 355static void 356straighten_stack (rtx insn, stack regstack) 357{ 358 struct stack_def temp_stack; 359 int top; 360 361 /* If there is only a single register on the stack, then the stack is 362 already in increasing order and no reorganization is needed. 363 364 Similarly if the stack is empty. */ 365 if (regstack->top <= 0) 366 return; 367 368 COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set); 369 370 for (top = temp_stack.top = regstack->top; top >= 0; top--) 371 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top; 372 373 change_stack (insn, regstack, &temp_stack, EMIT_AFTER); 374} 375 376/* Pop a register from the stack. */ 377 378static void 379pop_stack (stack regstack, int regno) 380{ 381 int top = regstack->top; 382 383 CLEAR_HARD_REG_BIT (regstack->reg_set, regno); 384 regstack->top--; 385 /* If regno was not at the top of stack then adjust stack. */ 386 if (regstack->reg [top] != regno) 387 { 388 int i; 389 for (i = regstack->top; i >= 0; i--) 390 if (regstack->reg [i] == regno) 391 { 392 int j; 393 for (j = i; j < top; j++) 394 regstack->reg [j] = regstack->reg [j + 1]; 395 break; 396 } 397 } 398} 399 400/* Convert register usage from "flat" register file usage to a "stack 401 register file. FIRST is the first insn in the function, FILE is the 402 dump file, if used. 403 404 Construct a CFG and run life analysis. Then convert each insn one 405 by one. Run a last cleanup_cfg pass, if optimizing, to eliminate 406 code duplication created when the converter inserts pop insns on 407 the edges. */ 408 409bool 410reg_to_stack (rtx first, FILE *file) 411{ 412 basic_block bb; 413 int i; 414 int max_uid; 415 416 /* Clean up previous run. */ 417 stack_regs_mentioned_data = 0; 418 419 /* See if there is something to do. Flow analysis is quite 420 expensive so we might save some compilation time. */ 421 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) 422 if (regs_ever_live[i]) 423 break; 424 if (i > LAST_STACK_REG) 425 return false; 426 427 /* Ok, floating point instructions exist. If not optimizing, 428 build the CFG and run life analysis. 429 Also need to rebuild life when superblock scheduling is done 430 as it don't update liveness yet. */ 431 if (!optimize 432 || (flag_sched2_use_superblocks 433 && flag_schedule_insns_after_reload)) 434 { 435 count_or_remove_death_notes (NULL, 1); 436 life_analysis (first, file, PROP_DEATH_NOTES); 437 } 438 mark_dfs_back_edges (); 439 440 /* Set up block info for each basic block. */ 441 alloc_aux_for_blocks (sizeof (struct block_info_def)); 442 FOR_EACH_BB_REVERSE (bb) 443 { 444 edge e; 445 for (e = bb->pred; e; e = e->pred_next) 446 if (!(e->flags & EDGE_DFS_BACK) 447 && e->src != ENTRY_BLOCK_PTR) 448 BLOCK_INFO (bb)->predecessors++; 449 } 450 451 /* Create the replacement registers up front. */ 452 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) 453 { 454 enum machine_mode mode; 455 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); 456 mode != VOIDmode; 457 mode = GET_MODE_WIDER_MODE (mode)) 458 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i); 459 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT); 460 mode != VOIDmode; 461 mode = GET_MODE_WIDER_MODE (mode)) 462 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i); 463 } 464 465 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG); 466 467 /* A QNaN for initializing uninitialized variables. 468 469 ??? We can't load from constant memory in PIC mode, because 470 we're inserting these instructions before the prologue and 471 the PIC register hasn't been set up. In that case, fall back 472 on zero, which we can get from `ldz'. */ 473 474 if (flag_pic) 475 nan = CONST0_RTX (SFmode); 476 else 477 { 478 nan = gen_lowpart (SFmode, GEN_INT (0x7fc00000)); 479 nan = force_const_mem (SFmode, nan); 480 } 481 482 /* Allocate a cache for stack_regs_mentioned. */ 483 max_uid = get_max_uid (); 484 VARRAY_CHAR_INIT (stack_regs_mentioned_data, max_uid + 1, 485 "stack_regs_mentioned cache"); 486 487 convert_regs (file); 488 489 free_aux_for_blocks (); 490 return true; 491} 492 493/* Check PAT, which is in INSN, for LABEL_REFs. Add INSN to the 494 label's chain of references, and note which insn contains each 495 reference. */ 496 497static void 498record_label_references (rtx insn, rtx pat) 499{ 500 enum rtx_code code = GET_CODE (pat); 501 int i; 502 const char *fmt; 503 504 if (code == LABEL_REF) 505 { 506 rtx label = XEXP (pat, 0); 507 rtx ref; 508 509 if (GET_CODE (label) != CODE_LABEL) 510 abort (); 511 512 /* If this is an undefined label, LABEL_REFS (label) contains 513 garbage. */ 514 if (INSN_UID (label) == 0) 515 return; 516 517 /* Don't make a duplicate in the code_label's chain. */ 518 519 for (ref = LABEL_REFS (label); 520 ref && ref != label; 521 ref = LABEL_NEXTREF (ref)) 522 if (CONTAINING_INSN (ref) == insn) 523 return; 524 525 CONTAINING_INSN (pat) = insn; 526 LABEL_NEXTREF (pat) = LABEL_REFS (label); 527 LABEL_REFS (label) = pat; 528 529 return; 530 } 531 532 fmt = GET_RTX_FORMAT (code); 533 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 534 { 535 if (fmt[i] == 'e') 536 record_label_references (insn, XEXP (pat, i)); 537 if (fmt[i] == 'E') 538 { 539 int j; 540 for (j = 0; j < XVECLEN (pat, i); j++) 541 record_label_references (insn, XVECEXP (pat, i, j)); 542 } 543 } 544} 545 546/* Return a pointer to the REG expression within PAT. If PAT is not a 547 REG, possible enclosed by a conversion rtx, return the inner part of 548 PAT that stopped the search. */ 549 550static rtx * 551get_true_reg (rtx *pat) 552{ 553 for (;;) 554 switch (GET_CODE (*pat)) 555 { 556 case SUBREG: 557 /* Eliminate FP subregister accesses in favor of the 558 actual FP register in use. */ 559 { 560 rtx subreg; 561 if (FP_REG_P (subreg = SUBREG_REG (*pat))) 562 { 563 int regno_off = subreg_regno_offset (REGNO (subreg), 564 GET_MODE (subreg), 565 SUBREG_BYTE (*pat), 566 GET_MODE (*pat)); 567 *pat = FP_MODE_REG (REGNO (subreg) + regno_off, 568 GET_MODE (subreg)); 569 default: 570 return pat; 571 } 572 } 573 case FLOAT: 574 case FIX: 575 case FLOAT_EXTEND: 576 pat = & XEXP (*pat, 0); 577 } 578} 579 580/* Set if we find any malformed asms in a block. */ 581static bool any_malformed_asm; 582 583/* There are many rules that an asm statement for stack-like regs must 584 follow. Those rules are explained at the top of this file: the rule 585 numbers below refer to that explanation. */ 586 587static int 588check_asm_stack_operands (rtx insn) 589{ 590 int i; 591 int n_clobbers; 592 int malformed_asm = 0; 593 rtx body = PATTERN (insn); 594 595 char reg_used_as_output[FIRST_PSEUDO_REGISTER]; 596 char implicitly_dies[FIRST_PSEUDO_REGISTER]; 597 int alt; 598 599 rtx *clobber_reg = 0; 600 int n_inputs, n_outputs; 601 602 /* Find out what the constraints require. If no constraint 603 alternative matches, this asm is malformed. */ 604 extract_insn (insn); 605 constrain_operands (1); 606 alt = which_alternative; 607 608 preprocess_constraints (); 609 610 n_inputs = get_asm_operand_n_inputs (body); 611 n_outputs = recog_data.n_operands - n_inputs; 612 613 if (alt < 0) 614 { 615 malformed_asm = 1; 616 /* Avoid further trouble with this insn. */ 617 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); 618 return 0; 619 } 620 621 /* Strip SUBREGs here to make the following code simpler. */ 622 for (i = 0; i < recog_data.n_operands; i++) 623 if (GET_CODE (recog_data.operand[i]) == SUBREG 624 && GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG) 625 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]); 626 627 /* Set up CLOBBER_REG. */ 628 629 n_clobbers = 0; 630 631 if (GET_CODE (body) == PARALLEL) 632 { 633 clobber_reg = alloca (XVECLEN (body, 0) * sizeof (rtx)); 634 635 for (i = 0; i < XVECLEN (body, 0); i++) 636 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) 637 { 638 rtx clobber = XVECEXP (body, 0, i); 639 rtx reg = XEXP (clobber, 0); 640 641 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG) 642 reg = SUBREG_REG (reg); 643 644 if (STACK_REG_P (reg)) 645 { 646 clobber_reg[n_clobbers] = reg; 647 n_clobbers++; 648 } 649 } 650 } 651 652 /* Enforce rule #4: Output operands must specifically indicate which 653 reg an output appears in after an asm. "=f" is not allowed: the 654 operand constraints must select a class with a single reg. 655 656 Also enforce rule #5: Output operands must start at the top of 657 the reg-stack: output operands may not "skip" a reg. */ 658 659 memset (reg_used_as_output, 0, sizeof (reg_used_as_output)); 660 for (i = 0; i < n_outputs; i++) 661 if (STACK_REG_P (recog_data.operand[i])) 662 { 663 if (reg_class_size[(int) recog_op_alt[i][alt].class] != 1) 664 { 665 error_for_asm (insn, "output constraint %d must specify a single register", i); 666 malformed_asm = 1; 667 } 668 else 669 { 670 int j; 671 672 for (j = 0; j < n_clobbers; j++) 673 if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j])) 674 { 675 error_for_asm (insn, "output constraint %d cannot be specified together with \"%s\" clobber", 676 i, reg_names [REGNO (clobber_reg[j])]); 677 malformed_asm = 1; 678 break; 679 } 680 if (j == n_clobbers) 681 reg_used_as_output[REGNO (recog_data.operand[i])] = 1; 682 } 683 } 684 685 686 /* Search for first non-popped reg. */ 687 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) 688 if (! reg_used_as_output[i]) 689 break; 690 691 /* If there are any other popped regs, that's an error. */ 692 for (; i < LAST_STACK_REG + 1; i++) 693 if (reg_used_as_output[i]) 694 break; 695 696 if (i != LAST_STACK_REG + 1) 697 { 698 error_for_asm (insn, "output regs must be grouped at top of stack"); 699 malformed_asm = 1; 700 } 701 702 /* Enforce rule #2: All implicitly popped input regs must be closer 703 to the top of the reg-stack than any input that is not implicitly 704 popped. */ 705 706 memset (implicitly_dies, 0, sizeof (implicitly_dies)); 707 for (i = n_outputs; i < n_outputs + n_inputs; i++) 708 if (STACK_REG_P (recog_data.operand[i])) 709 { 710 /* An input reg is implicitly popped if it is tied to an 711 output, or if there is a CLOBBER for it. */ 712 int j; 713 714 for (j = 0; j < n_clobbers; j++) 715 if (operands_match_p (clobber_reg[j], recog_data.operand[i])) 716 break; 717 718 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0) 719 implicitly_dies[REGNO (recog_data.operand[i])] = 1; 720 } 721 722 /* Search for first non-popped reg. */ 723 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) 724 if (! implicitly_dies[i]) 725 break; 726 727 /* If there are any other popped regs, that's an error. */ 728 for (; i < LAST_STACK_REG + 1; i++) 729 if (implicitly_dies[i]) 730 break; 731 732 if (i != LAST_STACK_REG + 1) 733 { 734 error_for_asm (insn, 735 "implicitly popped regs must be grouped at top of stack"); 736 malformed_asm = 1; 737 } 738 739 /* Enforce rule #3: If any input operand uses the "f" constraint, all 740 output constraints must use the "&" earlyclobber. 741 742 ??? Detect this more deterministically by having constrain_asm_operands 743 record any earlyclobber. */ 744 745 for (i = n_outputs; i < n_outputs + n_inputs; i++) 746 if (recog_op_alt[i][alt].matches == -1) 747 { 748 int j; 749 750 for (j = 0; j < n_outputs; j++) 751 if (operands_match_p (recog_data.operand[j], recog_data.operand[i])) 752 { 753 error_for_asm (insn, 754 "output operand %d must use `&' constraint", j); 755 malformed_asm = 1; 756 } 757 } 758 759 if (malformed_asm) 760 { 761 /* Avoid further trouble with this insn. */ 762 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); 763 any_malformed_asm = true; 764 return 0; 765 } 766 767 return 1; 768} 769 770/* Calculate the number of inputs and outputs in BODY, an 771 asm_operands. N_OPERANDS is the total number of operands, and 772 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are 773 placed. */ 774 775static int 776get_asm_operand_n_inputs (rtx body) 777{ 778 if (GET_CODE (body) == SET && GET_CODE (SET_SRC (body)) == ASM_OPERANDS) 779 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body)); 780 781 else if (GET_CODE (body) == ASM_OPERANDS) 782 return ASM_OPERANDS_INPUT_LENGTH (body); 783 784 else if (GET_CODE (body) == PARALLEL 785 && GET_CODE (XVECEXP (body, 0, 0)) == SET) 786 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body, 0, 0))); 787 788 else if (GET_CODE (body) == PARALLEL 789 && GET_CODE (XVECEXP (body, 0, 0)) == ASM_OPERANDS) 790 return ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body, 0, 0)); 791 792 abort (); 793} 794 795/* If current function returns its result in an fp stack register, 796 return the REG. Otherwise, return 0. */ 797 798static rtx 799stack_result (tree decl) 800{ 801 rtx result; 802 803 /* If the value is supposed to be returned in memory, then clearly 804 it is not returned in a stack register. */ 805 if (aggregate_value_p (DECL_RESULT (decl), decl)) 806 return 0; 807 808 result = DECL_RTL_IF_SET (DECL_RESULT (decl)); 809 if (result != 0) 810 { 811#ifdef FUNCTION_OUTGOING_VALUE 812 result 813 = FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl); 814#else 815 result = FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl); 816#endif 817 } 818 819 return result != 0 && STACK_REG_P (result) ? result : 0; 820} 821 822 823/* 824 * This section deals with stack register substitution, and forms the second 825 * pass over the RTL. 826 */ 827 828/* Replace REG, which is a pointer to a stack reg RTX, with an RTX for 829 the desired hard REGNO. */ 830 831static void 832replace_reg (rtx *reg, int regno) 833{ 834 if (regno < FIRST_STACK_REG || regno > LAST_STACK_REG 835 || ! STACK_REG_P (*reg)) 836 abort (); 837 838 switch (GET_MODE_CLASS (GET_MODE (*reg))) 839 { 840 default: abort (); 841 case MODE_FLOAT: 842 case MODE_COMPLEX_FLOAT:; 843 } 844 845 *reg = FP_MODE_REG (regno, GET_MODE (*reg)); 846} 847 848/* Remove a note of type NOTE, which must be found, for register 849 number REGNO from INSN. Remove only one such note. */ 850 851static void 852remove_regno_note (rtx insn, enum reg_note note, unsigned int regno) 853{ 854 rtx *note_link, this; 855 856 note_link = ®_NOTES (insn); 857 for (this = *note_link; this; this = XEXP (this, 1)) 858 if (REG_NOTE_KIND (this) == note 859 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno) 860 { 861 *note_link = XEXP (this, 1); 862 return; 863 } 864 else 865 note_link = &XEXP (this, 1); 866 867 abort (); 868} 869 870/* Find the hard register number of virtual register REG in REGSTACK. 871 The hard register number is relative to the top of the stack. -1 is 872 returned if the register is not found. */ 873 874static int 875get_hard_regnum (stack regstack, rtx reg) 876{ 877 int i; 878 879 if (! STACK_REG_P (reg)) 880 abort (); 881 882 for (i = regstack->top; i >= 0; i--) 883 if (regstack->reg[i] == REGNO (reg)) 884 break; 885 886 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1; 887} 888 889/* Emit an insn to pop virtual register REG before or after INSN. 890 REGSTACK is the stack state after INSN and is updated to reflect this 891 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn 892 is represented as a SET whose destination is the register to be popped 893 and source is the top of stack. A death note for the top of stack 894 cases the movdf pattern to pop. */ 895 896static rtx 897emit_pop_insn (rtx insn, stack regstack, rtx reg, enum emit_where where) 898{ 899 rtx pop_insn, pop_rtx; 900 int hard_regno; 901 902 /* For complex types take care to pop both halves. These may survive in 903 CLOBBER and USE expressions. */ 904 if (COMPLEX_MODE_P (GET_MODE (reg))) 905 { 906 rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode); 907 rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode); 908 909 pop_insn = NULL_RTX; 910 if (get_hard_regnum (regstack, reg1) >= 0) 911 pop_insn = emit_pop_insn (insn, regstack, reg1, where); 912 if (get_hard_regnum (regstack, reg2) >= 0) 913 pop_insn = emit_pop_insn (insn, regstack, reg2, where); 914 if (!pop_insn) 915 abort (); 916 return pop_insn; 917 } 918 919 hard_regno = get_hard_regnum (regstack, reg); 920 921 if (hard_regno < FIRST_STACK_REG) 922 abort (); 923 924 pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode), 925 FP_MODE_REG (FIRST_STACK_REG, DFmode)); 926 927 if (where == EMIT_AFTER) 928 pop_insn = emit_insn_after (pop_rtx, insn); 929 else 930 pop_insn = emit_insn_before (pop_rtx, insn); 931 932 REG_NOTES (pop_insn) 933 = gen_rtx_EXPR_LIST (REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode), 934 REG_NOTES (pop_insn)); 935 936 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)] 937 = regstack->reg[regstack->top]; 938 regstack->top -= 1; 939 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg)); 940 941 return pop_insn; 942} 943 944/* Emit an insn before or after INSN to swap virtual register REG with 945 the top of stack. REGSTACK is the stack state before the swap, and 946 is updated to reflect the swap. A swap insn is represented as a 947 PARALLEL of two patterns: each pattern moves one reg to the other. 948 949 If REG is already at the top of the stack, no insn is emitted. */ 950 951static void 952emit_swap_insn (rtx insn, stack regstack, rtx reg) 953{ 954 int hard_regno; 955 rtx swap_rtx; 956 int tmp, other_reg; /* swap regno temps */ 957 rtx i1; /* the stack-reg insn prior to INSN */ 958 rtx i1set = NULL_RTX; /* the SET rtx within I1 */ 959 960 hard_regno = get_hard_regnum (regstack, reg); 961 962 if (hard_regno < FIRST_STACK_REG) 963 abort (); 964 if (hard_regno == FIRST_STACK_REG) 965 return; 966 967 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG); 968 969 tmp = regstack->reg[other_reg]; 970 regstack->reg[other_reg] = regstack->reg[regstack->top]; 971 regstack->reg[regstack->top] = tmp; 972 973 /* Find the previous insn involving stack regs, but don't pass a 974 block boundary. */ 975 i1 = NULL; 976 if (current_block && insn != BB_HEAD (current_block)) 977 { 978 rtx tmp = PREV_INSN (insn); 979 rtx limit = PREV_INSN (BB_HEAD (current_block)); 980 while (tmp != limit) 981 { 982 if (GET_CODE (tmp) == CODE_LABEL 983 || GET_CODE (tmp) == CALL_INSN 984 || NOTE_INSN_BASIC_BLOCK_P (tmp) 985 || (GET_CODE (tmp) == INSN 986 && stack_regs_mentioned (tmp))) 987 { 988 i1 = tmp; 989 break; 990 } 991 tmp = PREV_INSN (tmp); 992 } 993 } 994 995 if (i1 != NULL_RTX 996 && (i1set = single_set (i1)) != NULL_RTX) 997 { 998 rtx i1src = *get_true_reg (&SET_SRC (i1set)); 999 rtx i1dest = *get_true_reg (&SET_DEST (i1set)); 1000 1001 /* If the previous register stack push was from the reg we are to 1002 swap with, omit the swap. */ 1003 1004 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == FIRST_STACK_REG 1005 && GET_CODE (i1src) == REG 1006 && REGNO (i1src) == (unsigned) hard_regno - 1 1007 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) 1008 return; 1009 1010 /* If the previous insn wrote to the reg we are to swap with, 1011 omit the swap. */ 1012 1013 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == (unsigned) hard_regno 1014 && GET_CODE (i1src) == REG && REGNO (i1src) == FIRST_STACK_REG 1015 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) 1016 return; 1017 } 1018 1019 swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode), 1020 FP_MODE_REG (FIRST_STACK_REG, XFmode)); 1021 1022 if (i1) 1023 emit_insn_after (swap_rtx, i1); 1024 else if (current_block) 1025 emit_insn_before (swap_rtx, BB_HEAD (current_block)); 1026 else 1027 emit_insn_before (swap_rtx, insn); 1028} 1029 1030/* Handle a move to or from a stack register in PAT, which is in INSN. 1031 REGSTACK is the current stack. Return whether a control flow insn 1032 was deleted in the process. */ 1033 1034static bool 1035move_for_stack_reg (rtx insn, stack regstack, rtx pat) 1036{ 1037 rtx *psrc = get_true_reg (&SET_SRC (pat)); 1038 rtx *pdest = get_true_reg (&SET_DEST (pat)); 1039 rtx src, dest; 1040 rtx note; 1041 bool control_flow_insn_deleted = false; 1042 1043 src = *psrc; dest = *pdest; 1044 1045 if (STACK_REG_P (src) && STACK_REG_P (dest)) 1046 { 1047 /* Write from one stack reg to another. If SRC dies here, then 1048 just change the register mapping and delete the insn. */ 1049 1050 note = find_regno_note (insn, REG_DEAD, REGNO (src)); 1051 if (note) 1052 { 1053 int i; 1054 1055 /* If this is a no-op move, there must not be a REG_DEAD note. */ 1056 if (REGNO (src) == REGNO (dest)) 1057 abort (); 1058 1059 for (i = regstack->top; i >= 0; i--) 1060 if (regstack->reg[i] == REGNO (src)) 1061 break; 1062 1063 /* The source must be live, and the dest must be dead. */ 1064 if (i < 0 || get_hard_regnum (regstack, dest) >= FIRST_STACK_REG) 1065 abort (); 1066 1067 /* It is possible that the dest is unused after this insn. 1068 If so, just pop the src. */ 1069 1070 if (find_regno_note (insn, REG_UNUSED, REGNO (dest))) 1071 emit_pop_insn (insn, regstack, src, EMIT_AFTER); 1072 else 1073 { 1074 regstack->reg[i] = REGNO (dest); 1075 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); 1076 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src)); 1077 } 1078 1079 control_flow_insn_deleted |= control_flow_insn_p (insn); 1080 delete_insn (insn); 1081 return control_flow_insn_deleted; 1082 } 1083 1084 /* The source reg does not die. */ 1085 1086 /* If this appears to be a no-op move, delete it, or else it 1087 will confuse the machine description output patterns. But if 1088 it is REG_UNUSED, we must pop the reg now, as per-insn processing 1089 for REG_UNUSED will not work for deleted insns. */ 1090 1091 if (REGNO (src) == REGNO (dest)) 1092 { 1093 if (find_regno_note (insn, REG_UNUSED, REGNO (dest))) 1094 emit_pop_insn (insn, regstack, dest, EMIT_AFTER); 1095 1096 control_flow_insn_deleted |= control_flow_insn_p (insn); 1097 delete_insn (insn); 1098 return control_flow_insn_deleted; 1099 } 1100 1101 /* The destination ought to be dead. */ 1102 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG) 1103 abort (); 1104 1105 replace_reg (psrc, get_hard_regnum (regstack, src)); 1106 1107 regstack->reg[++regstack->top] = REGNO (dest); 1108 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); 1109 replace_reg (pdest, FIRST_STACK_REG); 1110 } 1111 else if (STACK_REG_P (src)) 1112 { 1113 /* Save from a stack reg to MEM, or possibly integer reg. Since 1114 only top of stack may be saved, emit an exchange first if 1115 needs be. */ 1116 1117 emit_swap_insn (insn, regstack, src); 1118 1119 note = find_regno_note (insn, REG_DEAD, REGNO (src)); 1120 if (note) 1121 { 1122 replace_reg (&XEXP (note, 0), FIRST_STACK_REG); 1123 regstack->top--; 1124 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src)); 1125 } 1126 else if ((GET_MODE (src) == XFmode) 1127 && regstack->top < REG_STACK_SIZE - 1) 1128 { 1129 /* A 387 cannot write an XFmode value to a MEM without 1130 clobbering the source reg. The output code can handle 1131 this by reading back the value from the MEM. 1132 But it is more efficient to use a temp register if one is 1133 available. Push the source value here if the register 1134 stack is not full, and then write the value to memory via 1135 a pop. */ 1136 rtx push_rtx, push_insn; 1137 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src)); 1138 1139 push_rtx = gen_movxf (top_stack_reg, top_stack_reg); 1140 push_insn = emit_insn_before (push_rtx, insn); 1141 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, top_stack_reg, 1142 REG_NOTES (insn)); 1143 } 1144 1145 replace_reg (psrc, FIRST_STACK_REG); 1146 } 1147 else if (STACK_REG_P (dest)) 1148 { 1149 /* Load from MEM, or possibly integer REG or constant, into the 1150 stack regs. The actual target is always the top of the 1151 stack. The stack mapping is changed to reflect that DEST is 1152 now at top of stack. */ 1153 1154 /* The destination ought to be dead. */ 1155 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG) 1156 abort (); 1157 1158 if (regstack->top >= REG_STACK_SIZE) 1159 abort (); 1160 1161 regstack->reg[++regstack->top] = REGNO (dest); 1162 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); 1163 replace_reg (pdest, FIRST_STACK_REG); 1164 } 1165 else 1166 abort (); 1167 1168 return control_flow_insn_deleted; 1169} 1170 1171/* Swap the condition on a branch, if there is one. Return true if we 1172 found a condition to swap. False if the condition was not used as 1173 such. */ 1174 1175static int 1176swap_rtx_condition_1 (rtx pat) 1177{ 1178 const char *fmt; 1179 int i, r = 0; 1180 1181 if (GET_RTX_CLASS (GET_CODE (pat)) == '<') 1182 { 1183 PUT_CODE (pat, swap_condition (GET_CODE (pat))); 1184 r = 1; 1185 } 1186 else 1187 { 1188 fmt = GET_RTX_FORMAT (GET_CODE (pat)); 1189 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) 1190 { 1191 if (fmt[i] == 'E') 1192 { 1193 int j; 1194 1195 for (j = XVECLEN (pat, i) - 1; j >= 0; j--) 1196 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j)); 1197 } 1198 else if (fmt[i] == 'e') 1199 r |= swap_rtx_condition_1 (XEXP (pat, i)); 1200 } 1201 } 1202 1203 return r; 1204} 1205 1206static int 1207swap_rtx_condition (rtx insn) 1208{ 1209 rtx pat = PATTERN (insn); 1210 1211 /* We're looking for a single set to cc0 or an HImode temporary. */ 1212 1213 if (GET_CODE (pat) == SET 1214 && GET_CODE (SET_DEST (pat)) == REG 1215 && REGNO (SET_DEST (pat)) == FLAGS_REG) 1216 { 1217 insn = next_flags_user (insn); 1218 if (insn == NULL_RTX) 1219 return 0; 1220 pat = PATTERN (insn); 1221 } 1222 1223 /* See if this is, or ends in, a fnstsw, aka unspec 9. If so, we're 1224 not doing anything with the cc value right now. We may be able to 1225 search for one though. */ 1226 1227 if (GET_CODE (pat) == SET 1228 && GET_CODE (SET_SRC (pat)) == UNSPEC 1229 && XINT (SET_SRC (pat), 1) == UNSPEC_FNSTSW) 1230 { 1231 rtx dest = SET_DEST (pat); 1232 1233 /* Search forward looking for the first use of this value. 1234 Stop at block boundaries. */ 1235 while (insn != BB_END (current_block)) 1236 { 1237 insn = NEXT_INSN (insn); 1238 if (INSN_P (insn) && reg_mentioned_p (dest, insn)) 1239 break; 1240 if (GET_CODE (insn) == CALL_INSN) 1241 return 0; 1242 } 1243 1244 /* So we've found the insn using this value. If it is anything 1245 other than sahf, aka unspec 10, or the value does not die 1246 (meaning we'd have to search further), then we must give up. */ 1247 pat = PATTERN (insn); 1248 if (GET_CODE (pat) != SET 1249 || GET_CODE (SET_SRC (pat)) != UNSPEC 1250 || XINT (SET_SRC (pat), 1) != UNSPEC_SAHF 1251 || ! dead_or_set_p (insn, dest)) 1252 return 0; 1253 1254 /* Now we are prepared to handle this as a normal cc0 setter. */ 1255 insn = next_flags_user (insn); 1256 if (insn == NULL_RTX) 1257 return 0; 1258 pat = PATTERN (insn); 1259 } 1260 1261 if (swap_rtx_condition_1 (pat)) 1262 { 1263 int fail = 0; 1264 INSN_CODE (insn) = -1; 1265 if (recog_memoized (insn) == -1) 1266 fail = 1; 1267 /* In case the flags don't die here, recurse to try fix 1268 following user too. */ 1269 else if (! dead_or_set_p (insn, ix86_flags_rtx)) 1270 { 1271 insn = next_flags_user (insn); 1272 if (!insn || !swap_rtx_condition (insn)) 1273 fail = 1; 1274 } 1275 if (fail) 1276 { 1277 swap_rtx_condition_1 (pat); 1278 return 0; 1279 } 1280 return 1; 1281 } 1282 return 0; 1283} 1284 1285/* Handle a comparison. Special care needs to be taken to avoid 1286 causing comparisons that a 387 cannot do correctly, such as EQ. 1287 1288 Also, a pop insn may need to be emitted. The 387 does have an 1289 `fcompp' insn that can pop two regs, but it is sometimes too expensive 1290 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to 1291 set up. */ 1292 1293static void 1294compare_for_stack_reg (rtx insn, stack regstack, rtx pat_src) 1295{ 1296 rtx *src1, *src2; 1297 rtx src1_note, src2_note; 1298 rtx flags_user; 1299 1300 src1 = get_true_reg (&XEXP (pat_src, 0)); 1301 src2 = get_true_reg (&XEXP (pat_src, 1)); 1302 flags_user = next_flags_user (insn); 1303 1304 /* ??? If fxch turns out to be cheaper than fstp, give priority to 1305 registers that die in this insn - move those to stack top first. */ 1306 if ((! STACK_REG_P (*src1) 1307 || (STACK_REG_P (*src2) 1308 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG)) 1309 && swap_rtx_condition (insn)) 1310 { 1311 rtx temp; 1312 temp = XEXP (pat_src, 0); 1313 XEXP (pat_src, 0) = XEXP (pat_src, 1); 1314 XEXP (pat_src, 1) = temp; 1315 1316 src1 = get_true_reg (&XEXP (pat_src, 0)); 1317 src2 = get_true_reg (&XEXP (pat_src, 1)); 1318 1319 INSN_CODE (insn) = -1; 1320 } 1321 1322 /* We will fix any death note later. */ 1323 1324 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1325 1326 if (STACK_REG_P (*src2)) 1327 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1328 else 1329 src2_note = NULL_RTX; 1330 1331 emit_swap_insn (insn, regstack, *src1); 1332 1333 replace_reg (src1, FIRST_STACK_REG); 1334 1335 if (STACK_REG_P (*src2)) 1336 replace_reg (src2, get_hard_regnum (regstack, *src2)); 1337 1338 if (src1_note) 1339 { 1340 pop_stack (regstack, REGNO (XEXP (src1_note, 0))); 1341 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1342 } 1343 1344 /* If the second operand dies, handle that. But if the operands are 1345 the same stack register, don't bother, because only one death is 1346 needed, and it was just handled. */ 1347 1348 if (src2_note 1349 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2) 1350 && REGNO (*src1) == REGNO (*src2))) 1351 { 1352 /* As a special case, two regs may die in this insn if src2 is 1353 next to top of stack and the top of stack also dies. Since 1354 we have already popped src1, "next to top of stack" is really 1355 at top (FIRST_STACK_REG) now. */ 1356 1357 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG 1358 && src1_note) 1359 { 1360 pop_stack (regstack, REGNO (XEXP (src2_note, 0))); 1361 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1); 1362 } 1363 else 1364 { 1365 /* The 386 can only represent death of the first operand in 1366 the case handled above. In all other cases, emit a separate 1367 pop and remove the death note from here. */ 1368 1369 /* link_cc0_insns (insn); */ 1370 1371 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0))); 1372 1373 emit_pop_insn (insn, regstack, XEXP (src2_note, 0), 1374 EMIT_AFTER); 1375 } 1376 } 1377} 1378 1379/* Substitute new registers in PAT, which is part of INSN. REGSTACK 1380 is the current register layout. Return whether a control flow insn 1381 was deleted in the process. */ 1382 1383static bool 1384subst_stack_regs_pat (rtx insn, stack regstack, rtx pat) 1385{ 1386 rtx *dest, *src; 1387 bool control_flow_insn_deleted = false; 1388 1389 switch (GET_CODE (pat)) 1390 { 1391 case USE: 1392 /* Deaths in USE insns can happen in non optimizing compilation. 1393 Handle them by popping the dying register. */ 1394 src = get_true_reg (&XEXP (pat, 0)); 1395 if (STACK_REG_P (*src) 1396 && find_regno_note (insn, REG_DEAD, REGNO (*src))) 1397 { 1398 emit_pop_insn (insn, regstack, *src, EMIT_AFTER); 1399 return control_flow_insn_deleted; 1400 } 1401 /* ??? Uninitialized USE should not happen. */ 1402 else if (get_hard_regnum (regstack, *src) == -1) 1403 abort (); 1404 break; 1405 1406 case CLOBBER: 1407 { 1408 rtx note; 1409 1410 dest = get_true_reg (&XEXP (pat, 0)); 1411 if (STACK_REG_P (*dest)) 1412 { 1413 note = find_reg_note (insn, REG_DEAD, *dest); 1414 1415 if (pat != PATTERN (insn)) 1416 { 1417 /* The fix_truncdi_1 pattern wants to be able to allocate 1418 it's own scratch register. It does this by clobbering 1419 an fp reg so that it is assured of an empty reg-stack 1420 register. If the register is live, kill it now. 1421 Remove the DEAD/UNUSED note so we don't try to kill it 1422 later too. */ 1423 1424 if (note) 1425 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE); 1426 else 1427 { 1428 note = find_reg_note (insn, REG_UNUSED, *dest); 1429 if (!note) 1430 abort (); 1431 } 1432 remove_note (insn, note); 1433 replace_reg (dest, FIRST_STACK_REG + 1); 1434 } 1435 else 1436 { 1437 /* A top-level clobber with no REG_DEAD, and no hard-regnum 1438 indicates an uninitialized value. Because reload removed 1439 all other clobbers, this must be due to a function 1440 returning without a value. Load up a NaN. */ 1441 1442 if (! note 1443 && get_hard_regnum (regstack, *dest) == -1) 1444 { 1445 pat = gen_rtx_SET (VOIDmode, 1446 FP_MODE_REG (REGNO (*dest), SFmode), 1447 nan); 1448 PATTERN (insn) = pat; 1449 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat); 1450 } 1451 if (! note && COMPLEX_MODE_P (GET_MODE (*dest)) 1452 && get_hard_regnum (regstack, FP_MODE_REG (REGNO (*dest), DFmode)) == -1) 1453 { 1454 pat = gen_rtx_SET (VOIDmode, 1455 FP_MODE_REG (REGNO (*dest) + 1, SFmode), 1456 nan); 1457 PATTERN (insn) = pat; 1458 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat); 1459 } 1460 } 1461 } 1462 break; 1463 } 1464 1465 case SET: 1466 { 1467 rtx *src1 = (rtx *) 0, *src2; 1468 rtx src1_note, src2_note; 1469 rtx pat_src; 1470 1471 dest = get_true_reg (&SET_DEST (pat)); 1472 src = get_true_reg (&SET_SRC (pat)); 1473 pat_src = SET_SRC (pat); 1474 1475 /* See if this is a `movM' pattern, and handle elsewhere if so. */ 1476 if (STACK_REG_P (*src) 1477 || (STACK_REG_P (*dest) 1478 && (GET_CODE (*src) == REG || GET_CODE (*src) == MEM 1479 || GET_CODE (*src) == CONST_DOUBLE))) 1480 { 1481 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat); 1482 break; 1483 } 1484 1485 switch (GET_CODE (pat_src)) 1486 { 1487 case COMPARE: 1488 compare_for_stack_reg (insn, regstack, pat_src); 1489 break; 1490 1491 case CALL: 1492 { 1493 int count; 1494 for (count = HARD_REGNO_NREGS (REGNO (*dest), GET_MODE (*dest)); 1495 --count >= 0;) 1496 { 1497 regstack->reg[++regstack->top] = REGNO (*dest) + count; 1498 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count); 1499 } 1500 } 1501 replace_reg (dest, FIRST_STACK_REG); 1502 break; 1503 1504 case REG: 1505 /* This is a `tstM2' case. */ 1506 if (*dest != cc0_rtx) 1507 abort (); 1508 src1 = src; 1509 1510 /* Fall through. */ 1511 1512 case FLOAT_TRUNCATE: 1513 case SQRT: 1514 case ABS: 1515 case NEG: 1516 /* These insns only operate on the top of the stack. DEST might 1517 be cc0_rtx if we're processing a tstM pattern. Also, it's 1518 possible that the tstM case results in a REG_DEAD note on the 1519 source. */ 1520 1521 if (src1 == 0) 1522 src1 = get_true_reg (&XEXP (pat_src, 0)); 1523 1524 emit_swap_insn (insn, regstack, *src1); 1525 1526 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1527 1528 if (STACK_REG_P (*dest)) 1529 replace_reg (dest, FIRST_STACK_REG); 1530 1531 if (src1_note) 1532 { 1533 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1534 regstack->top--; 1535 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1)); 1536 } 1537 1538 replace_reg (src1, FIRST_STACK_REG); 1539 break; 1540 1541 case MINUS: 1542 case DIV: 1543 /* On i386, reversed forms of subM3 and divM3 exist for 1544 MODE_FLOAT, so the same code that works for addM3 and mulM3 1545 can be used. */ 1546 case MULT: 1547 case PLUS: 1548 /* These insns can accept the top of stack as a destination 1549 from a stack reg or mem, or can use the top of stack as a 1550 source and some other stack register (possibly top of stack) 1551 as a destination. */ 1552 1553 src1 = get_true_reg (&XEXP (pat_src, 0)); 1554 src2 = get_true_reg (&XEXP (pat_src, 1)); 1555 1556 /* We will fix any death note later. */ 1557 1558 if (STACK_REG_P (*src1)) 1559 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1560 else 1561 src1_note = NULL_RTX; 1562 if (STACK_REG_P (*src2)) 1563 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1564 else 1565 src2_note = NULL_RTX; 1566 1567 /* If either operand is not a stack register, then the dest 1568 must be top of stack. */ 1569 1570 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2)) 1571 emit_swap_insn (insn, regstack, *dest); 1572 else 1573 { 1574 /* Both operands are REG. If neither operand is already 1575 at the top of stack, choose to make the one that is the dest 1576 the new top of stack. */ 1577 1578 int src1_hard_regnum, src2_hard_regnum; 1579 1580 src1_hard_regnum = get_hard_regnum (regstack, *src1); 1581 src2_hard_regnum = get_hard_regnum (regstack, *src2); 1582 if (src1_hard_regnum == -1 || src2_hard_regnum == -1) 1583 abort (); 1584 1585 if (src1_hard_regnum != FIRST_STACK_REG 1586 && src2_hard_regnum != FIRST_STACK_REG) 1587 emit_swap_insn (insn, regstack, *dest); 1588 } 1589 1590 if (STACK_REG_P (*src1)) 1591 replace_reg (src1, get_hard_regnum (regstack, *src1)); 1592 if (STACK_REG_P (*src2)) 1593 replace_reg (src2, get_hard_regnum (regstack, *src2)); 1594 1595 if (src1_note) 1596 { 1597 rtx src1_reg = XEXP (src1_note, 0); 1598 1599 /* If the register that dies is at the top of stack, then 1600 the destination is somewhere else - merely substitute it. 1601 But if the reg that dies is not at top of stack, then 1602 move the top of stack to the dead reg, as though we had 1603 done the insn and then a store-with-pop. */ 1604 1605 if (REGNO (src1_reg) == regstack->reg[regstack->top]) 1606 { 1607 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1608 replace_reg (dest, get_hard_regnum (regstack, *dest)); 1609 } 1610 else 1611 { 1612 int regno = get_hard_regnum (regstack, src1_reg); 1613 1614 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1615 replace_reg (dest, regno); 1616 1617 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] 1618 = regstack->reg[regstack->top]; 1619 } 1620 1621 CLEAR_HARD_REG_BIT (regstack->reg_set, 1622 REGNO (XEXP (src1_note, 0))); 1623 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1624 regstack->top--; 1625 } 1626 else if (src2_note) 1627 { 1628 rtx src2_reg = XEXP (src2_note, 0); 1629 if (REGNO (src2_reg) == regstack->reg[regstack->top]) 1630 { 1631 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1632 replace_reg (dest, get_hard_regnum (regstack, *dest)); 1633 } 1634 else 1635 { 1636 int regno = get_hard_regnum (regstack, src2_reg); 1637 1638 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1639 replace_reg (dest, regno); 1640 1641 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] 1642 = regstack->reg[regstack->top]; 1643 } 1644 1645 CLEAR_HARD_REG_BIT (regstack->reg_set, 1646 REGNO (XEXP (src2_note, 0))); 1647 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG); 1648 regstack->top--; 1649 } 1650 else 1651 { 1652 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1653 replace_reg (dest, get_hard_regnum (regstack, *dest)); 1654 } 1655 1656 /* Keep operand 1 matching with destination. */ 1657 if (GET_RTX_CLASS (GET_CODE (pat_src)) == 'c' 1658 && REG_P (*src1) && REG_P (*src2) 1659 && REGNO (*src1) != REGNO (*dest)) 1660 { 1661 int tmp = REGNO (*src1); 1662 replace_reg (src1, REGNO (*src2)); 1663 replace_reg (src2, tmp); 1664 } 1665 break; 1666 1667 case UNSPEC: 1668 switch (XINT (pat_src, 1)) 1669 { 1670 case UNSPEC_SIN: 1671 case UNSPEC_COS: 1672 case UNSPEC_FRNDINT: 1673 case UNSPEC_F2XM1: 1674 /* These insns only operate on the top of the stack. */ 1675 1676 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1677 1678 emit_swap_insn (insn, regstack, *src1); 1679 1680 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1681 1682 if (STACK_REG_P (*dest)) 1683 replace_reg (dest, FIRST_STACK_REG); 1684 1685 if (src1_note) 1686 { 1687 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1688 regstack->top--; 1689 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1)); 1690 } 1691 1692 replace_reg (src1, FIRST_STACK_REG); 1693 break; 1694 1695 case UNSPEC_FPATAN: 1696 case UNSPEC_FYL2X: 1697 case UNSPEC_FSCALE: 1698 /* These insns operate on the top two stack slots. */ 1699 1700 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); 1701 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1)); 1702 1703 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1704 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1705 1706 { 1707 struct stack_def temp_stack; 1708 int regno, j, k, temp; 1709 1710 temp_stack = *regstack; 1711 1712 /* Place operand 1 at the top of stack. */ 1713 regno = get_hard_regnum (&temp_stack, *src1); 1714 if (regno < 0) 1715 abort (); 1716 if (regno != FIRST_STACK_REG) 1717 { 1718 k = temp_stack.top - (regno - FIRST_STACK_REG); 1719 j = temp_stack.top; 1720 1721 temp = temp_stack.reg[k]; 1722 temp_stack.reg[k] = temp_stack.reg[j]; 1723 temp_stack.reg[j] = temp; 1724 } 1725 1726 /* Place operand 2 next on the stack. */ 1727 regno = get_hard_regnum (&temp_stack, *src2); 1728 if (regno < 0) 1729 abort (); 1730 if (regno != FIRST_STACK_REG + 1) 1731 { 1732 k = temp_stack.top - (regno - FIRST_STACK_REG); 1733 j = temp_stack.top - 1; 1734 1735 temp = temp_stack.reg[k]; 1736 temp_stack.reg[k] = temp_stack.reg[j]; 1737 temp_stack.reg[j] = temp; 1738 } 1739 1740 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); 1741 } 1742 1743 replace_reg (src1, FIRST_STACK_REG); 1744 replace_reg (src2, FIRST_STACK_REG + 1); 1745 1746 if (src1_note) 1747 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1748 if (src2_note) 1749 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1); 1750 1751 /* Pop both input operands from the stack. */ 1752 CLEAR_HARD_REG_BIT (regstack->reg_set, 1753 regstack->reg[regstack->top]); 1754 CLEAR_HARD_REG_BIT (regstack->reg_set, 1755 regstack->reg[regstack->top - 1]); 1756 regstack->top -= 2; 1757 1758 /* Push the result back onto the stack. */ 1759 regstack->reg[++regstack->top] = REGNO (*dest); 1760 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1761 replace_reg (dest, FIRST_STACK_REG); 1762 break; 1763 1764 case UNSPEC_SAHF: 1765 /* (unspec [(unspec [(compare)] UNSPEC_FNSTSW)] UNSPEC_SAHF) 1766 The combination matches the PPRO fcomi instruction. */ 1767 1768 pat_src = XVECEXP (pat_src, 0, 0); 1769 if (GET_CODE (pat_src) != UNSPEC 1770 || XINT (pat_src, 1) != UNSPEC_FNSTSW) 1771 abort (); 1772 /* Fall through. */ 1773 1774 case UNSPEC_FNSTSW: 1775 /* Combined fcomp+fnstsw generated for doing well with 1776 CSE. When optimizing this would have been broken 1777 up before now. */ 1778 1779 pat_src = XVECEXP (pat_src, 0, 0); 1780 if (GET_CODE (pat_src) != COMPARE) 1781 abort (); 1782 1783 compare_for_stack_reg (insn, regstack, pat_src); 1784 break; 1785 1786 default: 1787 abort (); 1788 } 1789 break; 1790 1791 case IF_THEN_ELSE: 1792 /* This insn requires the top of stack to be the destination. */ 1793 1794 src1 = get_true_reg (&XEXP (pat_src, 1)); 1795 src2 = get_true_reg (&XEXP (pat_src, 2)); 1796 1797 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1798 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1799 1800 /* If the comparison operator is an FP comparison operator, 1801 it is handled correctly by compare_for_stack_reg () who 1802 will move the destination to the top of stack. But if the 1803 comparison operator is not an FP comparison operator, we 1804 have to handle it here. */ 1805 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG 1806 && REGNO (*dest) != regstack->reg[regstack->top]) 1807 { 1808 /* In case one of operands is the top of stack and the operands 1809 dies, it is safe to make it the destination operand by 1810 reversing the direction of cmove and avoid fxch. */ 1811 if ((REGNO (*src1) == regstack->reg[regstack->top] 1812 && src1_note) 1813 || (REGNO (*src2) == regstack->reg[regstack->top] 1814 && src2_note)) 1815 { 1816 int idx1 = (get_hard_regnum (regstack, *src1) 1817 - FIRST_STACK_REG); 1818 int idx2 = (get_hard_regnum (regstack, *src2) 1819 - FIRST_STACK_REG); 1820 1821 /* Make reg-stack believe that the operands are already 1822 swapped on the stack */ 1823 regstack->reg[regstack->top - idx1] = REGNO (*src2); 1824 regstack->reg[regstack->top - idx2] = REGNO (*src1); 1825 1826 /* Reverse condition to compensate the operand swap. 1827 i386 do have comparison always reversible. */ 1828 PUT_CODE (XEXP (pat_src, 0), 1829 reversed_comparison_code (XEXP (pat_src, 0), insn)); 1830 } 1831 else 1832 emit_swap_insn (insn, regstack, *dest); 1833 } 1834 1835 { 1836 rtx src_note [3]; 1837 int i; 1838 1839 src_note[0] = 0; 1840 src_note[1] = src1_note; 1841 src_note[2] = src2_note; 1842 1843 if (STACK_REG_P (*src1)) 1844 replace_reg (src1, get_hard_regnum (regstack, *src1)); 1845 if (STACK_REG_P (*src2)) 1846 replace_reg (src2, get_hard_regnum (regstack, *src2)); 1847 1848 for (i = 1; i <= 2; i++) 1849 if (src_note [i]) 1850 { 1851 int regno = REGNO (XEXP (src_note[i], 0)); 1852 1853 /* If the register that dies is not at the top of 1854 stack, then move the top of stack to the dead reg */ 1855 if (regno != regstack->reg[regstack->top]) 1856 { 1857 remove_regno_note (insn, REG_DEAD, regno); 1858 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0), 1859 EMIT_AFTER); 1860 } 1861 else 1862 /* Top of stack never dies, as it is the 1863 destination. */ 1864 abort (); 1865 } 1866 } 1867 1868 /* Make dest the top of stack. Add dest to regstack if 1869 not present. */ 1870 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG) 1871 regstack->reg[++regstack->top] = REGNO (*dest); 1872 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1873 replace_reg (dest, FIRST_STACK_REG); 1874 break; 1875 1876 default: 1877 abort (); 1878 } 1879 break; 1880 } 1881 1882 default: 1883 break; 1884 } 1885 1886 return control_flow_insn_deleted; 1887} 1888 1889/* Substitute hard regnums for any stack regs in INSN, which has 1890 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info 1891 before the insn, and is updated with changes made here. 1892 1893 There are several requirements and assumptions about the use of 1894 stack-like regs in asm statements. These rules are enforced by 1895 record_asm_stack_regs; see comments there for details. Any 1896 asm_operands left in the RTL at this point may be assume to meet the 1897 requirements, since record_asm_stack_regs removes any problem asm. */ 1898 1899static void 1900subst_asm_stack_regs (rtx insn, stack regstack) 1901{ 1902 rtx body = PATTERN (insn); 1903 int alt; 1904 1905 rtx *note_reg; /* Array of note contents */ 1906 rtx **note_loc; /* Address of REG field of each note */ 1907 enum reg_note *note_kind; /* The type of each note */ 1908 1909 rtx *clobber_reg = 0; 1910 rtx **clobber_loc = 0; 1911 1912 struct stack_def temp_stack; 1913 int n_notes; 1914 int n_clobbers; 1915 rtx note; 1916 int i; 1917 int n_inputs, n_outputs; 1918 1919 if (! check_asm_stack_operands (insn)) 1920 return; 1921 1922 /* Find out what the constraints required. If no constraint 1923 alternative matches, that is a compiler bug: we should have caught 1924 such an insn in check_asm_stack_operands. */ 1925 extract_insn (insn); 1926 constrain_operands (1); 1927 alt = which_alternative; 1928 1929 preprocess_constraints (); 1930 1931 n_inputs = get_asm_operand_n_inputs (body); 1932 n_outputs = recog_data.n_operands - n_inputs; 1933 1934 if (alt < 0) 1935 abort (); 1936 1937 /* Strip SUBREGs here to make the following code simpler. */ 1938 for (i = 0; i < recog_data.n_operands; i++) 1939 if (GET_CODE (recog_data.operand[i]) == SUBREG 1940 && GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG) 1941 { 1942 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]); 1943 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]); 1944 } 1945 1946 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */ 1947 1948 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1)) 1949 i++; 1950 1951 note_reg = alloca (i * sizeof (rtx)); 1952 note_loc = alloca (i * sizeof (rtx *)); 1953 note_kind = alloca (i * sizeof (enum reg_note)); 1954 1955 n_notes = 0; 1956 for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) 1957 { 1958 rtx reg = XEXP (note, 0); 1959 rtx *loc = & XEXP (note, 0); 1960 1961 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG) 1962 { 1963 loc = & SUBREG_REG (reg); 1964 reg = SUBREG_REG (reg); 1965 } 1966 1967 if (STACK_REG_P (reg) 1968 && (REG_NOTE_KIND (note) == REG_DEAD 1969 || REG_NOTE_KIND (note) == REG_UNUSED)) 1970 { 1971 note_reg[n_notes] = reg; 1972 note_loc[n_notes] = loc; 1973 note_kind[n_notes] = REG_NOTE_KIND (note); 1974 n_notes++; 1975 } 1976 } 1977 1978 /* Set up CLOBBER_REG and CLOBBER_LOC. */ 1979 1980 n_clobbers = 0; 1981 1982 if (GET_CODE (body) == PARALLEL) 1983 { 1984 clobber_reg = alloca (XVECLEN (body, 0) * sizeof (rtx)); 1985 clobber_loc = alloca (XVECLEN (body, 0) * sizeof (rtx *)); 1986 1987 for (i = 0; i < XVECLEN (body, 0); i++) 1988 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) 1989 { 1990 rtx clobber = XVECEXP (body, 0, i); 1991 rtx reg = XEXP (clobber, 0); 1992 rtx *loc = & XEXP (clobber, 0); 1993 1994 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG) 1995 { 1996 loc = & SUBREG_REG (reg); 1997 reg = SUBREG_REG (reg); 1998 } 1999 2000 if (STACK_REG_P (reg)) 2001 { 2002 clobber_reg[n_clobbers] = reg; 2003 clobber_loc[n_clobbers] = loc; 2004 n_clobbers++; 2005 } 2006 } 2007 } 2008 2009 temp_stack = *regstack; 2010 2011 /* Put the input regs into the desired place in TEMP_STACK. */ 2012 2013 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2014 if (STACK_REG_P (recog_data.operand[i]) 2015 && reg_class_subset_p (recog_op_alt[i][alt].class, 2016 FLOAT_REGS) 2017 && recog_op_alt[i][alt].class != FLOAT_REGS) 2018 { 2019 /* If an operand needs to be in a particular reg in 2020 FLOAT_REGS, the constraint was either 't' or 'u'. Since 2021 these constraints are for single register classes, and 2022 reload guaranteed that operand[i] is already in that class, 2023 we can just use REGNO (recog_data.operand[i]) to know which 2024 actual reg this operand needs to be in. */ 2025 2026 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]); 2027 2028 if (regno < 0) 2029 abort (); 2030 2031 if ((unsigned int) regno != REGNO (recog_data.operand[i])) 2032 { 2033 /* recog_data.operand[i] is not in the right place. Find 2034 it and swap it with whatever is already in I's place. 2035 K is where recog_data.operand[i] is now. J is where it 2036 should be. */ 2037 int j, k, temp; 2038 2039 k = temp_stack.top - (regno - FIRST_STACK_REG); 2040 j = (temp_stack.top 2041 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG)); 2042 2043 temp = temp_stack.reg[k]; 2044 temp_stack.reg[k] = temp_stack.reg[j]; 2045 temp_stack.reg[j] = temp; 2046 } 2047 } 2048 2049 /* Emit insns before INSN to make sure the reg-stack is in the right 2050 order. */ 2051 2052 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); 2053 2054 /* Make the needed input register substitutions. Do death notes and 2055 clobbers too, because these are for inputs, not outputs. */ 2056 2057 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2058 if (STACK_REG_P (recog_data.operand[i])) 2059 { 2060 int regnum = get_hard_regnum (regstack, recog_data.operand[i]); 2061 2062 if (regnum < 0) 2063 abort (); 2064 2065 replace_reg (recog_data.operand_loc[i], regnum); 2066 } 2067 2068 for (i = 0; i < n_notes; i++) 2069 if (note_kind[i] == REG_DEAD) 2070 { 2071 int regnum = get_hard_regnum (regstack, note_reg[i]); 2072 2073 if (regnum < 0) 2074 abort (); 2075 2076 replace_reg (note_loc[i], regnum); 2077 } 2078 2079 for (i = 0; i < n_clobbers; i++) 2080 { 2081 /* It's OK for a CLOBBER to reference a reg that is not live. 2082 Don't try to replace it in that case. */ 2083 int regnum = get_hard_regnum (regstack, clobber_reg[i]); 2084 2085 if (regnum >= 0) 2086 { 2087 /* Sigh - clobbers always have QImode. But replace_reg knows 2088 that these regs can't be MODE_INT and will abort. Just put 2089 the right reg there without calling replace_reg. */ 2090 2091 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode); 2092 } 2093 } 2094 2095 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */ 2096 2097 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2098 if (STACK_REG_P (recog_data.operand[i])) 2099 { 2100 /* An input reg is implicitly popped if it is tied to an 2101 output, or if there is a CLOBBER for it. */ 2102 int j; 2103 2104 for (j = 0; j < n_clobbers; j++) 2105 if (operands_match_p (clobber_reg[j], recog_data.operand[i])) 2106 break; 2107 2108 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0) 2109 { 2110 /* recog_data.operand[i] might not be at the top of stack. 2111 But that's OK, because all we need to do is pop the 2112 right number of regs off of the top of the reg-stack. 2113 record_asm_stack_regs guaranteed that all implicitly 2114 popped regs were grouped at the top of the reg-stack. */ 2115 2116 CLEAR_HARD_REG_BIT (regstack->reg_set, 2117 regstack->reg[regstack->top]); 2118 regstack->top--; 2119 } 2120 } 2121 2122 /* Now add to REGSTACK any outputs that the asm implicitly pushed. 2123 Note that there isn't any need to substitute register numbers. 2124 ??? Explain why this is true. */ 2125 2126 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--) 2127 { 2128 /* See if there is an output for this hard reg. */ 2129 int j; 2130 2131 for (j = 0; j < n_outputs; j++) 2132 if (STACK_REG_P (recog_data.operand[j]) 2133 && REGNO (recog_data.operand[j]) == (unsigned) i) 2134 { 2135 regstack->reg[++regstack->top] = i; 2136 SET_HARD_REG_BIT (regstack->reg_set, i); 2137 break; 2138 } 2139 } 2140 2141 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD 2142 input that the asm didn't implicitly pop. If the asm didn't 2143 implicitly pop an input reg, that reg will still be live. 2144 2145 Note that we can't use find_regno_note here: the register numbers 2146 in the death notes have already been substituted. */ 2147 2148 for (i = 0; i < n_outputs; i++) 2149 if (STACK_REG_P (recog_data.operand[i])) 2150 { 2151 int j; 2152 2153 for (j = 0; j < n_notes; j++) 2154 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j]) 2155 && note_kind[j] == REG_UNUSED) 2156 { 2157 insn = emit_pop_insn (insn, regstack, recog_data.operand[i], 2158 EMIT_AFTER); 2159 break; 2160 } 2161 } 2162 2163 for (i = n_outputs; i < n_outputs + n_inputs; i++) 2164 if (STACK_REG_P (recog_data.operand[i])) 2165 { 2166 int j; 2167 2168 for (j = 0; j < n_notes; j++) 2169 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j]) 2170 && note_kind[j] == REG_DEAD 2171 && TEST_HARD_REG_BIT (regstack->reg_set, 2172 REGNO (recog_data.operand[i]))) 2173 { 2174 insn = emit_pop_insn (insn, regstack, recog_data.operand[i], 2175 EMIT_AFTER); 2176 break; 2177 } 2178 } 2179} 2180 2181/* Substitute stack hard reg numbers for stack virtual registers in 2182 INSN. Non-stack register numbers are not changed. REGSTACK is the 2183 current stack content. Insns may be emitted as needed to arrange the 2184 stack for the 387 based on the contents of the insn. Return whether 2185 a control flow insn was deleted in the process. */ 2186 2187static bool 2188subst_stack_regs (rtx insn, stack regstack) 2189{ 2190 rtx *note_link, note; 2191 bool control_flow_insn_deleted = false; 2192 int i; 2193 2194 if (GET_CODE (insn) == CALL_INSN) 2195 { 2196 int top = regstack->top; 2197 2198 /* If there are any floating point parameters to be passed in 2199 registers for this call, make sure they are in the right 2200 order. */ 2201 2202 if (top >= 0) 2203 { 2204 straighten_stack (PREV_INSN (insn), regstack); 2205 2206 /* Now mark the arguments as dead after the call. */ 2207 2208 while (regstack->top >= 0) 2209 { 2210 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top); 2211 regstack->top--; 2212 } 2213 } 2214 } 2215 2216 /* Do the actual substitution if any stack regs are mentioned. 2217 Since we only record whether entire insn mentions stack regs, and 2218 subst_stack_regs_pat only works for patterns that contain stack regs, 2219 we must check each pattern in a parallel here. A call_value_pop could 2220 fail otherwise. */ 2221 2222 if (stack_regs_mentioned (insn)) 2223 { 2224 int n_operands = asm_noperands (PATTERN (insn)); 2225 if (n_operands >= 0) 2226 { 2227 /* This insn is an `asm' with operands. Decode the operands, 2228 decide how many are inputs, and do register substitution. 2229 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */ 2230 2231 subst_asm_stack_regs (insn, regstack); 2232 return control_flow_insn_deleted; 2233 } 2234 2235 if (GET_CODE (PATTERN (insn)) == PARALLEL) 2236 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++) 2237 { 2238 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i))) 2239 control_flow_insn_deleted 2240 |= subst_stack_regs_pat (insn, regstack, 2241 XVECEXP (PATTERN (insn), 0, i)); 2242 } 2243 else 2244 control_flow_insn_deleted 2245 |= subst_stack_regs_pat (insn, regstack, PATTERN (insn)); 2246 } 2247 2248 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any 2249 REG_UNUSED will already have been dealt with, so just return. */ 2250 2251 if (GET_CODE (insn) == NOTE || INSN_DELETED_P (insn)) 2252 return control_flow_insn_deleted; 2253 2254 /* If there is a REG_UNUSED note on a stack register on this insn, 2255 the indicated reg must be popped. The REG_UNUSED note is removed, 2256 since the form of the newly emitted pop insn references the reg, 2257 making it no longer `unset'. */ 2258 2259 note_link = ®_NOTES (insn); 2260 for (note = *note_link; note; note = XEXP (note, 1)) 2261 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0))) 2262 { 2263 *note_link = XEXP (note, 1); 2264 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER); 2265 } 2266 else 2267 note_link = &XEXP (note, 1); 2268 2269 return control_flow_insn_deleted; 2270} 2271 2272/* Change the organization of the stack so that it fits a new basic 2273 block. Some registers might have to be popped, but there can never be 2274 a register live in the new block that is not now live. 2275 2276 Insert any needed insns before or after INSN, as indicated by 2277 WHERE. OLD is the original stack layout, and NEW is the desired 2278 form. OLD is updated to reflect the code emitted, ie, it will be 2279 the same as NEW upon return. 2280 2281 This function will not preserve block_end[]. But that information 2282 is no longer needed once this has executed. */ 2283 2284static void 2285change_stack (rtx insn, stack old, stack new, enum emit_where where) 2286{ 2287 int reg; 2288 int update_end = 0; 2289 2290 /* We will be inserting new insns "backwards". If we are to insert 2291 after INSN, find the next insn, and insert before it. */ 2292 2293 if (where == EMIT_AFTER) 2294 { 2295 if (current_block && BB_END (current_block) == insn) 2296 update_end = 1; 2297 insn = NEXT_INSN (insn); 2298 } 2299 2300 /* Pop any registers that are not needed in the new block. */ 2301 2302 for (reg = old->top; reg >= 0; reg--) 2303 if (! TEST_HARD_REG_BIT (new->reg_set, old->reg[reg])) 2304 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[reg], DFmode), 2305 EMIT_BEFORE); 2306 2307 if (new->top == -2) 2308 { 2309 /* If the new block has never been processed, then it can inherit 2310 the old stack order. */ 2311 2312 new->top = old->top; 2313 memcpy (new->reg, old->reg, sizeof (new->reg)); 2314 } 2315 else 2316 { 2317 /* This block has been entered before, and we must match the 2318 previously selected stack order. */ 2319 2320 /* By now, the only difference should be the order of the stack, 2321 not their depth or liveliness. */ 2322 2323 GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win); 2324 abort (); 2325 win: 2326 if (old->top != new->top) 2327 abort (); 2328 2329 /* If the stack is not empty (new->top != -1), loop here emitting 2330 swaps until the stack is correct. 2331 2332 The worst case number of swaps emitted is N + 2, where N is the 2333 depth of the stack. In some cases, the reg at the top of 2334 stack may be correct, but swapped anyway in order to fix 2335 other regs. But since we never swap any other reg away from 2336 its correct slot, this algorithm will converge. */ 2337 2338 if (new->top != -1) 2339 do 2340 { 2341 /* Swap the reg at top of stack into the position it is 2342 supposed to be in, until the correct top of stack appears. */ 2343 2344 while (old->reg[old->top] != new->reg[new->top]) 2345 { 2346 for (reg = new->top; reg >= 0; reg--) 2347 if (new->reg[reg] == old->reg[old->top]) 2348 break; 2349 2350 if (reg == -1) 2351 abort (); 2352 2353 emit_swap_insn (insn, old, 2354 FP_MODE_REG (old->reg[reg], DFmode)); 2355 } 2356 2357 /* See if any regs remain incorrect. If so, bring an 2358 incorrect reg to the top of stack, and let the while loop 2359 above fix it. */ 2360 2361 for (reg = new->top; reg >= 0; reg--) 2362 if (new->reg[reg] != old->reg[reg]) 2363 { 2364 emit_swap_insn (insn, old, 2365 FP_MODE_REG (old->reg[reg], DFmode)); 2366 break; 2367 } 2368 } while (reg >= 0); 2369 2370 /* At this point there must be no differences. */ 2371 2372 for (reg = old->top; reg >= 0; reg--) 2373 if (old->reg[reg] != new->reg[reg]) 2374 abort (); 2375 } 2376 2377 if (update_end) 2378 BB_END (current_block) = PREV_INSN (insn); 2379} 2380 2381/* Print stack configuration. */ 2382 2383static void 2384print_stack (FILE *file, stack s) 2385{ 2386 if (! file) 2387 return; 2388 2389 if (s->top == -2) 2390 fprintf (file, "uninitialized\n"); 2391 else if (s->top == -1) 2392 fprintf (file, "empty\n"); 2393 else 2394 { 2395 int i; 2396 fputs ("[ ", file); 2397 for (i = 0; i <= s->top; ++i) 2398 fprintf (file, "%d ", s->reg[i]); 2399 fputs ("]\n", file); 2400 } 2401} 2402 2403/* This function was doing life analysis. We now let the regular live 2404 code do it's job, so we only need to check some extra invariants 2405 that reg-stack expects. Primary among these being that all registers 2406 are initialized before use. 2407 2408 The function returns true when code was emitted to CFG edges and 2409 commit_edge_insertions needs to be called. */ 2410 2411static int 2412convert_regs_entry (void) 2413{ 2414 int inserted = 0; 2415 edge e; 2416 basic_block block; 2417 2418 FOR_EACH_BB_REVERSE (block) 2419 { 2420 block_info bi = BLOCK_INFO (block); 2421 int reg; 2422 2423 /* Set current register status at last instruction `uninitialized'. */ 2424 bi->stack_in.top = -2; 2425 2426 /* Copy live_at_end and live_at_start into temporaries. */ 2427 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++) 2428 { 2429 if (REGNO_REG_SET_P (block->global_live_at_end, reg)) 2430 SET_HARD_REG_BIT (bi->out_reg_set, reg); 2431 if (REGNO_REG_SET_P (block->global_live_at_start, reg)) 2432 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg); 2433 } 2434 } 2435 2436 /* Load something into each stack register live at function entry. 2437 Such live registers can be caused by uninitialized variables or 2438 functions not returning values on all paths. In order to keep 2439 the push/pop code happy, and to not scrog the register stack, we 2440 must put something in these registers. Use a QNaN. 2441 2442 Note that we are inserting converted code here. This code is 2443 never seen by the convert_regs pass. */ 2444 2445 for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next) 2446 { 2447 basic_block block = e->dest; 2448 block_info bi = BLOCK_INFO (block); 2449 int reg, top = -1; 2450 2451 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg) 2452 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg)) 2453 { 2454 rtx init; 2455 2456 bi->stack_in.reg[++top] = reg; 2457 2458 init = gen_rtx_SET (VOIDmode, 2459 FP_MODE_REG (FIRST_STACK_REG, SFmode), 2460 nan); 2461 insert_insn_on_edge (init, e); 2462 inserted = 1; 2463 } 2464 2465 bi->stack_in.top = top; 2466 } 2467 2468 return inserted; 2469} 2470 2471/* Construct the desired stack for function exit. This will either 2472 be `empty', or the function return value at top-of-stack. */ 2473 2474static void 2475convert_regs_exit (void) 2476{ 2477 int value_reg_low, value_reg_high; 2478 stack output_stack; 2479 rtx retvalue; 2480 2481 retvalue = stack_result (current_function_decl); 2482 value_reg_low = value_reg_high = -1; 2483 if (retvalue) 2484 { 2485 value_reg_low = REGNO (retvalue); 2486 value_reg_high = value_reg_low 2487 + HARD_REGNO_NREGS (value_reg_low, GET_MODE (retvalue)) - 1; 2488 } 2489 2490 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR)->stack_in; 2491 if (value_reg_low == -1) 2492 output_stack->top = -1; 2493 else 2494 { 2495 int reg; 2496 2497 output_stack->top = value_reg_high - value_reg_low; 2498 for (reg = value_reg_low; reg <= value_reg_high; ++reg) 2499 { 2500 output_stack->reg[value_reg_high - reg] = reg; 2501 SET_HARD_REG_BIT (output_stack->reg_set, reg); 2502 } 2503 } 2504} 2505 2506/* Adjust the stack of this block on exit to match the stack of the 2507 target block, or copy stack info into the stack of the successor 2508 of the successor hasn't been processed yet. */ 2509static bool 2510compensate_edge (edge e, FILE *file) 2511{ 2512 basic_block block = e->src, target = e->dest; 2513 block_info bi = BLOCK_INFO (block); 2514 struct stack_def regstack, tmpstack; 2515 stack target_stack = &BLOCK_INFO (target)->stack_in; 2516 int reg; 2517 2518 current_block = block; 2519 regstack = bi->stack_out; 2520 if (file) 2521 fprintf (file, "Edge %d->%d: ", block->index, target->index); 2522 2523 if (target_stack->top == -2) 2524 { 2525 /* The target block hasn't had a stack order selected. 2526 We need merely ensure that no pops are needed. */ 2527 for (reg = regstack.top; reg >= 0; --reg) 2528 if (!TEST_HARD_REG_BIT (target_stack->reg_set, regstack.reg[reg])) 2529 break; 2530 2531 if (reg == -1) 2532 { 2533 if (file) 2534 fprintf (file, "new block; copying stack position\n"); 2535 2536 /* change_stack kills values in regstack. */ 2537 tmpstack = regstack; 2538 2539 change_stack (BB_END (block), &tmpstack, target_stack, EMIT_AFTER); 2540 return false; 2541 } 2542 2543 if (file) 2544 fprintf (file, "new block; pops needed\n"); 2545 } 2546 else 2547 { 2548 if (target_stack->top == regstack.top) 2549 { 2550 for (reg = target_stack->top; reg >= 0; --reg) 2551 if (target_stack->reg[reg] != regstack.reg[reg]) 2552 break; 2553 2554 if (reg == -1) 2555 { 2556 if (file) 2557 fprintf (file, "no changes needed\n"); 2558 return false; 2559 } 2560 } 2561 2562 if (file) 2563 { 2564 fprintf (file, "correcting stack to "); 2565 print_stack (file, target_stack); 2566 } 2567 } 2568 2569 /* Care for non-call EH edges specially. The normal return path have 2570 values in registers. These will be popped en masse by the unwind 2571 library. */ 2572 if ((e->flags & (EDGE_EH | EDGE_ABNORMAL_CALL)) == EDGE_EH) 2573 target_stack->top = -1; 2574 2575 /* Other calls may appear to have values live in st(0), but the 2576 abnormal return path will not have actually loaded the values. */ 2577 else if (e->flags & EDGE_ABNORMAL_CALL) 2578 { 2579 /* Assert that the lifetimes are as we expect -- one value 2580 live at st(0) on the end of the source block, and no 2581 values live at the beginning of the destination block. */ 2582 HARD_REG_SET tmp; 2583 2584 CLEAR_HARD_REG_SET (tmp); 2585 GO_IF_HARD_REG_EQUAL (target_stack->reg_set, tmp, eh1); 2586 abort (); 2587 eh1: 2588 2589 /* We are sure that there is st(0) live, otherwise we won't compensate. 2590 For complex return values, we may have st(1) live as well. */ 2591 SET_HARD_REG_BIT (tmp, FIRST_STACK_REG); 2592 if (TEST_HARD_REG_BIT (regstack.reg_set, FIRST_STACK_REG + 1)) 2593 SET_HARD_REG_BIT (tmp, FIRST_STACK_REG + 1); 2594 GO_IF_HARD_REG_EQUAL (regstack.reg_set, tmp, eh2); 2595 abort (); 2596 eh2: 2597 2598 target_stack->top = -1; 2599 } 2600 2601 /* It is better to output directly to the end of the block 2602 instead of to the edge, because emit_swap can do minimal 2603 insn scheduling. We can do this when there is only one 2604 edge out, and it is not abnormal. */ 2605 else if (block->succ->succ_next == NULL && !(e->flags & EDGE_ABNORMAL)) 2606 { 2607 /* change_stack kills values in regstack. */ 2608 tmpstack = regstack; 2609 2610 change_stack (BB_END (block), &tmpstack, target_stack, 2611 (GET_CODE (BB_END (block)) == JUMP_INSN 2612 ? EMIT_BEFORE : EMIT_AFTER)); 2613 } 2614 else 2615 { 2616 rtx seq, after; 2617 2618 /* We don't support abnormal edges. Global takes care to 2619 avoid any live register across them, so we should never 2620 have to insert instructions on such edges. */ 2621 if (e->flags & EDGE_ABNORMAL) 2622 abort (); 2623 2624 current_block = NULL; 2625 start_sequence (); 2626 2627 /* ??? change_stack needs some point to emit insns after. */ 2628 after = emit_note (NOTE_INSN_DELETED); 2629 2630 tmpstack = regstack; 2631 change_stack (after, &tmpstack, target_stack, EMIT_BEFORE); 2632 2633 seq = get_insns (); 2634 end_sequence (); 2635 2636 insert_insn_on_edge (seq, e); 2637 return true; 2638 } 2639 return false; 2640} 2641 2642/* Convert stack register references in one block. */ 2643 2644static int 2645convert_regs_1 (FILE *file, basic_block block) 2646{ 2647 struct stack_def regstack; 2648 block_info bi = BLOCK_INFO (block); 2649 int deleted, inserted, reg; 2650 rtx insn, next; 2651 edge e, beste = NULL; 2652 bool control_flow_insn_deleted = false; 2653 2654 inserted = 0; 2655 deleted = 0; 2656 any_malformed_asm = false; 2657 2658 /* Find the edge we will copy stack from. It should be the most frequent 2659 one as it will get cheapest after compensation code is generated, 2660 if multiple such exists, take one with largest count, prefer critical 2661 one (as splitting critical edges is more expensive), or one with lowest 2662 index, to avoid random changes with different orders of the edges. */ 2663 for (e = block->pred; e ; e = e->pred_next) 2664 { 2665 if (e->flags & EDGE_DFS_BACK) 2666 ; 2667 else if (! beste) 2668 beste = e; 2669 else if (EDGE_FREQUENCY (beste) < EDGE_FREQUENCY (e)) 2670 beste = e; 2671 else if (EDGE_FREQUENCY (beste) > EDGE_FREQUENCY (e)) 2672 ; 2673 else if (beste->count < e->count) 2674 beste = e; 2675 else if (beste->count > e->count) 2676 ; 2677 else if ((EDGE_CRITICAL_P (e) != 0) 2678 != (EDGE_CRITICAL_P (beste) != 0)) 2679 { 2680 if (EDGE_CRITICAL_P (e)) 2681 beste = e; 2682 } 2683 else if (e->src->index < beste->src->index) 2684 beste = e; 2685 } 2686 2687 /* Initialize stack at block entry. */ 2688 if (bi->stack_in.top == -2) 2689 { 2690 if (beste) 2691 inserted |= compensate_edge (beste, file); 2692 else 2693 { 2694 /* No predecessors. Create an arbitrary input stack. */ 2695 int reg; 2696 2697 bi->stack_in.top = -1; 2698 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg) 2699 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg)) 2700 bi->stack_in.reg[++bi->stack_in.top] = reg; 2701 } 2702 } 2703 else 2704 /* Entry blocks do have stack already initialized. */ 2705 beste = NULL; 2706 2707 current_block = block; 2708 2709 if (file) 2710 { 2711 fprintf (file, "\nBasic block %d\nInput stack: ", block->index); 2712 print_stack (file, &bi->stack_in); 2713 } 2714 2715 /* Process all insns in this block. Keep track of NEXT so that we 2716 don't process insns emitted while substituting in INSN. */ 2717 next = BB_HEAD (block); 2718 regstack = bi->stack_in; 2719 do 2720 { 2721 insn = next; 2722 next = NEXT_INSN (insn); 2723 2724 /* Ensure we have not missed a block boundary. */ 2725 if (next == NULL) 2726 abort (); 2727 if (insn == BB_END (block)) 2728 next = NULL; 2729 2730 /* Don't bother processing unless there is a stack reg 2731 mentioned or if it's a CALL_INSN. */ 2732 if (stack_regs_mentioned (insn) 2733 || GET_CODE (insn) == CALL_INSN) 2734 { 2735 if (file) 2736 { 2737 fprintf (file, " insn %d input stack: ", 2738 INSN_UID (insn)); 2739 print_stack (file, ®stack); 2740 } 2741 control_flow_insn_deleted |= subst_stack_regs (insn, ®stack); 2742 } 2743 } 2744 while (next); 2745 2746 if (file) 2747 { 2748 fprintf (file, "Expected live registers ["); 2749 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg) 2750 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)) 2751 fprintf (file, " %d", reg); 2752 fprintf (file, " ]\nOutput stack: "); 2753 print_stack (file, ®stack); 2754 } 2755 2756 insn = BB_END (block); 2757 if (GET_CODE (insn) == JUMP_INSN) 2758 insn = PREV_INSN (insn); 2759 2760 /* If the function is declared to return a value, but it returns one 2761 in only some cases, some registers might come live here. Emit 2762 necessary moves for them. */ 2763 2764 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg) 2765 { 2766 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg) 2767 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg)) 2768 { 2769 rtx set; 2770 2771 if (file) 2772 { 2773 fprintf (file, "Emitting insn initializing reg %d\n", 2774 reg); 2775 } 2776 2777 set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode), 2778 nan); 2779 insn = emit_insn_after (set, insn); 2780 control_flow_insn_deleted |= subst_stack_regs (insn, ®stack); 2781 } 2782 } 2783 2784 /* Amongst the insns possibly deleted during the substitution process above, 2785 might have been the only trapping insn in the block. We purge the now 2786 possibly dead EH edges here to avoid an ICE from fixup_abnormal_edges, 2787 called at the end of convert_regs. The order in which we process the 2788 blocks ensures that we never delete an already processed edge. 2789 2790 Note that, at this point, the CFG may have been damaged by the emission 2791 of instructions after an abnormal call, which moves the basic block end 2792 (and is the reason why we call fixup_abnormal_edges later). So we must 2793 be sure that the trapping insn has been deleted before trying to purge 2794 dead edges, otherwise we risk purging valid edges. 2795 2796 ??? We are normally supposed not to delete trapping insns, so we pretend 2797 that the insns deleted above don't actually trap. It would have been 2798 better to detect this earlier and avoid creating the EH edge in the first 2799 place, still, but we don't have enough information at that time. */ 2800 2801 if (control_flow_insn_deleted) 2802 purge_dead_edges (block); 2803 2804 /* Something failed if the stack lives don't match. If we had malformed 2805 asms, we zapped the instruction itself, but that didn't produce the 2806 same pattern of register kills as before. */ 2807 GO_IF_HARD_REG_EQUAL (regstack.reg_set, bi->out_reg_set, win); 2808 if (!any_malformed_asm) 2809 abort (); 2810 win: 2811 bi->stack_out = regstack; 2812 2813 /* Compensate the back edges, as those wasn't visited yet. */ 2814 for (e = block->succ; e ; e = e->succ_next) 2815 { 2816 if (e->flags & EDGE_DFS_BACK 2817 || (e->dest == EXIT_BLOCK_PTR)) 2818 { 2819 if (!BLOCK_INFO (e->dest)->done 2820 && e->dest != block) 2821 abort (); 2822 inserted |= compensate_edge (e, file); 2823 } 2824 } 2825 for (e = block->pred; e ; e = e->pred_next) 2826 { 2827 if (e != beste && !(e->flags & EDGE_DFS_BACK) 2828 && e->src != ENTRY_BLOCK_PTR) 2829 { 2830 if (!BLOCK_INFO (e->src)->done) 2831 abort (); 2832 inserted |= compensate_edge (e, file); 2833 } 2834 } 2835 2836 return inserted; 2837} 2838 2839/* Convert registers in all blocks reachable from BLOCK. */ 2840 2841static int 2842convert_regs_2 (FILE *file, basic_block block) 2843{ 2844 basic_block *stack, *sp; 2845 int inserted; 2846 2847 /* We process the blocks in a top-down manner, in a way such that one block 2848 is only processed after all its predecessors. The number of predecessors 2849 of every block has already been computed. */ 2850 2851 stack = xmalloc (sizeof (*stack) * n_basic_blocks); 2852 sp = stack; 2853 2854 *sp++ = block; 2855 2856 inserted = 0; 2857 do 2858 { 2859 edge e; 2860 2861 block = *--sp; 2862 2863 /* Processing BLOCK is achieved by convert_regs_1, which may purge 2864 some dead EH outgoing edge after the deletion of the trapping 2865 insn inside the block. Since the number of predecessors of 2866 BLOCK's successors was computed based on the initial edge set, 2867 we check the necessity to process some of these successors 2868 before such an edge deletion may happen. However, there is 2869 a pitfall: if BLOCK is the only predecessor of a successor and 2870 the edge between them happens to be deleted, the successor 2871 becomes unreachable and should not be processed. The problem 2872 is that there is no way to preventively detect this case so we 2873 stack the successor in all cases and hand over the task of 2874 fixing up the discrepancy to convert_regs_1. */ 2875 2876 for (e = block->succ; e ; e = e->succ_next) 2877 if (! (e->flags & EDGE_DFS_BACK)) 2878 { 2879 BLOCK_INFO (e->dest)->predecessors--; 2880 if (!BLOCK_INFO (e->dest)->predecessors) 2881 *sp++ = e->dest; 2882 } 2883 2884 inserted |= convert_regs_1 (file, block); 2885 BLOCK_INFO (block)->done = 1; 2886 } 2887 while (sp != stack); 2888 2889 return inserted; 2890} 2891 2892/* Traverse all basic blocks in a function, converting the register 2893 references in each insn from the "flat" register file that gcc uses, 2894 to the stack-like registers the 387 uses. */ 2895 2896static int 2897convert_regs (FILE *file) 2898{ 2899 int inserted; 2900 basic_block b; 2901 edge e; 2902 2903 /* Initialize uninitialized registers on function entry. */ 2904 inserted = convert_regs_entry (); 2905 2906 /* Construct the desired stack for function exit. */ 2907 convert_regs_exit (); 2908 BLOCK_INFO (EXIT_BLOCK_PTR)->done = 1; 2909 2910 /* ??? Future: process inner loops first, and give them arbitrary 2911 initial stacks which emit_swap_insn can modify. This ought to 2912 prevent double fxch that aften appears at the head of a loop. */ 2913 2914 /* Process all blocks reachable from all entry points. */ 2915 for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next) 2916 inserted |= convert_regs_2 (file, e->dest); 2917 2918 /* ??? Process all unreachable blocks. Though there's no excuse 2919 for keeping these even when not optimizing. */ 2920 FOR_EACH_BB (b) 2921 { 2922 block_info bi = BLOCK_INFO (b); 2923 2924 if (! bi->done) 2925 inserted |= convert_regs_2 (file, b); 2926 } 2927 clear_aux_for_blocks (); 2928 2929 fixup_abnormal_edges (); 2930 if (inserted) 2931 commit_edge_insertions (); 2932 2933 if (file) 2934 fputc ('\n', file); 2935 2936 return inserted; 2937} 2938#endif /* STACK_REGS */ 2939 2940#include "gt-reg-stack.h" 2941