1130561Sobrien/* Opcode table for the ARC. 2130561Sobrien Copyright 1994, 1995, 1997, 2001, 2002, 2003 3130561Sobrien Free Software Foundation, Inc. 4130561Sobrien Contributed by Doug Evans (dje@cygnus.com). 5130561Sobrien 6130561Sobrien This file is part of GAS, the GNU Assembler, GDB, the GNU debugger, and 7130561Sobrien the GNU Binutils. 8130561Sobrien 9130561Sobrien GAS/GDB is free software; you can redistribute it and/or modify 10130561Sobrien it under the terms of the GNU General Public License as published by 11130561Sobrien the Free Software Foundation; either version 2, or (at your option) 12130561Sobrien any later version. 13130561Sobrien 14130561Sobrien GAS/GDB is distributed in the hope that it will be useful, 15130561Sobrien but WITHOUT ANY WARRANTY; without even the implied warranty of 16130561Sobrien MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17130561Sobrien GNU General Public License for more details. 18130561Sobrien 19130561Sobrien You should have received a copy of the GNU General Public License 20130561Sobrien along with GAS or GDB; see the file COPYING. If not, write to 21218822Sdim the Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston, 22218822Sdim MA 02110-1301, USA. */ 23130561Sobrien 24130561Sobrien 25130561Sobrien/* List of the various cpu types. 26130561Sobrien The tables currently use bit masks to say whether the instruction or 27130561Sobrien whatever is supported by a particular cpu. This lets us have one entry 28130561Sobrien apply to several cpus. 29130561Sobrien 30130561Sobrien The `base' cpu must be 0. The cpu type is treated independently of 31130561Sobrien endianness. The complete `mach' number includes endianness. 32130561Sobrien These values are internal to opcodes/bfd/binutils/gas. */ 33130561Sobrien#define ARC_MACH_5 0 34130561Sobrien#define ARC_MACH_6 1 35130561Sobrien#define ARC_MACH_7 2 36130561Sobrien#define ARC_MACH_8 4 37130561Sobrien 38130561Sobrien/* Additional cpu values can be inserted here and ARC_MACH_BIG moved down. */ 39130561Sobrien#define ARC_MACH_BIG 16 40130561Sobrien 41130561Sobrien/* Mask of number of bits necessary to record cpu type. */ 42130561Sobrien#define ARC_MACH_CPU_MASK (ARC_MACH_BIG - 1) 43130561Sobrien 44130561Sobrien/* Mask of number of bits necessary to record cpu type + endianness. */ 45130561Sobrien#define ARC_MACH_MASK ((ARC_MACH_BIG << 1) - 1) 46130561Sobrien 47130561Sobrien/* Type to denote an ARC instruction (at least a 32 bit unsigned int). */ 48130561Sobrien 49130561Sobrientypedef unsigned int arc_insn; 50130561Sobrien 51130561Sobrienstruct arc_opcode { 52130561Sobrien char *syntax; /* syntax of insn */ 53130561Sobrien unsigned long mask, value; /* recognize insn if (op&mask) == value */ 54130561Sobrien int flags; /* various flag bits */ 55130561Sobrien 56130561Sobrien/* Values for `flags'. */ 57130561Sobrien 58130561Sobrien/* Return CPU number, given flag bits. */ 59130561Sobrien#define ARC_OPCODE_CPU(bits) ((bits) & ARC_MACH_CPU_MASK) 60130561Sobrien 61130561Sobrien/* Return MACH number, given flag bits. */ 62130561Sobrien#define ARC_OPCODE_MACH(bits) ((bits) & ARC_MACH_MASK) 63130561Sobrien 64130561Sobrien/* First opcode flag bit available after machine mask. */ 65130561Sobrien#define ARC_OPCODE_FLAG_START (ARC_MACH_MASK + 1) 66130561Sobrien 67130561Sobrien/* This insn is a conditional branch. */ 68130561Sobrien#define ARC_OPCODE_COND_BRANCH (ARC_OPCODE_FLAG_START) 69130561Sobrien#define SYNTAX_3OP (ARC_OPCODE_COND_BRANCH << 1) 70130561Sobrien#define SYNTAX_LENGTH (SYNTAX_3OP ) 71130561Sobrien#define SYNTAX_2OP (SYNTAX_3OP << 1) 72130561Sobrien#define OP1_MUST_BE_IMM (SYNTAX_2OP << 1) 73130561Sobrien#define OP1_IMM_IMPLIED (OP1_MUST_BE_IMM << 1) 74130561Sobrien#define SYNTAX_VALID (OP1_IMM_IMPLIED << 1) 75130561Sobrien 76130561Sobrien#define I(x) (((x) & 31) << 27) 77130561Sobrien#define A(x) (((x) & ARC_MASK_REG) << ARC_SHIFT_REGA) 78130561Sobrien#define B(x) (((x) & ARC_MASK_REG) << ARC_SHIFT_REGB) 79130561Sobrien#define C(x) (((x) & ARC_MASK_REG) << ARC_SHIFT_REGC) 80130561Sobrien#define R(x,b,m) (((x) & (m)) << (b)) /* value X, mask M, at bit B */ 81130561Sobrien 82130561Sobrien/* These values are used to optimize assembly and disassembly. Each insn 83130561Sobrien is on a list of related insns (same first letter for assembly, same 84130561Sobrien insn code for disassembly). */ 85130561Sobrien 86130561Sobrien struct arc_opcode *next_asm; /* Next instr to try during assembly. */ 87130561Sobrien struct arc_opcode *next_dis; /* Next instr to try during disassembly. */ 88130561Sobrien 89130561Sobrien/* Macros to create the hash values for the lists. */ 90130561Sobrien#define ARC_HASH_OPCODE(string) \ 91130561Sobrien ((string)[0] >= 'a' && (string)[0] <= 'z' ? (string)[0] - 'a' : 26) 92130561Sobrien#define ARC_HASH_ICODE(insn) \ 93130561Sobrien ((unsigned int) (insn) >> 27) 94130561Sobrien 95130561Sobrien /* Macros to access `next_asm', `next_dis' so users needn't care about the 96130561Sobrien underlying mechanism. */ 97130561Sobrien#define ARC_OPCODE_NEXT_ASM(op) ((op)->next_asm) 98130561Sobrien#define ARC_OPCODE_NEXT_DIS(op) ((op)->next_dis) 99130561Sobrien}; 100130561Sobrien 101130561Sobrien/* this is an "insert at front" linked list per Metaware spec 102130561Sobrien that new definitions override older ones. */ 103130561Sobrienextern struct arc_opcode *arc_ext_opcodes; 104130561Sobrien 105130561Sobrienstruct arc_operand_value { 106130561Sobrien char *name; /* eg: "eq" */ 107130561Sobrien short value; /* eg: 1 */ 108130561Sobrien unsigned char type; /* index into `arc_operands' */ 109130561Sobrien unsigned char flags; /* various flag bits */ 110130561Sobrien 111130561Sobrien/* Values for `flags'. */ 112130561Sobrien 113130561Sobrien/* Return CPU number, given flag bits. */ 114130561Sobrien#define ARC_OPVAL_CPU(bits) ((bits) & ARC_MACH_CPU_MASK) 115130561Sobrien/* Return MACH number, given flag bits. */ 116130561Sobrien#define ARC_OPVAL_MACH(bits) ((bits) & ARC_MACH_MASK) 117130561Sobrien}; 118130561Sobrien 119130561Sobrienstruct arc_ext_operand_value { 120130561Sobrien struct arc_ext_operand_value *next; 121130561Sobrien struct arc_operand_value operand; 122130561Sobrien}; 123130561Sobrien 124130561Sobrienextern struct arc_ext_operand_value *arc_ext_operands; 125130561Sobrien 126130561Sobrienstruct arc_operand { 127130561Sobrien/* One of the insn format chars. */ 128130561Sobrien unsigned char fmt; 129130561Sobrien 130130561Sobrien/* The number of bits in the operand (may be unused for a modifier). */ 131130561Sobrien unsigned char bits; 132130561Sobrien 133130561Sobrien/* How far the operand is left shifted in the instruction, or 134130561Sobrien the modifier's flag bit (may be unused for a modifier. */ 135130561Sobrien unsigned char shift; 136130561Sobrien 137130561Sobrien/* Various flag bits. */ 138130561Sobrien int flags; 139130561Sobrien 140130561Sobrien/* Values for `flags'. */ 141130561Sobrien 142130561Sobrien/* This operand is a suffix to the opcode. */ 143130561Sobrien#define ARC_OPERAND_SUFFIX 1 144130561Sobrien 145130561Sobrien/* This operand is a relative branch displacement. The disassembler 146130561Sobrien prints these symbolically if possible. */ 147130561Sobrien#define ARC_OPERAND_RELATIVE_BRANCH 2 148130561Sobrien 149130561Sobrien/* This operand is an absolute branch address. The disassembler 150130561Sobrien prints these symbolically if possible. */ 151130561Sobrien#define ARC_OPERAND_ABSOLUTE_BRANCH 4 152130561Sobrien 153130561Sobrien/* This operand is an address. The disassembler 154130561Sobrien prints these symbolically if possible. */ 155130561Sobrien#define ARC_OPERAND_ADDRESS 8 156130561Sobrien 157130561Sobrien/* This operand is a long immediate value. */ 158130561Sobrien#define ARC_OPERAND_LIMM 0x10 159130561Sobrien 160130561Sobrien/* This operand takes signed values. */ 161130561Sobrien#define ARC_OPERAND_SIGNED 0x20 162130561Sobrien 163130561Sobrien/* This operand takes signed values, but also accepts a full positive 164130561Sobrien range of values. That is, if bits is 16, it takes any value from 165130561Sobrien -0x8000 to 0xffff. */ 166130561Sobrien#define ARC_OPERAND_SIGNOPT 0x40 167130561Sobrien 168130561Sobrien/* This operand should be regarded as a negative number for the 169130561Sobrien purposes of overflow checking (i.e., the normal most negative 170130561Sobrien number is disallowed and one more than the normal most positive 171130561Sobrien number is allowed). This flag will only be set for a signed 172130561Sobrien operand. */ 173130561Sobrien#define ARC_OPERAND_NEGATIVE 0x80 174130561Sobrien 175130561Sobrien/* This operand doesn't really exist. The program uses these operands 176130561Sobrien in special ways. */ 177130561Sobrien#define ARC_OPERAND_FAKE 0x100 178130561Sobrien 179130561Sobrien/* separate flags operand for j and jl instructions */ 180130561Sobrien#define ARC_OPERAND_JUMPFLAGS 0x200 181130561Sobrien 182130561Sobrien/* allow warnings and errors to be issued after call to insert_xxxxxx */ 183130561Sobrien#define ARC_OPERAND_WARN 0x400 184130561Sobrien#define ARC_OPERAND_ERROR 0x800 185130561Sobrien 186130561Sobrien/* this is a load operand */ 187130561Sobrien#define ARC_OPERAND_LOAD 0x8000 188130561Sobrien 189130561Sobrien/* this is a store operand */ 190130561Sobrien#define ARC_OPERAND_STORE 0x10000 191130561Sobrien 192130561Sobrien/* Modifier values. */ 193130561Sobrien/* A dot is required before a suffix. Eg: .le */ 194130561Sobrien#define ARC_MOD_DOT 0x1000 195130561Sobrien 196130561Sobrien/* A normal register is allowed (not used, but here for completeness). */ 197130561Sobrien#define ARC_MOD_REG 0x2000 198130561Sobrien 199130561Sobrien/* An auxiliary register name is expected. */ 200130561Sobrien#define ARC_MOD_AUXREG 0x4000 201130561Sobrien 202130561Sobrien/* Sum of all ARC_MOD_XXX bits. */ 203130561Sobrien#define ARC_MOD_BITS 0x7000 204130561Sobrien 205130561Sobrien/* Non-zero if the operand type is really a modifier. */ 206130561Sobrien#define ARC_MOD_P(X) ((X) & ARC_MOD_BITS) 207130561Sobrien 208130561Sobrien/* enforce read/write only register restrictions */ 209130561Sobrien#define ARC_REGISTER_READONLY 0x01 210130561Sobrien#define ARC_REGISTER_WRITEONLY 0x02 211130561Sobrien#define ARC_REGISTER_NOSHORT_CUT 0x04 212130561Sobrien 213130561Sobrien/* Insertion function. This is used by the assembler. To insert an 214130561Sobrien operand value into an instruction, check this field. 215130561Sobrien 216130561Sobrien If it is NULL, execute 217130561Sobrien i |= (p & ((1 << o->bits) - 1)) << o->shift; 218130561Sobrien (I is the instruction which we are filling in, O is a pointer to 219130561Sobrien this structure, and OP is the opcode value; this assumes twos 220130561Sobrien complement arithmetic). 221130561Sobrien 222130561Sobrien If this field is not NULL, then simply call it with the 223130561Sobrien instruction and the operand value. It will return the new value 224130561Sobrien of the instruction. If the ERRMSG argument is not NULL, then if 225130561Sobrien the operand value is illegal, *ERRMSG will be set to a warning 226130561Sobrien string (the operand will be inserted in any case). If the 227130561Sobrien operand value is legal, *ERRMSG will be unchanged. 228130561Sobrien 229130561Sobrien REG is non-NULL when inserting a register value. */ 230130561Sobrien 231130561Sobrien arc_insn (*insert) 232130561Sobrien (arc_insn insn, const struct arc_operand *operand, int mods, 233130561Sobrien const struct arc_operand_value *reg, long value, const char **errmsg); 234130561Sobrien 235130561Sobrien/* Extraction function. This is used by the disassembler. To 236130561Sobrien extract this operand type from an instruction, check this field. 237130561Sobrien 238130561Sobrien If it is NULL, compute 239130561Sobrien op = ((i) >> o->shift) & ((1 << o->bits) - 1); 240130561Sobrien if ((o->flags & ARC_OPERAND_SIGNED) != 0 241130561Sobrien && (op & (1 << (o->bits - 1))) != 0) 242130561Sobrien op -= 1 << o->bits; 243130561Sobrien (I is the instruction, O is a pointer to this structure, and OP 244130561Sobrien is the result; this assumes twos complement arithmetic). 245130561Sobrien 246130561Sobrien If this field is not NULL, then simply call it with the 247130561Sobrien instruction value. It will return the value of the operand. If 248130561Sobrien the INVALID argument is not NULL, *INVALID will be set to 249130561Sobrien non-zero if this operand type can not actually be extracted from 250130561Sobrien this operand (i.e., the instruction does not match). If the 251130561Sobrien operand is valid, *INVALID will not be changed. 252130561Sobrien 253130561Sobrien INSN is a pointer to an array of two `arc_insn's. The first element is 254130561Sobrien the insn, the second is the limm if present. 255130561Sobrien 256130561Sobrien Operands that have a printable form like registers and suffixes have 257130561Sobrien their struct arc_operand_value pointer stored in OPVAL. */ 258130561Sobrien 259130561Sobrien long (*extract) 260130561Sobrien (arc_insn *insn, const struct arc_operand *operand, int mods, 261130561Sobrien const struct arc_operand_value **opval, int *invalid); 262130561Sobrien}; 263130561Sobrien 264130561Sobrien/* Bits that say what version of cpu we have. These should be passed to 265130561Sobrien arc_init_opcode_tables. At present, all there is is the cpu type. */ 266130561Sobrien 267130561Sobrien/* CPU number, given value passed to `arc_init_opcode_tables'. */ 268130561Sobrien#define ARC_HAVE_CPU(bits) ((bits) & ARC_MACH_CPU_MASK) 269130561Sobrien/* MACH number, given value passed to `arc_init_opcode_tables'. */ 270130561Sobrien#define ARC_HAVE_MACH(bits) ((bits) & ARC_MACH_MASK) 271130561Sobrien 272130561Sobrien/* Special register values: */ 273130561Sobrien#define ARC_REG_SHIMM_UPDATE 61 274130561Sobrien#define ARC_REG_SHIMM 63 275130561Sobrien#define ARC_REG_LIMM 62 276130561Sobrien 277130561Sobrien/* Non-zero if REG is a constant marker. */ 278130561Sobrien#define ARC_REG_CONSTANT_P(REG) ((REG) >= 61) 279130561Sobrien 280130561Sobrien/* Positions and masks of various fields: */ 281130561Sobrien#define ARC_SHIFT_REGA 21 282130561Sobrien#define ARC_SHIFT_REGB 15 283130561Sobrien#define ARC_SHIFT_REGC 9 284130561Sobrien#define ARC_MASK_REG 63 285130561Sobrien 286130561Sobrien/* Delay slot types. */ 287130561Sobrien#define ARC_DELAY_NONE 0 /* no delay slot */ 288130561Sobrien#define ARC_DELAY_NORMAL 1 /* delay slot in both cases */ 289130561Sobrien#define ARC_DELAY_JUMP 2 /* delay slot only if branch taken */ 290130561Sobrien 291130561Sobrien/* Non-zero if X will fit in a signed 9 bit field. */ 292130561Sobrien#define ARC_SHIMM_CONST_P(x) ((long) (x) >= -256 && (long) (x) <= 255) 293130561Sobrien 294130561Sobrienextern const struct arc_operand arc_operands[]; 295130561Sobrienextern const int arc_operand_count; 296130561Sobrienextern struct arc_opcode arc_opcodes[]; 297130561Sobrienextern const int arc_opcodes_count; 298130561Sobrienextern const struct arc_operand_value arc_suffixes[]; 299130561Sobrienextern const int arc_suffixes_count; 300130561Sobrienextern const struct arc_operand_value arc_reg_names[]; 301130561Sobrienextern const int arc_reg_names_count; 302130561Sobrienextern unsigned char arc_operand_map[]; 303130561Sobrien 304130561Sobrien/* Utility fns in arc-opc.c. */ 305130561Sobrienint arc_get_opcode_mach (int, int); 306130561Sobrien 307130561Sobrien/* `arc_opcode_init_tables' must be called before `arc_xxx_supported'. */ 308130561Sobrienvoid arc_opcode_init_tables (int); 309130561Sobrienvoid arc_opcode_init_insert (void); 310130561Sobrienvoid arc_opcode_init_extract (void); 311130561Sobrienconst struct arc_opcode *arc_opcode_lookup_asm (const char *); 312130561Sobrienconst struct arc_opcode *arc_opcode_lookup_dis (unsigned int); 313130561Sobrienint arc_opcode_limm_p (long *); 314130561Sobrienconst struct arc_operand_value *arc_opcode_lookup_suffix 315130561Sobrien (const struct arc_operand *type, int value); 316130561Sobrienint arc_opcode_supported (const struct arc_opcode *); 317130561Sobrienint arc_opval_supported (const struct arc_operand_value *); 318130561Sobrienint arc_limm_fixup_adjust (arc_insn); 319130561Sobrienint arc_insn_is_j (arc_insn); 320130561Sobrienint arc_insn_not_jl (arc_insn); 321130561Sobrienint arc_operand_type (int); 322130561Sobrienstruct arc_operand_value *get_ext_suffix (char *); 323130561Sobrienint arc_get_noshortcut_flag (void); 324