bhyverun.c revision 246686
1/*- 2 * Copyright (c) 2011 NetApp, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD: head/usr.sbin/bhyve/bhyverun.c 246686 2013-02-11 20:36:07Z neel $ 27 */ 28 29#include <sys/cdefs.h> 30__FBSDID("$FreeBSD: head/usr.sbin/bhyve/bhyverun.c 246686 2013-02-11 20:36:07Z neel $"); 31 32#include <sys/types.h> 33#include <sys/mman.h> 34#include <sys/time.h> 35 36#include <machine/segments.h> 37 38#include <stdio.h> 39#include <stdlib.h> 40#include <libgen.h> 41#include <unistd.h> 42#include <assert.h> 43#include <errno.h> 44#include <signal.h> 45#include <pthread.h> 46#include <pthread_np.h> 47 48#include <machine/vmm.h> 49#include <vmmapi.h> 50 51#include "bhyverun.h" 52#include "acpi.h" 53#include "inout.h" 54#include "dbgport.h" 55#include "mem.h" 56#include "mevent.h" 57#include "mptbl.h" 58#include "pci_emul.h" 59#include "xmsr.h" 60#include "ioapic.h" 61#include "spinup_ap.h" 62 63#define DEFAULT_GUEST_HZ 100 64#define DEFAULT_GUEST_TSLICE 200 65 66#define GUEST_NIO_PORT 0x488 /* guest upcalls via i/o port */ 67 68#define VMEXIT_SWITCH 0 /* force vcpu switch in mux mode */ 69#define VMEXIT_CONTINUE 1 /* continue from next instruction */ 70#define VMEXIT_RESTART 2 /* restart current instruction */ 71#define VMEXIT_ABORT 3 /* abort the vm run loop */ 72#define VMEXIT_RESET 4 /* guest machine has reset */ 73 74#define MB (1024UL * 1024) 75#define GB (1024UL * MB) 76 77typedef int (*vmexit_handler_t)(struct vmctx *, struct vm_exit *, int *vcpu); 78 79int guest_tslice = DEFAULT_GUEST_TSLICE; 80int guest_hz = DEFAULT_GUEST_HZ; 81char *vmname; 82 83u_long lomem_sz; 84u_long himem_sz; 85 86int guest_ncpus; 87 88static int pincpu = -1; 89static int guest_vcpu_mux; 90static int guest_vmexit_on_hlt, guest_vmexit_on_pause, disable_x2apic; 91 92static int foundcpus; 93 94static int strictio; 95 96static int acpi; 97 98static char *lomem_addr; 99static char *himem_addr; 100 101static char *progname; 102static const int BSP = 0; 103 104static int cpumask; 105 106static void vm_loop(struct vmctx *ctx, int vcpu, uint64_t rip); 107 108struct vm_exit vmexit[VM_MAXCPU]; 109 110struct fbsdstats { 111 uint64_t vmexit_bogus; 112 uint64_t vmexit_bogus_switch; 113 uint64_t vmexit_hlt; 114 uint64_t vmexit_pause; 115 uint64_t vmexit_mtrap; 116 uint64_t vmexit_paging; 117 uint64_t cpu_switch_rotate; 118 uint64_t cpu_switch_direct; 119 int io_reset; 120} stats; 121 122struct mt_vmm_info { 123 pthread_t mt_thr; 124 struct vmctx *mt_ctx; 125 int mt_vcpu; 126} mt_vmm_info[VM_MAXCPU]; 127 128static void 129usage(int code) 130{ 131 132 fprintf(stderr, 133 "Usage: %s [-aehABHIP][-g <gdb port>][-z <hz>][-s <pci>]" 134 "[-S <pci>][-p pincpu][-n <pci>][-m lowmem][-M highmem]" 135 " <vmname>\n" 136 " -a: local apic is in XAPIC mode (default is X2APIC)\n" 137 " -A: create an ACPI table\n" 138 " -g: gdb port (default is %d and 0 means don't open)\n" 139 " -c: # cpus (default 1)\n" 140 " -p: pin vcpu 'n' to host cpu 'pincpu + n'\n" 141 " -B: inject breakpoint exception on vm entry\n" 142 " -H: vmexit from the guest on hlt\n" 143 " -I: present an ioapic to the guest\n" 144 " -P: vmexit from the guest on pause\n" 145 " -e: exit on unhandled i/o access\n" 146 " -h: help\n" 147 " -z: guest hz (default is %d)\n" 148 " -s: <slot,driver,configinfo> PCI slot config\n" 149 " -S: <slot,driver,configinfo> legacy PCI slot config\n" 150 " -m: lowmem in MB\n" 151 " -M: highmem in MB\n" 152 " -x: mux vcpus to 1 hcpu\n" 153 " -t: mux vcpu timeslice hz (default %d)\n", 154 progname, DEFAULT_GDB_PORT, DEFAULT_GUEST_HZ, 155 DEFAULT_GUEST_TSLICE); 156 exit(code); 157} 158 159void * 160paddr_guest2host(uintptr_t gaddr) 161{ 162 if (lomem_sz == 0) 163 return (NULL); 164 165 if (gaddr < lomem_sz) { 166 return ((void *)(lomem_addr + gaddr)); 167 } else if (gaddr >= 4*GB && gaddr < (4*GB + himem_sz)) { 168 return ((void *)(himem_addr + gaddr - 4*GB)); 169 } else 170 return (NULL); 171} 172 173int 174fbsdrun_disable_x2apic(void) 175{ 176 177 return (disable_x2apic); 178} 179 180int 181fbsdrun_vmexit_on_pause(void) 182{ 183 184 return (guest_vmexit_on_pause); 185} 186 187int 188fbsdrun_vmexit_on_hlt(void) 189{ 190 191 return (guest_vmexit_on_hlt); 192} 193 194int 195fbsdrun_muxed(void) 196{ 197 198 return (guest_vcpu_mux); 199} 200 201static void * 202fbsdrun_start_thread(void *param) 203{ 204 char tname[MAXCOMLEN + 1]; 205 struct mt_vmm_info *mtp; 206 int vcpu; 207 208 mtp = param; 209 vcpu = mtp->mt_vcpu; 210 211 snprintf(tname, sizeof(tname), "%s vcpu %d", vmname, vcpu); 212 pthread_set_name_np(mtp->mt_thr, tname); 213 214 vm_loop(mtp->mt_ctx, vcpu, vmexit[vcpu].rip); 215 216 /* not reached */ 217 exit(1); 218 return (NULL); 219} 220 221void 222fbsdrun_addcpu(struct vmctx *ctx, int vcpu, uint64_t rip) 223{ 224 int error; 225 226 if (cpumask & (1 << vcpu)) { 227 fprintf(stderr, "addcpu: attempting to add existing cpu %d\n", 228 vcpu); 229 exit(1); 230 } 231 232 cpumask |= 1 << vcpu; 233 foundcpus++; 234 235 /* 236 * Set up the vmexit struct to allow execution to start 237 * at the given RIP 238 */ 239 vmexit[vcpu].rip = rip; 240 vmexit[vcpu].inst_length = 0; 241 242 if (vcpu == BSP || !guest_vcpu_mux){ 243 mt_vmm_info[vcpu].mt_ctx = ctx; 244 mt_vmm_info[vcpu].mt_vcpu = vcpu; 245 246 error = pthread_create(&mt_vmm_info[vcpu].mt_thr, NULL, 247 fbsdrun_start_thread, &mt_vmm_info[vcpu]); 248 assert(error == 0); 249 } 250} 251 252static int 253fbsdrun_get_next_cpu(int curcpu) 254{ 255 256 /* 257 * Get the next available CPU. Assumes they arrive 258 * in ascending order with no gaps. 259 */ 260 return ((curcpu + 1) % foundcpus); 261} 262 263static int 264vmexit_catch_reset(void) 265{ 266 stats.io_reset++; 267 return (VMEXIT_RESET); 268} 269 270static int 271vmexit_catch_inout(void) 272{ 273 return (VMEXIT_ABORT); 274} 275 276static int 277vmexit_handle_notify(struct vmctx *ctx, struct vm_exit *vme, int *pvcpu, 278 uint32_t eax) 279{ 280#if PG_DEBUG /* put all types of debug here */ 281 if (eax == 0) { 282 pause_noswitch = 1; 283 } else if (eax == 1) { 284 pause_noswitch = 0; 285 } else { 286 pause_noswitch = 0; 287 if (eax == 5) { 288 vm_set_capability(ctx, *pvcpu, VM_CAP_MTRAP_EXIT, 1); 289 } 290 } 291#endif 292 return (VMEXIT_CONTINUE); 293} 294 295static int 296vmexit_inout(struct vmctx *ctx, struct vm_exit *vme, int *pvcpu) 297{ 298 int error; 299 int bytes, port, in, out; 300 uint32_t eax; 301 int vcpu; 302 303 vcpu = *pvcpu; 304 305 port = vme->u.inout.port; 306 bytes = vme->u.inout.bytes; 307 eax = vme->u.inout.eax; 308 in = vme->u.inout.in; 309 out = !in; 310 311 /* We don't deal with these */ 312 if (vme->u.inout.string || vme->u.inout.rep) 313 return (VMEXIT_ABORT); 314 315 /* Special case of guest reset */ 316 if (out && port == 0x64 && (uint8_t)eax == 0xFE) 317 return (vmexit_catch_reset()); 318 319 /* Extra-special case of host notifications */ 320 if (out && port == GUEST_NIO_PORT) 321 return (vmexit_handle_notify(ctx, vme, pvcpu, eax)); 322 323 error = emulate_inout(ctx, vcpu, in, port, bytes, &eax, strictio); 324 if (error == 0 && in) 325 error = vm_set_register(ctx, vcpu, VM_REG_GUEST_RAX, eax); 326 327 if (error == 0) 328 return (VMEXIT_CONTINUE); 329 else { 330 fprintf(stderr, "Unhandled %s%c 0x%04x\n", 331 in ? "in" : "out", 332 bytes == 1 ? 'b' : (bytes == 2 ? 'w' : 'l'), port); 333 return (vmexit_catch_inout()); 334 } 335} 336 337static int 338vmexit_rdmsr(struct vmctx *ctx, struct vm_exit *vme, int *pvcpu) 339{ 340 fprintf(stderr, "vm exit rdmsr 0x%x, cpu %d\n", vme->u.msr.code, 341 *pvcpu); 342 return (VMEXIT_ABORT); 343} 344 345static int 346vmexit_wrmsr(struct vmctx *ctx, struct vm_exit *vme, int *pvcpu) 347{ 348 int newcpu; 349 int retval = VMEXIT_CONTINUE; 350 351 newcpu = emulate_wrmsr(ctx, *pvcpu, vme->u.msr.code,vme->u.msr.wval); 352 353 if (guest_vcpu_mux && *pvcpu != newcpu) { 354 retval = VMEXIT_SWITCH; 355 *pvcpu = newcpu; 356 } 357 358 return (retval); 359} 360 361static int 362vmexit_spinup_ap(struct vmctx *ctx, struct vm_exit *vme, int *pvcpu) 363{ 364 int newcpu; 365 int retval = VMEXIT_CONTINUE; 366 367 newcpu = spinup_ap(ctx, *pvcpu, 368 vme->u.spinup_ap.vcpu, vme->u.spinup_ap.rip); 369 370 if (guest_vcpu_mux && *pvcpu != newcpu) { 371 retval = VMEXIT_SWITCH; 372 *pvcpu = newcpu; 373 } 374 375 return (retval); 376} 377 378static int 379vmexit_vmx(struct vmctx *ctx, struct vm_exit *vmexit, int *pvcpu) 380{ 381 382 fprintf(stderr, "vm exit[%d]\n", *pvcpu); 383 fprintf(stderr, "\treason\t\tVMX\n"); 384 fprintf(stderr, "\trip\t\t0x%016lx\n", vmexit->rip); 385 fprintf(stderr, "\tinst_length\t%d\n", vmexit->inst_length); 386 fprintf(stderr, "\terror\t\t%d\n", vmexit->u.vmx.error); 387 fprintf(stderr, "\texit_reason\t%u\n", vmexit->u.vmx.exit_reason); 388 fprintf(stderr, "\tqualification\t0x%016lx\n", 389 vmexit->u.vmx.exit_qualification); 390 391 return (VMEXIT_ABORT); 392} 393 394static int bogus_noswitch = 1; 395 396static int 397vmexit_bogus(struct vmctx *ctx, struct vm_exit *vmexit, int *pvcpu) 398{ 399 stats.vmexit_bogus++; 400 401 if (!guest_vcpu_mux || guest_ncpus == 1 || bogus_noswitch) { 402 return (VMEXIT_RESTART); 403 } else { 404 stats.vmexit_bogus_switch++; 405 vmexit->inst_length = 0; 406 *pvcpu = -1; 407 return (VMEXIT_SWITCH); 408 } 409} 410 411static int 412vmexit_hlt(struct vmctx *ctx, struct vm_exit *vmexit, int *pvcpu) 413{ 414 stats.vmexit_hlt++; 415 if (fbsdrun_muxed()) { 416 *pvcpu = -1; 417 return (VMEXIT_SWITCH); 418 } else { 419 /* 420 * Just continue execution with the next instruction. We use 421 * the HLT VM exit as a way to be friendly with the host 422 * scheduler. 423 */ 424 return (VMEXIT_CONTINUE); 425 } 426} 427 428static int pause_noswitch; 429 430static int 431vmexit_pause(struct vmctx *ctx, struct vm_exit *vmexit, int *pvcpu) 432{ 433 stats.vmexit_pause++; 434 435 if (fbsdrun_muxed() && !pause_noswitch) { 436 *pvcpu = -1; 437 return (VMEXIT_SWITCH); 438 } else { 439 return (VMEXIT_CONTINUE); 440 } 441} 442 443static int 444vmexit_mtrap(struct vmctx *ctx, struct vm_exit *vmexit, int *pvcpu) 445{ 446 stats.vmexit_mtrap++; 447 448 return (VMEXIT_RESTART); 449} 450 451static int 452vmexit_paging(struct vmctx *ctx, struct vm_exit *vmexit, int *pvcpu) 453{ 454 int err; 455 stats.vmexit_paging++; 456 457 err = emulate_mem(ctx, *pvcpu, vmexit->u.paging.gpa, 458 &vmexit->u.paging.vie); 459 460 if (err) { 461 if (err == EINVAL) { 462 fprintf(stderr, 463 "Failed to emulate instruction at 0x%lx\n", 464 vmexit->rip); 465 } else if (err == ESRCH) { 466 fprintf(stderr, "Unhandled memory access to 0x%lx\n", 467 vmexit->u.paging.gpa); 468 } 469 470 return (VMEXIT_ABORT); 471 } 472 473 return (VMEXIT_CONTINUE); 474} 475 476static void 477sigalrm(int sig) 478{ 479 return; 480} 481 482static void 483setup_timeslice(void) 484{ 485 struct sigaction sa; 486 struct itimerval itv; 487 int error; 488 489 /* 490 * Setup a realtime timer to generate a SIGALRM at a 491 * frequency of 'guest_tslice' ticks per second. 492 */ 493 sigemptyset(&sa.sa_mask); 494 sa.sa_flags = 0; 495 sa.sa_handler = sigalrm; 496 497 error = sigaction(SIGALRM, &sa, NULL); 498 assert(error == 0); 499 500 itv.it_interval.tv_sec = 0; 501 itv.it_interval.tv_usec = 1000000 / guest_tslice; 502 itv.it_value.tv_sec = 0; 503 itv.it_value.tv_usec = 1000000 / guest_tslice; 504 505 error = setitimer(ITIMER_REAL, &itv, NULL); 506 assert(error == 0); 507} 508 509static vmexit_handler_t handler[VM_EXITCODE_MAX] = { 510 [VM_EXITCODE_INOUT] = vmexit_inout, 511 [VM_EXITCODE_VMX] = vmexit_vmx, 512 [VM_EXITCODE_BOGUS] = vmexit_bogus, 513 [VM_EXITCODE_RDMSR] = vmexit_rdmsr, 514 [VM_EXITCODE_WRMSR] = vmexit_wrmsr, 515 [VM_EXITCODE_MTRAP] = vmexit_mtrap, 516 [VM_EXITCODE_PAGING] = vmexit_paging, 517 [VM_EXITCODE_SPINUP_AP] = vmexit_spinup_ap, 518}; 519 520static void 521vm_loop(struct vmctx *ctx, int vcpu, uint64_t rip) 522{ 523 cpuset_t mask; 524 int error, rc, prevcpu; 525 526 if (guest_vcpu_mux) 527 setup_timeslice(); 528 529 if (pincpu >= 0) { 530 CPU_ZERO(&mask); 531 CPU_SET(pincpu + vcpu, &mask); 532 error = pthread_setaffinity_np(pthread_self(), 533 sizeof(mask), &mask); 534 assert(error == 0); 535 } 536 537 while (1) { 538 error = vm_run(ctx, vcpu, rip, &vmexit[vcpu]); 539 if (error != 0) { 540 /* 541 * It is possible that 'vmmctl' or some other process 542 * has transitioned the vcpu to CANNOT_RUN state right 543 * before we tried to transition it to RUNNING. 544 * 545 * This is expected to be temporary so just retry. 546 */ 547 if (errno == EBUSY) 548 continue; 549 else 550 break; 551 } 552 553 prevcpu = vcpu; 554 rc = (*handler[vmexit[vcpu].exitcode])(ctx, &vmexit[vcpu], 555 &vcpu); 556 switch (rc) { 557 case VMEXIT_SWITCH: 558 assert(guest_vcpu_mux); 559 if (vcpu == -1) { 560 stats.cpu_switch_rotate++; 561 vcpu = fbsdrun_get_next_cpu(prevcpu); 562 } else { 563 stats.cpu_switch_direct++; 564 } 565 /* fall through */ 566 case VMEXIT_CONTINUE: 567 rip = vmexit[vcpu].rip + vmexit[vcpu].inst_length; 568 break; 569 case VMEXIT_RESTART: 570 rip = vmexit[vcpu].rip; 571 break; 572 case VMEXIT_RESET: 573 exit(0); 574 default: 575 exit(1); 576 } 577 } 578 fprintf(stderr, "vm_run error %d, errno %d\n", error, errno); 579} 580 581static int 582num_vcpus_allowed(struct vmctx *ctx) 583{ 584 int tmp, error; 585 586 error = vm_get_capability(ctx, BSP, VM_CAP_UNRESTRICTED_GUEST, &tmp); 587 588 /* 589 * The guest is allowed to spinup more than one processor only if the 590 * UNRESTRICTED_GUEST capability is available. 591 */ 592 if (error == 0) 593 return (VM_MAXCPU); 594 else 595 return (1); 596} 597 598int 599main(int argc, char *argv[]) 600{ 601 int c, error, gdb_port, inject_bkpt, tmp, err, ioapic, bvmcons; 602 int max_vcpus; 603 struct vmctx *ctx; 604 uint64_t rip; 605 606 bvmcons = 0; 607 inject_bkpt = 0; 608 progname = basename(argv[0]); 609 gdb_port = DEFAULT_GDB_PORT; 610 guest_ncpus = 1; 611 ioapic = 0; 612 613 while ((c = getopt(argc, argv, "abehABHIPxp:g:c:z:s:S:n:m:M:")) != -1) { 614 switch (c) { 615 case 'a': 616 disable_x2apic = 1; 617 break; 618 case 'A': 619 acpi = 1; 620 break; 621 case 'b': 622 bvmcons = 1; 623 break; 624 case 'B': 625 inject_bkpt = 1; 626 break; 627 case 'x': 628 guest_vcpu_mux = 1; 629 break; 630 case 'p': 631 pincpu = atoi(optarg); 632 break; 633 case 'c': 634 guest_ncpus = atoi(optarg); 635 break; 636 case 'g': 637 gdb_port = atoi(optarg); 638 break; 639 case 'z': 640 guest_hz = atoi(optarg); 641 break; 642 case 't': 643 guest_tslice = atoi(optarg); 644 break; 645 case 's': 646 pci_parse_slot(optarg, 0); 647 break; 648 case 'S': 649 pci_parse_slot(optarg, 1); 650 break; 651 case 'm': 652 lomem_sz = strtoul(optarg, NULL, 0) * MB; 653 break; 654 case 'M': 655 himem_sz = strtoul(optarg, NULL, 0) * MB; 656 break; 657 case 'H': 658 guest_vmexit_on_hlt = 1; 659 break; 660 case 'I': 661 ioapic = 1; 662 break; 663 case 'P': 664 guest_vmexit_on_pause = 1; 665 break; 666 case 'e': 667 strictio = 1; 668 break; 669 case 'h': 670 usage(0); 671 default: 672 usage(1); 673 } 674 } 675 argc -= optind; 676 argv += optind; 677 678 if (argc != 1) 679 usage(1); 680 681 /* No need to mux if guest is uni-processor */ 682 if (guest_ncpus <= 1) 683 guest_vcpu_mux = 0; 684 685 /* vmexit on hlt if guest is muxed */ 686 if (guest_vcpu_mux) { 687 guest_vmexit_on_hlt = 1; 688 guest_vmexit_on_pause = 1; 689 } 690 691 vmname = argv[0]; 692 693 ctx = vm_open(vmname); 694 if (ctx == NULL) { 695 perror("vm_open"); 696 exit(1); 697 } 698 699 max_vcpus = num_vcpus_allowed(ctx); 700 if (guest_ncpus > max_vcpus) { 701 fprintf(stderr, "%d vCPUs requested but only %d available\n", 702 guest_ncpus, max_vcpus); 703 exit(1); 704 } 705 706 if (fbsdrun_vmexit_on_hlt()) { 707 err = vm_get_capability(ctx, BSP, VM_CAP_HALT_EXIT, &tmp); 708 if (err < 0) { 709 fprintf(stderr, "VM exit on HLT not supported\n"); 710 exit(1); 711 } 712 vm_set_capability(ctx, BSP, VM_CAP_HALT_EXIT, 1); 713 handler[VM_EXITCODE_HLT] = vmexit_hlt; 714 } 715 716 if (fbsdrun_vmexit_on_pause()) { 717 /* 718 * pause exit support required for this mode 719 */ 720 err = vm_get_capability(ctx, BSP, VM_CAP_PAUSE_EXIT, &tmp); 721 if (err < 0) { 722 fprintf(stderr, 723 "SMP mux requested, no pause support\n"); 724 exit(1); 725 } 726 vm_set_capability(ctx, BSP, VM_CAP_PAUSE_EXIT, 1); 727 handler[VM_EXITCODE_PAUSE] = vmexit_pause; 728 } 729 730 if (fbsdrun_disable_x2apic()) 731 err = vm_set_x2apic_state(ctx, BSP, X2APIC_DISABLED); 732 else 733 err = vm_set_x2apic_state(ctx, BSP, X2APIC_ENABLED); 734 735 if (err) { 736 fprintf(stderr, "Unable to set x2apic state (%d)\n", err); 737 exit(1); 738 } 739 740 if (lomem_sz != 0) { 741 lomem_addr = vm_map_memory(ctx, 0, lomem_sz); 742 if (lomem_addr == (char *) MAP_FAILED) { 743 lomem_sz = 0; 744 } else if (himem_sz != 0) { 745 himem_addr = vm_map_memory(ctx, 4*GB, himem_sz); 746 if (himem_addr == (char *) MAP_FAILED) { 747 lomem_sz = 0; 748 himem_sz = 0; 749 } 750 } 751 } 752 753 init_inout(); 754 init_pci(ctx); 755 if (ioapic) 756 ioapic_init(0); 757 758 if (gdb_port != 0) 759 init_dbgport(gdb_port); 760 761 if (bvmcons) 762 init_bvmcons(); 763 764 error = vm_get_register(ctx, BSP, VM_REG_GUEST_RIP, &rip); 765 assert(error == 0); 766 767 if (inject_bkpt) { 768 error = vm_inject_event(ctx, BSP, VM_HW_EXCEPTION, IDT_BP); 769 assert(error == 0); 770 } 771 772 /* 773 * build the guest tables, MP etc. 774 */ 775 mptable_build(ctx, guest_ncpus, ioapic); 776 777 if (acpi) { 778 error = acpi_build(ctx, guest_ncpus, ioapic); 779 assert(error == 0); 780 } 781 782 /* 783 * Add CPU 0 784 */ 785 fbsdrun_addcpu(ctx, BSP, rip); 786 787 /* 788 * Head off to the main event dispatch loop 789 */ 790 mevent_dispatch(); 791 792 exit(1); 793} 794