asi.h revision 259065
1250746Sgabor/*- 2257814Sgjb * Copyright (c) 1997 Berkeley Software Design, Inc. All rights reserved. 3257814Sgjb * 4250746Sgabor * Redistribution and use in source and binary forms, with or without 5250746Sgabor * modification, are permitted provided that the following conditions 676082Sbmah * are met: 7257814Sgjb * 1. Redistributions of source code must retain the above copyright 8257814Sgjb * notice, this list of conditions and the following disclaimer. 9257814Sgjb * 2. Redistributions in binary form must reproduce the above copyright 10257814Sgjb * notice, this list of conditions and the following disclaimer in the 11257814Sgjb * documentation and/or other materials provided with the distribution. 12257814Sgjb * 3. Berkeley Software Design Inc's name may not be used to endorse or 13257814Sgjb * promote products derived from this software without specific prior 14257814Sgjb * written permission. 15257814Sgjb * 16257814Sgjb * THIS SOFTWARE IS PROVIDED BY BERKELEY SOFTWARE DESIGN INC ``AS IS'' AND 17257814Sgjb * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 1876082Sbmah * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19257814Sgjb * ARE DISCLAIMED. IN NO EVENT SHALL BERKELEY SOFTWARE DESIGN INC BE LIABLE 2081327Sbmah * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 2182666Sbmah * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2281327Sbmah * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2382666Sbmah * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2482666Sbmah * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2582666Sbmah * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 2688820Sbmah * SUCH DAMAGE. 27108829Sbmah * 28130964Sden * from: BSDI: asi.h,v 1.3 1997/08/08 14:31:42 torek 29145265Shrs * $FreeBSD: releng/10.0/sys/sparc64/include/asi.h 207537 2010-05-02 19:38:17Z marius $ 30165592Sbmah */ 31171891Sbmah 32179456Shrs#ifndef _MACHINE_ASI_H_ 33134817Shrs#define _MACHINE_ASI_H_ 3482666Sbmah 35119884Ssimon/* 36257814Sgjb * Standard v9 ASIs 37119884Ssimon */ 38119884Ssimon#define ASI_N 0x4 39119884Ssimon#define ASI_NL 0xc 40119884Ssimon#define ASI_AIUP 0x10 41119884Ssimon#define ASI_AIUS 0x11 42119884Ssimon#define ASI_AIUPL 0x18 4381327Sbmah#define ASI_AIUSL 0x19 4482666Sbmah#define ASI_P 0x80 4582666Sbmah#define ASI_S 0x81 4688959Sbmah#define ASI_PNF 0x82 4788959Sbmah#define ASI_SNF 0x83 4888959Sbmah#define ASI_PL 0x88 4988959Sbmah#define ASI_SL 0x89 5082666Sbmah#define ASI_PNFL 0x8a 51257814Sgjb#define ASI_SNFL 0x8b 5281327Sbmah 53257814Sgjb/* 5482666Sbmah * UltraSPARC extensions - ASIs limited to a certain family are annotated. 5581327Sbmah */ 5682666Sbmah#define ASI_PHYS_USE_EC 0x14 5782666Sbmah#define ASI_PHYS_BYPASS_EC_WITH_EBIT 0x15 5881327Sbmah#define ASI_PHYS_USE_EC_L 0x1c 5982666Sbmah#define ASI_PHYS_BYPASS_EC_WITH_EBIT_L 0x1d 6082666Sbmah 6181327Sbmah#define ASI_NUCLEUS_QUAD_LDD 0x24 6282666Sbmah#define ASI_NUCLEUS_QUAD_LDD_L 0x2c 63171891Sbmah 64171891Sbmah#define ASI_PCACHE_STATUS_DATA 0x30 /* US-III Cu */ 65171891Sbmah#define ASI_PCACHE_DATA 0x31 /* US-III Cu */ 66171891Sbmah#define ASI_PCACHE_TAG 0x32 /* US-III Cu */ 67171891Sbmah#define ASI_PCACHE_SNOOP_TAG 0x33 /* US-III Cu */ 68179456Shrs 69179456Shrs#define ASI_ATOMIC_QUAD_LDD_PHYS 0x34 /* US-III Cu */ 7082666Sbmah 7182666Sbmah#define ASI_WCACHE_VALID_BITS 0x38 /* US-III Cu */ 7282666Sbmah#define ASI_WCACHE_DATA 0x39 /* US-III Cu */ 7382666Sbmah#define ASI_WCACHE_TAG 0x3a /* US-III Cu */ 7481327Sbmah#define ASI_WCACHE_SNOOP_TAG 0x3b /* US-III Cu */ 7582666Sbmah 7682666Sbmah#define ASI_ATOMIC_QUAD_LDD_PHYS_L 0x3c /* US-III Cu */ 7782666Sbmah 7882666Sbmah#define ASI_SRAM_FAST_INIT 0x40 /* US-III Cu */ 7982666Sbmah 8082666Sbmah#define ASI_DCACHE_INVALIDATE 0x42 /* US-III Cu */ 8182666Sbmah#define ASI_DCACHE_UTAG 0x43 /* US-III Cu */ 8281327Sbmah#define ASI_DCACHE_SNOOP_TAG 0x44 /* US-III Cu */ 8382666Sbmah 8482666Sbmah/* Named ASI_DCUCR on US-III, but is mostly identical except for added bits. */ 85114787Sbmah#define ASI_LSU_CTL_REG 0x45 /* US only */ 8682666Sbmah 8782666Sbmah#define ASI_MCNTL 0x45 /* SPARC64 only */ 8882666Sbmah#define AA_MCNTL 0x08 8982666Sbmah 9082666Sbmah#define ASI_DCACHE_DATA 0x46 9182666Sbmah#define ASI_DCACHE_TAG 0x47 92114787Sbmah 9382666Sbmah#define ASI_INTR_DISPATCH_STATUS 0x48 9482666Sbmah#define ASI_INTR_RECEIVE 0x49 9582666Sbmah#define ASI_UPA_CONFIG_REG 0x4a /* US-I, II */ 9682666Sbmah 9782666Sbmah#define ASI_FIREPLANE_CONFIG_REG 0x4a /* US-III{,+}, IV{,+} */ 9882666Sbmah#define AA_FIREPLANE_CONFIG 0x0 /* US-III{,+}, IV{,+} */ 9982666Sbmah#define AA_FIREPLANE_ADDRESS 0x8 /* US-III{,+}, IV{,+} */ 100250746Sgabor#define AA_FIREPLANE_CONFIG_2 0x10 /* US-IV{,+} */ 101134116Shrs 102134116Shrs#define ASI_JBUS_CONFIG_REG 0x4a /* US-IIIi{,+} */ 103134116Shrs 104134116Shrs#define ASI_ESTATE_ERROR_EN_REG 0x4b 105134116Shrs#define AA_ESTATE_CEEN 0x1 106134116Shrs#define AA_ESTATE_NCEEN 0x2 107250746Sgabor#define AA_ESTATE_ISAPEN 0x4 108134116Shrs 109134116Shrs#define ASI_AFSR 0x4c 110134116Shrs#define ASI_AFAR 0x4d 111134116Shrs 112250746Sgabor#define ASI_ECACHE_TAG_DATA 0x4e 113134116Shrs 114134116Shrs#define ASI_IMMU_TAG_TARGET_REG 0x50 115134116Shrs#define ASI_IMMU 0x50 116134116Shrs#define AA_IMMU_TTR 0x0 117134116Shrs#define AA_IMMU_SFSR 0x18 118250746Sgabor#define AA_IMMU_TSB 0x28 11982666Sbmah#define AA_IMMU_TAR 0x30 12082666Sbmah#define AA_IMMU_TSB_PEXT_REG 0x48 /* US-III family */ 12182666Sbmah#define AA_IMMU_TSB_SEXT_REG 0x50 /* US-III family */ 12282666Sbmah#define AA_IMMU_TSB_NEXT_REG 0x58 /* US-III family */ 12382666Sbmah 12481327Sbmah#define ASI_IMMU_TSB_8KB_PTR_REG 0x51 125250746Sgabor#define ASI_IMMU_TSB_64KB_PTR_REG 0x52 12682666Sbmah 12783425Sbmah#define ASI_SERIAL_ID 0x53 /* US-III family */ 12882666Sbmah 12982666Sbmah#define ASI_ITLB_DATA_IN_REG 0x54 130250746Sgabor/* US-III Cu: also ASI_ITLB_CAM_ADDRESS_REG */ 13182666Sbmah#define ASI_ITLB_DATA_ACCESS_REG 0x55 13292482Smurray#define ASI_ITLB_TAG_READ_REG 0x56 13382666Sbmah#define ASI_IMMU_DEMAP 0x57 13482666Sbmah 13582666Sbmah#define ASI_DMMU_TAG_TARGET_REG 0x58 136250746Sgabor#define ASI_DMMU 0x58 13782666Sbmah#define AA_DMMU_TTR 0x0 13882666Sbmah#define AA_DMMU_PCXR 0x8 13982666Sbmah#define AA_DMMU_SCXR 0x10 14082666Sbmah#define AA_DMMU_SFSR 0x18 14182666Sbmah#define AA_DMMU_SFAR 0x20 14281339Sbmah#define AA_DMMU_TSB 0x28 143257814Sgjb#define AA_DMMU_TAR 0x30 14482666Sbmah#define AA_DMMU_VWPR 0x38 14581327Sbmah#define AA_DMMU_PWPR 0x40 14682666Sbmah#define AA_DMMU_TSB_PEXT_REG 0x48 14788959Sbmah#define AA_DMMU_TSB_SEXT_REG 0x50 14882666Sbmah#define AA_DMMU_TSB_NEXT_REG 0x58 14982666Sbmah#define AA_DMMU_TAG_ACCESS_EXT 0x60 /* US-III family */ 15081327Sbmah 15182666Sbmah#define ASI_DMMU_TSB_8KB_PTR_REG 0x59 15282666Sbmah#define ASI_DMMU_TSB_64KB_PTR_REG 0x5a 15381327Sbmah#define ASI_DMMU_TSB_DIRECT_PTR_REG 0x5b 15482666Sbmah#define ASI_DTLB_DATA_IN_REG 0x5c 15582666Sbmah/* US-III Cu: also ASI_DTLB_CAM_ADDRESS_REG */ 15682666Sbmah#define ASI_DTLB_DATA_ACCESS_REG 0x5d 15782666Sbmah#define ASI_DTLB_TAG_READ_REG 0x5e 15882666Sbmah#define ASI_DMMU_DEMAP 0x5f 15982666Sbmah 160171891Sbmah#define ASI_IIU_INST_TRAP 0x60 /* US-III family */ 16181327Sbmah 16282666Sbmah#define ASI_INTR_ID 0x63 /* US-IV{,+} */ 163257814Sgjb#define AA_INTR_ID 0x0 /* US-IV{,+} */ 164257814Sgjb#define AA_CORE_ID 0x10 /* US-IV{,+} */ 16582666Sbmah#define AA_CESR_ID 0x40 /* US-IV{,+} */ 16681327Sbmah 16782666Sbmah#define ASI_ICACHE_INSTR 0x66 16882666Sbmah#define ASI_ICACHE_TAG 0x67 16981327Sbmah#define ASI_ICACHE_SNOOP_TAG 0x68 /* US-III family */ 17082666Sbmah#define ASI_ICACHE_PRE_DECODE 0x6e /* US-I, II */ 171257814Sgjb#define ASI_ICACHE_PRE_NEXT_FIELD 0x6f /* US-I, II */ 17282666Sbmah 17382666Sbmah#define ASI_FLUSH_L1I 0x67 /* SPARC64 only */ 17481327Sbmah 17582666Sbmah#define ASI_BLK_AUIP 0x70 176257814Sgjb#define ASI_BLK_AIUS 0x71 177257814Sgjb 17882666Sbmah#define ASI_MCU_CONFIG_REG 0x72 /* US-III Cu */ 17982666Sbmah#define AA_MCU_TIMING1_REG 0x0 /* US-III Cu */ 18081327Sbmah#define AA_MCU_TIMING2_REG 0x8 /* US-III Cu */ 18182666Sbmah#define AA_MCU_TIMING3_REG 0x10 /* US-III Cu */ 18282666Sbmah#define AA_MCU_TIMING4_REG 0x18 /* US-III Cu */ 18391249Skeramida#define AA_MCU_DEC1_REG 0x20 /* US-III Cu */ 184257814Sgjb#define AA_MCU_DEC2_REG 0x28 /* US-III Cu */ 185257814Sgjb#define AA_MCU_DEC3_REG 0x30 /* US-III Cu */ 18681327Sbmah#define AA_MCU_DEC4_REG 0x38 /* US-III Cu */ 187171891Sbmah#define AA_MCU_ADDR_CNTL_REG 0x40 /* US-III Cu */ 188171891Sbmah 189171891Sbmah#define ASI_ECACHE_DATA 0x74 /* US-III Cu */ 190171891Sbmah#define ASI_ECACHE_CONTROL 0x75 /* US-III Cu */ 191171891Sbmah#define ASI_ECACHE_W 0x76 192171891Sbmah 19382666Sbmah/* 19482666Sbmah * With the advent of the US-III, the numbering has changed, as additional 19581327Sbmah * registers were inserted in between. We retain the original ordering for 196257814Sgjb * now, and append an A to the inserted registers. 19782666Sbmah * Exceptions are AA_SDB_INTR_D6 and AA_SDB_INTR_D7, which were appended 19881327Sbmah * at the end. 19982666Sbmah */ 20082666Sbmah#define ASI_SDB_ERROR_W 0x77 20181327Sbmah#define ASI_SDB_CONTROL_W 0x77 20282666Sbmah#define ASI_SDB_INTR_W 0x77 20382666Sbmah#define AA_SDB_ERR_HIGH 0x0 20481327Sbmah#define AA_SDB_ERR_LOW 0x18 20583425Sbmah#define AA_SDB_CNTL_HIGH 0x20 20682666Sbmah#define AA_SDB_CNTL_LOW 0x38 20782666Sbmah#define AA_SDB_INTR_D0 0x40 20893244Skeramida#define AA_SDB_INTR_D0A 0x48 /* US-III family */ 20981327Sbmah#define AA_SDB_INTR_D1 0x50 21088959Sbmah#define AA_SDB_INTR_D1A 0x5A /* US-III family */ 21188959Sbmah#define AA_SDB_INTR_D2 0x60 21282666Sbmah#define AA_SDB_INTR_D2A 0x68 /* US-III family */ 21382666Sbmah#define AA_INTR_SEND 0x70 21482666Sbmah#define AA_SDB_INTR_D6 0x80 /* US-III family */ 21581327Sbmah#define AA_SDB_INTR_D7 0x88 /* US-III family */ 21682666Sbmah 21788959Sbmah#define ASI_BLK_AIUPL 0x78 21888959Sbmah#define ASI_BLK_AIUSL 0x79 21988959Sbmah 22082666Sbmah#define ASI_ECACHE_R 0x7e 22181327Sbmah 22282666Sbmah/* 223257814Sgjb * These have the same registers as their corresponding write versions 224257814Sgjb * except for AA_INTR_SEND. 22582666Sbmah */ 22682666Sbmah#define ASI_SDB_ERROR_R 0x7f 22782666Sbmah#define ASI_SDB_CONTROL_R 0x7f 228257814Sgjb#define ASI_SDB_INTR_R 0x7f 229257814Sgjb 23081327Sbmah#define ASI_PST8_P 0xc0 23182666Sbmah#define ASI_PST8_S 0xc1 23282666Sbmah#define ASI_PST16_P 0xc2 233114787Sbmah#define ASI_PST16_S 0xc3 23482666Sbmah#define ASI_PST32_P 0xc4 23582666Sbmah#define ASI_PST32_S 0xc5 23682666Sbmah 23781327Sbmah#define ASI_PST8_PL 0xc8 23882666Sbmah#define ASI_PST8_SL 0xc9 23982666Sbmah#define ASI_PST16_PL 0xca 24081327Sbmah#define ASI_PST16_SL 0xcb 24182666Sbmah#define ASI_PST32_PL 0xcc 24288959Sbmah#define ASI_PST32_SL 0xcd 24382666Sbmah 24482666Sbmah#define ASI_FL8_P 0xd0 24581327Sbmah#define ASI_FL8_S 0xd1 24682666Sbmah#define ASI_FL16_P 0xd2 24782666Sbmah#define ASI_FL16_S 0xd3 248114787Sbmah#define ASI_FL8_PL 0xd8 24982666Sbmah#define ASI_FL8_SL 0xd9 25082666Sbmah#define ASI_FL16_PL 0xda 25182666Sbmah#define ASI_FL16_SL 0xdb 252257814Sgjb 253257814Sgjb#define ASI_BLK_COMMIT_P 0xe0 25482666Sbmah#define ASI_BLK_COMMIT_S 0xe1 25582666Sbmah#define ASI_BLK_P 0xf0 25681327Sbmah#define ASI_BLK_S 0xf1 25782666Sbmah#define ASI_BLK_PL 0xf8 25882666Sbmah#define ASI_BLK_SL 0xf9 25982666Sbmah 26082666Sbmah#endif /* !_MACHINE_ASI_H_ */ 26182666Sbmah