180709Sjake/*- 282894Sjake * Copyright (c) 1997 Berkeley Software Design, Inc. All rights reserved. 380709Sjake * 480709Sjake * Redistribution and use in source and binary forms, with or without 580709Sjake * modification, are permitted provided that the following conditions 680709Sjake * are met: 780709Sjake * 1. Redistributions of source code must retain the above copyright 880709Sjake * notice, this list of conditions and the following disclaimer. 980709Sjake * 2. Redistributions in binary form must reproduce the above copyright 1080709Sjake * notice, this list of conditions and the following disclaimer in the 1180709Sjake * documentation and/or other materials provided with the distribution. 1282894Sjake * 3. Berkeley Software Design Inc's name may not be used to endorse or 1382894Sjake * promote products derived from this software without specific prior 1482894Sjake * written permission. 1580709Sjake * 1682894Sjake * THIS SOFTWARE IS PROVIDED BY BERKELEY SOFTWARE DESIGN INC ``AS IS'' AND 1780709Sjake * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 1880709Sjake * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 1982894Sjake * ARE DISCLAIMED. IN NO EVENT SHALL BERKELEY SOFTWARE DESIGN INC BE LIABLE 2080709Sjake * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 2180709Sjake * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2280709Sjake * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2380709Sjake * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2480709Sjake * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2580709Sjake * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 2680709Sjake * SUCH DAMAGE. 2780709Sjake * 2882894Sjake * from: BSDI: asi.h,v 1.3 1997/08/08 14:31:42 torek 2980709Sjake * $FreeBSD$ 3080709Sjake */ 3180709Sjake 3280709Sjake#ifndef _MACHINE_ASI_H_ 3380709Sjake#define _MACHINE_ASI_H_ 3480709Sjake 3580709Sjake/* 36203829Smarius * Standard v9 ASIs 3780709Sjake */ 3880709Sjake#define ASI_N 0x4 3980709Sjake#define ASI_NL 0xc 4080709Sjake#define ASI_AIUP 0x10 4180709Sjake#define ASI_AIUS 0x11 42100180Stmm#define ASI_AIUPL 0x18 4380709Sjake#define ASI_AIUSL 0x19 4480709Sjake#define ASI_P 0x80 4580709Sjake#define ASI_S 0x81 4680709Sjake#define ASI_PNF 0x82 4780709Sjake#define ASI_SNF 0x83 4880709Sjake#define ASI_PL 0x88 49100180Stmm#define ASI_SL 0x89 5080709Sjake#define ASI_PNFL 0x8a 5180709Sjake#define ASI_SNFL 0x8b 5280709Sjake 5380709Sjake/* 54203829Smarius * UltraSPARC extensions - ASIs limited to a certain family are annotated. 5580709Sjake */ 5680709Sjake#define ASI_PHYS_USE_EC 0x14 5780709Sjake#define ASI_PHYS_BYPASS_EC_WITH_EBIT 0x15 5880709Sjake#define ASI_PHYS_USE_EC_L 0x1c 5980709Sjake#define ASI_PHYS_BYPASS_EC_WITH_EBIT_L 0x1d 6080709Sjake 6180709Sjake#define ASI_NUCLEUS_QUAD_LDD 0x24 6280709Sjake#define ASI_NUCLEUS_QUAD_LDD_L 0x2c 6380709Sjake 64100180Stmm#define ASI_PCACHE_STATUS_DATA 0x30 /* US-III Cu */ 65100180Stmm#define ASI_PCACHE_DATA 0x31 /* US-III Cu */ 66100180Stmm#define ASI_PCACHE_TAG 0x32 /* US-III Cu */ 67100180Stmm#define ASI_PCACHE_SNOOP_TAG 0x33 /* US-III Cu */ 68100180Stmm 69100180Stmm#define ASI_ATOMIC_QUAD_LDD_PHYS 0x34 /* US-III Cu */ 70100180Stmm 71100180Stmm#define ASI_WCACHE_VALID_BITS 0x38 /* US-III Cu */ 72100180Stmm#define ASI_WCACHE_DATA 0x39 /* US-III Cu */ 73100180Stmm#define ASI_WCACHE_TAG 0x3a /* US-III Cu */ 74100180Stmm#define ASI_WCACHE_SNOOP_TAG 0x3b /* US-III Cu */ 75100180Stmm 76100180Stmm#define ASI_ATOMIC_QUAD_LDD_PHYS_L 0x3c /* US-III Cu */ 77100180Stmm 78100180Stmm#define ASI_SRAM_FAST_INIT 0x40 /* US-III Cu */ 79100180Stmm 80100180Stmm#define ASI_DCACHE_INVALIDATE 0x42 /* US-III Cu */ 81100180Stmm#define ASI_DCACHE_UTAG 0x43 /* US-III Cu */ 82100180Stmm#define ASI_DCACHE_SNOOP_TAG 0x44 /* US-III Cu */ 83100180Stmm 84100180Stmm/* Named ASI_DCUCR on US-III, but is mostly identical except for added bits. */ 85207537Smarius#define ASI_LSU_CTL_REG 0x45 /* US only */ 8682894Sjake 87207537Smarius#define ASI_MCNTL 0x45 /* SPARC64 only */ 88207537Smarius#define AA_MCNTL 0x08 89207537Smarius 90100180Stmm#define ASI_DCACHE_DATA 0x46 91100180Stmm#define ASI_DCACHE_TAG 0x47 92100180Stmm 9382894Sjake#define ASI_INTR_DISPATCH_STATUS 0x48 9482894Sjake#define ASI_INTR_RECEIVE 0x49 95100180Stmm#define ASI_UPA_CONFIG_REG 0x4a /* US-I, II */ 9682894Sjake 97203829Smarius#define ASI_FIREPLANE_CONFIG_REG 0x4a /* US-III{,+}, IV{,+} */ 98203829Smarius#define AA_FIREPLANE_CONFIG 0x0 /* US-III{,+}, IV{,+} */ 99203829Smarius#define AA_FIREPLANE_ADDRESS 0x8 /* US-III{,+}, IV{,+} */ 100203829Smarius#define AA_FIREPLANE_CONFIG_2 0x10 /* US-IV{,+} */ 101100180Stmm 102203829Smarius#define ASI_JBUS_CONFIG_REG 0x4a /* US-IIIi{,+} */ 103203829Smarius 104100180Stmm#define ASI_ESTATE_ERROR_EN_REG 0x4b 105157239Smarius#define AA_ESTATE_CEEN 0x1 106157239Smarius#define AA_ESTATE_NCEEN 0x2 107157239Smarius#define AA_ESTATE_ISAPEN 0x4 108157239Smarius 109100180Stmm#define ASI_AFSR 0x4c 110100180Stmm#define ASI_AFAR 0x4d 111100180Stmm 112100180Stmm#define ASI_ECACHE_TAG_DATA 0x4e 113100180Stmm 11482894Sjake#define ASI_IMMU_TAG_TARGET_REG 0x50 11580709Sjake#define ASI_IMMU 0x50 11680709Sjake#define AA_IMMU_TTR 0x0 11780709Sjake#define AA_IMMU_SFSR 0x18 11880709Sjake#define AA_IMMU_TSB 0x28 11980709Sjake#define AA_IMMU_TAR 0x30 120100180Stmm#define AA_IMMU_TSB_PEXT_REG 0x48 /* US-III family */ 121100180Stmm#define AA_IMMU_TSB_SEXT_REG 0x50 /* US-III family */ 122100180Stmm#define AA_IMMU_TSB_NEXT_REG 0x58 /* US-III family */ 12380709Sjake 12480709Sjake#define ASI_IMMU_TSB_8KB_PTR_REG 0x51 12580709Sjake#define ASI_IMMU_TSB_64KB_PTR_REG 0x52 126100180Stmm 127100180Stmm#define ASI_SERIAL_ID 0x53 /* US-III family */ 128100180Stmm 12980709Sjake#define ASI_ITLB_DATA_IN_REG 0x54 130100180Stmm/* US-III Cu: also ASI_ITLB_CAM_ADDRESS_REG */ 13180709Sjake#define ASI_ITLB_DATA_ACCESS_REG 0x55 132163151Skmacy#define ASI_ITLB_TAG_READ_REG 0x56 13380709Sjake#define ASI_IMMU_DEMAP 0x57 13480709Sjake 13580709Sjake#define ASI_DMMU_TAG_TARGET_REG 0x58 13680709Sjake#define ASI_DMMU 0x58 13780709Sjake#define AA_DMMU_TTR 0x0 13880709Sjake#define AA_DMMU_PCXR 0x8 13980709Sjake#define AA_DMMU_SCXR 0x10 14080709Sjake#define AA_DMMU_SFSR 0x18 14180709Sjake#define AA_DMMU_SFAR 0x20 14280709Sjake#define AA_DMMU_TSB 0x28 14380709Sjake#define AA_DMMU_TAR 0x30 14480709Sjake#define AA_DMMU_VWPR 0x38 14580709Sjake#define AA_DMMU_PWPR 0x40 146100180Stmm#define AA_DMMU_TSB_PEXT_REG 0x48 147100180Stmm#define AA_DMMU_TSB_SEXT_REG 0x50 148100180Stmm#define AA_DMMU_TSB_NEXT_REG 0x58 149182878Smarius#define AA_DMMU_TAG_ACCESS_EXT 0x60 /* US-III family */ 15080709Sjake 15180709Sjake#define ASI_DMMU_TSB_8KB_PTR_REG 0x59 15280709Sjake#define ASI_DMMU_TSB_64KB_PTR_REG 0x5a 153181701Smarius#define ASI_DMMU_TSB_DIRECT_PTR_REG 0x5b 15480709Sjake#define ASI_DTLB_DATA_IN_REG 0x5c 155100180Stmm/* US-III Cu: also ASI_DTLB_CAM_ADDRESS_REG */ 15680709Sjake#define ASI_DTLB_DATA_ACCESS_REG 0x5d 15780709Sjake#define ASI_DTLB_TAG_READ_REG 0x5e 15880709Sjake#define ASI_DMMU_DEMAP 0x5f 15980709Sjake 160100180Stmm#define ASI_IIU_INST_TRAP 0x60 /* US-III family */ 161100180Stmm 162203829Smarius#define ASI_INTR_ID 0x63 /* US-IV{,+} */ 163203829Smarius#define AA_INTR_ID 0x0 /* US-IV{,+} */ 164203829Smarius#define AA_CORE_ID 0x10 /* US-IV{,+} */ 165203829Smarius#define AA_CESR_ID 0x40 /* US-IV{,+} */ 166203829Smarius 16786226Stmm#define ASI_ICACHE_INSTR 0x66 16886226Stmm#define ASI_ICACHE_TAG 0x67 169100180Stmm#define ASI_ICACHE_SNOOP_TAG 0x68 /* US-III family */ 170100180Stmm#define ASI_ICACHE_PRE_DECODE 0x6e /* US-I, II */ 171100180Stmm#define ASI_ICACHE_PRE_NEXT_FIELD 0x6f /* US-I, II */ 17286226Stmm 173207537Smarius#define ASI_FLUSH_L1I 0x67 /* SPARC64 only */ 174207537Smarius 17581135Stmm#define ASI_BLK_AUIP 0x70 17681135Stmm#define ASI_BLK_AIUS 0x71 17781373Sjake 178100180Stmm#define ASI_MCU_CONFIG_REG 0x72 /* US-III Cu */ 179100180Stmm#define AA_MCU_TIMING1_REG 0x0 /* US-III Cu */ 180100180Stmm#define AA_MCU_TIMING2_REG 0x8 /* US-III Cu */ 181100180Stmm#define AA_MCU_TIMING3_REG 0x10 /* US-III Cu */ 182100180Stmm#define AA_MCU_TIMING4_REG 0x18 /* US-III Cu */ 183100180Stmm#define AA_MCU_DEC1_REG 0x20 /* US-III Cu */ 184100180Stmm#define AA_MCU_DEC2_REG 0x28 /* US-III Cu */ 185100180Stmm#define AA_MCU_DEC3_REG 0x30 /* US-III Cu */ 186100180Stmm#define AA_MCU_DEC4_REG 0x38 /* US-III Cu */ 187100180Stmm#define AA_MCU_ADDR_CNTL_REG 0x40 /* US-III Cu */ 188100180Stmm 189100180Stmm#define ASI_ECACHE_DATA 0x74 /* US-III Cu */ 190100180Stmm#define ASI_ECACHE_CONTROL 0x75 /* US-III Cu */ 19186226Stmm#define ASI_ECACHE_W 0x76 19286226Stmm 193100180Stmm/* 194100180Stmm * With the advent of the US-III, the numbering has changed, as additional 195203829Smarius * registers were inserted in between. We retain the original ordering for 196100180Stmm * now, and append an A to the inserted registers. 197100180Stmm * Exceptions are AA_SDB_INTR_D6 and AA_SDB_INTR_D7, which were appended 198100180Stmm * at the end. 199100180Stmm */ 200157239Smarius#define ASI_SDB_ERROR_W 0x77 201157239Smarius#define ASI_SDB_CONTROL_W 0x77 20281373Sjake#define ASI_SDB_INTR_W 0x77 203157239Smarius#define AA_SDB_ERR_HIGH 0x0 204157239Smarius#define AA_SDB_ERR_LOW 0x18 205157239Smarius#define AA_SDB_CNTL_HIGH 0x20 206157239Smarius#define AA_SDB_CNTL_LOW 0x38 20781373Sjake#define AA_SDB_INTR_D0 0x40 208100180Stmm#define AA_SDB_INTR_D0A 0x48 /* US-III family */ 20981373Sjake#define AA_SDB_INTR_D1 0x50 210100180Stmm#define AA_SDB_INTR_D1A 0x5A /* US-III family */ 21181373Sjake#define AA_SDB_INTR_D2 0x60 212100180Stmm#define AA_SDB_INTR_D2A 0x68 /* US-III family */ 21389031Sjake#define AA_INTR_SEND 0x70 214100180Stmm#define AA_SDB_INTR_D6 0x80 /* US-III family */ 215100180Stmm#define AA_SDB_INTR_D7 0x88 /* US-III family */ 21681373Sjake 21781135Stmm#define ASI_BLK_AIUPL 0x78 21881135Stmm#define ASI_BLK_AIUSL 0x79 21981373Sjake 22086226Stmm#define ASI_ECACHE_R 0x7e 22186226Stmm 222157239Smarius/* 223157239Smarius * These have the same registers as their corresponding write versions 224157239Smarius * except for AA_INTR_SEND. 225157239Smarius */ 226157239Smarius#define ASI_SDB_ERROR_R 0x7f 227157239Smarius#define ASI_SDB_CONTROL_R 0x7f 22881373Sjake#define ASI_SDB_INTR_R 0x7f 22981373Sjake 230100180Stmm#define ASI_PST8_P 0xc0 231100180Stmm#define ASI_PST8_S 0xc1 232100180Stmm#define ASI_PST16_P 0xc2 233100180Stmm#define ASI_PST16_S 0xc3 234100180Stmm#define ASI_PST32_P 0xc4 235100180Stmm#define ASI_PST32_S 0xc5 236100180Stmm 237100180Stmm#define ASI_PST8_PL 0xc8 238100180Stmm#define ASI_PST8_SL 0xc9 239100180Stmm#define ASI_PST16_PL 0xca 240100180Stmm#define ASI_PST16_SL 0xcb 241100180Stmm#define ASI_PST32_PL 0xcc 242100180Stmm#define ASI_PST32_SL 0xcd 243100180Stmm 244100180Stmm#define ASI_FL8_P 0xd0 245100180Stmm#define ASI_FL8_S 0xd1 246100180Stmm#define ASI_FL16_P 0xd2 247100180Stmm#define ASI_FL16_S 0xd3 248100180Stmm#define ASI_FL8_PL 0xd8 249100180Stmm#define ASI_FL8_SL 0xd9 250100180Stmm#define ASI_FL16_PL 0xda 251100180Stmm#define ASI_FL16_SL 0xdb 252100180Stmm 25386226Stmm#define ASI_BLK_COMMIT_P 0xe0 25486226Stmm#define ASI_BLK_COMMIT_S 0xe1 25581135Stmm#define ASI_BLK_P 0xf0 25681135Stmm#define ASI_BLK_S 0xf1 25781135Stmm#define ASI_BLK_PL 0xf8 25881135Stmm#define ASI_BLK_SL 0xf9 25981135Stmm 26080709Sjake#endif /* !_MACHINE_ASI_H_ */ 261