1184299Snwhitehorn/*- 2184299Snwhitehorn * Copyright (C) 2008 Nathan Whitehorn 3184299Snwhitehorn * All rights reserved. 4184299Snwhitehorn * 5184299Snwhitehorn * Redistribution and use in source and binary forms, with or without 6184299Snwhitehorn * modification, are permitted provided that the following conditions 7184299Snwhitehorn * are met: 8184299Snwhitehorn * 1. Redistributions of source code must retain the above copyright 9184299Snwhitehorn * notice, this list of conditions and the following disclaimer. 10184299Snwhitehorn * 2. Redistributions in binary form must reproduce the above copyright 11184299Snwhitehorn * notice, this list of conditions and the following disclaimer in the 12184299Snwhitehorn * documentation and/or other materials provided with the distribution. 13184299Snwhitehorn * 14184299Snwhitehorn * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 15184299Snwhitehorn * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 16184299Snwhitehorn * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 17184299Snwhitehorn * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 18184299Snwhitehorn * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 19184299Snwhitehorn * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 20184299Snwhitehorn * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 21184299Snwhitehorn * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 22184299Snwhitehorn * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 23184299Snwhitehorn * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24184299Snwhitehorn * 25184299Snwhitehorn * $FreeBSD$ 26184299Snwhitehorn */ 27184299Snwhitehorn 28184299Snwhitehorn#ifndef _POWERPC_VIAREG_H_ 29184299Snwhitehorn#define _POWERPC_VIAREG_H_ 30184299Snwhitehorn 31184299Snwhitehorn/* VIA interface registers */ 32184299Snwhitehorn#define vBufB 0x0000 /* register B */ 33184299Snwhitehorn#define vBufA 0x0200 /* register A */ 34184299Snwhitehorn#define vDirB 0x0400 /* data direction register */ 35184299Snwhitehorn#define vDirA 0x0600 /* data direction register */ 36184299Snwhitehorn#define vSR 0x1400 /* shift register */ 37184299Snwhitehorn#define vACR 0x1600 /* aux control register */ 38184299Snwhitehorn#define vPCR 0x1800 /* peripheral control register */ 39184299Snwhitehorn#define vIFR 0x1a00 /* interrupt flag register */ 40184299Snwhitehorn#define vIER 0x1c00 /* interrupt enable register */ 41184299Snwhitehorn 42184299Snwhitehorn#define vPB 0x0000 43184299Snwhitehorn#define vPB3 0x08 44184299Snwhitehorn#define vPB4 0x10 45184299Snwhitehorn#define vPB5 0x20 46184299Snwhitehorn#define vSR_INT 0x04 47184299Snwhitehorn#define vSR_OUT 0x10 48184299Snwhitehorn 49184299Snwhitehorn#endif /* _POWERPC_VIAREG_H_ */ 50