1184299Snwhitehorn/*- 2184299Snwhitehorn * Copyright (c) 2006 Michael Lorenz 3184299Snwhitehorn * Copyright (c) 2008 Nathan Whitehorn 4184299Snwhitehorn * All rights reserved. 5184299Snwhitehorn * 6184299Snwhitehorn * Redistribution and use in source and binary forms, with or without 7184299Snwhitehorn * modification, are permitted provided that the following conditions 8184299Snwhitehorn * are met: 9184299Snwhitehorn * 1. Redistributions of source code must retain the above copyright 10184299Snwhitehorn * notice, this list of conditions and the following disclaimer. 11184299Snwhitehorn * 2. Redistributions in binary form must reproduce the above copyright 12184299Snwhitehorn * notice, this list of conditions and the following disclaimer in the 13184299Snwhitehorn * documentation and/or other materials provided with the distribution. 14184299Snwhitehorn * 15184299Snwhitehorn * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 16184299Snwhitehorn * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 17184299Snwhitehorn * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 18184299Snwhitehorn * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 19184299Snwhitehorn * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20184299Snwhitehorn * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21184299Snwhitehorn * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22184299Snwhitehorn * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23184299Snwhitehorn * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24184299Snwhitehorn * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25184299Snwhitehorn * POSSIBILITY OF SUCH DAMAGE. 26184299Snwhitehorn * 27184299Snwhitehorn * $FreeBSD$ 28184299Snwhitehorn * 29184299Snwhitehorn */ 30184299Snwhitehorn 31184299Snwhitehorn#ifndef PMUVAR_H 32184299Snwhitehorn#define PMUVAR_H 33184299Snwhitehorn 34184299Snwhitehorn/* PMU commands */ 35184299Snwhitehorn#define PMU_POWER_CTRL0 0x10 /* control power of some devices */ 36184299Snwhitehorn#define PMU_POWER_CTRL 0x11 /* control power of some devices */ 37184299Snwhitehorn 38184299Snwhitehorn#define PMU_POWER_OFF 0x7e /* Turn Power off */ 39184299Snwhitehorn#define PMU_RESET_CPU 0xd0 /* Reset CPU */ 40184299Snwhitehorn 41184299Snwhitehorn#define PMU_SET_RTC 0x30 /* Set realtime clock */ 42184299Snwhitehorn#define PMU_READ_RTC 0x38 /* Read realtime clock */ 43184299Snwhitehorn 44184299Snwhitehorn#define PMU_WRITE_PRAM 0x32 /* Write PRAM */ 45184299Snwhitehorn#define PMU_READ_PRAM 0x3a /* Read PRAM */ 46184299Snwhitehorn 47184299Snwhitehorn#define PMU_WRITE_NVRAM 0x33 /* Write NVRAM */ 48184299Snwhitehorn#define PMU_READ_NVRAM 0x3b /* Read NVRAM */ 49184299Snwhitehorn 50184299Snwhitehorn#define PMU_EJECT_PCMCIA 0x4c /* Eject PCMCIA slot */ 51184299Snwhitehorn 52184299Snwhitehorn#define PMU_SET_BRIGHTNESS 0x41 /* Set backlight brightness */ 53184299Snwhitehorn#define PMU_READ_BRIGHTNESS 0xd9 /* Read brightness button position */ 54184299Snwhitehorn 55184299Snwhitehorn#define PMU_POWER_EVENTS 0x8f /* Send power-event commands to PMU */ 56184299Snwhitehorn#define PMU_SYSTEM_READY 0xdf /* tell PMU we are awake */ 57184299Snwhitehorn 58184299Snwhitehorn#define PMU_BATTERY_STATE 0x6b /* Read old battery state */ 59184299Snwhitehorn#define PMU_SMART_BATTERY_STATE 0x6f /* Read battery state */ 60184299Snwhitehorn 61184299Snwhitehorn#define PMU_ADB_CMD 0x20 /* Send ADB packet */ 62184299Snwhitehorn#define PMU_ADB_POLL_OFF 0x21 /* Disable ADB auto-poll */ 63184299Snwhitehorn#define PMU_SET_VOL 0x40 /* Set volume button position */ 64184299Snwhitehorn#define PMU_GET_VOL 0x48 /* Get volume button position */ 65184299Snwhitehorn#define PMU_SET_IMASK 0x70 /* Set interrupt mask */ 66184299Snwhitehorn#define PMU_INT_ACK 0x78 /* Read interrupt bits */ 67184299Snwhitehorn#define PMU_CPU_SPEED 0x7d /* Control CPU speed on some models */ 68184299Snwhitehorn#define PMU_SLEEP 0x7f /* Put CPU to sleep */ 69184299Snwhitehorn#define PMU_SET_POLL_MASK 0x86 /* 70184299Snwhitehorn * 16bit mask enables autopolling per 71184299Snwhitehorn * device 72184299Snwhitehorn */ 73184299Snwhitehorn#define PMU_I2C_CMD 0x9a /* i2c commands */ 74184299Snwhitehorn#define PMU_GET_LID_STATE 0xdc /* Report lid state */ 75184299Snwhitehorn#define PMU_GET_VERSION 0xea /* Identify thyself */ 76185782Snwhitehorn#define PMU_SET_SLEEPLED 0xee /* Set sleep LED on/off */ 77184299Snwhitehorn 78184299Snwhitehorn/* Bits in PMU interrupt and interrupt mask bytes */ 79184299Snwhitehorn#define PMU_INT_ADB_AUTO 0x04 /* ADB autopoll, when PMU_INT_ADB */ 80184299Snwhitehorn#define PMU_INT_PCEJECT 0x04 /* PC-card eject buttons */ 81184299Snwhitehorn#define PMU_INT_SNDBRT 0x08 /* sound/brightness up/down buttons */ 82184299Snwhitehorn#define PMU_INT_ADB 0x10 /* ADB autopoll or reply data */ 83184299Snwhitehorn#define PMU_INT_BATTERY 0x20 84184299Snwhitehorn#define PMU_INT_ENVIRONMENT 0x40 85184299Snwhitehorn#define PMU_INT_TICK 0x80 /* 1-second tick interrupt */ 86184299Snwhitehorn 87184299Snwhitehorn/* Bits to use with the PMU_POWER_CTRL0 command */ 88184299Snwhitehorn#define PMU_POW0_ON 0x80 /* OR this to power ON the device */ 89184299Snwhitehorn#define PMU_POW0_OFF 0x00 /* leave bit 7 to 0 to power it OFF */ 90184299Snwhitehorn#define PMU_POW0_HARD_DRIVE 0x04 /* wallstreet/lombard? */ 91184299Snwhitehorn 92184299Snwhitehorn/* Bits to use with the PMU_POWER_CTRL command */ 93184299Snwhitehorn#define PMU_POW_ON 0x80 /* OR this to power ON the device */ 94184299Snwhitehorn#define PMU_POW_OFF 0x00 /* leave bit 7 to 0 to power it OFF */ 95184299Snwhitehorn#define PMU_POW_BACKLIGHT 0x01 /* backlight power */ 96184299Snwhitehorn#define PMU_POW_CHARGER 0x02 /* battery charger power */ 97184299Snwhitehorn#define PMU_POW_IRLED 0x04 /* IR led power (on wallstreet) */ 98184299Snwhitehorn#define PMU_POW_MEDIABAY 0x08 /* media bay power (wallstreet/lombard ?) */ 99184299Snwhitehorn 100184299Snwhitehorn/* Bits from PMU_GET_LID_STATE or PMU_INT_ENVIRONMENT on core99 */ 101184299Snwhitehorn#define PMU_ENV_LID_CLOSED 0x01 /* The lid is closed */ 102184299Snwhitehorn 103184299Snwhitehorn/* PMU PMU_POWER_EVENTS commands */ 104184299Snwhitehornenum { 105184299Snwhitehorn PMU_PWR_GET_POWERUP_EVENTS = 0x00, 106184299Snwhitehorn PMU_PWR_SET_POWERUP_EVENTS = 0x01, 107184299Snwhitehorn PMU_PWR_CLR_POWERUP_EVENTS = 0x02, 108184299Snwhitehorn PMU_PWR_GET_WAKEUP_EVENTS = 0x03, 109184299Snwhitehorn PMU_PWR_SET_WAKEUP_EVENTS = 0x04, 110184299Snwhitehorn PMU_PWR_CLR_WAKEUP_EVENTS = 0x05, 111184299Snwhitehorn}; 112184299Snwhitehorn 113184299Snwhitehorn/* PMU Power Information */ 114184299Snwhitehorn 115184299Snwhitehorn#define PMU_PWR_AC_PRESENT (1 << 0) 116184299Snwhitehorn#define PMU_PWR_BATT_CHARGING (1 << 1) 117184299Snwhitehorn#define PMU_PWR_BATT_PRESENT (1 << 2) 118184299Snwhitehorn#define PMU_PWR_BATT_FULL (1 << 5) 119184299Snwhitehorn#define PMU_PWR_PCHARGE_RESET (1 << 6) 120184299Snwhitehorn#define PMU_PWR_BATT_EXIST (1 << 7) 121184299Snwhitehorn 122184299Snwhitehorn 123184299Snwhitehorn/* I2C related definitions */ 124184299Snwhitehorn#define PMU_I2C_MODE_SIMPLE 0 125184299Snwhitehorn#define PMU_I2C_MODE_STDSUB 1 126184299Snwhitehorn#define PMU_I2C_MODE_COMBINED 2 127184299Snwhitehorn 128184299Snwhitehorn#define PMU_I2C_BUS_STATUS 0 129184299Snwhitehorn#define PMU_I2C_BUS_SYSCLK 1 130184299Snwhitehorn#define PMU_I2C_BUS_POWER 2 131184299Snwhitehorn 132184299Snwhitehorn#define PMU_I2C_STATUS_OK 0 133184299Snwhitehorn#define PMU_I2C_STATUS_DATAREAD 1 134184299Snwhitehorn#define PMU_I2C_STATUS_BUSY 0xfe 135184299Snwhitehorn 136184299Snwhitehorn/* Power events wakeup bits */ 137184299Snwhitehornenum { 138184299Snwhitehorn PMU_PWR_WAKEUP_KEY = 0x01, /* Wake on key press */ 139184299Snwhitehorn PMU_PWR_WAKEUP_AC_INSERT = 0x02, /* Wake on AC adapter plug */ 140184299Snwhitehorn PMU_PWR_WAKEUP_AC_CHANGE = 0x04, 141184299Snwhitehorn PMU_PWR_WAKEUP_LID_OPEN = 0x08, 142184299Snwhitehorn PMU_PWR_WAKEUP_RING = 0x10, 143184299Snwhitehorn}; 144184299Snwhitehorn 145184299Snwhitehorn#define PMU_NOTREADY 0x1 /* has not been initialized yet */ 146184299Snwhitehorn#define PMU_IDLE 0x2 /* the bus is currently idle */ 147184299Snwhitehorn#define PMU_OUT 0x3 /* sending out a command */ 148184299Snwhitehorn#define PMU_IN 0x4 /* receiving data */ 149184299Snwhitehorn 150184299Snwhitehornstruct pmu_softc { 151184299Snwhitehorn device_t sc_dev; 152184299Snwhitehorn int sc_memrid; 153184299Snwhitehorn struct resource *sc_memr; 154184299Snwhitehorn int sc_irqrid; 155184299Snwhitehorn struct resource *sc_irq; 156184299Snwhitehorn void *sc_ih; 157184299Snwhitehorn 158184299Snwhitehorn struct mtx sc_mutex; 159184299Snwhitehorn device_t adb_bus; 160185754Snwhitehorn volatile int sc_autopoll; 161185754Snwhitehorn int sc_batteries; 162185782Snwhitehorn struct cdev *sc_leddev; 163228270Sjhibbits int lid_closed; 164185754Snwhitehorn}; 165184299Snwhitehorn 166185754Snwhitehornstruct pmu_battstate { 167185754Snwhitehorn int state; 168185754Snwhitehorn 169185754Snwhitehorn int charge; 170185754Snwhitehorn int maxcharge; 171185754Snwhitehorn int current; 172185754Snwhitehorn int voltage; 173184299Snwhitehorn}; 174184299Snwhitehorn 175184299Snwhitehorn#endif /* PMUVAR_H */ 176