mmu_oea.c revision 99038
1/* 2 * Copyright (c) 2001 The NetBSD Foundation, Inc. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to The NetBSD Foundation 6 * by Matt Thomas <matt@3am-software.com> of Allegro Networks, Inc. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the NetBSD 19 * Foundation, Inc. and its contributors. 20 * 4. Neither the name of The NetBSD Foundation nor the names of its 21 * contributors may be used to endorse or promote products derived 22 * from this software without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 26 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * POSSIBILITY OF SUCH DAMAGE. 35 */ 36/* 37 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 38 * Copyright (C) 1995, 1996 TooLs GmbH. 39 * All rights reserved. 40 * 41 * Redistribution and use in source and binary forms, with or without 42 * modification, are permitted provided that the following conditions 43 * are met: 44 * 1. Redistributions of source code must retain the above copyright 45 * notice, this list of conditions and the following disclaimer. 46 * 2. Redistributions in binary form must reproduce the above copyright 47 * notice, this list of conditions and the following disclaimer in the 48 * documentation and/or other materials provided with the distribution. 49 * 3. All advertising materials mentioning features or use of this software 50 * must display the following acknowledgement: 51 * This product includes software developed by TooLs GmbH. 52 * 4. The name of TooLs GmbH may not be used to endorse or promote products 53 * derived from this software without specific prior written permission. 54 * 55 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 56 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 57 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 58 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 59 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 60 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 61 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 62 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 63 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 64 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 65 * 66 * $NetBSD: pmap.c,v 1.28 2000/03/26 20:42:36 kleink Exp $ 67 */ 68/* 69 * Copyright (C) 2001 Benno Rice. 70 * All rights reserved. 71 * 72 * Redistribution and use in source and binary forms, with or without 73 * modification, are permitted provided that the following conditions 74 * are met: 75 * 1. Redistributions of source code must retain the above copyright 76 * notice, this list of conditions and the following disclaimer. 77 * 2. Redistributions in binary form must reproduce the above copyright 78 * notice, this list of conditions and the following disclaimer in the 79 * documentation and/or other materials provided with the distribution. 80 * 81 * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR 82 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 83 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 84 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 85 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 86 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 87 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 88 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 89 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 90 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 91 */ 92 93#ifndef lint 94static const char rcsid[] = 95 "$FreeBSD: head/sys/powerpc/aim/mmu_oea.c 99038 2002-06-29 09:45:59Z benno $"; 96#endif /* not lint */ 97 98/* 99 * Manages physical address maps. 100 * 101 * In addition to hardware address maps, this module is called upon to 102 * provide software-use-only maps which may or may not be stored in the 103 * same form as hardware maps. These pseudo-maps are used to store 104 * intermediate results from copy operations to and from address spaces. 105 * 106 * Since the information managed by this module is also stored by the 107 * logical address mapping module, this module may throw away valid virtual 108 * to physical mappings at almost any time. However, invalidations of 109 * mappings must be done as requested. 110 * 111 * In order to cope with hardware architectures which make virtual to 112 * physical map invalidates expensive, this module may delay invalidate 113 * reduced protection operations until such time as they are actually 114 * necessary. This module is given full information as to which processors 115 * are currently using which maps, and to when physical maps must be made 116 * correct. 117 */ 118 119#include <sys/param.h> 120#include <sys/kernel.h> 121#include <sys/ktr.h> 122#include <sys/lock.h> 123#include <sys/msgbuf.h> 124#include <sys/mutex.h> 125#include <sys/proc.h> 126#include <sys/sysctl.h> 127#include <sys/systm.h> 128#include <sys/vmmeter.h> 129 130#include <dev/ofw/openfirm.h> 131 132#include <vm/vm.h> 133#include <vm/vm_param.h> 134#include <vm/vm_kern.h> 135#include <vm/vm_page.h> 136#include <vm/vm_map.h> 137#include <vm/vm_object.h> 138#include <vm/vm_extern.h> 139#include <vm/vm_pageout.h> 140#include <vm/vm_pager.h> 141#include <vm/uma.h> 142 143#include <machine/powerpc.h> 144#include <machine/bat.h> 145#include <machine/frame.h> 146#include <machine/md_var.h> 147#include <machine/psl.h> 148#include <machine/pte.h> 149#include <machine/sr.h> 150 151#define PMAP_DEBUG 152 153#define TODO panic("%s: not implemented", __func__); 154 155#define PMAP_LOCK(pm) 156#define PMAP_UNLOCK(pm) 157 158#define TLBIE(va) __asm __volatile("tlbie %0" :: "r"(va)) 159#define TLBSYNC() __asm __volatile("tlbsync"); 160#define SYNC() __asm __volatile("sync"); 161#define EIEIO() __asm __volatile("eieio"); 162 163#define VSID_MAKE(sr, hash) ((sr) | (((hash) & 0xfffff) << 4)) 164#define VSID_TO_SR(vsid) ((vsid) & 0xf) 165#define VSID_TO_HASH(vsid) (((vsid) >> 4) & 0xfffff) 166 167#define PVO_PTEGIDX_MASK 0x0007 /* which PTEG slot */ 168#define PVO_PTEGIDX_VALID 0x0008 /* slot is valid */ 169#define PVO_WIRED 0x0010 /* PVO entry is wired */ 170#define PVO_MANAGED 0x0020 /* PVO entry is managed */ 171#define PVO_EXECUTABLE 0x0040 /* PVO entry is executable */ 172#define PVO_BOOTSTRAP 0x0080 /* PVO entry allocated during 173 bootstrap */ 174#define PVO_VADDR(pvo) ((pvo)->pvo_vaddr & ~ADDR_POFF) 175#define PVO_ISEXECUTABLE(pvo) ((pvo)->pvo_vaddr & PVO_EXECUTABLE) 176#define PVO_PTEGIDX_GET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_MASK) 177#define PVO_PTEGIDX_ISSET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_VALID) 178#define PVO_PTEGIDX_CLR(pvo) \ 179 ((void)((pvo)->pvo_vaddr &= ~(PVO_PTEGIDX_VALID|PVO_PTEGIDX_MASK))) 180#define PVO_PTEGIDX_SET(pvo, i) \ 181 ((void)((pvo)->pvo_vaddr |= (i)|PVO_PTEGIDX_VALID)) 182 183#define PMAP_PVO_CHECK(pvo) 184 185struct ofw_map { 186 vm_offset_t om_va; 187 vm_size_t om_len; 188 vm_offset_t om_pa; 189 u_int om_mode; 190}; 191 192int pmap_bootstrapped = 0; 193 194/* 195 * Virtual and physical address of message buffer. 196 */ 197struct msgbuf *msgbufp; 198vm_offset_t msgbuf_phys; 199 200/* 201 * Physical addresses of first and last available physical page. 202 */ 203vm_offset_t avail_start; 204vm_offset_t avail_end; 205 206/* 207 * Map of physical memory regions. 208 */ 209vm_offset_t phys_avail[128]; 210u_int phys_avail_count; 211static struct mem_region *regions; 212static struct mem_region *pregions; 213int regions_sz, pregions_sz; 214static struct ofw_map translations[128]; 215static int translations_size; 216 217/* 218 * First and last available kernel virtual addresses. 219 */ 220vm_offset_t virtual_avail; 221vm_offset_t virtual_end; 222vm_offset_t kernel_vm_end; 223 224/* 225 * Kernel pmap. 226 */ 227struct pmap kernel_pmap_store; 228extern struct pmap ofw_pmap; 229 230/* 231 * PTEG data. 232 */ 233static struct pteg *pmap_pteg_table; 234u_int pmap_pteg_count; 235u_int pmap_pteg_mask; 236 237/* 238 * PVO data. 239 */ 240struct pvo_head *pmap_pvo_table; /* pvo entries by pteg index */ 241struct pvo_head pmap_pvo_kunmanaged = 242 LIST_HEAD_INITIALIZER(pmap_pvo_kunmanaged); /* list of unmanaged pages */ 243struct pvo_head pmap_pvo_unmanaged = 244 LIST_HEAD_INITIALIZER(pmap_pvo_unmanaged); /* list of unmanaged pages */ 245 246uma_zone_t pmap_upvo_zone; /* zone for pvo entries for unmanaged pages */ 247uma_zone_t pmap_mpvo_zone; /* zone for pvo entries for managed pages */ 248struct vm_object pmap_upvo_zone_obj; 249struct vm_object pmap_mpvo_zone_obj; 250static vm_object_t pmap_pvo_obj; 251static u_int pmap_pvo_count; 252 253#define BPVO_POOL_SIZE 32768 254static struct pvo_entry *pmap_bpvo_pool; 255static int pmap_bpvo_pool_index = 0; 256 257#define VSID_NBPW (sizeof(u_int32_t) * 8) 258static u_int pmap_vsid_bitmap[NPMAPS / VSID_NBPW]; 259 260static boolean_t pmap_initialized = FALSE; 261 262/* 263 * Statistics. 264 */ 265u_int pmap_pte_valid = 0; 266u_int pmap_pte_overflow = 0; 267u_int pmap_pte_replacements = 0; 268u_int pmap_pvo_entries = 0; 269u_int pmap_pvo_enter_calls = 0; 270u_int pmap_pvo_remove_calls = 0; 271u_int pmap_pte_spills = 0; 272SYSCTL_INT(_machdep, OID_AUTO, pmap_pte_valid, CTLFLAG_RD, &pmap_pte_valid, 273 0, ""); 274SYSCTL_INT(_machdep, OID_AUTO, pmap_pte_overflow, CTLFLAG_RD, 275 &pmap_pte_overflow, 0, ""); 276SYSCTL_INT(_machdep, OID_AUTO, pmap_pte_replacements, CTLFLAG_RD, 277 &pmap_pte_replacements, 0, ""); 278SYSCTL_INT(_machdep, OID_AUTO, pmap_pvo_entries, CTLFLAG_RD, &pmap_pvo_entries, 279 0, ""); 280SYSCTL_INT(_machdep, OID_AUTO, pmap_pvo_enter_calls, CTLFLAG_RD, 281 &pmap_pvo_enter_calls, 0, ""); 282SYSCTL_INT(_machdep, OID_AUTO, pmap_pvo_remove_calls, CTLFLAG_RD, 283 &pmap_pvo_remove_calls, 0, ""); 284SYSCTL_INT(_machdep, OID_AUTO, pmap_pte_spills, CTLFLAG_RD, 285 &pmap_pte_spills, 0, ""); 286 287struct pvo_entry *pmap_pvo_zeropage; 288 289vm_offset_t pmap_rkva_start = VM_MIN_KERNEL_ADDRESS; 290u_int pmap_rkva_count = 4; 291 292/* 293 * Allocate physical memory for use in pmap_bootstrap. 294 */ 295static vm_offset_t pmap_bootstrap_alloc(vm_size_t, u_int); 296 297/* 298 * PTE calls. 299 */ 300static int pmap_pte_insert(u_int, struct pte *); 301 302/* 303 * PVO calls. 304 */ 305static int pmap_pvo_enter(pmap_t, uma_zone_t, struct pvo_head *, 306 vm_offset_t, vm_offset_t, u_int, int); 307static void pmap_pvo_remove(struct pvo_entry *, int); 308static struct pvo_entry *pmap_pvo_find_va(pmap_t, vm_offset_t, int *); 309static struct pte *pmap_pvo_to_pte(const struct pvo_entry *, int); 310 311/* 312 * Utility routines. 313 */ 314static void * pmap_pvo_allocf(uma_zone_t, int, u_int8_t *, int); 315static struct pvo_entry *pmap_rkva_alloc(void); 316static void pmap_pa_map(struct pvo_entry *, vm_offset_t, 317 struct pte *, int *); 318static void pmap_pa_unmap(struct pvo_entry *, struct pte *, int *); 319static void pmap_syncicache(vm_offset_t, vm_size_t); 320static boolean_t pmap_query_bit(vm_page_t, int); 321static boolean_t pmap_clear_bit(vm_page_t, int); 322static void tlbia(void); 323 324static __inline int 325va_to_sr(u_int *sr, vm_offset_t va) 326{ 327 return (sr[(uintptr_t)va >> ADDR_SR_SHFT]); 328} 329 330static __inline u_int 331va_to_pteg(u_int sr, vm_offset_t addr) 332{ 333 u_int hash; 334 335 hash = (sr & SR_VSID_MASK) ^ (((u_int)addr & ADDR_PIDX) >> 336 ADDR_PIDX_SHFT); 337 return (hash & pmap_pteg_mask); 338} 339 340static __inline struct pvo_head * 341pa_to_pvoh(vm_offset_t pa, vm_page_t *pg_p) 342{ 343 struct vm_page *pg; 344 345 pg = PHYS_TO_VM_PAGE(pa); 346 347 if (pg_p != NULL) 348 *pg_p = pg; 349 350 if (pg == NULL) 351 return (&pmap_pvo_unmanaged); 352 353 return (&pg->md.mdpg_pvoh); 354} 355 356static __inline struct pvo_head * 357vm_page_to_pvoh(vm_page_t m) 358{ 359 360 return (&m->md.mdpg_pvoh); 361} 362 363static __inline void 364pmap_attr_clear(vm_page_t m, int ptebit) 365{ 366 367 m->md.mdpg_attrs &= ~ptebit; 368} 369 370static __inline int 371pmap_attr_fetch(vm_page_t m) 372{ 373 374 return (m->md.mdpg_attrs); 375} 376 377static __inline void 378pmap_attr_save(vm_page_t m, int ptebit) 379{ 380 381 m->md.mdpg_attrs |= ptebit; 382} 383 384static __inline int 385pmap_pte_compare(const struct pte *pt, const struct pte *pvo_pt) 386{ 387 if (pt->pte_hi == pvo_pt->pte_hi) 388 return (1); 389 390 return (0); 391} 392 393static __inline int 394pmap_pte_match(struct pte *pt, u_int sr, vm_offset_t va, int which) 395{ 396 return (pt->pte_hi & ~PTE_VALID) == 397 (((sr & SR_VSID_MASK) << PTE_VSID_SHFT) | 398 ((va >> ADDR_API_SHFT) & PTE_API) | which); 399} 400 401static __inline void 402pmap_pte_create(struct pte *pt, u_int sr, vm_offset_t va, u_int pte_lo) 403{ 404 /* 405 * Construct a PTE. Default to IMB initially. Valid bit only gets 406 * set when the real pte is set in memory. 407 * 408 * Note: Don't set the valid bit for correct operation of tlb update. 409 */ 410 pt->pte_hi = ((sr & SR_VSID_MASK) << PTE_VSID_SHFT) | 411 (((va & ADDR_PIDX) >> ADDR_API_SHFT) & PTE_API); 412 pt->pte_lo = pte_lo; 413} 414 415static __inline void 416pmap_pte_synch(struct pte *pt, struct pte *pvo_pt) 417{ 418 419 pvo_pt->pte_lo |= pt->pte_lo & (PTE_REF | PTE_CHG); 420} 421 422static __inline void 423pmap_pte_clear(struct pte *pt, vm_offset_t va, int ptebit) 424{ 425 426 /* 427 * As shown in Section 7.6.3.2.3 428 */ 429 pt->pte_lo &= ~ptebit; 430 TLBIE(va); 431 EIEIO(); 432 TLBSYNC(); 433 SYNC(); 434} 435 436static __inline void 437pmap_pte_set(struct pte *pt, struct pte *pvo_pt) 438{ 439 440 pvo_pt->pte_hi |= PTE_VALID; 441 442 /* 443 * Update the PTE as defined in section 7.6.3.1. 444 * Note that the REF/CHG bits are from pvo_pt and thus should havce 445 * been saved so this routine can restore them (if desired). 446 */ 447 pt->pte_lo = pvo_pt->pte_lo; 448 EIEIO(); 449 pt->pte_hi = pvo_pt->pte_hi; 450 SYNC(); 451 pmap_pte_valid++; 452} 453 454static __inline void 455pmap_pte_unset(struct pte *pt, struct pte *pvo_pt, vm_offset_t va) 456{ 457 458 pvo_pt->pte_hi &= ~PTE_VALID; 459 460 /* 461 * Force the reg & chg bits back into the PTEs. 462 */ 463 SYNC(); 464 465 /* 466 * Invalidate the pte. 467 */ 468 pt->pte_hi &= ~PTE_VALID; 469 470 SYNC(); 471 TLBIE(va); 472 EIEIO(); 473 TLBSYNC(); 474 SYNC(); 475 476 /* 477 * Save the reg & chg bits. 478 */ 479 pmap_pte_synch(pt, pvo_pt); 480 pmap_pte_valid--; 481} 482 483static __inline void 484pmap_pte_change(struct pte *pt, struct pte *pvo_pt, vm_offset_t va) 485{ 486 487 /* 488 * Invalidate the PTE 489 */ 490 pmap_pte_unset(pt, pvo_pt, va); 491 pmap_pte_set(pt, pvo_pt); 492} 493 494/* 495 * Quick sort callout for comparing memory regions. 496 */ 497static int mr_cmp(const void *a, const void *b); 498static int om_cmp(const void *a, const void *b); 499 500static int 501mr_cmp(const void *a, const void *b) 502{ 503 const struct mem_region *regiona; 504 const struct mem_region *regionb; 505 506 regiona = a; 507 regionb = b; 508 if (regiona->mr_start < regionb->mr_start) 509 return (-1); 510 else if (regiona->mr_start > regionb->mr_start) 511 return (1); 512 else 513 return (0); 514} 515 516static int 517om_cmp(const void *a, const void *b) 518{ 519 const struct ofw_map *mapa; 520 const struct ofw_map *mapb; 521 522 mapa = a; 523 mapb = b; 524 if (mapa->om_pa < mapb->om_pa) 525 return (-1); 526 else if (mapa->om_pa > mapb->om_pa) 527 return (1); 528 else 529 return (0); 530} 531 532void 533pmap_bootstrap(vm_offset_t kernelstart, vm_offset_t kernelend) 534{ 535 ihandle_t mmui; 536 phandle_t chosen, mmu; 537 int sz; 538 int i, j; 539 vm_size_t size, physsz; 540 vm_offset_t pa, va, off; 541 u_int batl, batu; 542 543 /* 544 * Set up BAT0 to only map the lowest 256 MB area 545 */ 546 battable[0x0].batl = BATL(0x00000000, BAT_M, BAT_PP_RW); 547 battable[0x0].batu = BATU(0x00000000, BAT_BL_256M, BAT_Vs); 548 549 /* 550 * Map PCI memory space. 551 */ 552 battable[0x8].batl = BATL(0x80000000, BAT_I|BAT_G, BAT_PP_RW); 553 battable[0x8].batu = BATU(0x80000000, BAT_BL_256M, BAT_Vs); 554 555 battable[0x9].batl = BATL(0x90000000, BAT_I|BAT_G, BAT_PP_RW); 556 battable[0x9].batu = BATU(0x90000000, BAT_BL_256M, BAT_Vs); 557 558 battable[0xa].batl = BATL(0xa0000000, BAT_I|BAT_G, BAT_PP_RW); 559 battable[0xa].batu = BATU(0xa0000000, BAT_BL_256M, BAT_Vs); 560 561 battable[0xb].batl = BATL(0xb0000000, BAT_I|BAT_G, BAT_PP_RW); 562 battable[0xb].batu = BATU(0xb0000000, BAT_BL_256M, BAT_Vs); 563 564 /* 565 * Map obio devices. 566 */ 567 battable[0xf].batl = BATL(0xf0000000, BAT_I|BAT_G, BAT_PP_RW); 568 battable[0xf].batu = BATU(0xf0000000, BAT_BL_256M, BAT_Vs); 569 570 /* 571 * Use an IBAT and a DBAT to map the bottom segment of memory 572 * where we are. 573 */ 574 batu = BATU(0x00000000, BAT_BL_256M, BAT_Vs); 575 batl = BATL(0x00000000, BAT_M, BAT_PP_RW); 576 __asm ("mtibatu 0,%0; mtibatl 0,%1; mtdbatu 0,%0; mtdbatl 0,%1" 577 :: "r"(batu), "r"(batl)); 578 579#if 0 580 /* map frame buffer */ 581 batu = BATU(0x90000000, BAT_BL_256M, BAT_Vs); 582 batl = BATL(0x90000000, BAT_I|BAT_G, BAT_PP_RW); 583 __asm ("mtdbatu 1,%0; mtdbatl 1,%1" 584 :: "r"(batu), "r"(batl)); 585#endif 586 587#if 1 588 /* map pci space */ 589 batu = BATU(0x80000000, BAT_BL_256M, BAT_Vs); 590 batl = BATL(0x80000000, BAT_I|BAT_G, BAT_PP_RW); 591 __asm ("mtdbatu 1,%0; mtdbatl 1,%1" 592 :: "r"(batu), "r"(batl)); 593#endif 594 595 /* 596 * Set the start and end of kva. 597 */ 598 virtual_avail = VM_MIN_KERNEL_ADDRESS; 599 virtual_end = VM_MAX_KERNEL_ADDRESS; 600 601 mem_regions(&pregions, &pregions_sz, ®ions, ®ions_sz); 602 CTR0(KTR_PMAP, "pmap_bootstrap: physical memory"); 603 604 qsort(pregions, pregions_sz, sizeof(*pregions), mr_cmp); 605 for (i = 0; i < pregions_sz; i++) { 606 CTR3(KTR_PMAP, "physregion: %#x - %#x (%#x)", 607 pregions[i].mr_start, 608 pregions[i].mr_start + pregions[i].mr_size, 609 pregions[i].mr_size); 610 } 611 612 if (sizeof(phys_avail)/sizeof(phys_avail[0]) < regions_sz) 613 panic("pmap_bootstrap: phys_avail too small"); 614 qsort(regions, regions_sz, sizeof(*regions), mr_cmp); 615 phys_avail_count = 0; 616 physsz = 0; 617 for (i = 0, j = 0; i < regions_sz; i++, j += 2) { 618 CTR3(KTR_PMAP, "region: %#x - %#x (%#x)", regions[i].mr_start, 619 regions[i].mr_start + regions[i].mr_size, 620 regions[i].mr_size); 621 phys_avail[j] = regions[i].mr_start; 622 phys_avail[j + 1] = regions[i].mr_start + regions[i].mr_size; 623 phys_avail_count++; 624 physsz += regions[i].mr_size; 625 } 626 physmem = btoc(physsz); 627 628 /* 629 * Allocate PTEG table. 630 */ 631#ifdef PTEGCOUNT 632 pmap_pteg_count = PTEGCOUNT; 633#else 634 pmap_pteg_count = 0x1000; 635 636 while (pmap_pteg_count < physmem) 637 pmap_pteg_count <<= 1; 638 639 pmap_pteg_count >>= 1; 640#endif /* PTEGCOUNT */ 641 642 size = pmap_pteg_count * sizeof(struct pteg); 643 CTR2(KTR_PMAP, "pmap_bootstrap: %d PTEGs, %d bytes", pmap_pteg_count, 644 size); 645 pmap_pteg_table = (struct pteg *)pmap_bootstrap_alloc(size, size); 646 CTR1(KTR_PMAP, "pmap_bootstrap: PTEG table at %p", pmap_pteg_table); 647 bzero((void *)pmap_pteg_table, pmap_pteg_count * sizeof(struct pteg)); 648 pmap_pteg_mask = pmap_pteg_count - 1; 649 650 /* 651 * Allocate pv/overflow lists. 652 */ 653 size = sizeof(struct pvo_head) * pmap_pteg_count; 654 pmap_pvo_table = (struct pvo_head *)pmap_bootstrap_alloc(size, 655 PAGE_SIZE); 656 CTR1(KTR_PMAP, "pmap_bootstrap: PVO table at %p", pmap_pvo_table); 657 for (i = 0; i < pmap_pteg_count; i++) 658 LIST_INIT(&pmap_pvo_table[i]); 659 660 /* 661 * Allocate the message buffer. 662 */ 663 msgbuf_phys = pmap_bootstrap_alloc(MSGBUF_SIZE, 0); 664 665 /* 666 * Initialise the unmanaged pvo pool. 667 */ 668 pmap_bpvo_pool = (struct pvo_entry *)pmap_bootstrap_alloc( 669 BPVO_POOL_SIZE*sizeof(struct pvo_entry), 0); 670 pmap_bpvo_pool_index = 0; 671 672 /* 673 * Make sure kernel vsid is allocated as well as VSID 0. 674 */ 675 pmap_vsid_bitmap[(KERNEL_VSIDBITS & (NPMAPS - 1)) / VSID_NBPW] 676 |= 1 << (KERNEL_VSIDBITS % VSID_NBPW); 677 pmap_vsid_bitmap[0] |= 1; 678 679 /* 680 * Set up the OpenFirmware pmap and add it's mappings. 681 */ 682 pmap_pinit(&ofw_pmap); 683 ofw_pmap.pm_sr[KERNEL_SR] = KERNEL_SEGMENT; 684 if ((chosen = OF_finddevice("/chosen")) == -1) 685 panic("pmap_bootstrap: can't find /chosen"); 686 OF_getprop(chosen, "mmu", &mmui, 4); 687 if ((mmu = OF_instance_to_package(mmui)) == -1) 688 panic("pmap_bootstrap: can't get mmu package"); 689 if ((sz = OF_getproplen(mmu, "translations")) == -1) 690 panic("pmap_bootstrap: can't get ofw translation count"); 691 if (sizeof(translations) < sz) 692 panic("pmap_bootstrap: translations too small"); 693 bzero(translations, sz); 694 if (OF_getprop(mmu, "translations", translations, sz) == -1) 695 panic("pmap_bootstrap: can't get ofw translations"); 696 CTR0(KTR_PMAP, "pmap_bootstrap: translations"); 697 sz /= sizeof(*translations); 698 qsort(translations, sz, sizeof (*translations), om_cmp); 699 for (i = 0; i < sz; i++) { 700 CTR3(KTR_PMAP, "translation: pa=%#x va=%#x len=%#x", 701 translations[i].om_pa, translations[i].om_va, 702 translations[i].om_len); 703 704 /* Drop stuff below something? */ 705 706 /* Enter the pages? */ 707 for (off = 0; off < translations[i].om_len; off += PAGE_SIZE) { 708 struct vm_page m; 709 710 m.phys_addr = translations[i].om_pa + off; 711 pmap_enter(&ofw_pmap, translations[i].om_va + off, &m, 712 VM_PROT_ALL, 1); 713 } 714 } 715#ifdef SMP 716 TLBSYNC(); 717#endif 718 719 /* 720 * Initialize the kernel pmap (which is statically allocated). 721 */ 722 for (i = 0; i < 16; i++) { 723 kernel_pmap->pm_sr[i] = EMPTY_SEGMENT; 724 } 725 kernel_pmap->pm_sr[KERNEL_SR] = KERNEL_SEGMENT; 726 kernel_pmap->pm_active = ~0; 727 728 /* 729 * Allocate a kernel stack with a guard page for thread0 and map it 730 * into the kernel page map. 731 */ 732 pa = pmap_bootstrap_alloc(KSTACK_PAGES * PAGE_SIZE, 0); 733 kstack0_phys = pa; 734 kstack0 = virtual_avail + (KSTACK_GUARD_PAGES * PAGE_SIZE); 735 CTR2(KTR_PMAP, "pmap_bootstrap: kstack0 at %#x (%#x)", kstack0_phys, 736 kstack0); 737 virtual_avail += (KSTACK_PAGES + KSTACK_GUARD_PAGES) * PAGE_SIZE; 738 for (i = 0; i < KSTACK_PAGES; i++) { 739 pa = kstack0_phys + i * PAGE_SIZE; 740 va = kstack0 + i * PAGE_SIZE; 741 pmap_kenter(va, pa); 742 TLBIE(va); 743 } 744 745 /* 746 * Calculate the first and last available physical addresses. 747 */ 748 avail_start = phys_avail[0]; 749 for (i = 0; phys_avail[i + 2] != 0; i += 2) 750 ; 751 avail_end = phys_avail[i + 1]; 752 Maxmem = powerpc_btop(avail_end); 753 754 /* 755 * Allocate virtual address space for the message buffer. 756 */ 757 msgbufp = (struct msgbuf *)virtual_avail; 758 virtual_avail += round_page(MSGBUF_SIZE); 759 760 /* 761 * Initialize hardware. 762 */ 763 for (i = 0; i < 16; i++) { 764 mtsrin(i << ADDR_SR_SHFT, EMPTY_SEGMENT); 765 } 766 __asm __volatile ("mtsr %0,%1" 767 :: "n"(KERNEL_SR), "r"(KERNEL_SEGMENT)); 768 __asm __volatile ("sync; mtsdr1 %0; isync" 769 :: "r"((u_int)pmap_pteg_table | (pmap_pteg_mask >> 10))); 770 tlbia(); 771 772 pmap_bootstrapped++; 773} 774 775/* 776 * Activate a user pmap. The pmap must be activated before it's address 777 * space can be accessed in any way. 778 */ 779void 780pmap_activate(struct thread *td) 781{ 782 pmap_t pm, pmr; 783 784 /* 785 * Load all the data we need up front to encourasge the compiler to 786 * not issue any loads while we have interrupts disabled below. 787 */ 788 pm = &td->td_proc->p_vmspace->vm_pmap; 789 790 KASSERT(pm->pm_active == 0, ("pmap_activate: pmap already active?")); 791 792 if ((pmr = (pmap_t)pmap_kextract((vm_offset_t)pm)) == NULL) 793 pmr = pm; 794 795 pm->pm_active |= PCPU_GET(cpumask); 796 PCPU_SET(curpmap, pmr); 797} 798 799void 800pmap_deactivate(struct thread *td) 801{ 802 pmap_t pm; 803 804 pm = &td->td_proc->p_vmspace->vm_pmap; 805 pm->pm_active &= ~(PCPU_GET(cpumask)); 806 PCPU_SET(curpmap, NULL); 807} 808 809vm_offset_t 810pmap_addr_hint(vm_object_t object, vm_offset_t va, vm_size_t size) 811{ 812 813 return (va); 814} 815 816void 817pmap_change_wiring(pmap_t pm, vm_offset_t va, boolean_t wired) 818{ 819 struct pvo_entry *pvo; 820 821 pvo = pmap_pvo_find_va(pm, va & ~ADDR_POFF, NULL); 822 823 if (pvo != NULL) { 824 if (wired) { 825 if ((pvo->pvo_vaddr & PVO_WIRED) == 0) 826 pm->pm_stats.wired_count++; 827 pvo->pvo_vaddr |= PVO_WIRED; 828 } else { 829 if ((pvo->pvo_vaddr & PVO_WIRED) != 0) 830 pm->pm_stats.wired_count--; 831 pvo->pvo_vaddr &= ~PVO_WIRED; 832 } 833 } 834} 835 836void 837pmap_clear_modify(vm_page_t m) 838{ 839 840 if (m->flags * PG_FICTITIOUS) 841 return; 842 pmap_clear_bit(m, PTE_CHG); 843} 844 845void 846pmap_collect(void) 847{ 848 TODO; 849} 850 851void 852pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, 853 vm_size_t len, vm_offset_t src_addr) 854{ 855 856 /* 857 * This is not needed as it's mainly an optimisation. 858 * It may want to be implemented later though. 859 */ 860} 861 862void 863pmap_copy_page(vm_page_t msrc, vm_page_t mdst) 864{ 865 vm_offset_t dst; 866 vm_offset_t src; 867 868 dst = VM_PAGE_TO_PHYS(mdst); 869 src = VM_PAGE_TO_PHYS(msrc); 870 871 kcopy((void *)src, (void *)dst, PAGE_SIZE); 872} 873 874/* 875 * Zero a page of physical memory by temporarily mapping it into the tlb. 876 */ 877void 878pmap_zero_page(vm_page_t m) 879{ 880 vm_offset_t pa = VM_PAGE_TO_PHYS(m); 881 caddr_t va; 882 int i; 883 884 if (pa < SEGMENT_LENGTH) { 885 va = (caddr_t) pa; 886 } else if (pmap_initialized) { 887 if (pmap_pvo_zeropage == NULL) 888 pmap_pvo_zeropage = pmap_rkva_alloc(); 889 pmap_pa_map(pmap_pvo_zeropage, pa, NULL, NULL); 890 va = (caddr_t)PVO_VADDR(pmap_pvo_zeropage); 891 } else { 892 panic("pmap_zero_page: can't zero pa %#x", pa); 893 } 894 895 bzero(va, PAGE_SIZE); 896 897 for (i = PAGE_SIZE / CACHELINESIZE; i > 0; i--) { 898 __asm __volatile("dcbz 0,%0" :: "r"(va)); 899 va += CACHELINESIZE; 900 } 901 902 if (pa >= SEGMENT_LENGTH) 903 pmap_pa_unmap(pmap_pvo_zeropage, NULL, NULL); 904} 905 906void 907pmap_zero_page_area(vm_page_t m, int off, int size) 908{ 909 TODO; 910} 911 912/* 913 * Map the given physical page at the specified virtual address in the 914 * target pmap with the protection requested. If specified the page 915 * will be wired down. 916 */ 917void 918pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot, 919 boolean_t wired) 920{ 921 struct pvo_head *pvo_head; 922 uma_zone_t zone; 923 vm_page_t pg; 924 u_int pte_lo, pvo_flags, was_exec, i; 925 int error; 926 927 if (!pmap_initialized) { 928 pvo_head = &pmap_pvo_kunmanaged; 929 zone = pmap_upvo_zone; 930 pvo_flags = 0; 931 pg = NULL; 932 was_exec = PTE_EXEC; 933 } else { 934 pvo_head = pa_to_pvoh(VM_PAGE_TO_PHYS(m), &pg); 935 zone = pmap_mpvo_zone; 936 pvo_flags = PVO_MANAGED; 937 was_exec = 0; 938 } 939 940 /* 941 * If this is a managed page, and it's the first reference to the page, 942 * clear the execness of the page. Otherwise fetch the execness. 943 */ 944 if (pg != NULL) { 945 if (LIST_EMPTY(pvo_head)) { 946 pmap_attr_clear(pg, PTE_EXEC); 947 } else { 948 was_exec = pmap_attr_fetch(pg) & PTE_EXEC; 949 } 950 } 951 952 953 /* 954 * Assume the page is cache inhibited and access is guarded unless 955 * it's in our available memory array. 956 */ 957 pte_lo = PTE_I | PTE_G; 958 for (i = 0; i < pregions_sz; i++) { 959 if ((VM_PAGE_TO_PHYS(m) >= pregions[i].mr_start) && 960 (VM_PAGE_TO_PHYS(m) < 961 (pregions[i].mr_start + pregions[i].mr_size))) { 962 pte_lo &= ~(PTE_I | PTE_G); 963 break; 964 } 965 } 966 967 if (prot & VM_PROT_WRITE) 968 pte_lo |= PTE_BW; 969 else 970 pte_lo |= PTE_BR; 971 972 pvo_flags |= (prot & VM_PROT_EXECUTE); 973 974 if (wired) 975 pvo_flags |= PVO_WIRED; 976 977 error = pmap_pvo_enter(pmap, zone, pvo_head, va, VM_PAGE_TO_PHYS(m), 978 pte_lo, pvo_flags); 979 980 /* 981 * Flush the real page from the instruction cache if this page is 982 * mapped executable and cacheable and was not previously mapped (or 983 * was not mapped executable). 984 */ 985 if (error == 0 && (pvo_flags & PVO_EXECUTABLE) && 986 (pte_lo & PTE_I) == 0 && was_exec == 0) { 987 /* 988 * Flush the real memory from the cache. 989 */ 990 pmap_syncicache(VM_PAGE_TO_PHYS(m), PAGE_SIZE); 991 if (pg != NULL) 992 pmap_attr_save(pg, PTE_EXEC); 993 } 994} 995 996vm_offset_t 997pmap_extract(pmap_t pm, vm_offset_t va) 998{ 999 struct pvo_entry *pvo; 1000 1001 pvo = pmap_pvo_find_va(pm, va & ~ADDR_POFF, NULL); 1002 1003 if (pvo != NULL) { 1004 return ((pvo->pvo_pte.pte_lo & PTE_RPGN) | (va & ADDR_POFF)); 1005 } 1006 1007 return (0); 1008} 1009 1010/* 1011 * Grow the number of kernel page table entries. Unneeded. 1012 */ 1013void 1014pmap_growkernel(vm_offset_t addr) 1015{ 1016} 1017 1018void 1019pmap_init(vm_offset_t phys_start, vm_offset_t phys_end) 1020{ 1021 1022 CTR0(KTR_PMAP, "pmap_init"); 1023 1024 pmap_pvo_obj = vm_object_allocate(OBJT_PHYS, 16); 1025 pmap_pvo_count = 0; 1026 pmap_upvo_zone = uma_zcreate("UPVO entry", sizeof (struct pvo_entry), 1027 NULL, NULL, NULL, NULL, UMA_ALIGN_PTR, UMA_ZONE_VM); 1028 uma_zone_set_allocf(pmap_upvo_zone, pmap_pvo_allocf); 1029 pmap_mpvo_zone = uma_zcreate("MPVO entry", sizeof(struct pvo_entry), 1030 NULL, NULL, NULL, NULL, UMA_ALIGN_PTR, UMA_ZONE_VM); 1031 uma_zone_set_allocf(pmap_mpvo_zone, pmap_pvo_allocf); 1032 pmap_initialized = TRUE; 1033} 1034 1035void 1036pmap_init2(void) 1037{ 1038 1039 CTR0(KTR_PMAP, "pmap_init2"); 1040} 1041 1042boolean_t 1043pmap_is_modified(vm_page_t m) 1044{ 1045 1046 if (m->flags & PG_FICTITIOUS) 1047 return (FALSE); 1048 1049 return (pmap_query_bit(m, PTE_CHG)); 1050} 1051 1052void 1053pmap_clear_reference(vm_page_t m) 1054{ 1055 TODO; 1056} 1057 1058/* 1059 * pmap_ts_referenced: 1060 * 1061 * Return a count of reference bits for a page, clearing those bits. 1062 * It is not necessary for every reference bit to be cleared, but it 1063 * is necessary that 0 only be returned when there are truly no 1064 * reference bits set. 1065 * 1066 * XXX: The exact number of bits to check and clear is a matter that 1067 * should be tested and standardized at some point in the future for 1068 * optimal aging of shared pages. 1069 */ 1070 1071int 1072pmap_ts_referenced(vm_page_t m) 1073{ 1074 TODO; 1075 return (0); 1076} 1077 1078/* 1079 * Map a wired page into kernel virtual address space. 1080 */ 1081void 1082pmap_kenter(vm_offset_t va, vm_offset_t pa) 1083{ 1084 u_int pte_lo; 1085 int error; 1086 int i; 1087 1088#if 0 1089 if (va < VM_MIN_KERNEL_ADDRESS) 1090 panic("pmap_kenter: attempt to enter non-kernel address %#x", 1091 va); 1092#endif 1093 1094 pte_lo = PTE_I | PTE_G | PTE_BW; 1095 for (i = 0; phys_avail[i + 2] != 0; i += 2) { 1096 if (pa >= phys_avail[i] && pa < phys_avail[i + 1]) { 1097 pte_lo &= ~(PTE_I | PTE_G); 1098 break; 1099 } 1100 } 1101 1102 error = pmap_pvo_enter(kernel_pmap, pmap_upvo_zone, 1103 &pmap_pvo_kunmanaged, va, pa, pte_lo, PVO_WIRED); 1104 1105 if (error != 0 && error != ENOENT) 1106 panic("pmap_kenter: failed to enter va %#x pa %#x: %d", va, 1107 pa, error); 1108 1109 /* 1110 * Flush the real memory from the instruction cache. 1111 */ 1112 if ((pte_lo & (PTE_I | PTE_G)) == 0) { 1113 pmap_syncicache(pa, PAGE_SIZE); 1114 } 1115} 1116 1117/* 1118 * Extract the physical page address associated with the given kernel virtual 1119 * address. 1120 */ 1121vm_offset_t 1122pmap_kextract(vm_offset_t va) 1123{ 1124 struct pvo_entry *pvo; 1125 1126 pvo = pmap_pvo_find_va(kernel_pmap, va & ~ADDR_POFF, NULL); 1127 if (pvo == NULL) { 1128 return (0); 1129 } 1130 1131 return ((pvo->pvo_pte.pte_lo & PTE_RPGN) | (va & ADDR_POFF)); 1132} 1133 1134/* 1135 * Remove a wired page from kernel virtual address space. 1136 */ 1137void 1138pmap_kremove(vm_offset_t va) 1139{ 1140 1141 pmap_remove(kernel_pmap, va, roundup(va, PAGE_SIZE)); 1142} 1143 1144/* 1145 * Map a range of physical addresses into kernel virtual address space. 1146 * 1147 * The value passed in *virt is a suggested virtual address for the mapping. 1148 * Architectures which can support a direct-mapped physical to virtual region 1149 * can return the appropriate address within that region, leaving '*virt' 1150 * unchanged. We cannot and therefore do not; *virt is updated with the 1151 * first usable address after the mapped region. 1152 */ 1153vm_offset_t 1154pmap_map(vm_offset_t *virt, vm_offset_t pa_start, vm_offset_t pa_end, int prot) 1155{ 1156 vm_offset_t sva, va; 1157 1158 sva = *virt; 1159 va = sva; 1160 for (; pa_start < pa_end; pa_start += PAGE_SIZE, va += PAGE_SIZE) 1161 pmap_kenter(va, pa_start); 1162 *virt = va; 1163 return (sva); 1164} 1165 1166int 1167pmap_mincore(pmap_t pmap, vm_offset_t addr) 1168{ 1169 TODO; 1170 return (0); 1171} 1172 1173/* 1174 * Create the uarea for a new process. 1175 * This routine directly affects the fork perf for a process. 1176 */ 1177void 1178pmap_new_proc(struct proc *p) 1179{ 1180 vm_object_t upobj; 1181 vm_offset_t up; 1182 vm_page_t m; 1183 u_int i; 1184 1185 /* 1186 * Allocate the object for the upages. 1187 */ 1188 upobj = p->p_upages_obj; 1189 if (upobj == NULL) { 1190 upobj = vm_object_allocate(OBJT_DEFAULT, UAREA_PAGES); 1191 p->p_upages_obj = upobj; 1192 } 1193 1194 /* 1195 * Get a kernel virtual address for the uarea for this process. 1196 */ 1197 up = (vm_offset_t)p->p_uarea; 1198 if (up == 0) { 1199 up = kmem_alloc_nofault(kernel_map, UAREA_PAGES * PAGE_SIZE); 1200 if (up == 0) 1201 panic("pmap_new_proc: upage allocation failed"); 1202 p->p_uarea = (struct user *)up; 1203 } 1204 1205 for (i = 0; i < UAREA_PAGES; i++) { 1206 /* 1207 * Get a uarea page. 1208 */ 1209 m = vm_page_grab(upobj, i, VM_ALLOC_NORMAL | VM_ALLOC_RETRY); 1210 1211 /* 1212 * Wire the page. 1213 */ 1214 m->wire_count++; 1215 1216 /* 1217 * Enter the page into the kernel address space. 1218 */ 1219 pmap_kenter(up + i * PAGE_SIZE, VM_PAGE_TO_PHYS(m)); 1220 1221 vm_page_wakeup(m); 1222 vm_page_flag_clear(m, PG_ZERO); 1223 vm_page_flag_set(m, PG_MAPPED | PG_WRITEABLE); 1224 m->valid = VM_PAGE_BITS_ALL; 1225 } 1226} 1227 1228void 1229pmap_object_init_pt(pmap_t pm, vm_offset_t addr, vm_object_t object, 1230 vm_pindex_t pindex, vm_size_t size, int limit) 1231{ 1232 1233 KASSERT(pm == &curproc->p_vmspace->vm_pmap || pm == kernel_pmap, 1234 ("pmap_remove_pages: non current pmap")); 1235 /* XXX */ 1236} 1237 1238/* 1239 * Lower the permission for all mappings to a given page. 1240 */ 1241void 1242pmap_page_protect(vm_page_t m, vm_prot_t prot) 1243{ 1244 struct pvo_head *pvo_head; 1245 struct pvo_entry *pvo, *next_pvo; 1246 struct pte *pt; 1247 1248 /* 1249 * Since the routine only downgrades protection, if the 1250 * maximal protection is desired, there isn't any change 1251 * to be made. 1252 */ 1253 if ((prot & (VM_PROT_READ|VM_PROT_WRITE)) == 1254 (VM_PROT_READ|VM_PROT_WRITE)) 1255 return; 1256 1257 pvo_head = vm_page_to_pvoh(m); 1258 for (pvo = LIST_FIRST(pvo_head); pvo != NULL; pvo = next_pvo) { 1259 next_pvo = LIST_NEXT(pvo, pvo_vlink); 1260 PMAP_PVO_CHECK(pvo); /* sanity check */ 1261 1262 /* 1263 * Downgrading to no mapping at all, we just remove the entry. 1264 */ 1265 if ((prot & VM_PROT_READ) == 0) { 1266 pmap_pvo_remove(pvo, -1); 1267 continue; 1268 } 1269 1270 /* 1271 * If EXEC permission is being revoked, just clear the flag 1272 * in the PVO. 1273 */ 1274 if ((prot & VM_PROT_EXECUTE) == 0) 1275 pvo->pvo_vaddr &= ~PVO_EXECUTABLE; 1276 1277 /* 1278 * If this entry is already RO, don't diddle with the page 1279 * table. 1280 */ 1281 if ((pvo->pvo_pte.pte_lo & PTE_PP) == PTE_BR) { 1282 PMAP_PVO_CHECK(pvo); 1283 continue; 1284 } 1285 1286 /* 1287 * Grab the PTE before we diddle the bits so pvo_to_pte can 1288 * verify the pte contents are as expected. 1289 */ 1290 pt = pmap_pvo_to_pte(pvo, -1); 1291 pvo->pvo_pte.pte_lo &= ~PTE_PP; 1292 pvo->pvo_pte.pte_lo |= PTE_BR; 1293 if (pt != NULL) 1294 pmap_pte_change(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1295 PMAP_PVO_CHECK(pvo); /* sanity check */ 1296 } 1297} 1298 1299/* 1300 * Make the specified page pageable (or not). Unneeded. 1301 */ 1302void 1303pmap_pageable(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, 1304 boolean_t pageable) 1305{ 1306} 1307 1308/* 1309 * Returns true if the pmap's pv is one of the first 1310 * 16 pvs linked to from this page. This count may 1311 * be changed upwards or downwards in the future; it 1312 * is only necessary that true be returned for a small 1313 * subset of pmaps for proper page aging. 1314 */ 1315boolean_t 1316pmap_page_exists_quick(pmap_t pmap, vm_page_t m) 1317{ 1318 TODO; 1319 return (0); 1320} 1321 1322static u_int pmap_vsidcontext; 1323 1324void 1325pmap_pinit(pmap_t pmap) 1326{ 1327 int i, mask; 1328 u_int entropy; 1329 1330 entropy = 0; 1331 __asm __volatile("mftb %0" : "=r"(entropy)); 1332 1333 /* 1334 * Allocate some segment registers for this pmap. 1335 */ 1336 for (i = 0; i < NPMAPS; i += VSID_NBPW) { 1337 u_int hash, n; 1338 1339 /* 1340 * Create a new value by mutiplying by a prime and adding in 1341 * entropy from the timebase register. This is to make the 1342 * VSID more random so that the PT hash function collides 1343 * less often. (Note that the prime casues gcc to do shifts 1344 * instead of a multiply.) 1345 */ 1346 pmap_vsidcontext = (pmap_vsidcontext * 0x1105) + entropy; 1347 hash = pmap_vsidcontext & (NPMAPS - 1); 1348 if (hash == 0) /* 0 is special, avoid it */ 1349 continue; 1350 n = hash >> 5; 1351 mask = 1 << (hash & (VSID_NBPW - 1)); 1352 hash = (pmap_vsidcontext & 0xfffff); 1353 if (pmap_vsid_bitmap[n] & mask) { /* collision? */ 1354 /* anything free in this bucket? */ 1355 if (pmap_vsid_bitmap[n] == 0xffffffff) { 1356 entropy = (pmap_vsidcontext >> 20); 1357 continue; 1358 } 1359 i = ffs(~pmap_vsid_bitmap[i]) - 1; 1360 mask = 1 << i; 1361 hash &= 0xfffff & ~(VSID_NBPW - 1); 1362 hash |= i; 1363 } 1364 pmap_vsid_bitmap[n] |= mask; 1365 for (i = 0; i < 16; i++) 1366 pmap->pm_sr[i] = VSID_MAKE(i, hash); 1367 return; 1368 } 1369 1370 panic("pmap_pinit: out of segments"); 1371} 1372 1373/* 1374 * Initialize the pmap associated with process 0. 1375 */ 1376void 1377pmap_pinit0(pmap_t pm) 1378{ 1379 1380 pmap_pinit(pm); 1381 bzero(&pm->pm_stats, sizeof(pm->pm_stats)); 1382} 1383 1384void 1385pmap_pinit2(pmap_t pmap) 1386{ 1387 /* XXX: Remove this stub when no longer called */ 1388} 1389 1390void 1391pmap_prefault(pmap_t pm, vm_offset_t va, vm_map_entry_t entry) 1392{ 1393 KASSERT(pm == &curproc->p_vmspace->vm_pmap || pm == kernel_pmap, 1394 ("pmap_prefault: non current pmap")); 1395 /* XXX */ 1396} 1397 1398/* 1399 * Set the physical protection on the specified range of this map as requested. 1400 */ 1401void 1402pmap_protect(pmap_t pm, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot) 1403{ 1404 struct pvo_entry *pvo; 1405 struct pte *pt; 1406 int pteidx; 1407 1408 CTR4(KTR_PMAP, "pmap_protect: pm=%p sva=%#x eva=%#x prot=%#x", pm, sva, 1409 eva, prot); 1410 1411 1412 KASSERT(pm == &curproc->p_vmspace->vm_pmap || pm == kernel_pmap, 1413 ("pmap_protect: non current pmap")); 1414 1415 if ((prot & VM_PROT_READ) == VM_PROT_NONE) { 1416 pmap_remove(pm, sva, eva); 1417 return; 1418 } 1419 1420 for (; sva < eva; sva += PAGE_SIZE) { 1421 pvo = pmap_pvo_find_va(pm, sva, &pteidx); 1422 if (pvo == NULL) 1423 continue; 1424 1425 if ((prot & VM_PROT_EXECUTE) == 0) 1426 pvo->pvo_vaddr &= ~PVO_EXECUTABLE; 1427 1428 /* 1429 * Grab the PTE pointer before we diddle with the cached PTE 1430 * copy. 1431 */ 1432 pt = pmap_pvo_to_pte(pvo, pteidx); 1433 /* 1434 * Change the protection of the page. 1435 */ 1436 pvo->pvo_pte.pte_lo &= ~PTE_PP; 1437 pvo->pvo_pte.pte_lo |= PTE_BR; 1438 1439 /* 1440 * If the PVO is in the page table, update that pte as well. 1441 */ 1442 if (pt != NULL) 1443 pmap_pte_change(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1444 } 1445} 1446 1447vm_offset_t 1448pmap_phys_address(int ppn) 1449{ 1450 TODO; 1451 return (0); 1452} 1453 1454/* 1455 * Map a list of wired pages into kernel virtual address space. This is 1456 * intended for temporary mappings which do not need page modification or 1457 * references recorded. Existing mappings in the region are overwritten. 1458 */ 1459void 1460pmap_qenter(vm_offset_t va, vm_page_t *m, int count) 1461{ 1462 int i; 1463 1464 for (i = 0; i < count; i++, va += PAGE_SIZE) 1465 pmap_kenter(va, VM_PAGE_TO_PHYS(m[i])); 1466} 1467 1468/* 1469 * Remove page mappings from kernel virtual address space. Intended for 1470 * temporary mappings entered by pmap_qenter. 1471 */ 1472void 1473pmap_qremove(vm_offset_t va, int count) 1474{ 1475 int i; 1476 1477 for (i = 0; i < count; i++, va += PAGE_SIZE) 1478 pmap_kremove(va); 1479} 1480 1481void 1482pmap_release(pmap_t pmap) 1483{ 1484 TODO; 1485} 1486 1487/* 1488 * Remove the given range of addresses from the specified map. 1489 */ 1490void 1491pmap_remove(pmap_t pm, vm_offset_t sva, vm_offset_t eva) 1492{ 1493 struct pvo_entry *pvo; 1494 int pteidx; 1495 1496 for (; sva < eva; sva += PAGE_SIZE) { 1497 pvo = pmap_pvo_find_va(pm, sva, &pteidx); 1498 if (pvo != NULL) { 1499 pmap_pvo_remove(pvo, pteidx); 1500 } 1501 } 1502} 1503 1504/* 1505 * Remove all pages from specified address space, this aids process exit 1506 * speeds. This is much faster than pmap_remove in the case of running down 1507 * an entire address space. Only works for the current pmap. 1508 */ 1509void 1510pmap_remove_pages(pmap_t pm, vm_offset_t sva, vm_offset_t eva) 1511{ 1512 1513 KASSERT(pm == &curproc->p_vmspace->vm_pmap || pm == kernel_pmap, 1514 ("pmap_remove_pages: non current pmap")); 1515 pmap_remove(pm, sva, eva); 1516} 1517 1518void 1519pmap_swapin_proc(struct proc *p) 1520{ 1521 TODO; 1522} 1523 1524void 1525pmap_swapout_proc(struct proc *p) 1526{ 1527 TODO; 1528} 1529 1530/* 1531 * Create the kernel stack and pcb for a new thread. 1532 * This routine directly affects the fork perf for a process and 1533 * create performance for a thread. 1534 */ 1535void 1536pmap_new_thread(struct thread *td) 1537{ 1538 vm_object_t ksobj; 1539 vm_offset_t ks; 1540 vm_page_t m; 1541 u_int i; 1542 1543 /* 1544 * Allocate object for the kstack. 1545 */ 1546 ksobj = td->td_kstack_obj; 1547 if (ksobj == NULL) { 1548 ksobj = vm_object_allocate(OBJT_DEFAULT, KSTACK_PAGES); 1549 td->td_kstack_obj = ksobj; 1550 } 1551 1552 /* 1553 * Get a kernel virtual address for the kstack for this thread. 1554 */ 1555 ks = td->td_kstack; 1556 if (ks == 0) { 1557 ks = kmem_alloc_nofault(kernel_map, 1558 (KSTACK_PAGES + KSTACK_GUARD_PAGES) * PAGE_SIZE); 1559 if (ks == 0) 1560 panic("pmap_new_thread: kstack allocation failed"); 1561 TLBIE(ks); 1562 ks += KSTACK_GUARD_PAGES * PAGE_SIZE; 1563 td->td_kstack = ks; 1564 } 1565 1566 for (i = 0; i < KSTACK_PAGES; i++) { 1567 /* 1568 * Get a kernel stack page. 1569 */ 1570 m = vm_page_grab(ksobj, i, VM_ALLOC_NORMAL | VM_ALLOC_RETRY); 1571 1572 /* 1573 * Wire the page. 1574 */ 1575 m->wire_count++; 1576 1577 /* 1578 * Enter the page into the kernel address space. 1579 */ 1580 pmap_kenter(ks + i * PAGE_SIZE, VM_PAGE_TO_PHYS(m)); 1581 1582 vm_page_wakeup(m); 1583 vm_page_flag_clear(m, PG_ZERO); 1584 vm_page_flag_set(m, PG_MAPPED | PG_WRITEABLE); 1585 m->valid = VM_PAGE_BITS_ALL; 1586 } 1587} 1588 1589void 1590pmap_dispose_proc(struct proc *p) 1591{ 1592 TODO; 1593} 1594 1595void 1596pmap_dispose_thread(struct thread *td) 1597{ 1598 TODO; 1599} 1600 1601void 1602pmap_swapin_thread(struct thread *td) 1603{ 1604 TODO; 1605} 1606 1607void 1608pmap_swapout_thread(struct thread *td) 1609{ 1610 TODO; 1611} 1612 1613/* 1614 * Allocate a physical page of memory directly from the phys_avail map. 1615 * Can only be called from pmap_bootstrap before avail start and end are 1616 * calculated. 1617 */ 1618static vm_offset_t 1619pmap_bootstrap_alloc(vm_size_t size, u_int align) 1620{ 1621 vm_offset_t s, e; 1622 int i, j; 1623 1624 size = round_page(size); 1625 for (i = 0; phys_avail[i + 1] != 0; i += 2) { 1626 if (align != 0) 1627 s = (phys_avail[i] + align - 1) & ~(align - 1); 1628 else 1629 s = phys_avail[i]; 1630 e = s + size; 1631 1632 if (s < phys_avail[i] || e > phys_avail[i + 1]) 1633 continue; 1634 1635 if (s == phys_avail[i]) { 1636 phys_avail[i] += size; 1637 } else if (e == phys_avail[i + 1]) { 1638 phys_avail[i + 1] -= size; 1639 } else { 1640 for (j = phys_avail_count * 2; j > i; j -= 2) { 1641 phys_avail[j] = phys_avail[j - 2]; 1642 phys_avail[j + 1] = phys_avail[j - 1]; 1643 } 1644 1645 phys_avail[i + 3] = phys_avail[i + 1]; 1646 phys_avail[i + 1] = s; 1647 phys_avail[i + 2] = e; 1648 phys_avail_count++; 1649 } 1650 1651 return (s); 1652 } 1653 panic("pmap_bootstrap_alloc: could not allocate memory"); 1654} 1655 1656/* 1657 * Return an unmapped pvo for a kernel virtual address. 1658 * Used by pmap functions that operate on physical pages. 1659 */ 1660static struct pvo_entry * 1661pmap_rkva_alloc(void) 1662{ 1663 struct pvo_entry *pvo; 1664 struct pte *pt; 1665 vm_offset_t kva; 1666 int pteidx; 1667 1668 if (pmap_rkva_count == 0) 1669 panic("pmap_rkva_alloc: no more reserved KVAs"); 1670 1671 kva = pmap_rkva_start + (PAGE_SIZE * --pmap_rkva_count); 1672 pmap_kenter(kva, 0); 1673 1674 pvo = pmap_pvo_find_va(kernel_pmap, kva, &pteidx); 1675 1676 if (pvo == NULL) 1677 panic("pmap_kva_alloc: pmap_pvo_find_va failed"); 1678 1679 pt = pmap_pvo_to_pte(pvo, pteidx); 1680 1681 if (pt == NULL) 1682 panic("pmap_kva_alloc: pmap_pvo_to_pte failed"); 1683 1684 pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1685 PVO_PTEGIDX_CLR(pvo); 1686 1687 pmap_pte_overflow++; 1688 1689 return (pvo); 1690} 1691 1692static void 1693pmap_pa_map(struct pvo_entry *pvo, vm_offset_t pa, struct pte *saved_pt, 1694 int *depth_p) 1695{ 1696 struct pte *pt; 1697 1698 /* 1699 * If this pvo already has a valid pte, we need to save it so it can 1700 * be restored later. We then just reload the new PTE over the old 1701 * slot. 1702 */ 1703 if (saved_pt != NULL) { 1704 pt = pmap_pvo_to_pte(pvo, -1); 1705 1706 if (pt != NULL) { 1707 pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1708 PVO_PTEGIDX_CLR(pvo); 1709 pmap_pte_overflow++; 1710 } 1711 1712 *saved_pt = pvo->pvo_pte; 1713 1714 pvo->pvo_pte.pte_lo &= ~PTE_RPGN; 1715 } 1716 1717 pvo->pvo_pte.pte_lo |= pa; 1718 1719 if (!pmap_pte_spill(pvo->pvo_vaddr)) 1720 panic("pmap_pa_map: could not spill pvo %p", pvo); 1721 1722 if (depth_p != NULL) 1723 (*depth_p)++; 1724} 1725 1726static void 1727pmap_pa_unmap(struct pvo_entry *pvo, struct pte *saved_pt, int *depth_p) 1728{ 1729 struct pte *pt; 1730 1731 pt = pmap_pvo_to_pte(pvo, -1); 1732 1733 if (pt != NULL) { 1734 pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1735 PVO_PTEGIDX_CLR(pvo); 1736 pmap_pte_overflow++; 1737 } 1738 1739 pvo->pvo_pte.pte_lo &= ~PTE_RPGN; 1740 1741 /* 1742 * If there is a saved PTE and it's valid, restore it and return. 1743 */ 1744 if (saved_pt != NULL && (saved_pt->pte_lo & PTE_RPGN) != 0) { 1745 if (depth_p != NULL && --(*depth_p) == 0) 1746 panic("pmap_pa_unmap: restoring but depth == 0"); 1747 1748 pvo->pvo_pte = *saved_pt; 1749 1750 if (!pmap_pte_spill(pvo->pvo_vaddr)) 1751 panic("pmap_pa_unmap: could not spill pvo %p", pvo); 1752 } 1753} 1754 1755static void 1756pmap_syncicache(vm_offset_t pa, vm_size_t len) 1757{ 1758 __syncicache((void *)pa, len); 1759} 1760 1761static void 1762tlbia(void) 1763{ 1764 caddr_t i; 1765 1766 SYNC(); 1767 for (i = 0; i < (caddr_t)0x00040000; i += 0x00001000) { 1768 TLBIE(i); 1769 EIEIO(); 1770 } 1771 TLBSYNC(); 1772 SYNC(); 1773} 1774 1775static int 1776pmap_pvo_enter(pmap_t pm, uma_zone_t zone, struct pvo_head *pvo_head, 1777 vm_offset_t va, vm_offset_t pa, u_int pte_lo, int flags) 1778{ 1779 struct pvo_entry *pvo; 1780 u_int sr; 1781 int first; 1782 u_int ptegidx; 1783 int i; 1784 1785 pmap_pvo_enter_calls++; 1786 first = 0; 1787 1788 /* 1789 * Compute the PTE Group index. 1790 */ 1791 va &= ~ADDR_POFF; 1792 sr = va_to_sr(pm->pm_sr, va); 1793 ptegidx = va_to_pteg(sr, va); 1794 1795 /* 1796 * Remove any existing mapping for this page. Reuse the pvo entry if 1797 * there is a mapping. 1798 */ 1799 LIST_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 1800 if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) { 1801 if ((pvo->pvo_pte.pte_lo & PTE_RPGN) == pa && 1802 (pvo->pvo_pte.pte_lo & PTE_PP) == 1803 (pte_lo & PTE_PP)) { 1804 return (0); 1805 } 1806 pmap_pvo_remove(pvo, -1); 1807 break; 1808 } 1809 } 1810 1811 /* 1812 * If we aren't overwriting a mapping, try to allocate. 1813 */ 1814 if (pmap_initialized) { 1815 pvo = uma_zalloc(zone, M_NOWAIT); 1816 } else { 1817 if (pmap_bpvo_pool_index >= BPVO_POOL_SIZE) { 1818 panic("pmap_enter: bpvo pool exhausted, %d, %d, %d", 1819 pmap_bpvo_pool_index, BPVO_POOL_SIZE, 1820 BPVO_POOL_SIZE * sizeof(struct pvo_entry)); 1821 } 1822 pvo = &pmap_bpvo_pool[pmap_bpvo_pool_index]; 1823 pmap_bpvo_pool_index++; 1824 pvo->pvo_vaddr |= PVO_BOOTSTRAP; 1825 } 1826 1827 if (pvo == NULL) { 1828 return (ENOMEM); 1829 } 1830 1831 pmap_pvo_entries++; 1832 pvo->pvo_vaddr = va; 1833 pvo->pvo_pmap = pm; 1834 LIST_INSERT_HEAD(&pmap_pvo_table[ptegidx], pvo, pvo_olink); 1835 pvo->pvo_vaddr &= ~ADDR_POFF; 1836 if (flags & VM_PROT_EXECUTE) 1837 pvo->pvo_vaddr |= PVO_EXECUTABLE; 1838 if (flags & PVO_WIRED) 1839 pvo->pvo_vaddr |= PVO_WIRED; 1840 if (pvo_head != &pmap_pvo_kunmanaged) 1841 pvo->pvo_vaddr |= PVO_MANAGED; 1842 pmap_pte_create(&pvo->pvo_pte, sr, va, pa | pte_lo); 1843 1844 /* 1845 * Remember if the list was empty and therefore will be the first 1846 * item. 1847 */ 1848 if (LIST_FIRST(pvo_head) == NULL) 1849 first = 1; 1850 1851 LIST_INSERT_HEAD(pvo_head, pvo, pvo_vlink); 1852 if (pvo->pvo_pte.pte_lo & PVO_WIRED) 1853 pvo->pvo_pmap->pm_stats.wired_count++; 1854 pvo->pvo_pmap->pm_stats.resident_count++; 1855 1856 /* 1857 * We hope this succeeds but it isn't required. 1858 */ 1859 i = pmap_pte_insert(ptegidx, &pvo->pvo_pte); 1860 if (i >= 0) { 1861 PVO_PTEGIDX_SET(pvo, i); 1862 } else { 1863 panic("pmap_pvo_enter: overflow"); 1864 pmap_pte_overflow++; 1865 } 1866 1867 return (first ? ENOENT : 0); 1868} 1869 1870static void 1871pmap_pvo_remove(struct pvo_entry *pvo, int pteidx) 1872{ 1873 struct pte *pt; 1874 1875 /* 1876 * If there is an active pte entry, we need to deactivate it (and 1877 * save the ref & cfg bits). 1878 */ 1879 pt = pmap_pvo_to_pte(pvo, pteidx); 1880 if (pt != NULL) { 1881 pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1882 PVO_PTEGIDX_CLR(pvo); 1883 } else { 1884 pmap_pte_overflow--; 1885 } 1886 1887 /* 1888 * Update our statistics. 1889 */ 1890 pvo->pvo_pmap->pm_stats.resident_count--; 1891 if (pvo->pvo_pte.pte_lo & PVO_WIRED) 1892 pvo->pvo_pmap->pm_stats.wired_count--; 1893 1894 /* 1895 * Save the REF/CHG bits into their cache if the page is managed. 1896 */ 1897 if (pvo->pvo_vaddr & PVO_MANAGED) { 1898 struct vm_page *pg; 1899 1900 pg = PHYS_TO_VM_PAGE(pvo->pvo_pte.pte_lo & PTE_RPGN); 1901 if (pg != NULL) { 1902 pmap_attr_save(pg, pvo->pvo_pte.pte_lo & 1903 (PTE_REF | PTE_CHG)); 1904 } 1905 } 1906 1907 /* 1908 * Remove this PVO from the PV list. 1909 */ 1910 LIST_REMOVE(pvo, pvo_vlink); 1911 1912 /* 1913 * Remove this from the overflow list and return it to the pool 1914 * if we aren't going to reuse it. 1915 */ 1916 LIST_REMOVE(pvo, pvo_olink); 1917 if (!(pvo->pvo_vaddr & PVO_BOOTSTRAP)) 1918 uma_zfree(pvo->pvo_vaddr & PVO_MANAGED ? pmap_mpvo_zone : 1919 pmap_upvo_zone, pvo); 1920 pmap_pvo_entries--; 1921 pmap_pvo_remove_calls++; 1922} 1923 1924static __inline int 1925pmap_pvo_pte_index(const struct pvo_entry *pvo, int ptegidx) 1926{ 1927 int pteidx; 1928 1929 /* 1930 * We can find the actual pte entry without searching by grabbing 1931 * the PTEG index from 3 unused bits in pte_lo[11:9] and by 1932 * noticing the HID bit. 1933 */ 1934 pteidx = ptegidx * 8 + PVO_PTEGIDX_GET(pvo); 1935 if (pvo->pvo_pte.pte_hi & PTE_HID) 1936 pteidx ^= pmap_pteg_mask * 8; 1937 1938 return (pteidx); 1939} 1940 1941static struct pvo_entry * 1942pmap_pvo_find_va(pmap_t pm, vm_offset_t va, int *pteidx_p) 1943{ 1944 struct pvo_entry *pvo; 1945 int ptegidx; 1946 u_int sr; 1947 1948 va &= ~ADDR_POFF; 1949 sr = va_to_sr(pm->pm_sr, va); 1950 ptegidx = va_to_pteg(sr, va); 1951 1952 LIST_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 1953 if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) { 1954 if (pteidx_p) 1955 *pteidx_p = pmap_pvo_pte_index(pvo, ptegidx); 1956 return (pvo); 1957 } 1958 } 1959 1960 return (NULL); 1961} 1962 1963static struct pte * 1964pmap_pvo_to_pte(const struct pvo_entry *pvo, int pteidx) 1965{ 1966 struct pte *pt; 1967 1968 /* 1969 * If we haven't been supplied the ptegidx, calculate it. 1970 */ 1971 if (pteidx == -1) { 1972 int ptegidx; 1973 u_int sr; 1974 1975 sr = va_to_sr(pvo->pvo_pmap->pm_sr, pvo->pvo_vaddr); 1976 ptegidx = va_to_pteg(sr, pvo->pvo_vaddr); 1977 pteidx = pmap_pvo_pte_index(pvo, ptegidx); 1978 } 1979 1980 pt = &pmap_pteg_table[pteidx >> 3].pt[pteidx & 7]; 1981 1982 if ((pvo->pvo_pte.pte_hi & PTE_VALID) && !PVO_PTEGIDX_ISSET(pvo)) { 1983 panic("pmap_pvo_to_pte: pvo %p has valid pte in pvo but no " 1984 "valid pte index", pvo); 1985 } 1986 1987 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0 && PVO_PTEGIDX_ISSET(pvo)) { 1988 panic("pmap_pvo_to_pte: pvo %p has valid pte index in pvo " 1989 "pvo but no valid pte", pvo); 1990 } 1991 1992 if ((pt->pte_hi ^ (pvo->pvo_pte.pte_hi & ~PTE_VALID)) == PTE_VALID) { 1993 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0) { 1994 panic("pmap_pvo_to_pte: pvo %p has valid pte in " 1995 "pmap_pteg_table %p but invalid in pvo", pvo, pt); 1996 } 1997 1998 if (((pt->pte_lo ^ pvo->pvo_pte.pte_lo) & ~(PTE_CHG|PTE_REF)) 1999 != 0) { 2000 panic("pmap_pvo_to_pte: pvo %p pte does not match " 2001 "pte %p in pmap_pteg_table", pvo, pt); 2002 } 2003 2004 return (pt); 2005 } 2006 2007 if (pvo->pvo_pte.pte_hi & PTE_VALID) { 2008 panic("pmap_pvo_to_pte: pvo %p has invalid pte %p in " 2009 "pmap_pteg_table but valid in pvo", pvo, pt); 2010 } 2011 2012 return (NULL); 2013} 2014 2015static void * 2016pmap_pvo_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait) 2017{ 2018 vm_page_t m; 2019 2020 if (bytes != PAGE_SIZE) 2021 panic("pmap_pvo_allocf: benno was shortsighted. hit him."); 2022 2023 *flags = UMA_SLAB_PRIV; 2024 m = vm_page_alloc(pmap_pvo_obj, pmap_pvo_count, VM_ALLOC_SYSTEM); 2025 if (m == NULL) 2026 return (NULL); 2027 pmap_pvo_count++; 2028 return ((void *)VM_PAGE_TO_PHYS(m)); 2029} 2030 2031/* 2032 * XXX: THIS STUFF SHOULD BE IN pte.c? 2033 */ 2034int 2035pmap_pte_spill(vm_offset_t addr) 2036{ 2037 struct pvo_entry *source_pvo, *victim_pvo; 2038 struct pvo_entry *pvo; 2039 int ptegidx, i, j; 2040 u_int sr; 2041 struct pteg *pteg; 2042 struct pte *pt; 2043 2044 pmap_pte_spills++; 2045 2046 sr = mfsrin(addr); 2047 ptegidx = va_to_pteg(sr, addr); 2048 2049 /* 2050 * Have to substitute some entry. Use the primary hash for this. 2051 * Use low bits of timebase as random generator. 2052 */ 2053 pteg = &pmap_pteg_table[ptegidx]; 2054 __asm __volatile("mftb %0" : "=r"(i)); 2055 i &= 7; 2056 pt = &pteg->pt[i]; 2057 2058 source_pvo = NULL; 2059 victim_pvo = NULL; 2060 LIST_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 2061 /* 2062 * We need to find a pvo entry for this address. 2063 */ 2064 PMAP_PVO_CHECK(pvo); 2065 if (source_pvo == NULL && 2066 pmap_pte_match(&pvo->pvo_pte, sr, addr, 2067 pvo->pvo_pte.pte_hi & PTE_HID)) { 2068 /* 2069 * Now found an entry to be spilled into the pteg. 2070 * The PTE is now valid, so we know it's active. 2071 */ 2072 j = pmap_pte_insert(ptegidx, &pvo->pvo_pte); 2073 2074 if (j >= 0) { 2075 PVO_PTEGIDX_SET(pvo, j); 2076 pmap_pte_overflow--; 2077 PMAP_PVO_CHECK(pvo); 2078 return (1); 2079 } 2080 2081 source_pvo = pvo; 2082 2083 if (victim_pvo != NULL) 2084 break; 2085 } 2086 2087 /* 2088 * We also need the pvo entry of the victim we are replacing 2089 * so save the R & C bits of the PTE. 2090 */ 2091 if ((pt->pte_hi & PTE_HID) == 0 && victim_pvo == NULL && 2092 pmap_pte_compare(pt, &pvo->pvo_pte)) { 2093 victim_pvo = pvo; 2094 if (source_pvo != NULL) 2095 break; 2096 } 2097 } 2098 2099 if (source_pvo == NULL) 2100 return (0); 2101 2102 if (victim_pvo == NULL) { 2103 if ((pt->pte_hi & PTE_HID) == 0) 2104 panic("pmap_pte_spill: victim p-pte (%p) has no pvo" 2105 "entry", pt); 2106 2107 /* 2108 * If this is a secondary PTE, we need to search it's primary 2109 * pvo bucket for the matching PVO. 2110 */ 2111 LIST_FOREACH(pvo, &pmap_pvo_table[ptegidx ^ pmap_pteg_mask], 2112 pvo_olink) { 2113 PMAP_PVO_CHECK(pvo); 2114 /* 2115 * We also need the pvo entry of the victim we are 2116 * replacing so save the R & C bits of the PTE. 2117 */ 2118 if (pmap_pte_compare(pt, &pvo->pvo_pte)) { 2119 victim_pvo = pvo; 2120 break; 2121 } 2122 } 2123 2124 if (victim_pvo == NULL) 2125 panic("pmap_pte_spill: victim s-pte (%p) has no pvo" 2126 "entry", pt); 2127 } 2128 2129 /* 2130 * We are invalidating the TLB entry for the EA we are replacing even 2131 * though it's valid. If we don't, we lose any ref/chg bit changes 2132 * contained in the TLB entry. 2133 */ 2134 source_pvo->pvo_pte.pte_hi &= ~PTE_HID; 2135 2136 pmap_pte_unset(pt, &victim_pvo->pvo_pte, victim_pvo->pvo_vaddr); 2137 pmap_pte_set(pt, &source_pvo->pvo_pte); 2138 2139 PVO_PTEGIDX_CLR(victim_pvo); 2140 PVO_PTEGIDX_SET(source_pvo, i); 2141 pmap_pte_replacements++; 2142 2143 PMAP_PVO_CHECK(victim_pvo); 2144 PMAP_PVO_CHECK(source_pvo); 2145 2146 return (1); 2147} 2148 2149static int 2150pmap_pte_insert(u_int ptegidx, struct pte *pvo_pt) 2151{ 2152 struct pte *pt; 2153 int i; 2154 2155 /* 2156 * First try primary hash. 2157 */ 2158 for (pt = pmap_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) { 2159 if ((pt->pte_hi & PTE_VALID) == 0) { 2160 pvo_pt->pte_hi &= ~PTE_HID; 2161 pmap_pte_set(pt, pvo_pt); 2162 return (i); 2163 } 2164 } 2165 2166 /* 2167 * Now try secondary hash. 2168 */ 2169 ptegidx ^= pmap_pteg_mask; 2170 ptegidx++; 2171 for (pt = pmap_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) { 2172 if ((pt->pte_hi & PTE_VALID) == 0) { 2173 pvo_pt->pte_hi |= PTE_HID; 2174 pmap_pte_set(pt, pvo_pt); 2175 return (i); 2176 } 2177 } 2178 2179 panic("pmap_pte_insert: overflow"); 2180 return (-1); 2181} 2182 2183static boolean_t 2184pmap_query_bit(vm_page_t m, int ptebit) 2185{ 2186 struct pvo_entry *pvo; 2187 struct pte *pt; 2188 2189 if (pmap_attr_fetch(m) & ptebit) 2190 return (TRUE); 2191 2192 LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) { 2193 PMAP_PVO_CHECK(pvo); /* sanity check */ 2194 2195 /* 2196 * See if we saved the bit off. If so, cache it and return 2197 * success. 2198 */ 2199 if (pvo->pvo_pte.pte_lo & ptebit) { 2200 pmap_attr_save(m, ptebit); 2201 PMAP_PVO_CHECK(pvo); /* sanity check */ 2202 return (TRUE); 2203 } 2204 } 2205 2206 /* 2207 * No luck, now go through the hard part of looking at the PTEs 2208 * themselves. Sync so that any pending REF/CHG bits are flushed to 2209 * the PTEs. 2210 */ 2211 SYNC(); 2212 LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) { 2213 PMAP_PVO_CHECK(pvo); /* sanity check */ 2214 2215 /* 2216 * See if this pvo has a valid PTE. if so, fetch the 2217 * REF/CHG bits from the valid PTE. If the appropriate 2218 * ptebit is set, cache it and return success. 2219 */ 2220 pt = pmap_pvo_to_pte(pvo, -1); 2221 if (pt != NULL) { 2222 pmap_pte_synch(pt, &pvo->pvo_pte); 2223 if (pvo->pvo_pte.pte_lo & ptebit) { 2224 pmap_attr_save(m, ptebit); 2225 PMAP_PVO_CHECK(pvo); /* sanity check */ 2226 return (TRUE); 2227 } 2228 } 2229 } 2230 2231 return (TRUE); 2232} 2233 2234static boolean_t 2235pmap_clear_bit(vm_page_t m, int ptebit) 2236{ 2237 struct pvo_entry *pvo; 2238 struct pte *pt; 2239 int rv; 2240 2241 /* 2242 * Clear the cached value. 2243 */ 2244 rv = pmap_attr_fetch(m); 2245 pmap_attr_clear(m, ptebit); 2246 2247 /* 2248 * Sync so that any pending REF/CHG bits are flushed to the PTEs (so 2249 * we can reset the right ones). note that since the pvo entries and 2250 * list heads are accessed via BAT0 and are never placed in the page 2251 * table, we don't have to worry about further accesses setting the 2252 * REF/CHG bits. 2253 */ 2254 SYNC(); 2255 2256 /* 2257 * For each pvo entry, clear the pvo's ptebit. If this pvo has a 2258 * valid pte clear the ptebit from the valid pte. 2259 */ 2260 LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) { 2261 PMAP_PVO_CHECK(pvo); /* sanity check */ 2262 pt = pmap_pvo_to_pte(pvo, -1); 2263 if (pt != NULL) { 2264 pmap_pte_synch(pt, &pvo->pvo_pte); 2265 if (pvo->pvo_pte.pte_lo & ptebit) 2266 pmap_pte_clear(pt, PVO_VADDR(pvo), ptebit); 2267 } 2268 rv |= pvo->pvo_pte.pte_lo; 2269 pvo->pvo_pte.pte_lo &= ~ptebit; 2270 PMAP_PVO_CHECK(pvo); /* sanity check */ 2271 } 2272 2273 return ((rv & ptebit) != 0); 2274} 2275 2276/* 2277 * Map a set of physical memory pages into the kernel virtual 2278 * address space. Return a pointer to where it is mapped. This 2279 * routine is intended to be used for mapping device memory, 2280 * NOT real memory. 2281 */ 2282void * 2283pmap_mapdev(vm_offset_t pa, vm_size_t size) 2284{ 2285 vm_offset_t va, tmpva, offset; 2286 2287 pa = trunc_page(pa); 2288 offset = pa & PAGE_MASK; 2289 size = roundup(offset + size, PAGE_SIZE); 2290 2291 GIANT_REQUIRED; 2292 2293 va = kmem_alloc_pageable(kernel_map, size); 2294 if (!va) 2295 panic("pmap_mapdev: Couldn't alloc kernel virtual memory"); 2296 2297 for (tmpva = va; size > 0;) { 2298 pmap_kenter(tmpva, pa); 2299 TLBIE(tmpva); /* XXX or should it be invalidate-all ? */ 2300 size -= PAGE_SIZE; 2301 tmpva += PAGE_SIZE; 2302 pa += PAGE_SIZE; 2303 } 2304 2305 return ((void *)(va + offset)); 2306} 2307 2308void 2309pmap_unmapdev(vm_offset_t va, vm_size_t size) 2310{ 2311 vm_offset_t base, offset; 2312 2313 base = trunc_page(va); 2314 offset = va & PAGE_MASK; 2315 size = roundup(offset + size, PAGE_SIZE); 2316 kmem_free(kernel_map, base, size); 2317} 2318