mmu_oea.c revision 91483
1/* 2 * Copyright (c) 2001 The NetBSD Foundation, Inc. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to The NetBSD Foundation 6 * by Matt Thomas <matt@3am-software.com> of Allegro Networks, Inc. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the NetBSD 19 * Foundation, Inc. and its contributors. 20 * 4. Neither the name of The NetBSD Foundation nor the names of its 21 * contributors may be used to endorse or promote products derived 22 * from this software without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 26 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * POSSIBILITY OF SUCH DAMAGE. 35 */ 36/* 37 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 38 * Copyright (C) 1995, 1996 TooLs GmbH. 39 * All rights reserved. 40 * 41 * Redistribution and use in source and binary forms, with or without 42 * modification, are permitted provided that the following conditions 43 * are met: 44 * 1. Redistributions of source code must retain the above copyright 45 * notice, this list of conditions and the following disclaimer. 46 * 2. Redistributions in binary form must reproduce the above copyright 47 * notice, this list of conditions and the following disclaimer in the 48 * documentation and/or other materials provided with the distribution. 49 * 3. All advertising materials mentioning features or use of this software 50 * must display the following acknowledgement: 51 * This product includes software developed by TooLs GmbH. 52 * 4. The name of TooLs GmbH may not be used to endorse or promote products 53 * derived from this software without specific prior written permission. 54 * 55 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 56 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 57 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 58 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 59 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 60 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 61 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 62 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 63 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 64 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 65 * 66 * $NetBSD: pmap.c,v 1.28 2000/03/26 20:42:36 kleink Exp $ 67 */ 68/* 69 * Copyright (C) 2001 Benno Rice. 70 * All rights reserved. 71 * 72 * Redistribution and use in source and binary forms, with or without 73 * modification, are permitted provided that the following conditions 74 * are met: 75 * 1. Redistributions of source code must retain the above copyright 76 * notice, this list of conditions and the following disclaimer. 77 * 2. Redistributions in binary form must reproduce the above copyright 78 * notice, this list of conditions and the following disclaimer in the 79 * documentation and/or other materials provided with the distribution. 80 * 81 * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR 82 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 83 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 84 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 85 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 86 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 87 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 88 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 89 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 90 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 91 */ 92 93#ifndef lint 94static const char rcsid[] = 95 "$FreeBSD: head/sys/powerpc/aim/mmu_oea.c 91483 2002-02-28 11:55:44Z benno $"; 96#endif /* not lint */ 97 98/* 99 * Manages physical address maps. 100 * 101 * In addition to hardware address maps, this module is called upon to 102 * provide software-use-only maps which may or may not be stored in the 103 * same form as hardware maps. These pseudo-maps are used to store 104 * intermediate results from copy operations to and from address spaces. 105 * 106 * Since the information managed by this module is also stored by the 107 * logical address mapping module, this module may throw away valid virtual 108 * to physical mappings at almost any time. However, invalidations of 109 * mappings must be done as requested. 110 * 111 * In order to cope with hardware architectures which make virtual to 112 * physical map invalidates expensive, this module may delay invalidate 113 * reduced protection operations until such time as they are actually 114 * necessary. This module is given full information as to which processors 115 * are currently using which maps, and to when physical maps must be made 116 * correct. 117 */ 118 119#include <sys/param.h> 120#include <sys/kernel.h> 121#include <sys/ktr.h> 122#include <sys/lock.h> 123#include <sys/msgbuf.h> 124#include <sys/mutex.h> 125#include <sys/proc.h> 126#include <sys/sysctl.h> 127#include <sys/systm.h> 128#include <sys/vmmeter.h> 129 130#include <dev/ofw/openfirm.h> 131 132#include <vm/vm.h> 133#include <vm/vm_param.h> 134#include <vm/vm_kern.h> 135#include <vm/vm_page.h> 136#include <vm/vm_map.h> 137#include <vm/vm_object.h> 138#include <vm/vm_extern.h> 139#include <vm/vm_pageout.h> 140#include <vm/vm_pager.h> 141#include <vm/vm_zone.h> 142 143#include <machine/bat.h> 144#include <machine/frame.h> 145#include <machine/md_var.h> 146#include <machine/psl.h> 147#include <machine/pte.h> 148#include <machine/sr.h> 149 150#define PMAP_DEBUG 151 152#define TODO panic("%s: not implemented", __func__); 153 154#define PMAP_LOCK(pm) 155#define PMAP_UNLOCK(pm) 156 157#define TLBIE(va) __asm __volatile("tlbie %0" :: "r"(va)) 158#define TLBSYNC() __asm __volatile("tlbsync"); 159#define SYNC() __asm __volatile("sync"); 160#define EIEIO() __asm __volatile("eieio"); 161 162#define VSID_MAKE(sr, hash) ((sr) | (((hash) & 0xfffff) << 4)) 163#define VSID_TO_SR(vsid) ((vsid) & 0xf) 164#define VSID_TO_HASH(vsid) (((vsid) >> 4) & 0xfffff) 165 166#define PVO_PTEGIDX_MASK 0x0007 /* which PTEG slot */ 167#define PVO_PTEGIDX_VALID 0x0008 /* slot is valid */ 168#define PVO_WIRED 0x0010 /* PVO entry is wired */ 169#define PVO_MANAGED 0x0020 /* PVO entry is managed */ 170#define PVO_EXECUTABLE 0x0040 /* PVO entry is executable */ 171#define PVO_VADDR(pvo) ((pvo)->pvo_vaddr & ~ADDR_POFF) 172#define PVO_ISEXECUTABLE(pvo) ((pvo)->pvo_vaddr & PVO_EXECUTABLE) 173#define PVO_PTEGIDX_GET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_MASK) 174#define PVO_PTEGIDX_ISSET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_VALID) 175#define PVO_PTEGIDX_CLR(pvo) \ 176 ((void)((pvo)->pvo_vaddr &= ~(PVO_PTEGIDX_VALID|PVO_PTEGIDX_MASK))) 177#define PVO_PTEGIDX_SET(pvo, i) \ 178 ((void)((pvo)->pvo_vaddr |= (i)|PVO_PTEGIDX_VALID)) 179 180#define PMAP_PVO_CHECK(pvo) 181 182struct mem_region { 183 vm_offset_t mr_start; 184 vm_offset_t mr_size; 185}; 186 187struct ofw_map { 188 vm_offset_t om_va; 189 vm_size_t om_len; 190 vm_offset_t om_pa; 191 u_int om_mode; 192}; 193 194int pmap_bootstrapped = 0; 195 196/* 197 * Virtual and physical address of message buffer. 198 */ 199struct msgbuf *msgbufp; 200vm_offset_t msgbuf_phys; 201 202/* 203 * Physical addresses of first and last available physical page. 204 */ 205vm_offset_t avail_start; 206vm_offset_t avail_end; 207 208/* 209 * Map of physical memory regions. 210 */ 211vm_offset_t phys_avail[128]; 212u_int phys_avail_count; 213static struct mem_region regions[128]; 214static struct ofw_map translations[128]; 215static int translations_size; 216 217/* 218 * First and last available kernel virtual addresses. 219 */ 220vm_offset_t virtual_avail; 221vm_offset_t virtual_end; 222vm_offset_t kernel_vm_end; 223 224/* 225 * Kernel pmap. 226 */ 227struct pmap kernel_pmap_store; 228extern struct pmap ofw_pmap; 229 230/* 231 * PTEG data. 232 */ 233static struct pteg *pmap_pteg_table; 234u_int pmap_pteg_count; 235u_int pmap_pteg_mask; 236 237/* 238 * PVO data. 239 */ 240struct pvo_head *pmap_pvo_table; /* pvo entries by pteg index */ 241struct pvo_head pmap_pvo_kunmanaged = 242 LIST_HEAD_INITIALIZER(pmap_pvo_kunmanaged); /* list of unmanaged pages */ 243struct pvo_head pmap_pvo_unmanaged = 244 LIST_HEAD_INITIALIZER(pmap_pvo_unmanaged); /* list of unmanaged pages */ 245 246vm_zone_t pmap_upvo_zone; /* zone for pvo entries for unmanaged pages */ 247vm_zone_t pmap_mpvo_zone; /* zone for pvo entries for managed pages */ 248struct vm_zone pmap_upvo_zone_store; 249struct vm_zone pmap_mpvo_zone_store; 250struct vm_object pmap_upvo_zone_obj; 251struct vm_object pmap_mpvo_zone_obj; 252 253#define PMAP_PVO_SIZE 1024 254struct pvo_entry pmap_upvo_pool[PMAP_PVO_SIZE]; 255 256#define VSID_NBPW (sizeof(u_int32_t) * 8) 257static u_int pmap_vsid_bitmap[NPMAPS / VSID_NBPW]; 258 259static boolean_t pmap_initialized = FALSE; 260 261/* 262 * Statistics. 263 */ 264u_int pmap_pte_valid = 0; 265u_int pmap_pte_overflow = 0; 266u_int pmap_pte_replacements = 0; 267u_int pmap_pvo_entries = 0; 268u_int pmap_pvo_enter_calls = 0; 269u_int pmap_pvo_remove_calls = 0; 270u_int pmap_pte_spills = 0; 271SYSCTL_INT(_machdep, OID_AUTO, pmap_pte_valid, CTLFLAG_RD, &pmap_pte_valid, 272 0, ""); 273SYSCTL_INT(_machdep, OID_AUTO, pmap_pte_overflow, CTLFLAG_RD, 274 &pmap_pte_overflow, 0, ""); 275SYSCTL_INT(_machdep, OID_AUTO, pmap_pte_replacements, CTLFLAG_RD, 276 &pmap_pte_replacements, 0, ""); 277SYSCTL_INT(_machdep, OID_AUTO, pmap_pvo_entries, CTLFLAG_RD, &pmap_pvo_entries, 278 0, ""); 279SYSCTL_INT(_machdep, OID_AUTO, pmap_pvo_enter_calls, CTLFLAG_RD, 280 &pmap_pvo_enter_calls, 0, ""); 281SYSCTL_INT(_machdep, OID_AUTO, pmap_pvo_remove_calls, CTLFLAG_RD, 282 &pmap_pvo_remove_calls, 0, ""); 283SYSCTL_INT(_machdep, OID_AUTO, pmap_pte_spills, CTLFLAG_RD, 284 &pmap_pte_spills, 0, ""); 285 286struct pvo_entry *pmap_pvo_zeropage; 287 288vm_offset_t pmap_rkva_start = VM_MIN_KERNEL_ADDRESS; 289u_int pmap_rkva_count = 4; 290 291/* 292 * Allocate physical memory for use in pmap_bootstrap. 293 */ 294static vm_offset_t pmap_bootstrap_alloc(vm_size_t, u_int); 295 296/* 297 * PTE calls. 298 */ 299static int pmap_pte_insert(u_int, struct pte *); 300 301/* 302 * PVO calls. 303 */ 304static int pmap_pvo_enter(pmap_t, vm_zone_t, struct pvo_head *, 305 vm_offset_t, vm_offset_t, u_int, int); 306static void pmap_pvo_remove(struct pvo_entry *, int); 307static struct pvo_entry *pmap_pvo_find_va(pmap_t, vm_offset_t, int *); 308static struct pte *pmap_pvo_to_pte(const struct pvo_entry *, int); 309 310/* 311 * Utility routines. 312 */ 313static struct pvo_entry *pmap_rkva_alloc(void); 314static void pmap_pa_map(struct pvo_entry *, vm_offset_t, 315 struct pte *, int *); 316static void pmap_pa_unmap(struct pvo_entry *, struct pte *, int *); 317static void pmap_syncicache(vm_offset_t, vm_size_t); 318static boolean_t pmap_query_bit(vm_page_t, int); 319static boolean_t pmap_clear_bit(vm_page_t, int); 320static void tlbia(void); 321 322static __inline int 323va_to_sr(u_int *sr, vm_offset_t va) 324{ 325 return (sr[(uintptr_t)va >> ADDR_SR_SHFT]); 326} 327 328static __inline u_int 329va_to_pteg(u_int sr, vm_offset_t addr) 330{ 331 u_int hash; 332 333 hash = (sr & SR_VSID_MASK) ^ (((u_int)addr & ADDR_PIDX) >> 334 ADDR_PIDX_SHFT); 335 return (hash & pmap_pteg_mask); 336} 337 338static __inline struct pvo_head * 339pa_to_pvoh(vm_offset_t pa) 340{ 341 struct vm_page *pg; 342 343 pg = PHYS_TO_VM_PAGE(pa); 344 345 if (pg == NULL) 346 return (&pmap_pvo_unmanaged); 347 348 return (&pg->md.mdpg_pvoh); 349} 350 351static __inline struct pvo_head * 352vm_page_to_pvoh(vm_page_t m) 353{ 354 355 return (&m->md.mdpg_pvoh); 356} 357 358static __inline void 359pmap_attr_clear(vm_page_t m, int ptebit) 360{ 361 362 m->md.mdpg_attrs &= ~ptebit; 363} 364 365static __inline int 366pmap_attr_fetch(vm_page_t m) 367{ 368 369 return (m->md.mdpg_attrs); 370} 371 372static __inline void 373pmap_attr_save(vm_page_t m, int ptebit) 374{ 375 376 m->md.mdpg_attrs |= ptebit; 377} 378 379static __inline int 380pmap_pte_compare(const struct pte *pt, const struct pte *pvo_pt) 381{ 382 if (pt->pte_hi == pvo_pt->pte_hi) 383 return (1); 384 385 return (0); 386} 387 388static __inline int 389pmap_pte_match(struct pte *pt, u_int sr, vm_offset_t va, int which) 390{ 391 return (pt->pte_hi & ~PTE_VALID) == 392 (((sr & SR_VSID_MASK) << PTE_VSID_SHFT) | 393 ((va >> ADDR_API_SHFT) & PTE_API) | which); 394} 395 396static __inline void 397pmap_pte_create(struct pte *pt, u_int sr, vm_offset_t va, u_int pte_lo) 398{ 399 /* 400 * Construct a PTE. Default to IMB initially. Valid bit only gets 401 * set when the real pte is set in memory. 402 * 403 * Note: Don't set the valid bit for correct operation of tlb update. 404 */ 405 pt->pte_hi = ((sr & SR_VSID_MASK) << PTE_VSID_SHFT) | 406 (((va & ADDR_PIDX) >> ADDR_API_SHFT) & PTE_API); 407 pt->pte_lo = pte_lo; 408} 409 410static __inline void 411pmap_pte_synch(struct pte *pt, struct pte *pvo_pt) 412{ 413 414 pvo_pt->pte_lo |= pt->pte_lo & (PTE_REF | PTE_CHG); 415} 416 417static __inline void 418pmap_pte_clear(struct pte *pt, vm_offset_t va, int ptebit) 419{ 420 421 /* 422 * As shown in Section 7.6.3.2.3 423 */ 424 pt->pte_lo &= ~ptebit; 425 TLBIE(va); 426 EIEIO(); 427 TLBSYNC(); 428 SYNC(); 429} 430 431static __inline void 432pmap_pte_set(struct pte *pt, struct pte *pvo_pt) 433{ 434 435 pvo_pt->pte_hi |= PTE_VALID; 436 437 /* 438 * Update the PTE as defined in section 7.6.3.1. 439 * Note that the REF/CHG bits are from pvo_pt and thus should havce 440 * been saved so this routine can restore them (if desired). 441 */ 442 pt->pte_lo = pvo_pt->pte_lo; 443 EIEIO(); 444 pt->pte_hi = pvo_pt->pte_hi; 445 SYNC(); 446 pmap_pte_valid++; 447} 448 449static __inline void 450pmap_pte_unset(struct pte *pt, struct pte *pvo_pt, vm_offset_t va) 451{ 452 453 pvo_pt->pte_hi &= ~PTE_VALID; 454 455 /* 456 * Force the reg & chg bits back into the PTEs. 457 */ 458 SYNC(); 459 460 /* 461 * Invalidate the pte. 462 */ 463 pt->pte_hi &= ~PTE_VALID; 464 465 SYNC(); 466 TLBIE(va); 467 EIEIO(); 468 TLBSYNC(); 469 SYNC(); 470 471 /* 472 * Save the reg & chg bits. 473 */ 474 pmap_pte_synch(pt, pvo_pt); 475 pmap_pte_valid--; 476} 477 478static __inline void 479pmap_pte_change(struct pte *pt, struct pte *pvo_pt, vm_offset_t va) 480{ 481 482 /* 483 * Invalidate the PTE 484 */ 485 pmap_pte_unset(pt, pvo_pt, va); 486 pmap_pte_set(pt, pvo_pt); 487} 488 489/* 490 * Quick sort callout for comparing memory regions. 491 */ 492static int mr_cmp(const void *a, const void *b); 493static int om_cmp(const void *a, const void *b); 494 495static int 496mr_cmp(const void *a, const void *b) 497{ 498 const struct mem_region *regiona; 499 const struct mem_region *regionb; 500 501 regiona = a; 502 regionb = b; 503 if (regiona->mr_start < regionb->mr_start) 504 return (-1); 505 else if (regiona->mr_start > regionb->mr_start) 506 return (1); 507 else 508 return (0); 509} 510 511static int 512om_cmp(const void *a, const void *b) 513{ 514 const struct ofw_map *mapa; 515 const struct ofw_map *mapb; 516 517 mapa = a; 518 mapb = b; 519 if (mapa->om_pa < mapb->om_pa) 520 return (-1); 521 else if (mapa->om_pa > mapb->om_pa) 522 return (1); 523 else 524 return (0); 525} 526 527void 528pmap_bootstrap(vm_offset_t kernelstart, vm_offset_t kernelend) 529{ 530 ihandle_t pmem, mmui; 531 phandle_t chosen, mmu; 532 int sz; 533 int i, j; 534 vm_size_t size; 535 vm_offset_t pa, va, off; 536 u_int batl, batu; 537 538 /* 539 * Use an IBAT and a DBAT to map the bottom segment of memory 540 * where we are. 541 */ 542 batu = BATU(0x00000000, BAT_BL_256M, BAT_Vs); 543 batl = BATL(0x00000000, BAT_M, BAT_PP_RW); 544 __asm ("mtibatu 0,%0; mtibatl 0,%1; mtdbatu 0,%0; mtdbatl 0,%1" 545 :: "r"(batu), "r"(batl)); 546#if 0 547 batu = BATU(0x80000000, BAT_BL_256M, BAT_Vs); 548 batl = BATL(0x80000000, BAT_M, BAT_PP_RW); 549 __asm ("mtibatu 1,%0; mtibatl 1,%1; mtdbatu 1,%0; mtdbatl 1,%1" 550 :: "r"(batu), "r"(batl)); 551#endif 552 553 /* 554 * Set the start and end of kva. 555 */ 556 virtual_avail = VM_MIN_KERNEL_ADDRESS; 557 virtual_end = VM_MAX_KERNEL_ADDRESS; 558 559 if ((pmem = OF_finddevice("/memory")) == -1) 560 panic("pmap_bootstrap: can't locate memory device"); 561 if ((sz = OF_getproplen(pmem, "available")) == -1) 562 panic("pmap_bootstrap: can't get length of available memory"); 563 if (sizeof(phys_avail) < sz) 564 panic("pmap_bootstrap: phys_avail too small"); 565 if (sizeof(regions) < sz) 566 panic("pmap_bootstrap: regions too small"); 567 bzero(regions, sz); 568 if (OF_getprop(pmem, "available", regions, sz) == -1) 569 panic("pmap_bootstrap: can't get available memory"); 570 sz /= sizeof(*regions); 571 CTR0(KTR_PMAP, "pmap_bootstrap: physical memory"); 572 qsort(regions, sz, sizeof(*regions), mr_cmp); 573 phys_avail_count = 0; 574 for (i = 0, j = 0; i < sz; i++, j += 2) { 575 CTR3(KTR_PMAP, "region: %#x - %#x (%#x)", regions[i].mr_start, 576 regions[i].mr_start + regions[i].mr_size, 577 regions[i].mr_size); 578 phys_avail[j] = regions[i].mr_start; 579 phys_avail[j + 1] = regions[i].mr_start + regions[i].mr_size; 580 phys_avail_count++; 581 } 582 583 /* 584 * Allocate PTEG table. 585 */ 586#ifdef PTEGCOUNT 587 pmap_pteg_count = PTEGCOUNT; 588#else 589 pmap_pteg_count = 0x1000; 590 591 while (pmap_pteg_count < physmem) 592 pmap_pteg_count <<= 1; 593 594 pmap_pteg_count >>= 1; 595#endif /* PTEGCOUNT */ 596 597 size = pmap_pteg_count * sizeof(struct pteg); 598 CTR2(KTR_PMAP, "pmap_bootstrap: %d PTEGs, %d bytes", pmap_pteg_count, 599 size); 600 pmap_pteg_table = (struct pteg *)pmap_bootstrap_alloc(size, size); 601 CTR1(KTR_PMAP, "pmap_bootstrap: PTEG table at %p", pmap_pteg_table); 602 bzero((void *)pmap_pteg_table, pmap_pteg_count * sizeof(struct pteg)); 603 pmap_pteg_mask = pmap_pteg_count - 1; 604 605 /* 606 * Allocate PTE overflow lists. 607 */ 608 size = sizeof(struct pvo_head) * pmap_pteg_count; 609 pmap_pvo_table = (struct pvo_head *)pmap_bootstrap_alloc(size, 610 PAGE_SIZE); 611 CTR1(KTR_PMAP, "pmap_bootstrap: PVO table at %p", pmap_pvo_table); 612 for (i = 0; i < pmap_pteg_count; i++) 613 LIST_INIT(&pmap_pvo_table[i]); 614 615 /* 616 * Allocate the message buffer. 617 */ 618 msgbuf_phys = pmap_bootstrap_alloc(MSGBUF_SIZE, 0); 619 620 /* 621 * Initialise the unmanaged pvo pool. 622 */ 623 pmap_upvo_zone = &pmap_upvo_zone_store; 624 zbootinit(pmap_upvo_zone, "unmanaged pvo", sizeof (struct pvo_entry), 625 pmap_upvo_pool, PMAP_PVO_SIZE); 626 627 /* 628 * Make sure kernel vsid is allocated as well as VSID 0. 629 */ 630 pmap_vsid_bitmap[(KERNEL_VSIDBITS & (NPMAPS - 1)) / VSID_NBPW] 631 |= 1 << (KERNEL_VSIDBITS % VSID_NBPW); 632 pmap_vsid_bitmap[0] |= 1; 633 634 /* 635 * Set up the OpenFirmware pmap and add it's mappings. 636 */ 637 pmap_pinit(&ofw_pmap); 638 ofw_pmap.pm_sr[KERNEL_SR] = KERNEL_SEGMENT; 639 if ((chosen = OF_finddevice("/chosen")) == -1) 640 panic("pmap_bootstrap: can't find /chosen"); 641 OF_getprop(chosen, "mmu", &mmui, 4); 642 if ((mmu = OF_instance_to_package(mmui)) == -1) 643 panic("pmap_bootstrap: can't get mmu package"); 644 if ((sz = OF_getproplen(mmu, "translations")) == -1) 645 panic("pmap_bootstrap: can't get ofw translation count"); 646 if (sizeof(translations) < sz) 647 panic("pmap_bootstrap: translations too small"); 648 bzero(translations, sz); 649 if (OF_getprop(mmu, "translations", translations, sz) == -1) 650 panic("pmap_bootstrap: can't get ofw translations"); 651 CTR0(KTR_PMAP, "pmap_bootstrap: translations"); 652 qsort(translations, sz, sizeof (*translations), om_cmp); 653 for (i = 0; i < sz; i++) { 654 CTR3(KTR_PMAP, "translation: pa=%#x va=%#x len=%#x", 655 translations[i].om_pa, translations[i].om_va, 656 translations[i].om_len); 657 658 /* Drop stuff below something? */ 659 660 /* Enter the pages? */ 661 for (off = 0; off < translations[i].om_len; off += PAGE_SIZE) { 662 struct vm_page m; 663 664 m.phys_addr = translations[i].om_pa + off; 665 pmap_enter(&ofw_pmap, translations[i].om_va + off, &m, 666 VM_PROT_ALL, 1); 667 } 668 } 669#ifdef SMP 670 TLBSYNC(); 671#endif 672 673 /* 674 * Initialize the kernel pmap (which is statically allocated). 675 */ 676 for (i = 0; i < 16; i++) { 677 kernel_pmap->pm_sr[i] = EMPTY_SEGMENT; 678 } 679 kernel_pmap->pm_sr[KERNEL_SR] = KERNEL_SEGMENT; 680 kernel_pmap->pm_active = ~0; 681 kernel_pmap->pm_count = 1; 682 683 /* 684 * Allocate a kernel stack with a guard page for thread0 and map it 685 * into the kernel page map. 686 */ 687 pa = pmap_bootstrap_alloc(KSTACK_PAGES * PAGE_SIZE, 0); 688 kstack0_phys = pa; 689 kstack0 = virtual_avail + (KSTACK_GUARD_PAGES * PAGE_SIZE); 690 CTR2(KTR_PMAP, "pmap_bootstrap: kstack0 at %#x (%#x)", kstack0_phys, 691 kstack0); 692 virtual_avail += (KSTACK_PAGES + KSTACK_GUARD_PAGES) * PAGE_SIZE; 693 for (i = 0; i < KSTACK_PAGES; i++) { 694 pa = kstack0_phys + i * PAGE_SIZE; 695 va = kstack0 + i * PAGE_SIZE; 696 pmap_kenter(va, pa); 697 TLBIE(va); 698 } 699 700 /* 701 * Calculate the first and last available physical addresses. 702 */ 703 avail_start = phys_avail[0]; 704 for (i = 0; phys_avail[i + 2] != 0; i += 2) 705 ; 706 avail_end = phys_avail[i + 1]; 707 Maxmem = powerpc_btop(avail_end); 708 709 /* 710 * Allocate virtual address space for the message buffer. 711 */ 712 msgbufp = (struct msgbuf *)virtual_avail; 713 virtual_avail += round_page(MSGBUF_SIZE); 714 715 /* 716 * Initialize hardware. 717 */ 718 for (i = 0; i < 16; i++) { 719 __asm __volatile("mtsrin %0,%1" 720 :: "r"(EMPTY_SEGMENT), "r"(i << ADDR_SR_SHFT)); 721 } 722 __asm __volatile ("mtsr %0,%1" 723 :: "n"(KERNEL_SR), "r"(KERNEL_SEGMENT)); 724 __asm __volatile ("sync; mtsdr1 %0; isync" 725 :: "r"((u_int)pmap_pteg_table | (pmap_pteg_mask >> 10))); 726 tlbia(); 727 728 pmap_bootstrapped++; 729} 730 731/* 732 * Activate a user pmap. The pmap must be activated before it's address 733 * space can be accessed in any way. 734 */ 735void 736pmap_activate(struct thread *td) 737{ 738 pmap_t pm; 739 int i; 740 741 /* 742 * Load all the data we need up front to encourasge the compiler to 743 * not issue any loads while we have interrupts disabled below. 744 */ 745 pm = &td->td_proc->p_vmspace->vm_pmap; 746 747 KASSERT(pm->pm_active == 0, ("pmap_activate: pmap already active?")); 748 749 pm->pm_active |= PCPU_GET(cpumask); 750 751 /* 752 * XXX: Address this again later? 753 * NetBSD only change the segment registers on return to userland. 754 */ 755#if 0 756 critical_enter(); 757 758 for (i = 0; i < 16; i++) { 759 __asm __volatile("mtsr %0,%1" :: "r"(i), "r"(pm->pm_sr[i])); 760 } 761 __asm __volatile("sync; isync"); 762 763 critical_exit(); 764#endif 765} 766 767void 768pmap_deactivate(struct thread *td) 769{ 770 pmap_t pm; 771 772 pm = &td->td_proc->p_vmspace->vm_pmap; 773 pm->pm_active &= ~(PCPU_GET(cpumask)); 774} 775 776vm_offset_t 777pmap_addr_hint(vm_object_t object, vm_offset_t va, vm_size_t size) 778{ 779 TODO; 780 return (0); 781} 782 783void 784pmap_change_wiring(pmap_t pmap, vm_offset_t va, boolean_t wired) 785{ 786 TODO; 787} 788 789void 790pmap_clear_modify(vm_page_t m) 791{ 792 793 if (m->flags * PG_FICTITIOUS) 794 return; 795 pmap_clear_bit(m, PTE_CHG); 796} 797 798void 799pmap_collect(void) 800{ 801 TODO; 802} 803 804void 805pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, 806 vm_size_t len, vm_offset_t src_addr) 807{ 808 TODO; 809} 810 811void 812pmap_copy_page(vm_offset_t src, vm_offset_t dst) 813{ 814 TODO; 815} 816 817/* 818 * Zero a page of physical memory by temporarily mapping it into the tlb. 819 */ 820void 821pmap_zero_page(vm_offset_t pa) 822{ 823 caddr_t va; 824 int i; 825 826 if (pa < SEGMENT_LENGTH) { 827 va = (caddr_t) pa; 828 } else if (pmap_initialized) { 829 if (pmap_pvo_zeropage == NULL) 830 pmap_pvo_zeropage = pmap_rkva_alloc(); 831 pmap_pa_map(pmap_pvo_zeropage, pa, NULL, NULL); 832 va = (caddr_t)PVO_VADDR(pmap_pvo_zeropage); 833 } else { 834 panic("pmap_zero_page: can't zero pa %#x", pa); 835 } 836 837 bzero(va, PAGE_SIZE); 838 839 for (i = PAGE_SIZE / CACHELINESIZE; i > 0; i--) { 840 __asm __volatile("dcbz 0,%0" :: "r"(va)); 841 va += CACHELINESIZE; 842 } 843 844 if (pa >= SEGMENT_LENGTH) 845 pmap_pa_unmap(pmap_pvo_zeropage, NULL, NULL); 846} 847 848void 849pmap_zero_page_area(vm_offset_t pa, int off, int size) 850{ 851 TODO; 852} 853 854/* 855 * Map the given physical page at the specified virtual address in the 856 * target pmap with the protection requested. If specified the page 857 * will be wired down. 858 */ 859void 860pmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot, 861 boolean_t wired) 862{ 863 struct pvo_head *pvo_head; 864 vm_zone_t zone; 865 u_int pte_lo, pvo_flags; 866 int error; 867 868 if (!pmap_initialized) { 869 pvo_head = &pmap_pvo_kunmanaged; 870 zone = pmap_upvo_zone; 871 pvo_flags = 0; 872 } else { 873 pvo_head = pa_to_pvoh(m->phys_addr); 874 zone = pmap_mpvo_zone; 875 pvo_flags = PVO_MANAGED; 876 } 877 878 pte_lo = PTE_I | PTE_G; 879 880 if (prot & VM_PROT_WRITE) 881 pte_lo |= PTE_BW; 882 else 883 pte_lo |= PTE_BR; 884 885 if (prot & VM_PROT_EXECUTE) 886 pvo_flags |= PVO_EXECUTABLE; 887 888 if (wired) 889 pvo_flags |= PVO_WIRED; 890 891 error = pmap_pvo_enter(pmap, zone, pvo_head, va, m->phys_addr, pte_lo, 892 pvo_flags); 893 894 if (error == ENOENT) { 895 /* 896 * Flush the real memory from the cache. 897 */ 898 if ((pvo_flags & PVO_EXECUTABLE) && (pte_lo & PTE_I) == 0) { 899 pmap_syncicache(m->phys_addr, PAGE_SIZE); 900 } 901 } 902} 903 904vm_offset_t 905pmap_extract(pmap_t pmap, vm_offset_t va) 906{ 907 TODO; 908 return (0); 909} 910 911/* 912 * Grow the number of kernel page table entries. Unneeded. 913 */ 914void 915pmap_growkernel(vm_offset_t addr) 916{ 917} 918 919void 920pmap_init(vm_offset_t phys_start, vm_offset_t phys_end) 921{ 922 923 CTR(KTR_PMAP, "pmap_init"); 924} 925 926void 927pmap_init2(void) 928{ 929 930 CTR(KTR_PMAP, "pmap_init2"); 931 zinitna(pmap_upvo_zone, &pmap_upvo_zone_obj, NULL, 0, PMAP_PVO_SIZE, 932 ZONE_INTERRUPT, 1); 933 pmap_mpvo_zone = zinit("managed pvo", sizeof(struct pvo_entry), 934 PMAP_PVO_SIZE, ZONE_INTERRUPT, 1); 935 pmap_initialized = TRUE; 936} 937 938boolean_t 939pmap_is_modified(vm_page_t m) 940{ 941 TODO; 942 return (0); 943} 944 945void 946pmap_clear_reference(vm_page_t m) 947{ 948 TODO; 949} 950 951/* 952 * pmap_ts_referenced: 953 * 954 * Return a count of reference bits for a page, clearing those bits. 955 * It is not necessary for every reference bit to be cleared, but it 956 * is necessary that 0 only be returned when there are truly no 957 * reference bits set. 958 * 959 * XXX: The exact number of bits to check and clear is a matter that 960 * should be tested and standardized at some point in the future for 961 * optimal aging of shared pages. 962 */ 963 964int 965pmap_ts_referenced(vm_page_t m) 966{ 967 TODO; 968 return (0); 969} 970 971/* 972 * Map a wired page into kernel virtual address space. 973 */ 974void 975pmap_kenter(vm_offset_t va, vm_offset_t pa) 976{ 977 u_int pte_lo; 978 int error; 979 int i; 980 981#if 0 982 if (va < VM_MIN_KERNEL_ADDRESS) 983 panic("pmap_kenter: attempt to enter non-kernel address %#x", 984 va); 985#endif 986 987 pte_lo = PTE_I | PTE_G | PTE_BW; 988 for (i = 0; phys_avail[i + 2] != 0; i += 2) { 989 if (pa >= phys_avail[i] && pa < phys_avail[i + 1]) { 990 pte_lo &= ~(PTE_I | PTE_G); 991 break; 992 } 993 } 994 995 error = pmap_pvo_enter(kernel_pmap, pmap_upvo_zone, 996 &pmap_pvo_kunmanaged, va, pa, pte_lo, PVO_WIRED); 997 998 if (error != 0 && error != ENOENT) 999 panic("pmap_kenter: failed to enter va %#x pa %#x: %d", va, 1000 pa, error); 1001 1002 /* 1003 * Flush the real memory from the instruction cache. 1004 */ 1005 if ((pte_lo & (PTE_I | PTE_G)) == 0) { 1006 pmap_syncicache(pa, PAGE_SIZE); 1007 } 1008} 1009 1010vm_offset_t 1011pmap_kextract(vm_offset_t va) 1012{ 1013 TODO; 1014 return (0); 1015} 1016 1017/* 1018 * Remove a wired page from kernel virtual address space. 1019 */ 1020void 1021pmap_kremove(vm_offset_t va) 1022{ 1023 1024 pmap_remove(kernel_pmap, va, roundup(va, PAGE_SIZE)); 1025} 1026 1027/* 1028 * Map a range of physical addresses into kernel virtual address space. 1029 * 1030 * The value passed in *virt is a suggested virtual address for the mapping. 1031 * Architectures which can support a direct-mapped physical to virtual region 1032 * can return the appropriate address within that region, leaving '*virt' 1033 * unchanged. We cannot and therefore do not; *virt is updated with the 1034 * first usable address after the mapped region. 1035 */ 1036vm_offset_t 1037pmap_map(vm_offset_t *virt, vm_offset_t pa_start, vm_offset_t pa_end, int prot) 1038{ 1039 vm_offset_t sva, va; 1040 1041 sva = *virt; 1042 va = sva; 1043 for (; pa_start < pa_end; pa_start += PAGE_SIZE, va += PAGE_SIZE) 1044 pmap_kenter(va, pa_start); 1045 *virt = va; 1046 return (sva); 1047} 1048 1049int 1050pmap_mincore(pmap_t pmap, vm_offset_t addr) 1051{ 1052 TODO; 1053 return (0); 1054} 1055 1056/* 1057 * Create the uarea for a new process. 1058 * This routine directly affects the fork perf for a process. 1059 */ 1060void 1061pmap_new_proc(struct proc *p) 1062{ 1063 vm_object_t upobj; 1064 vm_offset_t up; 1065 vm_page_t m; 1066 u_int i; 1067 1068 /* 1069 * Allocate the object for the upages. 1070 */ 1071 upobj = p->p_upages_obj; 1072 if (upobj == NULL) { 1073 upobj = vm_object_allocate(OBJT_DEFAULT, UAREA_PAGES); 1074 p->p_upages_obj = upobj; 1075 } 1076 1077 /* 1078 * Get a kernel virtual address for the uarea for this process. 1079 */ 1080 up = (vm_offset_t)p->p_uarea; 1081 if (up == 0) { 1082 up = kmem_alloc_nofault(kernel_map, UAREA_PAGES * PAGE_SIZE); 1083 if (up == 0) 1084 panic("pmap_new_proc: upage allocation failed"); 1085 p->p_uarea = (struct user *)up; 1086 } 1087 1088 for (i = 0; i < UAREA_PAGES; i++) { 1089 /* 1090 * Get a uarea page. 1091 */ 1092 m = vm_page_grab(upobj, i, VM_ALLOC_NORMAL | VM_ALLOC_RETRY); 1093 1094 /* 1095 * Wire the page. 1096 */ 1097 m->wire_count++; 1098 1099 /* 1100 * Enter the page into the kernel address space. 1101 */ 1102 pmap_kenter(up + i * PAGE_SIZE, VM_PAGE_TO_PHYS(m)); 1103 1104 vm_page_wakeup(m); 1105 vm_page_flag_clear(m, PG_ZERO); 1106 vm_page_flag_set(m, PG_MAPPED | PG_WRITEABLE); 1107 m->valid = VM_PAGE_BITS_ALL; 1108 } 1109} 1110 1111void 1112pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, vm_object_t object, 1113 vm_pindex_t pindex, vm_size_t size, int limit) 1114{ 1115 TODO; 1116} 1117 1118/* 1119 * Lower the permission for all mappings to a given page. 1120 */ 1121void 1122pmap_page_protect(vm_page_t m, vm_prot_t prot) 1123{ 1124 struct pvo_head *pvo_head; 1125 struct pvo_entry *pvo, *next_pvo; 1126 struct pte *pt; 1127 1128 /* 1129 * Since the routine only downgrades protection, if the 1130 * maximal protection is desired, there isn't any change 1131 * to be made. 1132 */ 1133 if ((prot & (VM_PROT_READ|VM_PROT_WRITE)) == 1134 (VM_PROT_READ|VM_PROT_WRITE)) 1135 return; 1136 1137 pvo_head = vm_page_to_pvoh(m); 1138 for (pvo = LIST_FIRST(pvo_head); pvo != NULL; pvo = next_pvo) { 1139 next_pvo = LIST_NEXT(pvo, pvo_vlink); 1140 PMAP_PVO_CHECK(pvo); /* sanity check */ 1141 1142 /* 1143 * Downgrading to no mapping at all, we just remove the entry. 1144 */ 1145 if ((prot & VM_PROT_READ) == 0) { 1146 pmap_pvo_remove(pvo, -1); 1147 continue; 1148 } 1149 1150 /* 1151 * If EXEC permission is being revoked, just clear the flag 1152 * in the PVO. 1153 */ 1154 if ((prot & VM_PROT_EXECUTE) == 0) 1155 pvo->pvo_vaddr &= ~PVO_EXECUTABLE; 1156 1157 /* 1158 * If this entry is already RO, don't diddle with the page 1159 * table. 1160 */ 1161 if ((pvo->pvo_pte.pte_lo & PTE_PP) == PTE_BR) { 1162 PMAP_PVO_CHECK(pvo); 1163 continue; 1164 } 1165 1166 /* 1167 * Grab the PTE before we diddle the bits so pvo_to_pte can 1168 * verify the pte contents are as expected. 1169 */ 1170 pt = pmap_pvo_to_pte(pvo, -1); 1171 pvo->pvo_pte.pte_lo &= ~PTE_PP; 1172 pvo->pvo_pte.pte_lo |= PTE_BR; 1173 if (pt != NULL) 1174 pmap_pte_change(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1175 PMAP_PVO_CHECK(pvo); /* sanity check */ 1176 } 1177} 1178 1179/* 1180 * Make the specified page pageable (or not). Unneeded. 1181 */ 1182void 1183pmap_pageable(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, 1184 boolean_t pageable) 1185{ 1186} 1187 1188/* 1189 * Returns true if the pmap's pv is one of the first 1190 * 16 pvs linked to from this page. This count may 1191 * be changed upwards or downwards in the future; it 1192 * is only necessary that true be returned for a small 1193 * subset of pmaps for proper page aging. 1194 */ 1195boolean_t 1196pmap_page_exists_quick(pmap_t pmap, vm_page_t m) 1197{ 1198 TODO; 1199 return (0); 1200} 1201 1202static u_int pmap_vsidcontext; 1203 1204void 1205pmap_pinit(pmap_t pmap) 1206{ 1207 int i, mask; 1208 u_int entropy; 1209 1210 entropy = 0; 1211 __asm __volatile("mftb %0" : "=r"(entropy)); 1212 1213 /* 1214 * Allocate some segment registers for this pmap. 1215 */ 1216 pmap->pm_count = 1; 1217 for (i = 0; i < NPMAPS; i += VSID_NBPW) { 1218 u_int hash, n; 1219 1220 /* 1221 * Create a new value by mutiplying by a prime and adding in 1222 * entropy from the timebase register. This is to make the 1223 * VSID more random so that the PT hash function collides 1224 * less often. (Note that the prime casues gcc to do shifts 1225 * instead of a multiply.) 1226 */ 1227 pmap_vsidcontext = (pmap_vsidcontext * 0x1105) + entropy; 1228 hash = pmap_vsidcontext & (NPMAPS - 1); 1229 if (hash == 0) /* 0 is special, avoid it */ 1230 continue; 1231 n = hash >> 5; 1232 mask = 1 << (hash & (VSID_NBPW - 1)); 1233 hash = (pmap_vsidcontext & 0xfffff); 1234 if (pmap_vsid_bitmap[n] & mask) { /* collision? */ 1235 /* anything free in this bucket? */ 1236 if (pmap_vsid_bitmap[n] == 0xffffffff) { 1237 entropy = (pmap_vsidcontext >> 20); 1238 continue; 1239 } 1240 i = ffs(~pmap_vsid_bitmap[i]) - 1; 1241 mask = 1 << i; 1242 hash &= 0xfffff & ~(VSID_NBPW - 1); 1243 hash |= i; 1244 } 1245 pmap_vsid_bitmap[n] |= mask; 1246 for (i = 0; i < 16; i++) 1247 pmap->pm_sr[i] = VSID_MAKE(i, hash); 1248 return; 1249 } 1250 1251 panic("pmap_pinit: out of segments"); 1252} 1253 1254/* 1255 * Initialize the pmap associated with process 0. 1256 */ 1257void 1258pmap_pinit0(pmap_t pm) 1259{ 1260 1261 pmap_pinit(pm); 1262 bzero(&pm->pm_stats, sizeof(pm->pm_stats)); 1263} 1264 1265void 1266pmap_pinit2(pmap_t pmap) 1267{ 1268 /* XXX: Remove this stub when no longer called */ 1269} 1270 1271void 1272pmap_prefault(pmap_t pmap, vm_offset_t va, vm_map_entry_t entry) 1273{ 1274 TODO; 1275} 1276 1277void 1278pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot) 1279{ 1280 TODO; 1281} 1282 1283vm_offset_t 1284pmap_phys_address(int ppn) 1285{ 1286 TODO; 1287 return (0); 1288} 1289 1290/* 1291 * Map a list of wired pages into kernel virtual address space. This is 1292 * intended for temporary mappings which do not need page modification or 1293 * references recorded. Existing mappings in the region are overwritten. 1294 */ 1295void 1296pmap_qenter(vm_offset_t va, vm_page_t *m, int count) 1297{ 1298 int i; 1299 1300 for (i = 0; i < count; i++, va += PAGE_SIZE) 1301 pmap_kenter(va, VM_PAGE_TO_PHYS(m[i])); 1302} 1303 1304/* 1305 * Remove page mappings from kernel virtual address space. Intended for 1306 * temporary mappings entered by pmap_qenter. 1307 */ 1308void 1309pmap_qremove(vm_offset_t va, int count) 1310{ 1311 int i; 1312 1313 for (i = 0; i < count; i++, va += PAGE_SIZE) 1314 pmap_kremove(va); 1315} 1316 1317/* 1318 * Add a reference to the specified pmap. 1319 */ 1320void 1321pmap_reference(pmap_t pm) 1322{ 1323 1324 if (pm != NULL) 1325 pm->pm_count++; 1326} 1327 1328void 1329pmap_release(pmap_t pmap) 1330{ 1331 TODO; 1332} 1333 1334/* 1335 * Remove the given range of addresses from the specified map. 1336 */ 1337void 1338pmap_remove(pmap_t pm, vm_offset_t sva, vm_offset_t eva) 1339{ 1340 struct pvo_entry *pvo; 1341 int pteidx; 1342 1343 for (; sva < eva; sva += PAGE_SIZE) { 1344 pvo = pmap_pvo_find_va(pm, sva, &pteidx); 1345 if (pvo != NULL) { 1346 pmap_pvo_remove(pvo, pteidx); 1347 } 1348 } 1349} 1350 1351void 1352pmap_remove_pages(pmap_t pmap, vm_offset_t sva, vm_offset_t eva) 1353{ 1354 TODO; 1355} 1356 1357void 1358pmap_swapin_proc(struct proc *p) 1359{ 1360 TODO; 1361} 1362 1363void 1364pmap_swapout_proc(struct proc *p) 1365{ 1366 TODO; 1367} 1368 1369/* 1370 * Create the kernel stack and pcb for a new thread. 1371 * This routine directly affects the fork perf for a process and 1372 * create performance for a thread. 1373 */ 1374void 1375pmap_new_thread(struct thread *td) 1376{ 1377 vm_object_t ksobj; 1378 vm_offset_t ks; 1379 vm_page_t m; 1380 u_int i; 1381 1382 /* 1383 * Allocate object for the kstack. 1384 */ 1385 ksobj = td->td_kstack_obj; 1386 if (ksobj == NULL) { 1387 ksobj = vm_object_allocate(OBJT_DEFAULT, KSTACK_PAGES); 1388 td->td_kstack_obj = ksobj; 1389 } 1390 1391 /* 1392 * Get a kernel virtual address for the kstack for this thread. 1393 */ 1394 ks = td->td_kstack; 1395 if (ks == 0) { 1396 ks = kmem_alloc_nofault(kernel_map, 1397 (KSTACK_PAGES + KSTACK_GUARD_PAGES) * PAGE_SIZE); 1398 if (ks == 0) 1399 panic("pmap_new_thread: kstack allocation failed"); 1400 TLBIE(ks); 1401 ks += KSTACK_GUARD_PAGES * PAGE_SIZE; 1402 td->td_kstack = ks; 1403 } 1404 1405 for (i = 0; i < KSTACK_PAGES; i++) { 1406 /* 1407 * Get a kernel stack page. 1408 */ 1409 m = vm_page_grab(ksobj, i, VM_ALLOC_NORMAL | VM_ALLOC_RETRY); 1410 1411 /* 1412 * Wire the page. 1413 */ 1414 m->wire_count++; 1415 1416 /* 1417 * Enter the page into the kernel address space. 1418 */ 1419 pmap_kenter(ks + i * PAGE_SIZE, VM_PAGE_TO_PHYS(m)); 1420 1421 vm_page_wakeup(m); 1422 vm_page_flag_clear(m, PG_ZERO); 1423 vm_page_flag_set(m, PG_MAPPED | PG_WRITEABLE); 1424 m->valid = VM_PAGE_BITS_ALL; 1425 } 1426} 1427 1428void 1429pmap_dispose_proc(struct proc *p) 1430{ 1431 TODO; 1432} 1433 1434void 1435pmap_dispose_thread(struct thread *td) 1436{ 1437 TODO; 1438} 1439 1440void 1441pmap_swapin_thread(struct thread *td) 1442{ 1443 TODO; 1444} 1445 1446void 1447pmap_swapout_thread(struct thread *td) 1448{ 1449 TODO; 1450} 1451 1452/* 1453 * Allocate a physical page of memory directly from the phys_avail map. 1454 * Can only be called from pmap_bootstrap before avail start and end are 1455 * calculated. 1456 */ 1457static vm_offset_t 1458pmap_bootstrap_alloc(vm_size_t size, u_int align) 1459{ 1460 vm_offset_t s, e; 1461 int i, j; 1462 1463 size = round_page(size); 1464 for (i = 0; phys_avail[i + 1] != 0; i += 2) { 1465 if (align != 0) 1466 s = (phys_avail[i] + align - 1) & ~(align - 1); 1467 else 1468 s = phys_avail[i]; 1469 e = s + size; 1470 1471 if (s < phys_avail[i] || e > phys_avail[i + 1]) 1472 continue; 1473 1474 if (s == phys_avail[i]) { 1475 phys_avail[i] += size; 1476 } else if (e == phys_avail[i + 1]) { 1477 phys_avail[i + 1] -= size; 1478 } else { 1479 for (j = phys_avail_count * 2; j > i; j -= 2) { 1480 phys_avail[j] = phys_avail[j - 2]; 1481 phys_avail[j + 1] = phys_avail[j - 1]; 1482 } 1483 1484 phys_avail[i + 3] = phys_avail[i + 1]; 1485 phys_avail[i + 1] = s; 1486 phys_avail[i + 2] = e; 1487 phys_avail_count++; 1488 } 1489 1490 return (s); 1491 } 1492 panic("pmap_bootstrap_alloc: could not allocate memory"); 1493} 1494 1495/* 1496 * Return an unmapped pvo for a kernel virtual address. 1497 * Used by pmap functions that operate on physical pages. 1498 */ 1499static struct pvo_entry * 1500pmap_rkva_alloc(void) 1501{ 1502 struct pvo_entry *pvo; 1503 struct pte *pt; 1504 vm_offset_t kva; 1505 int pteidx; 1506 1507 if (pmap_rkva_count == 0) 1508 panic("pmap_rkva_alloc: no more reserved KVAs"); 1509 1510 kva = pmap_rkva_start + (PAGE_SIZE * --pmap_rkva_count); 1511 pmap_kenter(kva, 0); 1512 1513 pvo = pmap_pvo_find_va(kernel_pmap, kva, &pteidx); 1514 1515 if (pvo == NULL) 1516 panic("pmap_kva_alloc: pmap_pvo_find_va failed"); 1517 1518 pt = pmap_pvo_to_pte(pvo, pteidx); 1519 1520 if (pt == NULL) 1521 panic("pmap_kva_alloc: pmap_pvo_to_pte failed"); 1522 1523 pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1524 PVO_PTEGIDX_CLR(pvo); 1525 1526 pmap_pte_overflow++; 1527 1528 return (pvo); 1529} 1530 1531static void 1532pmap_pa_map(struct pvo_entry *pvo, vm_offset_t pa, struct pte *saved_pt, 1533 int *depth_p) 1534{ 1535 struct pte *pt; 1536 1537 /* 1538 * If this pvo already has a valid pte, we need to save it so it can 1539 * be restored later. We then just reload the new PTE over the old 1540 * slot. 1541 */ 1542 if (saved_pt != NULL) { 1543 pt = pmap_pvo_to_pte(pvo, -1); 1544 1545 if (pt != NULL) { 1546 pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1547 PVO_PTEGIDX_CLR(pvo); 1548 pmap_pte_overflow++; 1549 } 1550 1551 *saved_pt = pvo->pvo_pte; 1552 1553 pvo->pvo_pte.pte_lo &= ~PTE_RPGN; 1554 } 1555 1556 pvo->pvo_pte.pte_lo |= pa; 1557 1558 if (!pmap_pte_spill(pvo->pvo_vaddr)) 1559 panic("pmap_pa_map: could not spill pvo %p", pvo); 1560 1561 if (depth_p != NULL) 1562 (*depth_p)++; 1563} 1564 1565static void 1566pmap_pa_unmap(struct pvo_entry *pvo, struct pte *saved_pt, int *depth_p) 1567{ 1568 struct pte *pt; 1569 1570 pt = pmap_pvo_to_pte(pvo, -1); 1571 1572 if (pt != NULL) { 1573 pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1574 PVO_PTEGIDX_CLR(pvo); 1575 pmap_pte_overflow++; 1576 } 1577 1578 pvo->pvo_pte.pte_lo &= ~PTE_RPGN; 1579 1580 /* 1581 * If there is a saved PTE and it's valid, restore it and return. 1582 */ 1583 if (saved_pt != NULL && (saved_pt->pte_lo & PTE_RPGN) != 0) { 1584 if (depth_p != NULL && --(*depth_p) == 0) 1585 panic("pmap_pa_unmap: restoring but depth == 0"); 1586 1587 pvo->pvo_pte = *saved_pt; 1588 1589 if (!pmap_pte_spill(pvo->pvo_vaddr)) 1590 panic("pmap_pa_unmap: could not spill pvo %p", pvo); 1591 } 1592} 1593 1594static void 1595pmap_syncicache(vm_offset_t pa, vm_size_t len) 1596{ 1597 __syncicache((void *)pa, len); 1598} 1599 1600static void 1601tlbia(void) 1602{ 1603 caddr_t i; 1604 1605 SYNC(); 1606 for (i = 0; i < (caddr_t)0x00040000; i += 0x00001000) { 1607 TLBIE(i); 1608 EIEIO(); 1609 } 1610 TLBSYNC(); 1611 SYNC(); 1612} 1613 1614static int 1615pmap_pvo_enter(pmap_t pm, vm_zone_t zone, struct pvo_head *pvo_head, 1616 vm_offset_t va, vm_offset_t pa, u_int pte_lo, int flags) 1617{ 1618 struct pvo_entry *pvo; 1619 u_int sr; 1620 int first; 1621 u_int ptegidx; 1622 int i; 1623 1624 pmap_pvo_enter_calls++; 1625 1626 /* 1627 * Compute the PTE Group index. 1628 */ 1629 va &= ~ADDR_POFF; 1630 sr = va_to_sr(pm->pm_sr, va); 1631 ptegidx = va_to_pteg(sr, va); 1632 1633 /* 1634 * Remove any existing mapping for this page. Reuse the pvo entry if 1635 * there is a mapping. 1636 */ 1637 LIST_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 1638 if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) { 1639 pmap_pvo_remove(pvo, -1); 1640 break; 1641 } 1642 } 1643 1644 /* 1645 * If we aren't overwriting a mapping, try to allocate. 1646 */ 1647 pvo = zalloc(zone); 1648 1649 if (pvo == NULL) { 1650 return (ENOMEM); 1651 } 1652 1653 pmap_pvo_entries++; 1654 pvo->pvo_vaddr = va; 1655 pvo->pvo_pmap = pm; 1656 LIST_INSERT_HEAD(&pmap_pvo_table[ptegidx], pvo, pvo_olink); 1657 pvo->pvo_vaddr &= ~ADDR_POFF; 1658 if (flags & VM_PROT_EXECUTE) 1659 pvo->pvo_vaddr |= PVO_EXECUTABLE; 1660 if (flags & PVO_WIRED) 1661 pvo->pvo_vaddr |= PVO_WIRED; 1662 if (pvo_head != &pmap_pvo_kunmanaged) 1663 pvo->pvo_vaddr |= PVO_MANAGED; 1664 pmap_pte_create(&pvo->pvo_pte, sr, va, pa | pte_lo); 1665 1666 /* 1667 * Remember if the list was empty and therefore will be the first 1668 * item. 1669 */ 1670 first = LIST_FIRST(pvo_head) == NULL; 1671 1672 LIST_INSERT_HEAD(pvo_head, pvo, pvo_vlink); 1673 if (pvo->pvo_pte.pte_lo & PVO_WIRED) 1674 pvo->pvo_pmap->pm_stats.wired_count++; 1675 pvo->pvo_pmap->pm_stats.resident_count++; 1676 1677 /* 1678 * We hope this succeeds but it isn't required. 1679 */ 1680 i = pmap_pte_insert(ptegidx, &pvo->pvo_pte); 1681 if (i >= 0) { 1682 PVO_PTEGIDX_SET(pvo, i); 1683 } else { 1684 panic("pmap_pvo_enter: overflow"); 1685 pmap_pte_overflow++; 1686 } 1687 1688 return (first ? ENOENT : 0); 1689} 1690 1691static void 1692pmap_pvo_remove(struct pvo_entry *pvo, int pteidx) 1693{ 1694 struct pte *pt; 1695 1696 /* 1697 * If there is an active pte entry, we need to deactivate it (and 1698 * save the ref & cfg bits). 1699 */ 1700 pt = pmap_pvo_to_pte(pvo, pteidx); 1701 if (pt != NULL) { 1702 pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1703 PVO_PTEGIDX_CLR(pvo); 1704 } else { 1705 pmap_pte_overflow--; 1706 } 1707 1708 /* 1709 * Update our statistics. 1710 */ 1711 pvo->pvo_pmap->pm_stats.resident_count--; 1712 if (pvo->pvo_pte.pte_lo & PVO_WIRED) 1713 pvo->pvo_pmap->pm_stats.wired_count--; 1714 1715 /* 1716 * Save the REF/CHG bits into their cache if the page is managed. 1717 */ 1718 if (pvo->pvo_vaddr & PVO_MANAGED) { 1719 struct vm_page *pg; 1720 1721 pg = PHYS_TO_VM_PAGE(pvo->pvo_pte.pte_lo * PTE_RPGN); 1722 if (pg != NULL) { 1723 pmap_attr_save(pg, pvo->pvo_pte.pte_lo & 1724 (PTE_REF | PTE_CHG)); 1725 } 1726 } 1727 1728 /* 1729 * Remove this PVO from the PV list. 1730 */ 1731 LIST_REMOVE(pvo, pvo_vlink); 1732 1733 /* 1734 * Remove this from the overflow list and return it to the pool 1735 * if we aren't going to reuse it. 1736 */ 1737 LIST_REMOVE(pvo, pvo_olink); 1738 zfree(pvo->pvo_vaddr & PVO_MANAGED ? pmap_mpvo_zone : pmap_upvo_zone, 1739 pvo); 1740 pmap_pvo_entries--; 1741 pmap_pvo_remove_calls++; 1742} 1743 1744static __inline int 1745pmap_pvo_pte_index(const struct pvo_entry *pvo, int ptegidx) 1746{ 1747 int pteidx; 1748 1749 /* 1750 * We can find the actual pte entry without searching by grabbing 1751 * the PTEG index from 3 unused bits in pte_lo[11:9] and by 1752 * noticing the HID bit. 1753 */ 1754 pteidx = ptegidx * 8 + PVO_PTEGIDX_GET(pvo); 1755 if (pvo->pvo_pte.pte_hi & PTE_HID) 1756 pteidx ^= pmap_pteg_mask * 8; 1757 1758 return (pteidx); 1759} 1760 1761static struct pvo_entry * 1762pmap_pvo_find_va(pmap_t pm, vm_offset_t va, int *pteidx_p) 1763{ 1764 struct pvo_entry *pvo; 1765 int ptegidx; 1766 u_int sr; 1767 1768 va &= ~ADDR_POFF; 1769 sr = va_to_sr(pm->pm_sr, va); 1770 ptegidx = va_to_pteg(sr, va); 1771 1772 LIST_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 1773 if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) { 1774 if (pteidx_p) 1775 *pteidx_p = pmap_pvo_pte_index(pvo, ptegidx); 1776 return (pvo); 1777 } 1778 } 1779 1780 return (NULL); 1781} 1782 1783static struct pte * 1784pmap_pvo_to_pte(const struct pvo_entry *pvo, int pteidx) 1785{ 1786 struct pte *pt; 1787 1788 /* 1789 * If we haven't been supplied the ptegidx, calculate it. 1790 */ 1791 if (pteidx == -1) { 1792 int ptegidx; 1793 u_int sr; 1794 1795 sr = va_to_sr(pvo->pvo_pmap->pm_sr, pvo->pvo_vaddr); 1796 ptegidx = va_to_pteg(sr, pvo->pvo_vaddr); 1797 pteidx = pmap_pvo_pte_index(pvo, ptegidx); 1798 } 1799 1800 pt = &pmap_pteg_table[pteidx >> 3].pt[pteidx & 7]; 1801 1802 if ((pvo->pvo_pte.pte_hi & PTE_VALID) && !PVO_PTEGIDX_ISSET(pvo)) { 1803 panic("pmap_pvo_to_pte: pvo %p has valid pte in pvo but no " 1804 "valid pte index", pvo); 1805 } 1806 1807 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0 && PVO_PTEGIDX_ISSET(pvo)) { 1808 panic("pmap_pvo_to_pte: pvo %p has valid pte index in pvo " 1809 "pvo but no valid pte", pvo); 1810 } 1811 1812 if ((pt->pte_hi ^ (pvo->pvo_pte.pte_hi & ~PTE_VALID)) == PTE_VALID) { 1813 if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0) { 1814 panic("pmap_pvo_to_pte: pvo %p has valid pte in " 1815 "pmap_pteg_table %p but invalid in pvo", pvo, pt); 1816 } 1817 1818 if (((pt->pte_lo ^ pvo->pvo_pte.pte_lo) & ~(PTE_CHG|PTE_REF)) 1819 != 0) { 1820 panic("pmap_pvo_to_pte: pvo %p pte does not match " 1821 "pte %p in pmap_pteg_table", pvo, pt); 1822 } 1823 1824 return (pt); 1825 } 1826 1827 if (pvo->pvo_pte.pte_hi & PTE_VALID) { 1828 panic("pmap_pvo_to_pte: pvo %p has invalid pte %p in " 1829 "pmap_pteg_table but valid in pvo", pvo, pt); 1830 } 1831 1832 return (NULL); 1833} 1834 1835/* 1836 * XXX: THIS STUFF SHOULD BE IN pte.c? 1837 */ 1838int 1839pmap_pte_spill(vm_offset_t addr) 1840{ 1841 struct pvo_entry *source_pvo, *victim_pvo; 1842 struct pvo_entry *pvo; 1843 int ptegidx, i, j; 1844 u_int sr; 1845 struct pteg *pteg; 1846 struct pte *pt; 1847 1848 pmap_pte_spills++; 1849 1850 __asm __volatile("mfsrin %0,%1" : "=r"(sr) : "r"(addr)); 1851 ptegidx = va_to_pteg(sr, addr); 1852 1853 /* 1854 * Have to substitute some entry. Use the primary hash for this. 1855 * Use low bits of timebase as random generator. 1856 */ 1857 pteg = &pmap_pteg_table[ptegidx]; 1858 __asm __volatile("mftb %0" : "=r"(i)); 1859 i &= 7; 1860 pt = &pteg->pt[i]; 1861 1862 source_pvo = NULL; 1863 victim_pvo = NULL; 1864 LIST_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 1865 /* 1866 * We need to find a pvo entry for this address. 1867 */ 1868 PMAP_PVO_CHECK(pvo); 1869 if (source_pvo == NULL && 1870 pmap_pte_match(&pvo->pvo_pte, sr, addr, 1871 pvo->pvo_pte.pte_hi & PTE_HID)) { 1872 /* 1873 * Now found an entry to be spilled into the pteg. 1874 * The PTE is now valid, so we know it's active. 1875 */ 1876 j = pmap_pte_insert(ptegidx, &pvo->pvo_pte); 1877 1878 if (j >= 0) { 1879 PVO_PTEGIDX_SET(pvo, j); 1880 pmap_pte_overflow--; 1881 PMAP_PVO_CHECK(pvo); 1882 return (1); 1883 } 1884 1885 source_pvo = pvo; 1886 1887 if (victim_pvo != NULL) 1888 break; 1889 } 1890 1891 /* 1892 * We also need the pvo entry of the victim we are replacing 1893 * so save the R & C bits of the PTE. 1894 */ 1895 if ((pt->pte_hi & PTE_HID) == 0 && victim_pvo == NULL && 1896 pmap_pte_compare(pt, &pvo->pvo_pte)) { 1897 victim_pvo = pvo; 1898 if (source_pvo != NULL) 1899 break; 1900 } 1901 } 1902 1903 if (source_pvo == NULL) 1904 return (0); 1905 1906 if (victim_pvo == NULL) { 1907 if ((pt->pte_hi & PTE_HID) == 0) 1908 panic("pmap_pte_spill: victim p-pte (%p) has no pvo" 1909 "entry", pt); 1910 1911 /* 1912 * If this is a secondary PTE, we need to search it's primary 1913 * pvo bucket for the matching PVO. 1914 */ 1915 LIST_FOREACH(pvo, &pmap_pvo_table[ptegidx ^ pmap_pteg_mask], 1916 pvo_olink) { 1917 PMAP_PVO_CHECK(pvo); 1918 /* 1919 * We also need the pvo entry of the victim we are 1920 * replacing so save the R & C bits of the PTE. 1921 */ 1922 if (pmap_pte_compare(pt, &pvo->pvo_pte)) { 1923 victim_pvo = pvo; 1924 break; 1925 } 1926 } 1927 1928 if (victim_pvo == NULL) 1929 panic("pmap_pte_spill: victim s-pte (%p) has no pvo" 1930 "entry", pt); 1931 } 1932 1933 /* 1934 * We are invalidating the TLB entry for the EA we are replacing even 1935 * though it's valid. If we don't, we lose any ref/chg bit changes 1936 * contained in the TLB entry. 1937 */ 1938 source_pvo->pvo_pte.pte_hi &= ~PTE_HID; 1939 1940 pmap_pte_unset(pt, &victim_pvo->pvo_pte, victim_pvo->pvo_vaddr); 1941 pmap_pte_set(pt, &source_pvo->pvo_pte); 1942 1943 PVO_PTEGIDX_CLR(victim_pvo); 1944 PVO_PTEGIDX_SET(source_pvo, i); 1945 pmap_pte_replacements++; 1946 1947 PMAP_PVO_CHECK(victim_pvo); 1948 PMAP_PVO_CHECK(source_pvo); 1949 1950 return (1); 1951} 1952 1953static int 1954pmap_pte_insert(u_int ptegidx, struct pte *pvo_pt) 1955{ 1956 struct pte *pt; 1957 int i; 1958 1959 /* 1960 * First try primary hash. 1961 */ 1962 for (pt = pmap_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) { 1963 if ((pt->pte_hi & PTE_VALID) == 0) { 1964 pvo_pt->pte_hi &= ~PTE_HID; 1965 pmap_pte_set(pt, pvo_pt); 1966 return (i); 1967 } 1968 } 1969 1970 /* 1971 * Now try secondary hash. 1972 */ 1973 ptegidx ^= pmap_pteg_mask; 1974 ptegidx++; 1975 for (pt = pmap_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) { 1976 if ((pt->pte_hi & PTE_VALID) == 0) { 1977 pvo_pt->pte_hi |= PTE_HID; 1978 pmap_pte_set(pt, pvo_pt); 1979 return (i); 1980 } 1981 } 1982 1983 panic("pmap_pte_insert: overflow"); 1984 return (-1); 1985} 1986 1987static boolean_t 1988pmap_query_bit(vm_page_t m, int ptebit) 1989{ 1990 struct pvo_entry *pvo; 1991 struct pte *pt; 1992 1993 if (pmap_attr_fetch(m) & ptebit) 1994 return (TRUE); 1995 1996 LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) { 1997 PMAP_PVO_CHECK(pvo); /* sanity check */ 1998 1999 /* 2000 * See if we saved the bit off. If so, cache it and return 2001 * success. 2002 */ 2003 if (pvo->pvo_pte.pte_lo & ptebit) { 2004 pmap_attr_save(m, ptebit); 2005 PMAP_PVO_CHECK(pvo); /* sanity check */ 2006 return (TRUE); 2007 } 2008 } 2009 2010 /* 2011 * No luck, now go through the hard part of looking at the PTEs 2012 * themselves. Sync so that any pending REF/CHG bits are flushed to 2013 * the PTEs. 2014 */ 2015 SYNC(); 2016 LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) { 2017 PMAP_PVO_CHECK(pvo); /* sanity check */ 2018 2019 /* 2020 * See if this pvo has a valid PTE. if so, fetch the 2021 * REF/CHG bits from the valid PTE. If the appropriate 2022 * ptebit is set, cache it and return success. 2023 */ 2024 pt = pmap_pvo_to_pte(pvo, -1); 2025 if (pt != NULL) { 2026 pmap_pte_synch(pt, &pvo->pvo_pte); 2027 if (pvo->pvo_pte.pte_lo & ptebit) { 2028 pmap_attr_save(m, ptebit); 2029 PMAP_PVO_CHECK(pvo); /* sanity check */ 2030 return (TRUE); 2031 } 2032 } 2033 } 2034 2035 return (TRUE); 2036} 2037 2038static boolean_t 2039pmap_clear_bit(vm_page_t m, int ptebit) 2040{ 2041 struct pvo_entry *pvo; 2042 struct pte *pt; 2043 int rv; 2044 2045 /* 2046 * Clear the cached value. 2047 */ 2048 rv = pmap_attr_fetch(m); 2049 pmap_attr_clear(m, ptebit); 2050 2051 /* 2052 * Sync so that any pending REF/CHG bits are flushed to the PTEs (so 2053 * we can reset the right ones). note that since the pvo entries and 2054 * list heads are accessed via BAT0 and are never placed in the page 2055 * table, we don't have to worry about further accesses setting the 2056 * REF/CHG bits. 2057 */ 2058 SYNC(); 2059 2060 /* 2061 * For each pvo entry, clear the pvo's ptebit. If this pvo has a 2062 * valid pte clear the ptebit from the valid pte. 2063 */ 2064 LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) { 2065 PMAP_PVO_CHECK(pvo); /* sanity check */ 2066 pt = pmap_pvo_to_pte(pvo, -1); 2067 if (pt != NULL) { 2068 pmap_pte_synch(pt, &pvo->pvo_pte); 2069 if (pvo->pvo_pte.pte_lo & ptebit) 2070 pmap_pte_clear(pt, PVO_VADDR(pvo), ptebit); 2071 } 2072 rv |= pvo->pvo_pte.pte_lo; 2073 pvo->pvo_pte.pte_lo &= ~ptebit; 2074 PMAP_PVO_CHECK(pvo); /* sanity check */ 2075 } 2076 2077 return ((rv & ptebit) != 0); 2078} 2079