mmu_oea.c revision 143200
1139825Simp/*- 290643Sbenno * Copyright (c) 2001 The NetBSD Foundation, Inc. 390643Sbenno * All rights reserved. 490643Sbenno * 590643Sbenno * This code is derived from software contributed to The NetBSD Foundation 690643Sbenno * by Matt Thomas <matt@3am-software.com> of Allegro Networks, Inc. 790643Sbenno * 890643Sbenno * Redistribution and use in source and binary forms, with or without 990643Sbenno * modification, are permitted provided that the following conditions 1090643Sbenno * are met: 1190643Sbenno * 1. Redistributions of source code must retain the above copyright 1290643Sbenno * notice, this list of conditions and the following disclaimer. 1390643Sbenno * 2. Redistributions in binary form must reproduce the above copyright 1490643Sbenno * notice, this list of conditions and the following disclaimer in the 1590643Sbenno * documentation and/or other materials provided with the distribution. 1690643Sbenno * 3. All advertising materials mentioning features or use of this software 1790643Sbenno * must display the following acknowledgement: 1890643Sbenno * This product includes software developed by the NetBSD 1990643Sbenno * Foundation, Inc. and its contributors. 2090643Sbenno * 4. Neither the name of The NetBSD Foundation nor the names of its 2190643Sbenno * contributors may be used to endorse or promote products derived 2290643Sbenno * from this software without specific prior written permission. 2390643Sbenno * 2490643Sbenno * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 2590643Sbenno * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 2690643Sbenno * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 2790643Sbenno * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 2890643Sbenno * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 2990643Sbenno * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 3090643Sbenno * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 3190643Sbenno * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 3290643Sbenno * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 3390643Sbenno * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 3490643Sbenno * POSSIBILITY OF SUCH DAMAGE. 3590643Sbenno */ 36139825Simp/*- 3777957Sbenno * Copyright (C) 1995, 1996 Wolfgang Solfrank. 3877957Sbenno * Copyright (C) 1995, 1996 TooLs GmbH. 3977957Sbenno * All rights reserved. 4077957Sbenno * 4177957Sbenno * Redistribution and use in source and binary forms, with or without 4277957Sbenno * modification, are permitted provided that the following conditions 4377957Sbenno * are met: 4477957Sbenno * 1. Redistributions of source code must retain the above copyright 4577957Sbenno * notice, this list of conditions and the following disclaimer. 4677957Sbenno * 2. Redistributions in binary form must reproduce the above copyright 4777957Sbenno * notice, this list of conditions and the following disclaimer in the 4877957Sbenno * documentation and/or other materials provided with the distribution. 4977957Sbenno * 3. All advertising materials mentioning features or use of this software 5077957Sbenno * must display the following acknowledgement: 5177957Sbenno * This product includes software developed by TooLs GmbH. 5277957Sbenno * 4. The name of TooLs GmbH may not be used to endorse or promote products 5377957Sbenno * derived from this software without specific prior written permission. 5477957Sbenno * 5577957Sbenno * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 5677957Sbenno * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 5777957Sbenno * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 5877957Sbenno * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 5977957Sbenno * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 6077957Sbenno * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 6177957Sbenno * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 6277957Sbenno * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 6377957Sbenno * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 6477957Sbenno * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 6577957Sbenno * 6678880Sbenno * $NetBSD: pmap.c,v 1.28 2000/03/26 20:42:36 kleink Exp $ 6777957Sbenno */ 68139825Simp/*- 6977957Sbenno * Copyright (C) 2001 Benno Rice. 7077957Sbenno * All rights reserved. 7177957Sbenno * 7277957Sbenno * Redistribution and use in source and binary forms, with or without 7377957Sbenno * modification, are permitted provided that the following conditions 7477957Sbenno * are met: 7577957Sbenno * 1. Redistributions of source code must retain the above copyright 7677957Sbenno * notice, this list of conditions and the following disclaimer. 7777957Sbenno * 2. Redistributions in binary form must reproduce the above copyright 7877957Sbenno * notice, this list of conditions and the following disclaimer in the 7977957Sbenno * documentation and/or other materials provided with the distribution. 8077957Sbenno * 8177957Sbenno * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR 8277957Sbenno * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 8377957Sbenno * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 8477957Sbenno * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 8577957Sbenno * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 8677957Sbenno * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 8777957Sbenno * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 8877957Sbenno * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 8977957Sbenno * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 9077957Sbenno * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 9177957Sbenno */ 9277957Sbenno 93113038Sobrien#include <sys/cdefs.h> 94113038Sobrien__FBSDID("$FreeBSD: head/sys/powerpc/aim/mmu_oea.c 143200 2005-03-07 01:46:06Z grehan $"); 9577957Sbenno 9690643Sbenno/* 9790643Sbenno * Manages physical address maps. 9890643Sbenno * 9990643Sbenno * In addition to hardware address maps, this module is called upon to 10090643Sbenno * provide software-use-only maps which may or may not be stored in the 10190643Sbenno * same form as hardware maps. These pseudo-maps are used to store 10290643Sbenno * intermediate results from copy operations to and from address spaces. 10390643Sbenno * 10490643Sbenno * Since the information managed by this module is also stored by the 10590643Sbenno * logical address mapping module, this module may throw away valid virtual 10690643Sbenno * to physical mappings at almost any time. However, invalidations of 10790643Sbenno * mappings must be done as requested. 10890643Sbenno * 10990643Sbenno * In order to cope with hardware architectures which make virtual to 11090643Sbenno * physical map invalidates expensive, this module may delay invalidate 11190643Sbenno * reduced protection operations until such time as they are actually 11290643Sbenno * necessary. This module is given full information as to which processors 11390643Sbenno * are currently using which maps, and to when physical maps must be made 11490643Sbenno * correct. 11590643Sbenno */ 11690643Sbenno 117118239Speter#include "opt_kstack_pages.h" 118118239Speter 11977957Sbenno#include <sys/param.h> 12080431Speter#include <sys/kernel.h> 12190643Sbenno#include <sys/ktr.h> 12290643Sbenno#include <sys/lock.h> 12390643Sbenno#include <sys/msgbuf.h> 12490643Sbenno#include <sys/mutex.h> 12577957Sbenno#include <sys/proc.h> 12690643Sbenno#include <sys/sysctl.h> 12790643Sbenno#include <sys/systm.h> 12877957Sbenno#include <sys/vmmeter.h> 12977957Sbenno 13090643Sbenno#include <dev/ofw/openfirm.h> 13190643Sbenno 13290643Sbenno#include <vm/vm.h> 13377957Sbenno#include <vm/vm_param.h> 13477957Sbenno#include <vm/vm_kern.h> 13577957Sbenno#include <vm/vm_page.h> 13677957Sbenno#include <vm/vm_map.h> 13777957Sbenno#include <vm/vm_object.h> 13877957Sbenno#include <vm/vm_extern.h> 13977957Sbenno#include <vm/vm_pageout.h> 14077957Sbenno#include <vm/vm_pager.h> 14192847Sjeff#include <vm/uma.h> 14277957Sbenno 143125687Sgrehan#include <machine/cpu.h> 14497346Sbenno#include <machine/powerpc.h> 14583730Smp#include <machine/bat.h> 14690643Sbenno#include <machine/frame.h> 14790643Sbenno#include <machine/md_var.h> 14890643Sbenno#include <machine/psl.h> 14977957Sbenno#include <machine/pte.h> 15090643Sbenno#include <machine/sr.h> 15177957Sbenno 15290643Sbenno#define PMAP_DEBUG 15377957Sbenno 15490643Sbenno#define TODO panic("%s: not implemented", __func__); 15577957Sbenno 15690643Sbenno#define TLBIE(va) __asm __volatile("tlbie %0" :: "r"(va)) 15790643Sbenno#define TLBSYNC() __asm __volatile("tlbsync"); 15890643Sbenno#define SYNC() __asm __volatile("sync"); 15990643Sbenno#define EIEIO() __asm __volatile("eieio"); 16090643Sbenno 16190643Sbenno#define VSID_MAKE(sr, hash) ((sr) | (((hash) & 0xfffff) << 4)) 16290643Sbenno#define VSID_TO_SR(vsid) ((vsid) & 0xf) 16390643Sbenno#define VSID_TO_HASH(vsid) (((vsid) >> 4) & 0xfffff) 16490643Sbenno 165142416Sgrehan#define PVO_PTEGIDX_MASK 0x007 /* which PTEG slot */ 166142416Sgrehan#define PVO_PTEGIDX_VALID 0x008 /* slot is valid */ 167142416Sgrehan#define PVO_WIRED 0x010 /* PVO entry is wired */ 168142416Sgrehan#define PVO_MANAGED 0x020 /* PVO entry is managed */ 169142416Sgrehan#define PVO_EXECUTABLE 0x040 /* PVO entry is executable */ 170142416Sgrehan#define PVO_BOOTSTRAP 0x080 /* PVO entry allocated during 17192521Sbenno bootstrap */ 172142416Sgrehan#define PVO_FAKE 0x100 /* fictitious phys page */ 17390643Sbenno#define PVO_VADDR(pvo) ((pvo)->pvo_vaddr & ~ADDR_POFF) 17490643Sbenno#define PVO_ISEXECUTABLE(pvo) ((pvo)->pvo_vaddr & PVO_EXECUTABLE) 175142416Sgrehan#define PVO_ISFAKE(pvo) ((pvo)->pvo_vaddr & PVO_FAKE) 17690643Sbenno#define PVO_PTEGIDX_GET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_MASK) 17790643Sbenno#define PVO_PTEGIDX_ISSET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_VALID) 17890643Sbenno#define PVO_PTEGIDX_CLR(pvo) \ 17990643Sbenno ((void)((pvo)->pvo_vaddr &= ~(PVO_PTEGIDX_VALID|PVO_PTEGIDX_MASK))) 18090643Sbenno#define PVO_PTEGIDX_SET(pvo, i) \ 18190643Sbenno ((void)((pvo)->pvo_vaddr |= (i)|PVO_PTEGIDX_VALID)) 18290643Sbenno 18390643Sbenno#define PMAP_PVO_CHECK(pvo) 18490643Sbenno 18590643Sbennostruct ofw_map { 18690643Sbenno vm_offset_t om_va; 18790643Sbenno vm_size_t om_len; 18890643Sbenno vm_offset_t om_pa; 18990643Sbenno u_int om_mode; 19090643Sbenno}; 19177957Sbenno 19290643Sbennoint pmap_bootstrapped = 0; 19377957Sbenno 19490643Sbenno/* 19590643Sbenno * Virtual and physical address of message buffer. 19690643Sbenno */ 19790643Sbennostruct msgbuf *msgbufp; 19890643Sbennovm_offset_t msgbuf_phys; 19977957Sbenno 200110172Sgrehanint pmap_pagedaemon_waken; 201110172Sgrehan 20290643Sbenno/* 20390643Sbenno * Map of physical memory regions. 20490643Sbenno */ 20590643Sbennovm_offset_t phys_avail[128]; 20690643Sbennou_int phys_avail_count; 20797346Sbennostatic struct mem_region *regions; 20897346Sbennostatic struct mem_region *pregions; 20997346Sbennoint regions_sz, pregions_sz; 210100319Sbennostatic struct ofw_map *translations; 21177957Sbenno 21290643Sbenno/* 21390643Sbenno * First and last available kernel virtual addresses. 21490643Sbenno */ 21590643Sbennovm_offset_t virtual_avail; 21690643Sbennovm_offset_t virtual_end; 21790643Sbennovm_offset_t kernel_vm_end; 21877957Sbenno 21990643Sbenno/* 22090643Sbenno * Kernel pmap. 22190643Sbenno */ 22290643Sbennostruct pmap kernel_pmap_store; 22390643Sbennoextern struct pmap ofw_pmap; 22477957Sbenno 22590643Sbenno/* 226134535Salc * Lock for the pteg and pvo tables. 227134535Salc */ 228134535Salcstruct mtx pmap_table_mutex; 229134535Salc 230134535Salc/* 23190643Sbenno * PTEG data. 23290643Sbenno */ 23390643Sbennostatic struct pteg *pmap_pteg_table; 23490643Sbennou_int pmap_pteg_count; 23590643Sbennou_int pmap_pteg_mask; 23677957Sbenno 23790643Sbenno/* 23890643Sbenno * PVO data. 23990643Sbenno */ 24090643Sbennostruct pvo_head *pmap_pvo_table; /* pvo entries by pteg index */ 24190643Sbennostruct pvo_head pmap_pvo_kunmanaged = 24290643Sbenno LIST_HEAD_INITIALIZER(pmap_pvo_kunmanaged); /* list of unmanaged pages */ 24390643Sbennostruct pvo_head pmap_pvo_unmanaged = 24490643Sbenno LIST_HEAD_INITIALIZER(pmap_pvo_unmanaged); /* list of unmanaged pages */ 24577957Sbenno 24692847Sjeffuma_zone_t pmap_upvo_zone; /* zone for pvo entries for unmanaged pages */ 24792847Sjeffuma_zone_t pmap_mpvo_zone; /* zone for pvo entries for managed pages */ 24877957Sbenno 24999037Sbenno#define BPVO_POOL_SIZE 32768 25092521Sbennostatic struct pvo_entry *pmap_bpvo_pool; 25199037Sbennostatic int pmap_bpvo_pool_index = 0; 25277957Sbenno 25390643Sbenno#define VSID_NBPW (sizeof(u_int32_t) * 8) 25490643Sbennostatic u_int pmap_vsid_bitmap[NPMAPS / VSID_NBPW]; 25577957Sbenno 25690643Sbennostatic boolean_t pmap_initialized = FALSE; 25777957Sbenno 25890643Sbenno/* 25990643Sbenno * Statistics. 26090643Sbenno */ 26190643Sbennou_int pmap_pte_valid = 0; 26290643Sbennou_int pmap_pte_overflow = 0; 26390643Sbennou_int pmap_pte_replacements = 0; 26490643Sbennou_int pmap_pvo_entries = 0; 26590643Sbennou_int pmap_pvo_enter_calls = 0; 26690643Sbennou_int pmap_pvo_remove_calls = 0; 26790643Sbennou_int pmap_pte_spills = 0; 26890643SbennoSYSCTL_INT(_machdep, OID_AUTO, pmap_pte_valid, CTLFLAG_RD, &pmap_pte_valid, 26990643Sbenno 0, ""); 27090643SbennoSYSCTL_INT(_machdep, OID_AUTO, pmap_pte_overflow, CTLFLAG_RD, 27190643Sbenno &pmap_pte_overflow, 0, ""); 27290643SbennoSYSCTL_INT(_machdep, OID_AUTO, pmap_pte_replacements, CTLFLAG_RD, 27390643Sbenno &pmap_pte_replacements, 0, ""); 27490643SbennoSYSCTL_INT(_machdep, OID_AUTO, pmap_pvo_entries, CTLFLAG_RD, &pmap_pvo_entries, 27590643Sbenno 0, ""); 27690643SbennoSYSCTL_INT(_machdep, OID_AUTO, pmap_pvo_enter_calls, CTLFLAG_RD, 27790643Sbenno &pmap_pvo_enter_calls, 0, ""); 27890643SbennoSYSCTL_INT(_machdep, OID_AUTO, pmap_pvo_remove_calls, CTLFLAG_RD, 27990643Sbenno &pmap_pvo_remove_calls, 0, ""); 28090643SbennoSYSCTL_INT(_machdep, OID_AUTO, pmap_pte_spills, CTLFLAG_RD, 28190643Sbenno &pmap_pte_spills, 0, ""); 28277957Sbenno 28390643Sbennostruct pvo_entry *pmap_pvo_zeropage; 28477957Sbenno 28590643Sbennovm_offset_t pmap_rkva_start = VM_MIN_KERNEL_ADDRESS; 28690643Sbennou_int pmap_rkva_count = 4; 28777957Sbenno 28890643Sbenno/* 28990643Sbenno * Allocate physical memory for use in pmap_bootstrap. 29090643Sbenno */ 29190643Sbennostatic vm_offset_t pmap_bootstrap_alloc(vm_size_t, u_int); 29277957Sbenno 29390643Sbenno/* 29490643Sbenno * PTE calls. 29590643Sbenno */ 29690643Sbennostatic int pmap_pte_insert(u_int, struct pte *); 29777957Sbenno 29877957Sbenno/* 29990643Sbenno * PVO calls. 30077957Sbenno */ 30192847Sjeffstatic int pmap_pvo_enter(pmap_t, uma_zone_t, struct pvo_head *, 30290643Sbenno vm_offset_t, vm_offset_t, u_int, int); 30390643Sbennostatic void pmap_pvo_remove(struct pvo_entry *, int); 30490643Sbennostatic struct pvo_entry *pmap_pvo_find_va(pmap_t, vm_offset_t, int *); 30590643Sbennostatic struct pte *pmap_pvo_to_pte(const struct pvo_entry *, int); 30690643Sbenno 30790643Sbenno/* 30890643Sbenno * Utility routines. 30990643Sbenno */ 31090643Sbennostatic struct pvo_entry *pmap_rkva_alloc(void); 31190643Sbennostatic void pmap_pa_map(struct pvo_entry *, vm_offset_t, 31290643Sbenno struct pte *, int *); 31390643Sbennostatic void pmap_pa_unmap(struct pvo_entry *, struct pte *, int *); 31490643Sbennostatic void pmap_syncicache(vm_offset_t, vm_size_t); 31590643Sbennostatic boolean_t pmap_query_bit(vm_page_t, int); 316110172Sgrehanstatic u_int pmap_clear_bit(vm_page_t, int, int *); 31790643Sbennostatic void tlbia(void); 31890643Sbenno 31990643Sbennostatic __inline int 32090643Sbennova_to_sr(u_int *sr, vm_offset_t va) 32177957Sbenno{ 32290643Sbenno return (sr[(uintptr_t)va >> ADDR_SR_SHFT]); 32390643Sbenno} 32477957Sbenno 32590643Sbennostatic __inline u_int 32690643Sbennova_to_pteg(u_int sr, vm_offset_t addr) 32790643Sbenno{ 32890643Sbenno u_int hash; 32990643Sbenno 33090643Sbenno hash = (sr & SR_VSID_MASK) ^ (((u_int)addr & ADDR_PIDX) >> 33190643Sbenno ADDR_PIDX_SHFT); 33290643Sbenno return (hash & pmap_pteg_mask); 33377957Sbenno} 33477957Sbenno 33590643Sbennostatic __inline struct pvo_head * 33696250Sbennopa_to_pvoh(vm_offset_t pa, vm_page_t *pg_p) 33777957Sbenno{ 33890643Sbenno struct vm_page *pg; 33977957Sbenno 34090643Sbenno pg = PHYS_TO_VM_PAGE(pa); 34190643Sbenno 34296250Sbenno if (pg_p != NULL) 34396250Sbenno *pg_p = pg; 34496250Sbenno 34590643Sbenno if (pg == NULL) 34690643Sbenno return (&pmap_pvo_unmanaged); 34790643Sbenno 34890643Sbenno return (&pg->md.mdpg_pvoh); 34977957Sbenno} 35077957Sbenno 35190643Sbennostatic __inline struct pvo_head * 35290643Sbennovm_page_to_pvoh(vm_page_t m) 35390643Sbenno{ 35490643Sbenno 35590643Sbenno return (&m->md.mdpg_pvoh); 35690643Sbenno} 35790643Sbenno 35877957Sbennostatic __inline void 35990643Sbennopmap_attr_clear(vm_page_t m, int ptebit) 36077957Sbenno{ 36190643Sbenno 36290643Sbenno m->md.mdpg_attrs &= ~ptebit; 36377957Sbenno} 36477957Sbenno 36577957Sbennostatic __inline int 36690643Sbennopmap_attr_fetch(vm_page_t m) 36777957Sbenno{ 36877957Sbenno 36990643Sbenno return (m->md.mdpg_attrs); 37077957Sbenno} 37177957Sbenno 37290643Sbennostatic __inline void 37390643Sbennopmap_attr_save(vm_page_t m, int ptebit) 37490643Sbenno{ 37590643Sbenno 37690643Sbenno m->md.mdpg_attrs |= ptebit; 37790643Sbenno} 37890643Sbenno 37977957Sbennostatic __inline int 38090643Sbennopmap_pte_compare(const struct pte *pt, const struct pte *pvo_pt) 38177957Sbenno{ 38290643Sbenno if (pt->pte_hi == pvo_pt->pte_hi) 38390643Sbenno return (1); 38490643Sbenno 38590643Sbenno return (0); 38677957Sbenno} 38777957Sbenno 38877957Sbennostatic __inline int 38990643Sbennopmap_pte_match(struct pte *pt, u_int sr, vm_offset_t va, int which) 39077957Sbenno{ 39190643Sbenno return (pt->pte_hi & ~PTE_VALID) == 39290643Sbenno (((sr & SR_VSID_MASK) << PTE_VSID_SHFT) | 39390643Sbenno ((va >> ADDR_API_SHFT) & PTE_API) | which); 39490643Sbenno} 39577957Sbenno 39690643Sbennostatic __inline void 39790643Sbennopmap_pte_create(struct pte *pt, u_int sr, vm_offset_t va, u_int pte_lo) 39890643Sbenno{ 39990643Sbenno /* 40090643Sbenno * Construct a PTE. Default to IMB initially. Valid bit only gets 40190643Sbenno * set when the real pte is set in memory. 40290643Sbenno * 40390643Sbenno * Note: Don't set the valid bit for correct operation of tlb update. 40490643Sbenno */ 40590643Sbenno pt->pte_hi = ((sr & SR_VSID_MASK) << PTE_VSID_SHFT) | 40690643Sbenno (((va & ADDR_PIDX) >> ADDR_API_SHFT) & PTE_API); 40790643Sbenno pt->pte_lo = pte_lo; 40877957Sbenno} 40977957Sbenno 41090643Sbennostatic __inline void 41190643Sbennopmap_pte_synch(struct pte *pt, struct pte *pvo_pt) 41277957Sbenno{ 41377957Sbenno 41490643Sbenno pvo_pt->pte_lo |= pt->pte_lo & (PTE_REF | PTE_CHG); 41577957Sbenno} 41677957Sbenno 41790643Sbennostatic __inline void 41890643Sbennopmap_pte_clear(struct pte *pt, vm_offset_t va, int ptebit) 41977957Sbenno{ 42077957Sbenno 42190643Sbenno /* 42290643Sbenno * As shown in Section 7.6.3.2.3 42390643Sbenno */ 42490643Sbenno pt->pte_lo &= ~ptebit; 42590643Sbenno TLBIE(va); 42690643Sbenno EIEIO(); 42790643Sbenno TLBSYNC(); 42890643Sbenno SYNC(); 42977957Sbenno} 43077957Sbenno 43190643Sbennostatic __inline void 43290643Sbennopmap_pte_set(struct pte *pt, struct pte *pvo_pt) 43377957Sbenno{ 43477957Sbenno 43590643Sbenno pvo_pt->pte_hi |= PTE_VALID; 43690643Sbenno 43777957Sbenno /* 43890643Sbenno * Update the PTE as defined in section 7.6.3.1. 43990643Sbenno * Note that the REF/CHG bits are from pvo_pt and thus should havce 44090643Sbenno * been saved so this routine can restore them (if desired). 44177957Sbenno */ 44290643Sbenno pt->pte_lo = pvo_pt->pte_lo; 44390643Sbenno EIEIO(); 44490643Sbenno pt->pte_hi = pvo_pt->pte_hi; 44590643Sbenno SYNC(); 44690643Sbenno pmap_pte_valid++; 44790643Sbenno} 44877957Sbenno 44990643Sbennostatic __inline void 45090643Sbennopmap_pte_unset(struct pte *pt, struct pte *pvo_pt, vm_offset_t va) 45190643Sbenno{ 45290643Sbenno 45390643Sbenno pvo_pt->pte_hi &= ~PTE_VALID; 45490643Sbenno 45577957Sbenno /* 45690643Sbenno * Force the reg & chg bits back into the PTEs. 45777957Sbenno */ 45890643Sbenno SYNC(); 45977957Sbenno 46090643Sbenno /* 46190643Sbenno * Invalidate the pte. 46290643Sbenno */ 46390643Sbenno pt->pte_hi &= ~PTE_VALID; 46477957Sbenno 46590643Sbenno SYNC(); 46690643Sbenno TLBIE(va); 46790643Sbenno EIEIO(); 46890643Sbenno TLBSYNC(); 46990643Sbenno SYNC(); 47077957Sbenno 47190643Sbenno /* 47290643Sbenno * Save the reg & chg bits. 47390643Sbenno */ 47490643Sbenno pmap_pte_synch(pt, pvo_pt); 47590643Sbenno pmap_pte_valid--; 47677957Sbenno} 47777957Sbenno 47890643Sbennostatic __inline void 47990643Sbennopmap_pte_change(struct pte *pt, struct pte *pvo_pt, vm_offset_t va) 48090643Sbenno{ 48190643Sbenno 48290643Sbenno /* 48390643Sbenno * Invalidate the PTE 48490643Sbenno */ 48590643Sbenno pmap_pte_unset(pt, pvo_pt, va); 48690643Sbenno pmap_pte_set(pt, pvo_pt); 48790643Sbenno} 48890643Sbenno 48977957Sbenno/* 49090643Sbenno * Quick sort callout for comparing memory regions. 49177957Sbenno */ 49290643Sbennostatic int mr_cmp(const void *a, const void *b); 49390643Sbennostatic int om_cmp(const void *a, const void *b); 49490643Sbenno 49590643Sbennostatic int 49690643Sbennomr_cmp(const void *a, const void *b) 49777957Sbenno{ 49890643Sbenno const struct mem_region *regiona; 49990643Sbenno const struct mem_region *regionb; 50077957Sbenno 50190643Sbenno regiona = a; 50290643Sbenno regionb = b; 50390643Sbenno if (regiona->mr_start < regionb->mr_start) 50490643Sbenno return (-1); 50590643Sbenno else if (regiona->mr_start > regionb->mr_start) 50690643Sbenno return (1); 50790643Sbenno else 50890643Sbenno return (0); 50990643Sbenno} 51077957Sbenno 51190643Sbennostatic int 51290643Sbennoom_cmp(const void *a, const void *b) 51390643Sbenno{ 51490643Sbenno const struct ofw_map *mapa; 51590643Sbenno const struct ofw_map *mapb; 51690643Sbenno 51790643Sbenno mapa = a; 51890643Sbenno mapb = b; 51990643Sbenno if (mapa->om_pa < mapb->om_pa) 52090643Sbenno return (-1); 52190643Sbenno else if (mapa->om_pa > mapb->om_pa) 52290643Sbenno return (1); 52390643Sbenno else 52490643Sbenno return (0); 52577957Sbenno} 52677957Sbenno 527143200Sgrehanstatic vm_size_t 528143200Sgrehanpmap_tunable_physmem(void) 529143200Sgrehan{ 530143200Sgrehan char *cp; 531143200Sgrehan vm_size_t retval; 532143200Sgrehan 533143200Sgrehan retval = 0; 534143200Sgrehan 535143200Sgrehan if ((cp = getenv("hw.physmem")) != NULL) { 536143200Sgrehan u_int64_t allowmem, sanity; 537143200Sgrehan char *ep; 538143200Sgrehan 539143200Sgrehan sanity = allowmem = strtouq(cp, &ep, 0); 540143200Sgrehan if ((ep != cp) && (*ep != 0)) { 541143200Sgrehan switch(*ep) { 542143200Sgrehan case 'g': 543143200Sgrehan case 'G': 544143200Sgrehan /* 545143200Sgrehan * Can't have more than 4G of RAM 546143200Sgrehan */ 547143200Sgrehan if (allowmem > 4) { 548143200Sgrehan printf("Invalid memory size '%s'\n", 549143200Sgrehan cp); 550143200Sgrehan return (0); 551143200Sgrehan } 552143200Sgrehan allowmem <<= 10; 553143200Sgrehan case 'm': 554143200Sgrehan case 'M': 555143200Sgrehan allowmem <<= 10; 556143200Sgrehan case 'k': 557143200Sgrehan case 'K': 558143200Sgrehan allowmem <<= 10; 559143200Sgrehan break; 560143200Sgrehan default: 561143200Sgrehan allowmem = sanity = 0; 562143200Sgrehan } 563143200Sgrehan if (allowmem < sanity) 564143200Sgrehan allowmem = 0; 565143200Sgrehan } 566143200Sgrehan if (allowmem == 0) 567143200Sgrehan printf("Ignoring invalid memory size of '%s'\n", cp); 568143200Sgrehan else 569143200Sgrehan retval = allowmem; 570143200Sgrehan freeenv(cp); 571143200Sgrehan } 572143200Sgrehan 573143200Sgrehan return (retval); 574143200Sgrehan} 575143200Sgrehan 57677957Sbennovoid 57790643Sbennopmap_bootstrap(vm_offset_t kernelstart, vm_offset_t kernelend) 57877957Sbenno{ 57997346Sbenno ihandle_t mmui; 58090643Sbenno phandle_t chosen, mmu; 58190643Sbenno int sz; 58290643Sbenno int i, j; 583103604Sgrehan int ofw_mappings; 584143200Sgrehan vm_size_t size, physsz, hwphyssz; 58590643Sbenno vm_offset_t pa, va, off; 58690643Sbenno u_int batl, batu; 58777957Sbenno 58899037Sbenno /* 589103604Sgrehan * Set up BAT0 to map the lowest 256 MB area 59099037Sbenno */ 59199037Sbenno battable[0x0].batl = BATL(0x00000000, BAT_M, BAT_PP_RW); 59299037Sbenno battable[0x0].batu = BATU(0x00000000, BAT_BL_256M, BAT_Vs); 59399037Sbenno 59499037Sbenno /* 59599037Sbenno * Map PCI memory space. 59699037Sbenno */ 59799037Sbenno battable[0x8].batl = BATL(0x80000000, BAT_I|BAT_G, BAT_PP_RW); 59899037Sbenno battable[0x8].batu = BATU(0x80000000, BAT_BL_256M, BAT_Vs); 59999037Sbenno 60099037Sbenno battable[0x9].batl = BATL(0x90000000, BAT_I|BAT_G, BAT_PP_RW); 60199037Sbenno battable[0x9].batu = BATU(0x90000000, BAT_BL_256M, BAT_Vs); 60299037Sbenno 60399037Sbenno battable[0xa].batl = BATL(0xa0000000, BAT_I|BAT_G, BAT_PP_RW); 60499037Sbenno battable[0xa].batu = BATU(0xa0000000, BAT_BL_256M, BAT_Vs); 60599037Sbenno 60699037Sbenno battable[0xb].batl = BATL(0xb0000000, BAT_I|BAT_G, BAT_PP_RW); 60799037Sbenno battable[0xb].batu = BATU(0xb0000000, BAT_BL_256M, BAT_Vs); 60899037Sbenno 60999037Sbenno /* 61099037Sbenno * Map obio devices. 61199037Sbenno */ 61299037Sbenno battable[0xf].batl = BATL(0xf0000000, BAT_I|BAT_G, BAT_PP_RW); 61399037Sbenno battable[0xf].batu = BATU(0xf0000000, BAT_BL_256M, BAT_Vs); 61499037Sbenno 61577957Sbenno /* 61690643Sbenno * Use an IBAT and a DBAT to map the bottom segment of memory 61790643Sbenno * where we are. 61877957Sbenno */ 61990643Sbenno batu = BATU(0x00000000, BAT_BL_256M, BAT_Vs); 62090643Sbenno batl = BATL(0x00000000, BAT_M, BAT_PP_RW); 621131808Sgrehan __asm ("mtibatu 0,%0; mtibatl 0,%1; isync; \n" 622131808Sgrehan "mtdbatu 0,%0; mtdbatl 0,%1; isync" 62390643Sbenno :: "r"(batu), "r"(batl)); 62499037Sbenno 62590643Sbenno#if 0 62699037Sbenno /* map frame buffer */ 62799037Sbenno batu = BATU(0x90000000, BAT_BL_256M, BAT_Vs); 62899037Sbenno batl = BATL(0x90000000, BAT_I|BAT_G, BAT_PP_RW); 629131808Sgrehan __asm ("mtdbatu 1,%0; mtdbatl 1,%1; isync" 63099037Sbenno :: "r"(batu), "r"(batl)); 63199037Sbenno#endif 63299037Sbenno 63399037Sbenno#if 1 63499037Sbenno /* map pci space */ 63590643Sbenno batu = BATU(0x80000000, BAT_BL_256M, BAT_Vs); 63699037Sbenno batl = BATL(0x80000000, BAT_I|BAT_G, BAT_PP_RW); 637131808Sgrehan __asm ("mtdbatu 1,%0; mtdbatl 1,%1; isync" 63890643Sbenno :: "r"(batu), "r"(batl)); 63990643Sbenno#endif 64077957Sbenno 64177957Sbenno /* 64290643Sbenno * Set the start and end of kva. 64377957Sbenno */ 64490643Sbenno virtual_avail = VM_MIN_KERNEL_ADDRESS; 64590643Sbenno virtual_end = VM_MAX_KERNEL_ADDRESS; 64690643Sbenno 64797346Sbenno mem_regions(&pregions, &pregions_sz, ®ions, ®ions_sz); 64897346Sbenno CTR0(KTR_PMAP, "pmap_bootstrap: physical memory"); 64997346Sbenno 65097346Sbenno qsort(pregions, pregions_sz, sizeof(*pregions), mr_cmp); 65197346Sbenno for (i = 0; i < pregions_sz; i++) { 652103604Sgrehan vm_offset_t pa; 653103604Sgrehan vm_offset_t end; 654103604Sgrehan 65597346Sbenno CTR3(KTR_PMAP, "physregion: %#x - %#x (%#x)", 65697346Sbenno pregions[i].mr_start, 65797346Sbenno pregions[i].mr_start + pregions[i].mr_size, 65897346Sbenno pregions[i].mr_size); 659103604Sgrehan /* 660103604Sgrehan * Install entries into the BAT table to allow all 661103604Sgrehan * of physmem to be convered by on-demand BAT entries. 662103604Sgrehan * The loop will sometimes set the same battable element 663103604Sgrehan * twice, but that's fine since they won't be used for 664103604Sgrehan * a while yet. 665103604Sgrehan */ 666103604Sgrehan pa = pregions[i].mr_start & 0xf0000000; 667103604Sgrehan end = pregions[i].mr_start + pregions[i].mr_size; 668103604Sgrehan do { 669103604Sgrehan u_int n = pa >> ADDR_SR_SHFT; 670103604Sgrehan 671103604Sgrehan battable[n].batl = BATL(pa, BAT_M, BAT_PP_RW); 672103604Sgrehan battable[n].batu = BATU(pa, BAT_BL_256M, BAT_Vs); 673103604Sgrehan pa += SEGMENT_LENGTH; 674103604Sgrehan } while (pa < end); 67597346Sbenno } 67697346Sbenno 67797346Sbenno if (sizeof(phys_avail)/sizeof(phys_avail[0]) < regions_sz) 67890643Sbenno panic("pmap_bootstrap: phys_avail too small"); 67997346Sbenno qsort(regions, regions_sz, sizeof(*regions), mr_cmp); 68090643Sbenno phys_avail_count = 0; 68191793Sbenno physsz = 0; 682143200Sgrehan hwphyssz = pmap_tunable_physmem(); 68397346Sbenno for (i = 0, j = 0; i < regions_sz; i++, j += 2) { 68490643Sbenno CTR3(KTR_PMAP, "region: %#x - %#x (%#x)", regions[i].mr_start, 68590643Sbenno regions[i].mr_start + regions[i].mr_size, 68690643Sbenno regions[i].mr_size); 687143200Sgrehan if (hwphyssz != 0 && 688143200Sgrehan (physsz + regions[i].mr_size) >= hwphyssz) { 689143200Sgrehan if (physsz < hwphyssz) { 690143200Sgrehan phys_avail[j] = regions[i].mr_start; 691143200Sgrehan phys_avail[j + 1] = regions[i].mr_start + 692143200Sgrehan hwphyssz - physsz; 693143200Sgrehan physsz = hwphyssz; 694143200Sgrehan phys_avail_count++; 695143200Sgrehan } 696143200Sgrehan break; 697143200Sgrehan } 69890643Sbenno phys_avail[j] = regions[i].mr_start; 69990643Sbenno phys_avail[j + 1] = regions[i].mr_start + regions[i].mr_size; 70090643Sbenno phys_avail_count++; 70191793Sbenno physsz += regions[i].mr_size; 70277957Sbenno } 70391793Sbenno physmem = btoc(physsz); 70477957Sbenno 70577957Sbenno /* 70690643Sbenno * Allocate PTEG table. 70777957Sbenno */ 70890643Sbenno#ifdef PTEGCOUNT 70990643Sbenno pmap_pteg_count = PTEGCOUNT; 71090643Sbenno#else 71190643Sbenno pmap_pteg_count = 0x1000; 71277957Sbenno 71390643Sbenno while (pmap_pteg_count < physmem) 71490643Sbenno pmap_pteg_count <<= 1; 71577957Sbenno 71690643Sbenno pmap_pteg_count >>= 1; 71790643Sbenno#endif /* PTEGCOUNT */ 71877957Sbenno 71990643Sbenno size = pmap_pteg_count * sizeof(struct pteg); 72090643Sbenno CTR2(KTR_PMAP, "pmap_bootstrap: %d PTEGs, %d bytes", pmap_pteg_count, 72190643Sbenno size); 72290643Sbenno pmap_pteg_table = (struct pteg *)pmap_bootstrap_alloc(size, size); 72390643Sbenno CTR1(KTR_PMAP, "pmap_bootstrap: PTEG table at %p", pmap_pteg_table); 72490643Sbenno bzero((void *)pmap_pteg_table, pmap_pteg_count * sizeof(struct pteg)); 72590643Sbenno pmap_pteg_mask = pmap_pteg_count - 1; 72677957Sbenno 72790643Sbenno /* 72894839Sbenno * Allocate pv/overflow lists. 72990643Sbenno */ 73090643Sbenno size = sizeof(struct pvo_head) * pmap_pteg_count; 73190643Sbenno pmap_pvo_table = (struct pvo_head *)pmap_bootstrap_alloc(size, 73290643Sbenno PAGE_SIZE); 73390643Sbenno CTR1(KTR_PMAP, "pmap_bootstrap: PVO table at %p", pmap_pvo_table); 73490643Sbenno for (i = 0; i < pmap_pteg_count; i++) 73590643Sbenno LIST_INIT(&pmap_pvo_table[i]); 73677957Sbenno 73790643Sbenno /* 738134535Salc * Initialize the lock that synchronizes access to the pteg and pvo 739134535Salc * tables. 740134535Salc */ 741134535Salc mtx_init(&pmap_table_mutex, "pmap table", NULL, MTX_DEF); 742134535Salc 743134535Salc /* 74490643Sbenno * Allocate the message buffer. 74590643Sbenno */ 74690643Sbenno msgbuf_phys = pmap_bootstrap_alloc(MSGBUF_SIZE, 0); 74777957Sbenno 74890643Sbenno /* 74990643Sbenno * Initialise the unmanaged pvo pool. 75090643Sbenno */ 75199037Sbenno pmap_bpvo_pool = (struct pvo_entry *)pmap_bootstrap_alloc( 75299037Sbenno BPVO_POOL_SIZE*sizeof(struct pvo_entry), 0); 75392521Sbenno pmap_bpvo_pool_index = 0; 75477957Sbenno 75577957Sbenno /* 75690643Sbenno * Make sure kernel vsid is allocated as well as VSID 0. 75777957Sbenno */ 75890643Sbenno pmap_vsid_bitmap[(KERNEL_VSIDBITS & (NPMAPS - 1)) / VSID_NBPW] 75990643Sbenno |= 1 << (KERNEL_VSIDBITS % VSID_NBPW); 76090643Sbenno pmap_vsid_bitmap[0] |= 1; 76177957Sbenno 76290643Sbenno /* 763133862Smarius * Set up the Open Firmware pmap and add it's mappings. 76490643Sbenno */ 76590643Sbenno pmap_pinit(&ofw_pmap); 76690643Sbenno ofw_pmap.pm_sr[KERNEL_SR] = KERNEL_SEGMENT; 767126478Sgrehan ofw_pmap.pm_sr[KERNEL2_SR] = KERNEL2_SEGMENT; 76890643Sbenno if ((chosen = OF_finddevice("/chosen")) == -1) 76990643Sbenno panic("pmap_bootstrap: can't find /chosen"); 77090643Sbenno OF_getprop(chosen, "mmu", &mmui, 4); 77190643Sbenno if ((mmu = OF_instance_to_package(mmui)) == -1) 77290643Sbenno panic("pmap_bootstrap: can't get mmu package"); 77390643Sbenno if ((sz = OF_getproplen(mmu, "translations")) == -1) 77490643Sbenno panic("pmap_bootstrap: can't get ofw translation count"); 775100319Sbenno translations = NULL; 776131401Sgrehan for (i = 0; phys_avail[i] != 0; i += 2) { 777131401Sgrehan if (phys_avail[i + 1] >= sz) { 778100319Sbenno translations = (struct ofw_map *)phys_avail[i]; 779131401Sgrehan break; 780131401Sgrehan } 781100319Sbenno } 782100319Sbenno if (translations == NULL) 783100319Sbenno panic("pmap_bootstrap: no space to copy translations"); 78490643Sbenno bzero(translations, sz); 78590643Sbenno if (OF_getprop(mmu, "translations", translations, sz) == -1) 78690643Sbenno panic("pmap_bootstrap: can't get ofw translations"); 78790643Sbenno CTR0(KTR_PMAP, "pmap_bootstrap: translations"); 78897346Sbenno sz /= sizeof(*translations); 78990643Sbenno qsort(translations, sz, sizeof (*translations), om_cmp); 790103604Sgrehan for (i = 0, ofw_mappings = 0; i < sz; i++) { 79190643Sbenno CTR3(KTR_PMAP, "translation: pa=%#x va=%#x len=%#x", 79290643Sbenno translations[i].om_pa, translations[i].om_va, 79390643Sbenno translations[i].om_len); 79477957Sbenno 795103604Sgrehan /* 796103604Sgrehan * If the mapping is 1:1, let the RAM and device on-demand 797103604Sgrehan * BAT tables take care of the translation. 798103604Sgrehan */ 799103604Sgrehan if (translations[i].om_va == translations[i].om_pa) 800103604Sgrehan continue; 80177957Sbenno 802103604Sgrehan /* Enter the pages */ 80390643Sbenno for (off = 0; off < translations[i].om_len; off += PAGE_SIZE) { 80490643Sbenno struct vm_page m; 80577957Sbenno 80690643Sbenno m.phys_addr = translations[i].om_pa + off; 80790643Sbenno pmap_enter(&ofw_pmap, translations[i].om_va + off, &m, 808103604Sgrehan VM_PROT_ALL, 1); 809103604Sgrehan ofw_mappings++; 81077957Sbenno } 81177957Sbenno } 81290643Sbenno#ifdef SMP 81390643Sbenno TLBSYNC(); 81490643Sbenno#endif 81577957Sbenno 81690643Sbenno /* 81790643Sbenno * Initialize the kernel pmap (which is statically allocated). 81890643Sbenno */ 819134329Salc PMAP_LOCK_INIT(kernel_pmap); 82090643Sbenno for (i = 0; i < 16; i++) { 82190643Sbenno kernel_pmap->pm_sr[i] = EMPTY_SEGMENT; 82277957Sbenno } 82390643Sbenno kernel_pmap->pm_sr[KERNEL_SR] = KERNEL_SEGMENT; 824139401Sgrehan kernel_pmap->pm_sr[KERNEL2_SR] = KERNEL2_SEGMENT; 82590643Sbenno kernel_pmap->pm_active = ~0; 82677957Sbenno 82777957Sbenno /* 82890643Sbenno * Allocate a kernel stack with a guard page for thread0 and map it 82990643Sbenno * into the kernel page map. 83077957Sbenno */ 83190643Sbenno pa = pmap_bootstrap_alloc(KSTACK_PAGES * PAGE_SIZE, 0); 83290643Sbenno kstack0_phys = pa; 83390643Sbenno kstack0 = virtual_avail + (KSTACK_GUARD_PAGES * PAGE_SIZE); 83490643Sbenno CTR2(KTR_PMAP, "pmap_bootstrap: kstack0 at %#x (%#x)", kstack0_phys, 83590643Sbenno kstack0); 83690643Sbenno virtual_avail += (KSTACK_PAGES + KSTACK_GUARD_PAGES) * PAGE_SIZE; 83790643Sbenno for (i = 0; i < KSTACK_PAGES; i++) { 83890643Sbenno pa = kstack0_phys + i * PAGE_SIZE; 83990643Sbenno va = kstack0 + i * PAGE_SIZE; 84090643Sbenno pmap_kenter(va, pa); 84190643Sbenno TLBIE(va); 84277957Sbenno } 84377957Sbenno 84490643Sbenno /* 845127875Salc * Calculate the last available physical address. 84690643Sbenno */ 84790643Sbenno for (i = 0; phys_avail[i + 2] != 0; i += 2) 84890643Sbenno ; 849128103Salc Maxmem = powerpc_btop(phys_avail[i + 1]); 85077957Sbenno 85177957Sbenno /* 85290643Sbenno * Allocate virtual address space for the message buffer. 85377957Sbenno */ 85490643Sbenno msgbufp = (struct msgbuf *)virtual_avail; 85590643Sbenno virtual_avail += round_page(MSGBUF_SIZE); 85677957Sbenno 85777957Sbenno /* 85890643Sbenno * Initialize hardware. 85977957Sbenno */ 86077957Sbenno for (i = 0; i < 16; i++) { 86194836Sbenno mtsrin(i << ADDR_SR_SHFT, EMPTY_SEGMENT); 86277957Sbenno } 86377957Sbenno __asm __volatile ("mtsr %0,%1" 86490643Sbenno :: "n"(KERNEL_SR), "r"(KERNEL_SEGMENT)); 865139401Sgrehan __asm __volatile ("mtsr %0,%1" 866139401Sgrehan :: "n"(KERNEL2_SR), "r"(KERNEL2_SEGMENT)); 86777957Sbenno __asm __volatile ("sync; mtsdr1 %0; isync" 86890643Sbenno :: "r"((u_int)pmap_pteg_table | (pmap_pteg_mask >> 10))); 86977957Sbenno tlbia(); 87077957Sbenno 87190643Sbenno pmap_bootstrapped++; 87277957Sbenno} 87377957Sbenno 87477957Sbenno/* 87590643Sbenno * Activate a user pmap. The pmap must be activated before it's address 87690643Sbenno * space can be accessed in any way. 87777957Sbenno */ 87877957Sbennovoid 87990643Sbennopmap_activate(struct thread *td) 88077957Sbenno{ 88196250Sbenno pmap_t pm, pmr; 88277957Sbenno 88377957Sbenno /* 884103604Sgrehan * Load all the data we need up front to encourage the compiler to 88590643Sbenno * not issue any loads while we have interrupts disabled below. 88677957Sbenno */ 88790643Sbenno pm = &td->td_proc->p_vmspace->vm_pmap; 88877957Sbenno 88996250Sbenno if ((pmr = (pmap_t)pmap_kextract((vm_offset_t)pm)) == NULL) 89096250Sbenno pmr = pm; 89196250Sbenno 89290643Sbenno pm->pm_active |= PCPU_GET(cpumask); 89396250Sbenno PCPU_SET(curpmap, pmr); 89477957Sbenno} 89577957Sbenno 89691483Sbennovoid 89791483Sbennopmap_deactivate(struct thread *td) 89891483Sbenno{ 89991483Sbenno pmap_t pm; 90091483Sbenno 90191483Sbenno pm = &td->td_proc->p_vmspace->vm_pmap; 90291483Sbenno pm->pm_active &= ~(PCPU_GET(cpumask)); 90396250Sbenno PCPU_SET(curpmap, NULL); 90491483Sbenno} 90591483Sbenno 90690643Sbennovm_offset_t 90790643Sbennopmap_addr_hint(vm_object_t object, vm_offset_t va, vm_size_t size) 90877957Sbenno{ 90996353Sbenno 91096353Sbenno return (va); 91177957Sbenno} 91277957Sbenno 91377957Sbennovoid 91496353Sbennopmap_change_wiring(pmap_t pm, vm_offset_t va, boolean_t wired) 91577957Sbenno{ 91696353Sbenno struct pvo_entry *pvo; 91796353Sbenno 918134329Salc PMAP_LOCK(pm); 91996353Sbenno pvo = pmap_pvo_find_va(pm, va & ~ADDR_POFF, NULL); 92096353Sbenno 92196353Sbenno if (pvo != NULL) { 92296353Sbenno if (wired) { 92396353Sbenno if ((pvo->pvo_vaddr & PVO_WIRED) == 0) 92496353Sbenno pm->pm_stats.wired_count++; 92596353Sbenno pvo->pvo_vaddr |= PVO_WIRED; 92696353Sbenno } else { 92796353Sbenno if ((pvo->pvo_vaddr & PVO_WIRED) != 0) 92896353Sbenno pm->pm_stats.wired_count--; 92996353Sbenno pvo->pvo_vaddr &= ~PVO_WIRED; 93096353Sbenno } 93196353Sbenno } 932134329Salc PMAP_UNLOCK(pm); 93377957Sbenno} 93477957Sbenno 93577957Sbennovoid 93690643Sbennopmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, 93790643Sbenno vm_size_t len, vm_offset_t src_addr) 93877957Sbenno{ 93997385Sbenno 94097385Sbenno /* 94197385Sbenno * This is not needed as it's mainly an optimisation. 94297385Sbenno * It may want to be implemented later though. 94397385Sbenno */ 94477957Sbenno} 94577957Sbenno 94677957Sbennovoid 94797385Sbennopmap_copy_page(vm_page_t msrc, vm_page_t mdst) 94877957Sbenno{ 94997385Sbenno vm_offset_t dst; 95097385Sbenno vm_offset_t src; 95197385Sbenno 95297385Sbenno dst = VM_PAGE_TO_PHYS(mdst); 95397385Sbenno src = VM_PAGE_TO_PHYS(msrc); 95497385Sbenno 95597385Sbenno kcopy((void *)src, (void *)dst, PAGE_SIZE); 95677957Sbenno} 95777957Sbenno 95877957Sbenno/* 95990643Sbenno * Zero a page of physical memory by temporarily mapping it into the tlb. 96077957Sbenno */ 96177957Sbennovoid 96294777Speterpmap_zero_page(vm_page_t m) 96377957Sbenno{ 96494777Speter vm_offset_t pa = VM_PAGE_TO_PHYS(m); 965110172Sgrehan caddr_t va; 96677957Sbenno 96790643Sbenno if (pa < SEGMENT_LENGTH) { 96890643Sbenno va = (caddr_t) pa; 96990643Sbenno } else if (pmap_initialized) { 97090643Sbenno if (pmap_pvo_zeropage == NULL) 97190643Sbenno pmap_pvo_zeropage = pmap_rkva_alloc(); 97290643Sbenno pmap_pa_map(pmap_pvo_zeropage, pa, NULL, NULL); 97390643Sbenno va = (caddr_t)PVO_VADDR(pmap_pvo_zeropage); 97490643Sbenno } else { 97590643Sbenno panic("pmap_zero_page: can't zero pa %#x", pa); 97677957Sbenno } 97790643Sbenno 97890643Sbenno bzero(va, PAGE_SIZE); 97990643Sbenno 98090643Sbenno if (pa >= SEGMENT_LENGTH) 98190643Sbenno pmap_pa_unmap(pmap_pvo_zeropage, NULL, NULL); 98277957Sbenno} 98377957Sbenno 98477957Sbennovoid 98594777Speterpmap_zero_page_area(vm_page_t m, int off, int size) 98677957Sbenno{ 98799666Sbenno vm_offset_t pa = VM_PAGE_TO_PHYS(m); 988103604Sgrehan caddr_t va; 98999666Sbenno 99099666Sbenno if (pa < SEGMENT_LENGTH) { 99199666Sbenno va = (caddr_t) pa; 99299666Sbenno } else if (pmap_initialized) { 99399666Sbenno if (pmap_pvo_zeropage == NULL) 99499666Sbenno pmap_pvo_zeropage = pmap_rkva_alloc(); 99599666Sbenno pmap_pa_map(pmap_pvo_zeropage, pa, NULL, NULL); 99699666Sbenno va = (caddr_t)PVO_VADDR(pmap_pvo_zeropage); 99799666Sbenno } else { 99899666Sbenno panic("pmap_zero_page: can't zero pa %#x", pa); 99999666Sbenno } 100099666Sbenno 1001103604Sgrehan bzero(va + off, size); 100299666Sbenno 100399666Sbenno if (pa >= SEGMENT_LENGTH) 100499666Sbenno pmap_pa_unmap(pmap_pvo_zeropage, NULL, NULL); 100577957Sbenno} 100677957Sbenno 100799571Spetervoid 100899571Speterpmap_zero_page_idle(vm_page_t m) 100999571Speter{ 101099571Speter 101199571Speter /* XXX this is called outside of Giant, is pmap_zero_page safe? */ 101299571Speter /* XXX maybe have a dedicated mapping for this to avoid the problem? */ 101399571Speter mtx_lock(&Giant); 101499571Speter pmap_zero_page(m); 101599571Speter mtx_unlock(&Giant); 101699571Speter} 101799571Speter 101877957Sbenno/* 101990643Sbenno * Map the given physical page at the specified virtual address in the 102090643Sbenno * target pmap with the protection requested. If specified the page 102190643Sbenno * will be wired down. 102277957Sbenno */ 102377957Sbennovoid 102490643Sbennopmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot, 102590643Sbenno boolean_t wired) 102677957Sbenno{ 102790643Sbenno struct pvo_head *pvo_head; 102892847Sjeff uma_zone_t zone; 102996250Sbenno vm_page_t pg; 103096250Sbenno u_int pte_lo, pvo_flags, was_exec, i; 103190643Sbenno int error; 103277957Sbenno 103390643Sbenno if (!pmap_initialized) { 103490643Sbenno pvo_head = &pmap_pvo_kunmanaged; 103590643Sbenno zone = pmap_upvo_zone; 103690643Sbenno pvo_flags = 0; 103796250Sbenno pg = NULL; 103896250Sbenno was_exec = PTE_EXEC; 103990643Sbenno } else { 1040110172Sgrehan pvo_head = vm_page_to_pvoh(m); 1041110172Sgrehan pg = m; 104290643Sbenno zone = pmap_mpvo_zone; 104390643Sbenno pvo_flags = PVO_MANAGED; 104496250Sbenno was_exec = 0; 104590643Sbenno } 1046134535Salc if (pmap_bootstrapped) 1047134329Salc vm_page_lock_queues(); 1048134535Salc PMAP_LOCK(pmap); 104977957Sbenno 1050142416Sgrehan /* XXX change the pvo head for fake pages */ 1051142416Sgrehan if ((m->flags & PG_FICTITIOUS) == PG_FICTITIOUS) 1052142416Sgrehan pvo_head = &pmap_pvo_kunmanaged; 1053142416Sgrehan 105496250Sbenno /* 105596250Sbenno * If this is a managed page, and it's the first reference to the page, 105696250Sbenno * clear the execness of the page. Otherwise fetch the execness. 105796250Sbenno */ 1058142416Sgrehan if ((pg != NULL) && ((m->flags & PG_FICTITIOUS) == 0)) { 105996250Sbenno if (LIST_EMPTY(pvo_head)) { 106096250Sbenno pmap_attr_clear(pg, PTE_EXEC); 106196250Sbenno } else { 106296250Sbenno was_exec = pmap_attr_fetch(pg) & PTE_EXEC; 106396250Sbenno } 106496250Sbenno } 106596250Sbenno 106696250Sbenno /* 106796250Sbenno * Assume the page is cache inhibited and access is guarded unless 106896250Sbenno * it's in our available memory array. 106996250Sbenno */ 107090643Sbenno pte_lo = PTE_I | PTE_G; 107197346Sbenno for (i = 0; i < pregions_sz; i++) { 107297346Sbenno if ((VM_PAGE_TO_PHYS(m) >= pregions[i].mr_start) && 107397346Sbenno (VM_PAGE_TO_PHYS(m) < 107497346Sbenno (pregions[i].mr_start + pregions[i].mr_size))) { 107596250Sbenno pte_lo &= ~(PTE_I | PTE_G); 107696250Sbenno break; 107796250Sbenno } 107896250Sbenno } 107977957Sbenno 108090643Sbenno if (prot & VM_PROT_WRITE) 108190643Sbenno pte_lo |= PTE_BW; 108290643Sbenno else 108390643Sbenno pte_lo |= PTE_BR; 108477957Sbenno 1085142416Sgrehan if (prot & VM_PROT_EXECUTE) 1086142416Sgrehan pvo_flags |= PVO_EXECUTABLE; 108777957Sbenno 108890643Sbenno if (wired) 108990643Sbenno pvo_flags |= PVO_WIRED; 109077957Sbenno 1091142416Sgrehan if ((m->flags & PG_FICTITIOUS) != 0) 1092142416Sgrehan pvo_flags |= PVO_FAKE; 1093142416Sgrehan 109496250Sbenno error = pmap_pvo_enter(pmap, zone, pvo_head, va, VM_PAGE_TO_PHYS(m), 109596250Sbenno pte_lo, pvo_flags); 109690643Sbenno 109796250Sbenno /* 109896250Sbenno * Flush the real page from the instruction cache if this page is 109996250Sbenno * mapped executable and cacheable and was not previously mapped (or 110096250Sbenno * was not mapped executable). 110196250Sbenno */ 110296250Sbenno if (error == 0 && (pvo_flags & PVO_EXECUTABLE) && 110396250Sbenno (pte_lo & PTE_I) == 0 && was_exec == 0) { 110477957Sbenno /* 110590643Sbenno * Flush the real memory from the cache. 110677957Sbenno */ 110796250Sbenno pmap_syncicache(VM_PAGE_TO_PHYS(m), PAGE_SIZE); 110896250Sbenno if (pg != NULL) 110996250Sbenno pmap_attr_save(pg, PTE_EXEC); 111077957Sbenno } 1111134329Salc if (pmap_bootstrapped) 1112134329Salc vm_page_unlock_queues(); 1113103604Sgrehan 1114103604Sgrehan /* XXX syncicache always until problems are sorted */ 1115103604Sgrehan pmap_syncicache(VM_PAGE_TO_PHYS(m), PAGE_SIZE); 1116134535Salc PMAP_UNLOCK(pmap); 111777957Sbenno} 111877957Sbenno 1119117045Salcvm_page_t 1120117045Salcpmap_enter_quick(pmap_t pm, vm_offset_t va, vm_page_t m, vm_page_t mpte) 1121117045Salc{ 1122117045Salc 1123138897Salc vm_page_busy(m); 1124138897Salc vm_page_unlock_queues(); 1125138897Salc VM_OBJECT_UNLOCK(m->object); 1126133143Salc mtx_lock(&Giant); 1127117045Salc pmap_enter(pm, va, m, VM_PROT_READ | VM_PROT_EXECUTE, FALSE); 1128133143Salc mtx_unlock(&Giant); 1129138897Salc VM_OBJECT_LOCK(m->object); 1130138897Salc vm_page_lock_queues(); 1131138897Salc vm_page_wakeup(m); 1132117045Salc return (NULL); 1133117045Salc} 1134117045Salc 1135131658Salcvm_paddr_t 113696353Sbennopmap_extract(pmap_t pm, vm_offset_t va) 113777957Sbenno{ 113896353Sbenno struct pvo_entry *pvo; 1139134329Salc vm_paddr_t pa; 114096353Sbenno 1141134329Salc PMAP_LOCK(pm); 114296353Sbenno pvo = pmap_pvo_find_va(pm, va & ~ADDR_POFF, NULL); 1143134329Salc if (pvo == NULL) 1144134329Salc pa = 0; 1145134329Salc else 1146134329Salc pa = (pvo->pvo_pte.pte_lo & PTE_RPGN) | (va & ADDR_POFF); 1147134329Salc PMAP_UNLOCK(pm); 1148134329Salc return (pa); 114977957Sbenno} 115077957Sbenno 115177957Sbenno/* 1152120336Sgrehan * Atomically extract and hold the physical page with the given 1153120336Sgrehan * pmap and virtual address pair if that mapping permits the given 1154120336Sgrehan * protection. 1155120336Sgrehan */ 1156120336Sgrehanvm_page_t 1157120336Sgrehanpmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot) 1158120336Sgrehan{ 1159132666Salc struct pvo_entry *pvo; 1160120336Sgrehan vm_page_t m; 1161120336Sgrehan 1162120336Sgrehan m = NULL; 1163120336Sgrehan mtx_lock(&Giant); 1164134329Salc vm_page_lock_queues(); 1165134329Salc PMAP_LOCK(pmap); 1166132666Salc pvo = pmap_pvo_find_va(pmap, va & ~ADDR_POFF, NULL); 1167132666Salc if (pvo != NULL && (pvo->pvo_pte.pte_hi & PTE_VALID) && 1168132666Salc ((pvo->pvo_pte.pte_lo & PTE_PP) == PTE_RW || 1169132666Salc (prot & VM_PROT_WRITE) == 0)) { 1170132666Salc m = PHYS_TO_VM_PAGE(pvo->pvo_pte.pte_lo & PTE_RPGN); 1171120336Sgrehan vm_page_hold(m); 1172120336Sgrehan } 1173134329Salc vm_page_unlock_queues(); 1174134329Salc PMAP_UNLOCK(pmap); 1175120336Sgrehan mtx_unlock(&Giant); 1176120336Sgrehan return (m); 1177120336Sgrehan} 1178120336Sgrehan 1179120336Sgrehan/* 118090643Sbenno * Grow the number of kernel page table entries. Unneeded. 118177957Sbenno */ 118290643Sbennovoid 118390643Sbennopmap_growkernel(vm_offset_t addr) 118477957Sbenno{ 118590643Sbenno} 118677957Sbenno 118790643Sbennovoid 1188127869Salcpmap_init(void) 118990643Sbenno{ 119077957Sbenno 119194753Sbenno CTR0(KTR_PMAP, "pmap_init"); 119277957Sbenno 119392847Sjeff pmap_upvo_zone = uma_zcreate("UPVO entry", sizeof (struct pvo_entry), 1194125442Sgrehan NULL, NULL, NULL, NULL, UMA_ALIGN_PTR, 1195125442Sgrehan UMA_ZONE_VM | UMA_ZONE_NOFREE); 119692847Sjeff pmap_mpvo_zone = uma_zcreate("MPVO entry", sizeof(struct pvo_entry), 1197125442Sgrehan NULL, NULL, NULL, NULL, UMA_ALIGN_PTR, 1198125442Sgrehan UMA_ZONE_VM | UMA_ZONE_NOFREE); 119990643Sbenno pmap_initialized = TRUE; 120077957Sbenno} 120177957Sbenno 120299037Sbennovoid 120399037Sbennopmap_init2(void) 120499037Sbenno{ 120599037Sbenno 120699037Sbenno CTR0(KTR_PMAP, "pmap_init2"); 120799037Sbenno} 120899037Sbenno 120990643Sbennoboolean_t 121090643Sbennopmap_is_modified(vm_page_t m) 121190643Sbenno{ 121296353Sbenno 1213110172Sgrehan if ((m->flags & (PG_FICTITIOUS |PG_UNMANAGED)) != 0) 121496353Sbenno return (FALSE); 121596353Sbenno 121696353Sbenno return (pmap_query_bit(m, PTE_CHG)); 121790643Sbenno} 121890643Sbenno 1219120722Salc/* 1220120722Salc * pmap_is_prefaultable: 1221120722Salc * 1222120722Salc * Return whether or not the specified virtual address is elgible 1223120722Salc * for prefault. 1224120722Salc */ 1225120722Salcboolean_t 1226120722Salcpmap_is_prefaultable(pmap_t pmap, vm_offset_t addr) 1227120722Salc{ 1228120722Salc 1229120722Salc return (FALSE); 1230120722Salc} 1231120722Salc 123290643Sbennovoid 123390643Sbennopmap_clear_reference(vm_page_t m) 123490643Sbenno{ 1235110172Sgrehan 1236110172Sgrehan if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0) 1237110172Sgrehan return; 1238110172Sgrehan pmap_clear_bit(m, PTE_REF, NULL); 123990643Sbenno} 124090643Sbenno 1241110172Sgrehanvoid 1242110172Sgrehanpmap_clear_modify(vm_page_t m) 1243110172Sgrehan{ 1244110172Sgrehan 1245110172Sgrehan if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0) 1246110172Sgrehan return; 1247110172Sgrehan pmap_clear_bit(m, PTE_CHG, NULL); 1248110172Sgrehan} 1249110172Sgrehan 125091403Ssilby/* 125191403Ssilby * pmap_ts_referenced: 125291403Ssilby * 125391403Ssilby * Return a count of reference bits for a page, clearing those bits. 125491403Ssilby * It is not necessary for every reference bit to be cleared, but it 125591403Ssilby * is necessary that 0 only be returned when there are truly no 125691403Ssilby * reference bits set. 125791403Ssilby * 125891403Ssilby * XXX: The exact number of bits to check and clear is a matter that 125991403Ssilby * should be tested and standardized at some point in the future for 126091403Ssilby * optimal aging of shared pages. 126191403Ssilby */ 126290643Sbennoint 126390643Sbennopmap_ts_referenced(vm_page_t m) 126490643Sbenno{ 1265110172Sgrehan int count; 1266110172Sgrehan 1267110172Sgrehan if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0) 1268110172Sgrehan return (0); 1269110172Sgrehan 1270110172Sgrehan count = pmap_clear_bit(m, PTE_REF, NULL); 1271110172Sgrehan 1272110172Sgrehan return (count); 127390643Sbenno} 127490643Sbenno 127577957Sbenno/* 127690643Sbenno * Map a wired page into kernel virtual address space. 127777957Sbenno */ 127877957Sbennovoid 127990643Sbennopmap_kenter(vm_offset_t va, vm_offset_t pa) 128077957Sbenno{ 128190643Sbenno u_int pte_lo; 128290643Sbenno int error; 128390643Sbenno int i; 128477957Sbenno 128590643Sbenno#if 0 128690643Sbenno if (va < VM_MIN_KERNEL_ADDRESS) 128790643Sbenno panic("pmap_kenter: attempt to enter non-kernel address %#x", 128890643Sbenno va); 128990643Sbenno#endif 129077957Sbenno 1291103604Sgrehan pte_lo = PTE_I | PTE_G; 1292103604Sgrehan for (i = 0; i < pregions_sz; i++) { 1293103604Sgrehan if ((pa >= pregions[i].mr_start) && 1294103604Sgrehan (pa < (pregions[i].mr_start + pregions[i].mr_size))) { 129590643Sbenno pte_lo &= ~(PTE_I | PTE_G); 129677957Sbenno break; 129777957Sbenno } 1298103604Sgrehan } 129977957Sbenno 1300135172Salc PMAP_LOCK(kernel_pmap); 130190643Sbenno error = pmap_pvo_enter(kernel_pmap, pmap_upvo_zone, 130290643Sbenno &pmap_pvo_kunmanaged, va, pa, pte_lo, PVO_WIRED); 130390643Sbenno 130490643Sbenno if (error != 0 && error != ENOENT) 130590643Sbenno panic("pmap_kenter: failed to enter va %#x pa %#x: %d", va, 130690643Sbenno pa, error); 130790643Sbenno 130877957Sbenno /* 130990643Sbenno * Flush the real memory from the instruction cache. 131077957Sbenno */ 131190643Sbenno if ((pte_lo & (PTE_I | PTE_G)) == 0) { 131290643Sbenno pmap_syncicache(pa, PAGE_SIZE); 131377957Sbenno } 1314135172Salc PMAP_UNLOCK(kernel_pmap); 131577957Sbenno} 131677957Sbenno 131794838Sbenno/* 131894838Sbenno * Extract the physical page address associated with the given kernel virtual 131994838Sbenno * address. 132094838Sbenno */ 132190643Sbennovm_offset_t 132290643Sbennopmap_kextract(vm_offset_t va) 132377957Sbenno{ 132494838Sbenno struct pvo_entry *pvo; 1325134329Salc vm_paddr_t pa; 132694838Sbenno 1327125185Sgrehan#ifdef UMA_MD_SMALL_ALLOC 1328125185Sgrehan /* 1329125185Sgrehan * Allow direct mappings 1330125185Sgrehan */ 1331125185Sgrehan if (va < VM_MIN_KERNEL_ADDRESS) { 1332125185Sgrehan return (va); 1333125185Sgrehan } 1334125185Sgrehan#endif 1335125185Sgrehan 1336134329Salc PMAP_LOCK(kernel_pmap); 133794838Sbenno pvo = pmap_pvo_find_va(kernel_pmap, va & ~ADDR_POFF, NULL); 1338125185Sgrehan KASSERT(pvo != NULL, ("pmap_kextract: no addr found")); 1339134329Salc pa = (pvo->pvo_pte.pte_lo & PTE_RPGN) | (va & ADDR_POFF); 1340134329Salc PMAP_UNLOCK(kernel_pmap); 1341134329Salc return (pa); 134277957Sbenno} 134377957Sbenno 134491456Sbenno/* 134591456Sbenno * Remove a wired page from kernel virtual address space. 134691456Sbenno */ 134777957Sbennovoid 134877957Sbennopmap_kremove(vm_offset_t va) 134977957Sbenno{ 135091456Sbenno 1351103604Sgrehan pmap_remove(kernel_pmap, va, va + PAGE_SIZE); 135277957Sbenno} 135377957Sbenno 135477957Sbenno/* 135590643Sbenno * Map a range of physical addresses into kernel virtual address space. 135690643Sbenno * 135790643Sbenno * The value passed in *virt is a suggested virtual address for the mapping. 135890643Sbenno * Architectures which can support a direct-mapped physical to virtual region 135990643Sbenno * can return the appropriate address within that region, leaving '*virt' 136090643Sbenno * unchanged. We cannot and therefore do not; *virt is updated with the 136190643Sbenno * first usable address after the mapped region. 136277957Sbenno */ 136390643Sbennovm_offset_t 136490643Sbennopmap_map(vm_offset_t *virt, vm_offset_t pa_start, vm_offset_t pa_end, int prot) 136577957Sbenno{ 136690643Sbenno vm_offset_t sva, va; 136777957Sbenno 136890643Sbenno sva = *virt; 136990643Sbenno va = sva; 137090643Sbenno for (; pa_start < pa_end; pa_start += PAGE_SIZE, va += PAGE_SIZE) 137190643Sbenno pmap_kenter(va, pa_start); 137290643Sbenno *virt = va; 137390643Sbenno return (sva); 137477957Sbenno} 137577957Sbenno 137690643Sbennoint 137790643Sbennopmap_mincore(pmap_t pmap, vm_offset_t addr) 137877957Sbenno{ 137990643Sbenno TODO; 138090643Sbenno return (0); 138177957Sbenno} 138277957Sbenno 138377957Sbennovoid 138494838Sbennopmap_object_init_pt(pmap_t pm, vm_offset_t addr, vm_object_t object, 1385117206Salc vm_pindex_t pindex, vm_size_t size) 138690643Sbenno{ 138794838Sbenno 1388117206Salc VM_OBJECT_LOCK_ASSERT(object, MA_OWNED); 1389117206Salc KASSERT(object->type == OBJT_DEVICE, 1390117206Salc ("pmap_object_init_pt: non-device object")); 139194838Sbenno KASSERT(pm == &curproc->p_vmspace->vm_pmap || pm == kernel_pmap, 1392117206Salc ("pmap_object_init_pt: non current pmap")); 139377957Sbenno} 139477957Sbenno 139577957Sbenno/* 139690643Sbenno * Lower the permission for all mappings to a given page. 139777957Sbenno */ 139877957Sbennovoid 139977957Sbennopmap_page_protect(vm_page_t m, vm_prot_t prot) 140077957Sbenno{ 140190643Sbenno struct pvo_head *pvo_head; 140290643Sbenno struct pvo_entry *pvo, *next_pvo; 140390643Sbenno struct pte *pt; 1404134329Salc pmap_t pmap; 140577957Sbenno 140690643Sbenno /* 140790643Sbenno * Since the routine only downgrades protection, if the 140890643Sbenno * maximal protection is desired, there isn't any change 140990643Sbenno * to be made. 141090643Sbenno */ 141190643Sbenno if ((prot & (VM_PROT_READ|VM_PROT_WRITE)) == 141290643Sbenno (VM_PROT_READ|VM_PROT_WRITE)) 141377957Sbenno return; 141477957Sbenno 141590643Sbenno pvo_head = vm_page_to_pvoh(m); 141690643Sbenno for (pvo = LIST_FIRST(pvo_head); pvo != NULL; pvo = next_pvo) { 141790643Sbenno next_pvo = LIST_NEXT(pvo, pvo_vlink); 141890643Sbenno PMAP_PVO_CHECK(pvo); /* sanity check */ 1419134329Salc pmap = pvo->pvo_pmap; 1420134329Salc PMAP_LOCK(pmap); 142190643Sbenno 142290643Sbenno /* 142390643Sbenno * Downgrading to no mapping at all, we just remove the entry. 142490643Sbenno */ 142590643Sbenno if ((prot & VM_PROT_READ) == 0) { 142690643Sbenno pmap_pvo_remove(pvo, -1); 1427134329Salc PMAP_UNLOCK(pmap); 142890643Sbenno continue; 142977957Sbenno } 143090643Sbenno 143190643Sbenno /* 143290643Sbenno * If EXEC permission is being revoked, just clear the flag 143390643Sbenno * in the PVO. 143490643Sbenno */ 143590643Sbenno if ((prot & VM_PROT_EXECUTE) == 0) 143690643Sbenno pvo->pvo_vaddr &= ~PVO_EXECUTABLE; 143790643Sbenno 143890643Sbenno /* 143990643Sbenno * If this entry is already RO, don't diddle with the page 144090643Sbenno * table. 144190643Sbenno */ 144290643Sbenno if ((pvo->pvo_pte.pte_lo & PTE_PP) == PTE_BR) { 1443134329Salc PMAP_UNLOCK(pmap); 144490643Sbenno PMAP_PVO_CHECK(pvo); 144590643Sbenno continue; 144677957Sbenno } 144790643Sbenno 144890643Sbenno /* 144990643Sbenno * Grab the PTE before we diddle the bits so pvo_to_pte can 145090643Sbenno * verify the pte contents are as expected. 145190643Sbenno */ 145290643Sbenno pt = pmap_pvo_to_pte(pvo, -1); 145390643Sbenno pvo->pvo_pte.pte_lo &= ~PTE_PP; 145490643Sbenno pvo->pvo_pte.pte_lo |= PTE_BR; 145590643Sbenno if (pt != NULL) 145690643Sbenno pmap_pte_change(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 1457134329Salc PMAP_UNLOCK(pmap); 145890643Sbenno PMAP_PVO_CHECK(pvo); /* sanity check */ 145977957Sbenno } 1460133166Sgrehan 1461133166Sgrehan /* 1462133166Sgrehan * Downgrading from writeable: clear the VM page flag 1463133166Sgrehan */ 1464133166Sgrehan if ((prot & VM_PROT_WRITE) != VM_PROT_WRITE) 1465133166Sgrehan vm_page_flag_clear(m, PG_WRITEABLE); 146677957Sbenno} 146777957Sbenno 146877957Sbenno/* 146991403Ssilby * Returns true if the pmap's pv is one of the first 147091403Ssilby * 16 pvs linked to from this page. This count may 147191403Ssilby * be changed upwards or downwards in the future; it 147291403Ssilby * is only necessary that true be returned for a small 147391403Ssilby * subset of pmaps for proper page aging. 147491403Ssilby */ 147590643Sbennoboolean_t 147691403Ssilbypmap_page_exists_quick(pmap_t pmap, vm_page_t m) 147790643Sbenno{ 1478110172Sgrehan int loops; 1479110172Sgrehan struct pvo_entry *pvo; 1480110172Sgrehan 1481110172Sgrehan if (!pmap_initialized || (m->flags & PG_FICTITIOUS)) 1482110172Sgrehan return FALSE; 1483110172Sgrehan 1484110172Sgrehan loops = 0; 1485110172Sgrehan LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) { 1486110172Sgrehan if (pvo->pvo_pmap == pmap) 1487110172Sgrehan return (TRUE); 1488110172Sgrehan if (++loops >= 16) 1489110172Sgrehan break; 1490110172Sgrehan } 1491110172Sgrehan 1492110172Sgrehan return (FALSE); 149390643Sbenno} 149477957Sbenno 149590643Sbennostatic u_int pmap_vsidcontext; 149677957Sbenno 149790643Sbennovoid 149890643Sbennopmap_pinit(pmap_t pmap) 149990643Sbenno{ 150090643Sbenno int i, mask; 150190643Sbenno u_int entropy; 150277957Sbenno 1503126478Sgrehan KASSERT((int)pmap < VM_MIN_KERNEL_ADDRESS, ("pmap_pinit: virt pmap")); 1504134329Salc PMAP_LOCK_INIT(pmap); 1505126478Sgrehan 150690643Sbenno entropy = 0; 150790643Sbenno __asm __volatile("mftb %0" : "=r"(entropy)); 150877957Sbenno 150990643Sbenno /* 151090643Sbenno * Allocate some segment registers for this pmap. 151190643Sbenno */ 151290643Sbenno for (i = 0; i < NPMAPS; i += VSID_NBPW) { 151390643Sbenno u_int hash, n; 151477957Sbenno 151577957Sbenno /* 151690643Sbenno * Create a new value by mutiplying by a prime and adding in 151790643Sbenno * entropy from the timebase register. This is to make the 151890643Sbenno * VSID more random so that the PT hash function collides 151990643Sbenno * less often. (Note that the prime casues gcc to do shifts 152090643Sbenno * instead of a multiply.) 152177957Sbenno */ 152290643Sbenno pmap_vsidcontext = (pmap_vsidcontext * 0x1105) + entropy; 152390643Sbenno hash = pmap_vsidcontext & (NPMAPS - 1); 152490643Sbenno if (hash == 0) /* 0 is special, avoid it */ 152590643Sbenno continue; 152690643Sbenno n = hash >> 5; 152790643Sbenno mask = 1 << (hash & (VSID_NBPW - 1)); 152890643Sbenno hash = (pmap_vsidcontext & 0xfffff); 152990643Sbenno if (pmap_vsid_bitmap[n] & mask) { /* collision? */ 153090643Sbenno /* anything free in this bucket? */ 153190643Sbenno if (pmap_vsid_bitmap[n] == 0xffffffff) { 153290643Sbenno entropy = (pmap_vsidcontext >> 20); 153390643Sbenno continue; 153490643Sbenno } 153590643Sbenno i = ffs(~pmap_vsid_bitmap[i]) - 1; 153690643Sbenno mask = 1 << i; 153790643Sbenno hash &= 0xfffff & ~(VSID_NBPW - 1); 153890643Sbenno hash |= i; 153977957Sbenno } 154090643Sbenno pmap_vsid_bitmap[n] |= mask; 154190643Sbenno for (i = 0; i < 16; i++) 154290643Sbenno pmap->pm_sr[i] = VSID_MAKE(i, hash); 154390643Sbenno return; 154490643Sbenno } 154577957Sbenno 154690643Sbenno panic("pmap_pinit: out of segments"); 154777957Sbenno} 154877957Sbenno 154977957Sbenno/* 155090643Sbenno * Initialize the pmap associated with process 0. 155177957Sbenno */ 155277957Sbennovoid 155390643Sbennopmap_pinit0(pmap_t pm) 155477957Sbenno{ 155577957Sbenno 155690643Sbenno pmap_pinit(pm); 155790643Sbenno bzero(&pm->pm_stats, sizeof(pm->pm_stats)); 155877957Sbenno} 155977957Sbenno 156094838Sbenno/* 156194838Sbenno * Set the physical protection on the specified range of this map as requested. 156294838Sbenno */ 156390643Sbennovoid 156494838Sbennopmap_protect(pmap_t pm, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot) 156590643Sbenno{ 156694838Sbenno struct pvo_entry *pvo; 156794838Sbenno struct pte *pt; 156894838Sbenno int pteidx; 156994838Sbenno 157094838Sbenno CTR4(KTR_PMAP, "pmap_protect: pm=%p sva=%#x eva=%#x prot=%#x", pm, sva, 157194838Sbenno eva, prot); 157294838Sbenno 157394838Sbenno 157494838Sbenno KASSERT(pm == &curproc->p_vmspace->vm_pmap || pm == kernel_pmap, 157594838Sbenno ("pmap_protect: non current pmap")); 157694838Sbenno 157794838Sbenno if ((prot & VM_PROT_READ) == VM_PROT_NONE) { 1578132899Salc mtx_lock(&Giant); 157994838Sbenno pmap_remove(pm, sva, eva); 1580132899Salc mtx_unlock(&Giant); 158194838Sbenno return; 158294838Sbenno } 158394838Sbenno 1584132899Salc mtx_lock(&Giant); 1585132220Salc vm_page_lock_queues(); 1586134329Salc PMAP_LOCK(pm); 158794838Sbenno for (; sva < eva; sva += PAGE_SIZE) { 158894838Sbenno pvo = pmap_pvo_find_va(pm, sva, &pteidx); 158994838Sbenno if (pvo == NULL) 159094838Sbenno continue; 159194838Sbenno 159294838Sbenno if ((prot & VM_PROT_EXECUTE) == 0) 159394838Sbenno pvo->pvo_vaddr &= ~PVO_EXECUTABLE; 159494838Sbenno 159594838Sbenno /* 159694838Sbenno * Grab the PTE pointer before we diddle with the cached PTE 159794838Sbenno * copy. 159894838Sbenno */ 159994838Sbenno pt = pmap_pvo_to_pte(pvo, pteidx); 160094838Sbenno /* 160194838Sbenno * Change the protection of the page. 160294838Sbenno */ 160394838Sbenno pvo->pvo_pte.pte_lo &= ~PTE_PP; 160494838Sbenno pvo->pvo_pte.pte_lo |= PTE_BR; 160594838Sbenno 160694838Sbenno /* 160794838Sbenno * If the PVO is in the page table, update that pte as well. 160894838Sbenno */ 160994838Sbenno if (pt != NULL) 161094838Sbenno pmap_pte_change(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 161194838Sbenno } 1612132220Salc vm_page_unlock_queues(); 1613134329Salc PMAP_UNLOCK(pm); 1614132899Salc mtx_unlock(&Giant); 161577957Sbenno} 161677957Sbenno 161791456Sbenno/* 161891456Sbenno * Map a list of wired pages into kernel virtual address space. This is 161991456Sbenno * intended for temporary mappings which do not need page modification or 162091456Sbenno * references recorded. Existing mappings in the region are overwritten. 162191456Sbenno */ 162290643Sbennovoid 1623110172Sgrehanpmap_qenter(vm_offset_t sva, vm_page_t *m, int count) 162477957Sbenno{ 1625110172Sgrehan vm_offset_t va; 162677957Sbenno 1627110172Sgrehan va = sva; 1628110172Sgrehan while (count-- > 0) { 1629110172Sgrehan pmap_kenter(va, VM_PAGE_TO_PHYS(*m)); 1630110172Sgrehan va += PAGE_SIZE; 1631110172Sgrehan m++; 1632110172Sgrehan } 163390643Sbenno} 163477957Sbenno 163591456Sbenno/* 163691456Sbenno * Remove page mappings from kernel virtual address space. Intended for 163791456Sbenno * temporary mappings entered by pmap_qenter. 163891456Sbenno */ 163990643Sbennovoid 1640110172Sgrehanpmap_qremove(vm_offset_t sva, int count) 164190643Sbenno{ 1642110172Sgrehan vm_offset_t va; 164391456Sbenno 1644110172Sgrehan va = sva; 1645110172Sgrehan while (count-- > 0) { 164691456Sbenno pmap_kremove(va); 1647110172Sgrehan va += PAGE_SIZE; 1648110172Sgrehan } 164977957Sbenno} 165077957Sbenno 165190643Sbennovoid 165290643Sbennopmap_release(pmap_t pmap) 165390643Sbenno{ 1654103604Sgrehan int idx, mask; 1655103604Sgrehan 1656103604Sgrehan /* 1657103604Sgrehan * Free segment register's VSID 1658103604Sgrehan */ 1659103604Sgrehan if (pmap->pm_sr[0] == 0) 1660103604Sgrehan panic("pmap_release"); 1661103604Sgrehan 1662103604Sgrehan idx = VSID_TO_HASH(pmap->pm_sr[0]) & (NPMAPS-1); 1663103604Sgrehan mask = 1 << (idx % VSID_NBPW); 1664103604Sgrehan idx /= VSID_NBPW; 1665103604Sgrehan pmap_vsid_bitmap[idx] &= ~mask; 1666134329Salc PMAP_LOCK_DESTROY(pmap); 166777957Sbenno} 166877957Sbenno 166991456Sbenno/* 167091456Sbenno * Remove the given range of addresses from the specified map. 167191456Sbenno */ 167290643Sbennovoid 167391456Sbennopmap_remove(pmap_t pm, vm_offset_t sva, vm_offset_t eva) 167477957Sbenno{ 167591456Sbenno struct pvo_entry *pvo; 167691456Sbenno int pteidx; 167791456Sbenno 1678132220Salc vm_page_lock_queues(); 1679134329Salc PMAP_LOCK(pm); 168091456Sbenno for (; sva < eva; sva += PAGE_SIZE) { 168191456Sbenno pvo = pmap_pvo_find_va(pm, sva, &pteidx); 168291456Sbenno if (pvo != NULL) { 168391456Sbenno pmap_pvo_remove(pvo, pteidx); 168491456Sbenno } 168591456Sbenno } 1686140538Sgrehan PMAP_UNLOCK(pm); 1687132220Salc vm_page_unlock_queues(); 168877957Sbenno} 168977957Sbenno 169094838Sbenno/* 1691110172Sgrehan * Remove physical page from all pmaps in which it resides. pmap_pvo_remove() 1692110172Sgrehan * will reflect changes in pte's back to the vm_page. 1693110172Sgrehan */ 1694110172Sgrehanvoid 1695110172Sgrehanpmap_remove_all(vm_page_t m) 1696110172Sgrehan{ 1697110172Sgrehan struct pvo_head *pvo_head; 1698110172Sgrehan struct pvo_entry *pvo, *next_pvo; 1699134329Salc pmap_t pmap; 1700110172Sgrehan 1701120336Sgrehan mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1702120336Sgrehan 1703110172Sgrehan pvo_head = vm_page_to_pvoh(m); 1704110172Sgrehan for (pvo = LIST_FIRST(pvo_head); pvo != NULL; pvo = next_pvo) { 1705110172Sgrehan next_pvo = LIST_NEXT(pvo, pvo_vlink); 1706133166Sgrehan 1707110172Sgrehan PMAP_PVO_CHECK(pvo); /* sanity check */ 1708134329Salc pmap = pvo->pvo_pmap; 1709134329Salc PMAP_LOCK(pmap); 1710110172Sgrehan pmap_pvo_remove(pvo, -1); 1711134329Salc PMAP_UNLOCK(pmap); 1712110172Sgrehan } 1713110172Sgrehan vm_page_flag_clear(m, PG_WRITEABLE); 1714110172Sgrehan} 1715110172Sgrehan 1716110172Sgrehan/* 171794838Sbenno * Remove all pages from specified address space, this aids process exit 171894838Sbenno * speeds. This is much faster than pmap_remove in the case of running down 171994838Sbenno * an entire address space. Only works for the current pmap. 172094838Sbenno */ 172190643Sbennovoid 172294838Sbennopmap_remove_pages(pmap_t pm, vm_offset_t sva, vm_offset_t eva) 172377957Sbenno{ 172477957Sbenno} 172577957Sbenno 172677957Sbenno/* 172790643Sbenno * Allocate a physical page of memory directly from the phys_avail map. 172890643Sbenno * Can only be called from pmap_bootstrap before avail start and end are 172990643Sbenno * calculated. 173083682Smp */ 173190643Sbennostatic vm_offset_t 173290643Sbennopmap_bootstrap_alloc(vm_size_t size, u_int align) 173383682Smp{ 173490643Sbenno vm_offset_t s, e; 173590643Sbenno int i, j; 173683682Smp 173790643Sbenno size = round_page(size); 173890643Sbenno for (i = 0; phys_avail[i + 1] != 0; i += 2) { 173990643Sbenno if (align != 0) 174090643Sbenno s = (phys_avail[i] + align - 1) & ~(align - 1); 174190643Sbenno else 174290643Sbenno s = phys_avail[i]; 174390643Sbenno e = s + size; 174490643Sbenno 174590643Sbenno if (s < phys_avail[i] || e > phys_avail[i + 1]) 174690643Sbenno continue; 174790643Sbenno 174890643Sbenno if (s == phys_avail[i]) { 174990643Sbenno phys_avail[i] += size; 175090643Sbenno } else if (e == phys_avail[i + 1]) { 175190643Sbenno phys_avail[i + 1] -= size; 175290643Sbenno } else { 175390643Sbenno for (j = phys_avail_count * 2; j > i; j -= 2) { 175490643Sbenno phys_avail[j] = phys_avail[j - 2]; 175590643Sbenno phys_avail[j + 1] = phys_avail[j - 1]; 175690643Sbenno } 175790643Sbenno 175890643Sbenno phys_avail[i + 3] = phys_avail[i + 1]; 175990643Sbenno phys_avail[i + 1] = s; 176090643Sbenno phys_avail[i + 2] = e; 176190643Sbenno phys_avail_count++; 176290643Sbenno } 176390643Sbenno 176490643Sbenno return (s); 176583682Smp } 176690643Sbenno panic("pmap_bootstrap_alloc: could not allocate memory"); 176783682Smp} 176883682Smp 176983682Smp/* 177090643Sbenno * Return an unmapped pvo for a kernel virtual address. 177190643Sbenno * Used by pmap functions that operate on physical pages. 177283682Smp */ 177390643Sbennostatic struct pvo_entry * 177490643Sbennopmap_rkva_alloc(void) 177583682Smp{ 177690643Sbenno struct pvo_entry *pvo; 177790643Sbenno struct pte *pt; 177890643Sbenno vm_offset_t kva; 177990643Sbenno int pteidx; 178083682Smp 178190643Sbenno if (pmap_rkva_count == 0) 178290643Sbenno panic("pmap_rkva_alloc: no more reserved KVAs"); 178390643Sbenno 178490643Sbenno kva = pmap_rkva_start + (PAGE_SIZE * --pmap_rkva_count); 178590643Sbenno pmap_kenter(kva, 0); 178690643Sbenno 178790643Sbenno pvo = pmap_pvo_find_va(kernel_pmap, kva, &pteidx); 178890643Sbenno 178990643Sbenno if (pvo == NULL) 179090643Sbenno panic("pmap_kva_alloc: pmap_pvo_find_va failed"); 179190643Sbenno 179290643Sbenno pt = pmap_pvo_to_pte(pvo, pteidx); 179390643Sbenno 179490643Sbenno if (pt == NULL) 179590643Sbenno panic("pmap_kva_alloc: pmap_pvo_to_pte failed"); 179690643Sbenno 179790643Sbenno pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 179890643Sbenno PVO_PTEGIDX_CLR(pvo); 179990643Sbenno 180090643Sbenno pmap_pte_overflow++; 180190643Sbenno 180290643Sbenno return (pvo); 180390643Sbenno} 180490643Sbenno 180590643Sbennostatic void 180690643Sbennopmap_pa_map(struct pvo_entry *pvo, vm_offset_t pa, struct pte *saved_pt, 180790643Sbenno int *depth_p) 180890643Sbenno{ 180990643Sbenno struct pte *pt; 181090643Sbenno 181190643Sbenno /* 181290643Sbenno * If this pvo already has a valid pte, we need to save it so it can 181390643Sbenno * be restored later. We then just reload the new PTE over the old 181490643Sbenno * slot. 181590643Sbenno */ 181690643Sbenno if (saved_pt != NULL) { 181790643Sbenno pt = pmap_pvo_to_pte(pvo, -1); 181890643Sbenno 181990643Sbenno if (pt != NULL) { 182090643Sbenno pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 182190643Sbenno PVO_PTEGIDX_CLR(pvo); 182290643Sbenno pmap_pte_overflow++; 182383682Smp } 182490643Sbenno 182590643Sbenno *saved_pt = pvo->pvo_pte; 182690643Sbenno 182790643Sbenno pvo->pvo_pte.pte_lo &= ~PTE_RPGN; 182883682Smp } 182990643Sbenno 183090643Sbenno pvo->pvo_pte.pte_lo |= pa; 183190643Sbenno 183290643Sbenno if (!pmap_pte_spill(pvo->pvo_vaddr)) 183390643Sbenno panic("pmap_pa_map: could not spill pvo %p", pvo); 183490643Sbenno 183590643Sbenno if (depth_p != NULL) 183690643Sbenno (*depth_p)++; 183783682Smp} 183883682Smp 183990643Sbennostatic void 184090643Sbennopmap_pa_unmap(struct pvo_entry *pvo, struct pte *saved_pt, int *depth_p) 184177957Sbenno{ 184290643Sbenno struct pte *pt; 184377957Sbenno 184490643Sbenno pt = pmap_pvo_to_pte(pvo, -1); 184590643Sbenno 184690643Sbenno if (pt != NULL) { 184790643Sbenno pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 184890643Sbenno PVO_PTEGIDX_CLR(pvo); 184990643Sbenno pmap_pte_overflow++; 185090643Sbenno } 185190643Sbenno 185290643Sbenno pvo->pvo_pte.pte_lo &= ~PTE_RPGN; 185390643Sbenno 185490643Sbenno /* 185590643Sbenno * If there is a saved PTE and it's valid, restore it and return. 185690643Sbenno */ 185790643Sbenno if (saved_pt != NULL && (saved_pt->pte_lo & PTE_RPGN) != 0) { 185890643Sbenno if (depth_p != NULL && --(*depth_p) == 0) 185990643Sbenno panic("pmap_pa_unmap: restoring but depth == 0"); 186090643Sbenno 186190643Sbenno pvo->pvo_pte = *saved_pt; 186290643Sbenno 186390643Sbenno if (!pmap_pte_spill(pvo->pvo_vaddr)) 186490643Sbenno panic("pmap_pa_unmap: could not spill pvo %p", pvo); 186590643Sbenno } 186677957Sbenno} 186777957Sbenno 186890643Sbennostatic void 186990643Sbennopmap_syncicache(vm_offset_t pa, vm_size_t len) 187077957Sbenno{ 187190643Sbenno __syncicache((void *)pa, len); 187290643Sbenno} 187377957Sbenno 187490643Sbennostatic void 187590643Sbennotlbia(void) 187690643Sbenno{ 187790643Sbenno caddr_t i; 187890643Sbenno 187990643Sbenno SYNC(); 188090643Sbenno for (i = 0; i < (caddr_t)0x00040000; i += 0x00001000) { 188190643Sbenno TLBIE(i); 188290643Sbenno EIEIO(); 188390643Sbenno } 188490643Sbenno TLBSYNC(); 188590643Sbenno SYNC(); 188677957Sbenno} 188777957Sbenno 188890643Sbennostatic int 188992847Sjeffpmap_pvo_enter(pmap_t pm, uma_zone_t zone, struct pvo_head *pvo_head, 189090643Sbenno vm_offset_t va, vm_offset_t pa, u_int pte_lo, int flags) 189177957Sbenno{ 189290643Sbenno struct pvo_entry *pvo; 189390643Sbenno u_int sr; 189490643Sbenno int first; 189590643Sbenno u_int ptegidx; 189690643Sbenno int i; 1897103604Sgrehan int bootstrap; 189877957Sbenno 189990643Sbenno pmap_pvo_enter_calls++; 190096250Sbenno first = 0; 1901103604Sgrehan bootstrap = 0; 190290643Sbenno 190390643Sbenno /* 190490643Sbenno * Compute the PTE Group index. 190590643Sbenno */ 190690643Sbenno va &= ~ADDR_POFF; 190790643Sbenno sr = va_to_sr(pm->pm_sr, va); 190890643Sbenno ptegidx = va_to_pteg(sr, va); 190990643Sbenno 191090643Sbenno /* 191190643Sbenno * Remove any existing mapping for this page. Reuse the pvo entry if 191290643Sbenno * there is a mapping. 191390643Sbenno */ 1914134535Salc mtx_lock(&pmap_table_mutex); 191590643Sbenno LIST_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 191690643Sbenno if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) { 191796334Sbenno if ((pvo->pvo_pte.pte_lo & PTE_RPGN) == pa && 191896334Sbenno (pvo->pvo_pte.pte_lo & PTE_PP) == 191996334Sbenno (pte_lo & PTE_PP)) { 1920134535Salc mtx_unlock(&pmap_table_mutex); 192192521Sbenno return (0); 192296334Sbenno } 192390643Sbenno pmap_pvo_remove(pvo, -1); 192490643Sbenno break; 192590643Sbenno } 192690643Sbenno } 192790643Sbenno 192890643Sbenno /* 192990643Sbenno * If we aren't overwriting a mapping, try to allocate. 193090643Sbenno */ 193192521Sbenno if (pmap_initialized) { 193292847Sjeff pvo = uma_zalloc(zone, M_NOWAIT); 193392521Sbenno } else { 193499037Sbenno if (pmap_bpvo_pool_index >= BPVO_POOL_SIZE) { 193599037Sbenno panic("pmap_enter: bpvo pool exhausted, %d, %d, %d", 193699037Sbenno pmap_bpvo_pool_index, BPVO_POOL_SIZE, 193799037Sbenno BPVO_POOL_SIZE * sizeof(struct pvo_entry)); 193892521Sbenno } 193992521Sbenno pvo = &pmap_bpvo_pool[pmap_bpvo_pool_index]; 194092521Sbenno pmap_bpvo_pool_index++; 1941103604Sgrehan bootstrap = 1; 194292521Sbenno } 194390643Sbenno 194490643Sbenno if (pvo == NULL) { 1945134535Salc mtx_unlock(&pmap_table_mutex); 194690643Sbenno return (ENOMEM); 194790643Sbenno } 194890643Sbenno 194990643Sbenno pmap_pvo_entries++; 195090643Sbenno pvo->pvo_vaddr = va; 195190643Sbenno pvo->pvo_pmap = pm; 195290643Sbenno LIST_INSERT_HEAD(&pmap_pvo_table[ptegidx], pvo, pvo_olink); 195390643Sbenno pvo->pvo_vaddr &= ~ADDR_POFF; 195490643Sbenno if (flags & VM_PROT_EXECUTE) 195590643Sbenno pvo->pvo_vaddr |= PVO_EXECUTABLE; 195690643Sbenno if (flags & PVO_WIRED) 195790643Sbenno pvo->pvo_vaddr |= PVO_WIRED; 195890643Sbenno if (pvo_head != &pmap_pvo_kunmanaged) 195990643Sbenno pvo->pvo_vaddr |= PVO_MANAGED; 1960103604Sgrehan if (bootstrap) 1961103604Sgrehan pvo->pvo_vaddr |= PVO_BOOTSTRAP; 1962142416Sgrehan if (flags & PVO_FAKE) 1963142416Sgrehan pvo->pvo_vaddr |= PVO_FAKE; 1964142416Sgrehan 196590643Sbenno pmap_pte_create(&pvo->pvo_pte, sr, va, pa | pte_lo); 196690643Sbenno 196790643Sbenno /* 196890643Sbenno * Remember if the list was empty and therefore will be the first 196990643Sbenno * item. 197090643Sbenno */ 197196250Sbenno if (LIST_FIRST(pvo_head) == NULL) 197296250Sbenno first = 1; 1973142416Sgrehan LIST_INSERT_HEAD(pvo_head, pvo, pvo_vlink); 197490643Sbenno 197590643Sbenno if (pvo->pvo_pte.pte_lo & PVO_WIRED) 1976134453Salc pm->pm_stats.wired_count++; 1977134453Salc pm->pm_stats.resident_count++; 197890643Sbenno 197990643Sbenno /* 198090643Sbenno * We hope this succeeds but it isn't required. 198190643Sbenno */ 198290643Sbenno i = pmap_pte_insert(ptegidx, &pvo->pvo_pte); 198390643Sbenno if (i >= 0) { 198490643Sbenno PVO_PTEGIDX_SET(pvo, i); 198590643Sbenno } else { 198690643Sbenno panic("pmap_pvo_enter: overflow"); 198790643Sbenno pmap_pte_overflow++; 198890643Sbenno } 1989142416Sgrehan mtx_unlock(&pmap_table_mutex); 199090643Sbenno 199190643Sbenno return (first ? ENOENT : 0); 199277957Sbenno} 199377957Sbenno 199490643Sbennostatic void 199590643Sbennopmap_pvo_remove(struct pvo_entry *pvo, int pteidx) 199677957Sbenno{ 199790643Sbenno struct pte *pt; 199877957Sbenno 199990643Sbenno /* 200090643Sbenno * If there is an active pte entry, we need to deactivate it (and 200190643Sbenno * save the ref & cfg bits). 200290643Sbenno */ 200390643Sbenno pt = pmap_pvo_to_pte(pvo, pteidx); 200490643Sbenno if (pt != NULL) { 200590643Sbenno pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 200690643Sbenno PVO_PTEGIDX_CLR(pvo); 200790643Sbenno } else { 200890643Sbenno pmap_pte_overflow--; 2009142416Sgrehan } 201090643Sbenno 201190643Sbenno /* 201290643Sbenno * Update our statistics. 201390643Sbenno */ 201490643Sbenno pvo->pvo_pmap->pm_stats.resident_count--; 201590643Sbenno if (pvo->pvo_pte.pte_lo & PVO_WIRED) 201690643Sbenno pvo->pvo_pmap->pm_stats.wired_count--; 201790643Sbenno 201890643Sbenno /* 201990643Sbenno * Save the REF/CHG bits into their cache if the page is managed. 202090643Sbenno */ 2021142416Sgrehan if ((pvo->pvo_vaddr & (PVO_MANAGED|PVO_FAKE)) == PVO_MANAGED) { 202290643Sbenno struct vm_page *pg; 202390643Sbenno 202492067Sbenno pg = PHYS_TO_VM_PAGE(pvo->pvo_pte.pte_lo & PTE_RPGN); 202590643Sbenno if (pg != NULL) { 202690643Sbenno pmap_attr_save(pg, pvo->pvo_pte.pte_lo & 202790643Sbenno (PTE_REF | PTE_CHG)); 202890643Sbenno } 202990643Sbenno } 203090643Sbenno 203190643Sbenno /* 203290643Sbenno * Remove this PVO from the PV list. 203390643Sbenno */ 203490643Sbenno LIST_REMOVE(pvo, pvo_vlink); 203590643Sbenno 203690643Sbenno /* 203790643Sbenno * Remove this from the overflow list and return it to the pool 203890643Sbenno * if we aren't going to reuse it. 203990643Sbenno */ 204090643Sbenno LIST_REMOVE(pvo, pvo_olink); 204192521Sbenno if (!(pvo->pvo_vaddr & PVO_BOOTSTRAP)) 204292847Sjeff uma_zfree(pvo->pvo_vaddr & PVO_MANAGED ? pmap_mpvo_zone : 204392521Sbenno pmap_upvo_zone, pvo); 204490643Sbenno pmap_pvo_entries--; 204590643Sbenno pmap_pvo_remove_calls++; 204677957Sbenno} 204777957Sbenno 204890643Sbennostatic __inline int 204990643Sbennopmap_pvo_pte_index(const struct pvo_entry *pvo, int ptegidx) 205077957Sbenno{ 205190643Sbenno int pteidx; 205277957Sbenno 205390643Sbenno /* 205490643Sbenno * We can find the actual pte entry without searching by grabbing 205590643Sbenno * the PTEG index from 3 unused bits in pte_lo[11:9] and by 205690643Sbenno * noticing the HID bit. 205790643Sbenno */ 205890643Sbenno pteidx = ptegidx * 8 + PVO_PTEGIDX_GET(pvo); 205990643Sbenno if (pvo->pvo_pte.pte_hi & PTE_HID) 206090643Sbenno pteidx ^= pmap_pteg_mask * 8; 206190643Sbenno 206290643Sbenno return (pteidx); 206377957Sbenno} 206477957Sbenno 206590643Sbennostatic struct pvo_entry * 206690643Sbennopmap_pvo_find_va(pmap_t pm, vm_offset_t va, int *pteidx_p) 206777957Sbenno{ 206890643Sbenno struct pvo_entry *pvo; 206990643Sbenno int ptegidx; 207090643Sbenno u_int sr; 207177957Sbenno 207290643Sbenno va &= ~ADDR_POFF; 207390643Sbenno sr = va_to_sr(pm->pm_sr, va); 207490643Sbenno ptegidx = va_to_pteg(sr, va); 207590643Sbenno 2076134535Salc mtx_lock(&pmap_table_mutex); 207790643Sbenno LIST_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 207890643Sbenno if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) { 207990643Sbenno if (pteidx_p) 208090643Sbenno *pteidx_p = pmap_pvo_pte_index(pvo, ptegidx); 2081134535Salc break; 208290643Sbenno } 208390643Sbenno } 2084134535Salc mtx_unlock(&pmap_table_mutex); 208590643Sbenno 2086134535Salc return (pvo); 208777957Sbenno} 208877957Sbenno 208990643Sbennostatic struct pte * 209090643Sbennopmap_pvo_to_pte(const struct pvo_entry *pvo, int pteidx) 209177957Sbenno{ 209290643Sbenno struct pte *pt; 209377957Sbenno 209490643Sbenno /* 209590643Sbenno * If we haven't been supplied the ptegidx, calculate it. 209690643Sbenno */ 209790643Sbenno if (pteidx == -1) { 209890643Sbenno int ptegidx; 209990643Sbenno u_int sr; 210077957Sbenno 210190643Sbenno sr = va_to_sr(pvo->pvo_pmap->pm_sr, pvo->pvo_vaddr); 210290643Sbenno ptegidx = va_to_pteg(sr, pvo->pvo_vaddr); 210390643Sbenno pteidx = pmap_pvo_pte_index(pvo, ptegidx); 210490643Sbenno } 210590643Sbenno 210690643Sbenno pt = &pmap_pteg_table[pteidx >> 3].pt[pteidx & 7]; 210790643Sbenno 210890643Sbenno if ((pvo->pvo_pte.pte_hi & PTE_VALID) && !PVO_PTEGIDX_ISSET(pvo)) { 210990643Sbenno panic("pmap_pvo_to_pte: pvo %p has valid pte in pvo but no " 211090643Sbenno "valid pte index", pvo); 211190643Sbenno } 211290643Sbenno 211390643Sbenno if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0 && PVO_PTEGIDX_ISSET(pvo)) { 211490643Sbenno panic("pmap_pvo_to_pte: pvo %p has valid pte index in pvo " 211590643Sbenno "pvo but no valid pte", pvo); 211690643Sbenno } 211790643Sbenno 211890643Sbenno if ((pt->pte_hi ^ (pvo->pvo_pte.pte_hi & ~PTE_VALID)) == PTE_VALID) { 211990643Sbenno if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0) { 212090643Sbenno panic("pmap_pvo_to_pte: pvo %p has valid pte in " 212190643Sbenno "pmap_pteg_table %p but invalid in pvo", pvo, pt); 212277957Sbenno } 212390643Sbenno 212490643Sbenno if (((pt->pte_lo ^ pvo->pvo_pte.pte_lo) & ~(PTE_CHG|PTE_REF)) 212590643Sbenno != 0) { 212690643Sbenno panic("pmap_pvo_to_pte: pvo %p pte does not match " 212790643Sbenno "pte %p in pmap_pteg_table", pvo, pt); 212890643Sbenno } 212990643Sbenno 213090643Sbenno return (pt); 213177957Sbenno } 213277957Sbenno 213390643Sbenno if (pvo->pvo_pte.pte_hi & PTE_VALID) { 213490643Sbenno panic("pmap_pvo_to_pte: pvo %p has invalid pte %p in " 213590643Sbenno "pmap_pteg_table but valid in pvo", pvo, pt); 213690643Sbenno } 213777957Sbenno 213890643Sbenno return (NULL); 213977957Sbenno} 214078880Sbenno 214178880Sbenno/* 214290643Sbenno * XXX: THIS STUFF SHOULD BE IN pte.c? 214378880Sbenno */ 214490643Sbennoint 214590643Sbennopmap_pte_spill(vm_offset_t addr) 214678880Sbenno{ 214790643Sbenno struct pvo_entry *source_pvo, *victim_pvo; 214890643Sbenno struct pvo_entry *pvo; 214990643Sbenno int ptegidx, i, j; 215090643Sbenno u_int sr; 215190643Sbenno struct pteg *pteg; 215290643Sbenno struct pte *pt; 215378880Sbenno 215490643Sbenno pmap_pte_spills++; 215590643Sbenno 215694836Sbenno sr = mfsrin(addr); 215790643Sbenno ptegidx = va_to_pteg(sr, addr); 215890643Sbenno 215978880Sbenno /* 216090643Sbenno * Have to substitute some entry. Use the primary hash for this. 216190643Sbenno * Use low bits of timebase as random generator. 216278880Sbenno */ 216390643Sbenno pteg = &pmap_pteg_table[ptegidx]; 2164134535Salc mtx_lock(&pmap_table_mutex); 216590643Sbenno __asm __volatile("mftb %0" : "=r"(i)); 216690643Sbenno i &= 7; 216790643Sbenno pt = &pteg->pt[i]; 216878880Sbenno 216990643Sbenno source_pvo = NULL; 217090643Sbenno victim_pvo = NULL; 217190643Sbenno LIST_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 217278880Sbenno /* 217390643Sbenno * We need to find a pvo entry for this address. 217478880Sbenno */ 217590643Sbenno PMAP_PVO_CHECK(pvo); 217690643Sbenno if (source_pvo == NULL && 217790643Sbenno pmap_pte_match(&pvo->pvo_pte, sr, addr, 217890643Sbenno pvo->pvo_pte.pte_hi & PTE_HID)) { 217990643Sbenno /* 218090643Sbenno * Now found an entry to be spilled into the pteg. 218190643Sbenno * The PTE is now valid, so we know it's active. 218290643Sbenno */ 218390643Sbenno j = pmap_pte_insert(ptegidx, &pvo->pvo_pte); 218478880Sbenno 218590643Sbenno if (j >= 0) { 218690643Sbenno PVO_PTEGIDX_SET(pvo, j); 218790643Sbenno pmap_pte_overflow--; 218890643Sbenno PMAP_PVO_CHECK(pvo); 2189134535Salc mtx_unlock(&pmap_table_mutex); 219090643Sbenno return (1); 219190643Sbenno } 219290643Sbenno 219390643Sbenno source_pvo = pvo; 219490643Sbenno 219590643Sbenno if (victim_pvo != NULL) 219690643Sbenno break; 219790643Sbenno } 219890643Sbenno 219978880Sbenno /* 220090643Sbenno * We also need the pvo entry of the victim we are replacing 220190643Sbenno * so save the R & C bits of the PTE. 220278880Sbenno */ 220390643Sbenno if ((pt->pte_hi & PTE_HID) == 0 && victim_pvo == NULL && 220490643Sbenno pmap_pte_compare(pt, &pvo->pvo_pte)) { 220590643Sbenno victim_pvo = pvo; 220690643Sbenno if (source_pvo != NULL) 220790643Sbenno break; 220890643Sbenno } 220990643Sbenno } 221078880Sbenno 2211134535Salc if (source_pvo == NULL) { 2212134535Salc mtx_unlock(&pmap_table_mutex); 221390643Sbenno return (0); 2214134535Salc } 221590643Sbenno 221690643Sbenno if (victim_pvo == NULL) { 221790643Sbenno if ((pt->pte_hi & PTE_HID) == 0) 221890643Sbenno panic("pmap_pte_spill: victim p-pte (%p) has no pvo" 221990643Sbenno "entry", pt); 222090643Sbenno 222178880Sbenno /* 222290643Sbenno * If this is a secondary PTE, we need to search it's primary 222390643Sbenno * pvo bucket for the matching PVO. 222478880Sbenno */ 222590643Sbenno LIST_FOREACH(pvo, &pmap_pvo_table[ptegidx ^ pmap_pteg_mask], 222690643Sbenno pvo_olink) { 222790643Sbenno PMAP_PVO_CHECK(pvo); 222890643Sbenno /* 222990643Sbenno * We also need the pvo entry of the victim we are 223090643Sbenno * replacing so save the R & C bits of the PTE. 223190643Sbenno */ 223290643Sbenno if (pmap_pte_compare(pt, &pvo->pvo_pte)) { 223390643Sbenno victim_pvo = pvo; 223490643Sbenno break; 223590643Sbenno } 223690643Sbenno } 223778880Sbenno 223890643Sbenno if (victim_pvo == NULL) 223990643Sbenno panic("pmap_pte_spill: victim s-pte (%p) has no pvo" 224090643Sbenno "entry", pt); 224190643Sbenno } 224278880Sbenno 224390643Sbenno /* 224490643Sbenno * We are invalidating the TLB entry for the EA we are replacing even 224590643Sbenno * though it's valid. If we don't, we lose any ref/chg bit changes 224690643Sbenno * contained in the TLB entry. 224790643Sbenno */ 224890643Sbenno source_pvo->pvo_pte.pte_hi &= ~PTE_HID; 224978880Sbenno 225090643Sbenno pmap_pte_unset(pt, &victim_pvo->pvo_pte, victim_pvo->pvo_vaddr); 225190643Sbenno pmap_pte_set(pt, &source_pvo->pvo_pte); 225290643Sbenno 225390643Sbenno PVO_PTEGIDX_CLR(victim_pvo); 225490643Sbenno PVO_PTEGIDX_SET(source_pvo, i); 225590643Sbenno pmap_pte_replacements++; 225690643Sbenno 225790643Sbenno PMAP_PVO_CHECK(victim_pvo); 225890643Sbenno PMAP_PVO_CHECK(source_pvo); 225990643Sbenno 2260134535Salc mtx_unlock(&pmap_table_mutex); 226190643Sbenno return (1); 226290643Sbenno} 226390643Sbenno 226490643Sbennostatic int 226590643Sbennopmap_pte_insert(u_int ptegidx, struct pte *pvo_pt) 226690643Sbenno{ 226790643Sbenno struct pte *pt; 226890643Sbenno int i; 226990643Sbenno 227090643Sbenno /* 227190643Sbenno * First try primary hash. 227290643Sbenno */ 227390643Sbenno for (pt = pmap_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) { 227490643Sbenno if ((pt->pte_hi & PTE_VALID) == 0) { 227590643Sbenno pvo_pt->pte_hi &= ~PTE_HID; 227690643Sbenno pmap_pte_set(pt, pvo_pt); 227790643Sbenno return (i); 227878880Sbenno } 227990643Sbenno } 228078880Sbenno 228190643Sbenno /* 228290643Sbenno * Now try secondary hash. 228390643Sbenno */ 228490643Sbenno ptegidx ^= pmap_pteg_mask; 228590643Sbenno ptegidx++; 228690643Sbenno for (pt = pmap_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) { 228790643Sbenno if ((pt->pte_hi & PTE_VALID) == 0) { 228890643Sbenno pvo_pt->pte_hi |= PTE_HID; 228990643Sbenno pmap_pte_set(pt, pvo_pt); 229090643Sbenno return (i); 229190643Sbenno } 229290643Sbenno } 229378880Sbenno 229490643Sbenno panic("pmap_pte_insert: overflow"); 229590643Sbenno return (-1); 229678880Sbenno} 229784921Sbenno 229890643Sbennostatic boolean_t 229990643Sbennopmap_query_bit(vm_page_t m, int ptebit) 230084921Sbenno{ 230190643Sbenno struct pvo_entry *pvo; 230290643Sbenno struct pte *pt; 230384921Sbenno 2304123560Sgrehan#if 0 230590643Sbenno if (pmap_attr_fetch(m) & ptebit) 230690643Sbenno return (TRUE); 2307123560Sgrehan#endif 230884921Sbenno 230990643Sbenno LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) { 231090643Sbenno PMAP_PVO_CHECK(pvo); /* sanity check */ 231184921Sbenno 231290643Sbenno /* 231390643Sbenno * See if we saved the bit off. If so, cache it and return 231490643Sbenno * success. 231590643Sbenno */ 231690643Sbenno if (pvo->pvo_pte.pte_lo & ptebit) { 231790643Sbenno pmap_attr_save(m, ptebit); 231890643Sbenno PMAP_PVO_CHECK(pvo); /* sanity check */ 231990643Sbenno return (TRUE); 232090643Sbenno } 232190643Sbenno } 232284921Sbenno 232390643Sbenno /* 232490643Sbenno * No luck, now go through the hard part of looking at the PTEs 232590643Sbenno * themselves. Sync so that any pending REF/CHG bits are flushed to 232690643Sbenno * the PTEs. 232790643Sbenno */ 232890643Sbenno SYNC(); 232990643Sbenno LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) { 233090643Sbenno PMAP_PVO_CHECK(pvo); /* sanity check */ 233190643Sbenno 233290643Sbenno /* 233390643Sbenno * See if this pvo has a valid PTE. if so, fetch the 233490643Sbenno * REF/CHG bits from the valid PTE. If the appropriate 233590643Sbenno * ptebit is set, cache it and return success. 233690643Sbenno */ 233790643Sbenno pt = pmap_pvo_to_pte(pvo, -1); 233890643Sbenno if (pt != NULL) { 233990643Sbenno pmap_pte_synch(pt, &pvo->pvo_pte); 234090643Sbenno if (pvo->pvo_pte.pte_lo & ptebit) { 234190643Sbenno pmap_attr_save(m, ptebit); 234290643Sbenno PMAP_PVO_CHECK(pvo); /* sanity check */ 234390643Sbenno return (TRUE); 234490643Sbenno } 234590643Sbenno } 234684921Sbenno } 234784921Sbenno 2348123354Sgallatin return (FALSE); 234984921Sbenno} 235090643Sbenno 2351110172Sgrehanstatic u_int 2352110172Sgrehanpmap_clear_bit(vm_page_t m, int ptebit, int *origbit) 235390643Sbenno{ 2354110172Sgrehan u_int count; 235590643Sbenno struct pvo_entry *pvo; 235690643Sbenno struct pte *pt; 235790643Sbenno int rv; 235890643Sbenno 235990643Sbenno /* 236090643Sbenno * Clear the cached value. 236190643Sbenno */ 236290643Sbenno rv = pmap_attr_fetch(m); 236390643Sbenno pmap_attr_clear(m, ptebit); 236490643Sbenno 236590643Sbenno /* 236690643Sbenno * Sync so that any pending REF/CHG bits are flushed to the PTEs (so 236790643Sbenno * we can reset the right ones). note that since the pvo entries and 236890643Sbenno * list heads are accessed via BAT0 and are never placed in the page 236990643Sbenno * table, we don't have to worry about further accesses setting the 237090643Sbenno * REF/CHG bits. 237190643Sbenno */ 237290643Sbenno SYNC(); 237390643Sbenno 237490643Sbenno /* 237590643Sbenno * For each pvo entry, clear the pvo's ptebit. If this pvo has a 237690643Sbenno * valid pte clear the ptebit from the valid pte. 237790643Sbenno */ 2378110172Sgrehan count = 0; 237990643Sbenno LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) { 238090643Sbenno PMAP_PVO_CHECK(pvo); /* sanity check */ 238190643Sbenno pt = pmap_pvo_to_pte(pvo, -1); 238290643Sbenno if (pt != NULL) { 238390643Sbenno pmap_pte_synch(pt, &pvo->pvo_pte); 2384110172Sgrehan if (pvo->pvo_pte.pte_lo & ptebit) { 2385110172Sgrehan count++; 238690643Sbenno pmap_pte_clear(pt, PVO_VADDR(pvo), ptebit); 2387110172Sgrehan } 238890643Sbenno } 238990643Sbenno rv |= pvo->pvo_pte.pte_lo; 239090643Sbenno pvo->pvo_pte.pte_lo &= ~ptebit; 239190643Sbenno PMAP_PVO_CHECK(pvo); /* sanity check */ 239290643Sbenno } 239390643Sbenno 2394110172Sgrehan if (origbit != NULL) { 2395110172Sgrehan *origbit = rv; 2396110172Sgrehan } 2397110172Sgrehan 2398110172Sgrehan return (count); 239990643Sbenno} 240099038Sbenno 240199038Sbenno/* 2402103604Sgrehan * Return true if the physical range is encompassed by the battable[idx] 2403103604Sgrehan */ 2404103604Sgrehanstatic int 2405103604Sgrehanpmap_bat_mapped(int idx, vm_offset_t pa, vm_size_t size) 2406103604Sgrehan{ 2407103604Sgrehan u_int prot; 2408103604Sgrehan u_int32_t start; 2409103604Sgrehan u_int32_t end; 2410103604Sgrehan u_int32_t bat_ble; 2411103604Sgrehan 2412103604Sgrehan /* 2413103604Sgrehan * Return immediately if not a valid mapping 2414103604Sgrehan */ 2415103604Sgrehan if (!battable[idx].batu & BAT_Vs) 2416103604Sgrehan return (EINVAL); 2417103604Sgrehan 2418103604Sgrehan /* 2419103604Sgrehan * The BAT entry must be cache-inhibited, guarded, and r/w 2420103604Sgrehan * so it can function as an i/o page 2421103604Sgrehan */ 2422103604Sgrehan prot = battable[idx].batl & (BAT_I|BAT_G|BAT_PP_RW); 2423103604Sgrehan if (prot != (BAT_I|BAT_G|BAT_PP_RW)) 2424103604Sgrehan return (EPERM); 2425103604Sgrehan 2426103604Sgrehan /* 2427103604Sgrehan * The address should be within the BAT range. Assume that the 2428103604Sgrehan * start address in the BAT has the correct alignment (thus 2429103604Sgrehan * not requiring masking) 2430103604Sgrehan */ 2431103604Sgrehan start = battable[idx].batl & BAT_PBS; 2432103604Sgrehan bat_ble = (battable[idx].batu & ~(BAT_EBS)) | 0x03; 2433103604Sgrehan end = start | (bat_ble << 15) | 0x7fff; 2434103604Sgrehan 2435103604Sgrehan if ((pa < start) || ((pa + size) > end)) 2436103604Sgrehan return (ERANGE); 2437103604Sgrehan 2438103604Sgrehan return (0); 2439103604Sgrehan} 2440103604Sgrehan 2441133855Sssouhlalint 2442133855Sssouhlalpmap_dev_direct_mapped(vm_offset_t pa, vm_size_t size) 2443133855Sssouhlal{ 2444133855Sssouhlal int i; 2445103604Sgrehan 2446133855Sssouhlal /* 2447133855Sssouhlal * This currently does not work for entries that 2448133855Sssouhlal * overlap 256M BAT segments. 2449133855Sssouhlal */ 2450133855Sssouhlal 2451133855Sssouhlal for(i = 0; i < 16; i++) 2452133855Sssouhlal if (pmap_bat_mapped(i, pa, size) == 0) 2453133855Sssouhlal return (0); 2454133855Sssouhlal 2455133855Sssouhlal return (EFAULT); 2456133855Sssouhlal} 2457133855Sssouhlal 2458103604Sgrehan/* 245999038Sbenno * Map a set of physical memory pages into the kernel virtual 246099038Sbenno * address space. Return a pointer to where it is mapped. This 246199038Sbenno * routine is intended to be used for mapping device memory, 246299038Sbenno * NOT real memory. 246399038Sbenno */ 246499038Sbennovoid * 246599038Sbennopmap_mapdev(vm_offset_t pa, vm_size_t size) 246699038Sbenno{ 2467103604Sgrehan vm_offset_t va, tmpva, ppa, offset; 2468103604Sgrehan int i; 2469103604Sgrehan 2470103604Sgrehan ppa = trunc_page(pa); 247199038Sbenno offset = pa & PAGE_MASK; 247299038Sbenno size = roundup(offset + size, PAGE_SIZE); 247399038Sbenno 247499038Sbenno GIANT_REQUIRED; 247599038Sbenno 2476103604Sgrehan /* 2477103604Sgrehan * If the physical address lies within a valid BAT table entry, 2478103604Sgrehan * return the 1:1 mapping. This currently doesn't work 2479103604Sgrehan * for regions that overlap 256M BAT segments. 2480103604Sgrehan */ 2481103604Sgrehan for (i = 0; i < 16; i++) { 2482103604Sgrehan if (pmap_bat_mapped(i, pa, size) == 0) 2483103604Sgrehan return ((void *) pa); 2484103604Sgrehan } 2485103604Sgrehan 2486118365Salc va = kmem_alloc_nofault(kernel_map, size); 248799038Sbenno if (!va) 248899038Sbenno panic("pmap_mapdev: Couldn't alloc kernel virtual memory"); 248999038Sbenno 249099038Sbenno for (tmpva = va; size > 0;) { 2491103604Sgrehan pmap_kenter(tmpva, ppa); 249299038Sbenno TLBIE(tmpva); /* XXX or should it be invalidate-all ? */ 249399038Sbenno size -= PAGE_SIZE; 249499038Sbenno tmpva += PAGE_SIZE; 2495103604Sgrehan ppa += PAGE_SIZE; 249699038Sbenno } 249799038Sbenno 249899038Sbenno return ((void *)(va + offset)); 249999038Sbenno} 250099038Sbenno 250199038Sbennovoid 250299038Sbennopmap_unmapdev(vm_offset_t va, vm_size_t size) 250399038Sbenno{ 250499038Sbenno vm_offset_t base, offset; 250599038Sbenno 2506103604Sgrehan /* 2507103604Sgrehan * If this is outside kernel virtual space, then it's a 2508103604Sgrehan * battable entry and doesn't require unmapping 2509103604Sgrehan */ 2510103604Sgrehan if ((va >= VM_MIN_KERNEL_ADDRESS) && (va <= VM_MAX_KERNEL_ADDRESS)) { 2511103604Sgrehan base = trunc_page(va); 2512103604Sgrehan offset = va & PAGE_MASK; 2513103604Sgrehan size = roundup(offset + size, PAGE_SIZE); 2514103604Sgrehan kmem_free(kernel_map, base, size); 2515103604Sgrehan } 251699038Sbenno} 2517