mmu_oea.c revision 120336
177957Sbenno/* 290643Sbenno * Copyright (c) 2001 The NetBSD Foundation, Inc. 390643Sbenno * All rights reserved. 490643Sbenno * 590643Sbenno * This code is derived from software contributed to The NetBSD Foundation 690643Sbenno * by Matt Thomas <matt@3am-software.com> of Allegro Networks, Inc. 790643Sbenno * 890643Sbenno * Redistribution and use in source and binary forms, with or without 990643Sbenno * modification, are permitted provided that the following conditions 1090643Sbenno * are met: 1190643Sbenno * 1. Redistributions of source code must retain the above copyright 1290643Sbenno * notice, this list of conditions and the following disclaimer. 1390643Sbenno * 2. Redistributions in binary form must reproduce the above copyright 1490643Sbenno * notice, this list of conditions and the following disclaimer in the 1590643Sbenno * documentation and/or other materials provided with the distribution. 1690643Sbenno * 3. All advertising materials mentioning features or use of this software 1790643Sbenno * must display the following acknowledgement: 1890643Sbenno * This product includes software developed by the NetBSD 1990643Sbenno * Foundation, Inc. and its contributors. 2090643Sbenno * 4. Neither the name of The NetBSD Foundation nor the names of its 2190643Sbenno * contributors may be used to endorse or promote products derived 2290643Sbenno * from this software without specific prior written permission. 2390643Sbenno * 2490643Sbenno * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 2590643Sbenno * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 2690643Sbenno * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 2790643Sbenno * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 2890643Sbenno * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 2990643Sbenno * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 3090643Sbenno * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 3190643Sbenno * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 3290643Sbenno * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 3390643Sbenno * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 3490643Sbenno * POSSIBILITY OF SUCH DAMAGE. 3590643Sbenno */ 3690643Sbenno/* 3777957Sbenno * Copyright (C) 1995, 1996 Wolfgang Solfrank. 3877957Sbenno * Copyright (C) 1995, 1996 TooLs GmbH. 3977957Sbenno * All rights reserved. 4077957Sbenno * 4177957Sbenno * Redistribution and use in source and binary forms, with or without 4277957Sbenno * modification, are permitted provided that the following conditions 4377957Sbenno * are met: 4477957Sbenno * 1. Redistributions of source code must retain the above copyright 4577957Sbenno * notice, this list of conditions and the following disclaimer. 4677957Sbenno * 2. Redistributions in binary form must reproduce the above copyright 4777957Sbenno * notice, this list of conditions and the following disclaimer in the 4877957Sbenno * documentation and/or other materials provided with the distribution. 4977957Sbenno * 3. All advertising materials mentioning features or use of this software 5077957Sbenno * must display the following acknowledgement: 5177957Sbenno * This product includes software developed by TooLs GmbH. 5277957Sbenno * 4. The name of TooLs GmbH may not be used to endorse or promote products 5377957Sbenno * derived from this software without specific prior written permission. 5477957Sbenno * 5577957Sbenno * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 5677957Sbenno * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 5777957Sbenno * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 5877957Sbenno * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 5977957Sbenno * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 6077957Sbenno * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 6177957Sbenno * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 6277957Sbenno * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 6377957Sbenno * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 6477957Sbenno * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 6577957Sbenno * 6678880Sbenno * $NetBSD: pmap.c,v 1.28 2000/03/26 20:42:36 kleink Exp $ 6777957Sbenno */ 6877957Sbenno/* 6977957Sbenno * Copyright (C) 2001 Benno Rice. 7077957Sbenno * All rights reserved. 7177957Sbenno * 7277957Sbenno * Redistribution and use in source and binary forms, with or without 7377957Sbenno * modification, are permitted provided that the following conditions 7477957Sbenno * are met: 7577957Sbenno * 1. Redistributions of source code must retain the above copyright 7677957Sbenno * notice, this list of conditions and the following disclaimer. 7777957Sbenno * 2. Redistributions in binary form must reproduce the above copyright 7877957Sbenno * notice, this list of conditions and the following disclaimer in the 7977957Sbenno * documentation and/or other materials provided with the distribution. 8077957Sbenno * 8177957Sbenno * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR 8277957Sbenno * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 8377957Sbenno * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 8477957Sbenno * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 8577957Sbenno * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 8677957Sbenno * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 8777957Sbenno * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 8877957Sbenno * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 8977957Sbenno * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 9077957Sbenno * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 9177957Sbenno */ 9277957Sbenno 93113038Sobrien#include <sys/cdefs.h> 94113038Sobrien__FBSDID("$FreeBSD: head/sys/powerpc/aim/mmu_oea.c 120336 2003-09-22 11:59:05Z grehan $"); 9577957Sbenno 9690643Sbenno/* 9790643Sbenno * Manages physical address maps. 9890643Sbenno * 9990643Sbenno * In addition to hardware address maps, this module is called upon to 10090643Sbenno * provide software-use-only maps which may or may not be stored in the 10190643Sbenno * same form as hardware maps. These pseudo-maps are used to store 10290643Sbenno * intermediate results from copy operations to and from address spaces. 10390643Sbenno * 10490643Sbenno * Since the information managed by this module is also stored by the 10590643Sbenno * logical address mapping module, this module may throw away valid virtual 10690643Sbenno * to physical mappings at almost any time. However, invalidations of 10790643Sbenno * mappings must be done as requested. 10890643Sbenno * 10990643Sbenno * In order to cope with hardware architectures which make virtual to 11090643Sbenno * physical map invalidates expensive, this module may delay invalidate 11190643Sbenno * reduced protection operations until such time as they are actually 11290643Sbenno * necessary. This module is given full information as to which processors 11390643Sbenno * are currently using which maps, and to when physical maps must be made 11490643Sbenno * correct. 11590643Sbenno */ 11690643Sbenno 117118239Speter#include "opt_kstack_pages.h" 118118239Speter 11977957Sbenno#include <sys/param.h> 12080431Speter#include <sys/kernel.h> 12190643Sbenno#include <sys/ktr.h> 12290643Sbenno#include <sys/lock.h> 12390643Sbenno#include <sys/msgbuf.h> 12490643Sbenno#include <sys/mutex.h> 12577957Sbenno#include <sys/proc.h> 12690643Sbenno#include <sys/sysctl.h> 12790643Sbenno#include <sys/systm.h> 12877957Sbenno#include <sys/vmmeter.h> 12977957Sbenno 13090643Sbenno#include <dev/ofw/openfirm.h> 13190643Sbenno 13290643Sbenno#include <vm/vm.h> 13377957Sbenno#include <vm/vm_param.h> 13477957Sbenno#include <vm/vm_kern.h> 13577957Sbenno#include <vm/vm_page.h> 13677957Sbenno#include <vm/vm_map.h> 13777957Sbenno#include <vm/vm_object.h> 13877957Sbenno#include <vm/vm_extern.h> 13977957Sbenno#include <vm/vm_pageout.h> 14077957Sbenno#include <vm/vm_pager.h> 14192847Sjeff#include <vm/uma.h> 14277957Sbenno 14397346Sbenno#include <machine/powerpc.h> 14483730Smp#include <machine/bat.h> 14590643Sbenno#include <machine/frame.h> 14690643Sbenno#include <machine/md_var.h> 14790643Sbenno#include <machine/psl.h> 14877957Sbenno#include <machine/pte.h> 14990643Sbenno#include <machine/sr.h> 15077957Sbenno 15190643Sbenno#define PMAP_DEBUG 15277957Sbenno 15390643Sbenno#define TODO panic("%s: not implemented", __func__); 15477957Sbenno 15590643Sbenno#define PMAP_LOCK(pm) 15690643Sbenno#define PMAP_UNLOCK(pm) 15790643Sbenno 15890643Sbenno#define TLBIE(va) __asm __volatile("tlbie %0" :: "r"(va)) 15990643Sbenno#define TLBSYNC() __asm __volatile("tlbsync"); 16090643Sbenno#define SYNC() __asm __volatile("sync"); 16190643Sbenno#define EIEIO() __asm __volatile("eieio"); 16290643Sbenno 16390643Sbenno#define VSID_MAKE(sr, hash) ((sr) | (((hash) & 0xfffff) << 4)) 16490643Sbenno#define VSID_TO_SR(vsid) ((vsid) & 0xf) 16590643Sbenno#define VSID_TO_HASH(vsid) (((vsid) >> 4) & 0xfffff) 16690643Sbenno 16790643Sbenno#define PVO_PTEGIDX_MASK 0x0007 /* which PTEG slot */ 16890643Sbenno#define PVO_PTEGIDX_VALID 0x0008 /* slot is valid */ 16990643Sbenno#define PVO_WIRED 0x0010 /* PVO entry is wired */ 17090643Sbenno#define PVO_MANAGED 0x0020 /* PVO entry is managed */ 17190643Sbenno#define PVO_EXECUTABLE 0x0040 /* PVO entry is executable */ 17294835Sbenno#define PVO_BOOTSTRAP 0x0080 /* PVO entry allocated during 17392521Sbenno bootstrap */ 17490643Sbenno#define PVO_VADDR(pvo) ((pvo)->pvo_vaddr & ~ADDR_POFF) 17590643Sbenno#define PVO_ISEXECUTABLE(pvo) ((pvo)->pvo_vaddr & PVO_EXECUTABLE) 17690643Sbenno#define PVO_PTEGIDX_GET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_MASK) 17790643Sbenno#define PVO_PTEGIDX_ISSET(pvo) ((pvo)->pvo_vaddr & PVO_PTEGIDX_VALID) 17890643Sbenno#define PVO_PTEGIDX_CLR(pvo) \ 17990643Sbenno ((void)((pvo)->pvo_vaddr &= ~(PVO_PTEGIDX_VALID|PVO_PTEGIDX_MASK))) 18090643Sbenno#define PVO_PTEGIDX_SET(pvo, i) \ 18190643Sbenno ((void)((pvo)->pvo_vaddr |= (i)|PVO_PTEGIDX_VALID)) 18290643Sbenno 18390643Sbenno#define PMAP_PVO_CHECK(pvo) 18490643Sbenno 18590643Sbennostruct ofw_map { 18690643Sbenno vm_offset_t om_va; 18790643Sbenno vm_size_t om_len; 18890643Sbenno vm_offset_t om_pa; 18990643Sbenno u_int om_mode; 19090643Sbenno}; 19177957Sbenno 19290643Sbennoint pmap_bootstrapped = 0; 19377957Sbenno 19490643Sbenno/* 19590643Sbenno * Virtual and physical address of message buffer. 19690643Sbenno */ 19790643Sbennostruct msgbuf *msgbufp; 19890643Sbennovm_offset_t msgbuf_phys; 19977957Sbenno 20090643Sbenno/* 20190643Sbenno * Physical addresses of first and last available physical page. 20290643Sbenno */ 20390643Sbennovm_offset_t avail_start; 20490643Sbennovm_offset_t avail_end; 20577957Sbenno 206110172Sgrehanint pmap_pagedaemon_waken; 207110172Sgrehan 20890643Sbenno/* 20990643Sbenno * Map of physical memory regions. 21090643Sbenno */ 21190643Sbennovm_offset_t phys_avail[128]; 21290643Sbennou_int phys_avail_count; 21397346Sbennostatic struct mem_region *regions; 21497346Sbennostatic struct mem_region *pregions; 21597346Sbennoint regions_sz, pregions_sz; 216100319Sbennostatic struct ofw_map *translations; 21777957Sbenno 21890643Sbenno/* 21990643Sbenno * First and last available kernel virtual addresses. 22090643Sbenno */ 22190643Sbennovm_offset_t virtual_avail; 22290643Sbennovm_offset_t virtual_end; 22390643Sbennovm_offset_t kernel_vm_end; 22477957Sbenno 22590643Sbenno/* 22690643Sbenno * Kernel pmap. 22790643Sbenno */ 22890643Sbennostruct pmap kernel_pmap_store; 22990643Sbennoextern struct pmap ofw_pmap; 23077957Sbenno 23190643Sbenno/* 23290643Sbenno * PTEG data. 23390643Sbenno */ 23490643Sbennostatic struct pteg *pmap_pteg_table; 23590643Sbennou_int pmap_pteg_count; 23690643Sbennou_int pmap_pteg_mask; 23777957Sbenno 23890643Sbenno/* 23990643Sbenno * PVO data. 24090643Sbenno */ 24190643Sbennostruct pvo_head *pmap_pvo_table; /* pvo entries by pteg index */ 24290643Sbennostruct pvo_head pmap_pvo_kunmanaged = 24390643Sbenno LIST_HEAD_INITIALIZER(pmap_pvo_kunmanaged); /* list of unmanaged pages */ 24490643Sbennostruct pvo_head pmap_pvo_unmanaged = 24590643Sbenno LIST_HEAD_INITIALIZER(pmap_pvo_unmanaged); /* list of unmanaged pages */ 24677957Sbenno 24792847Sjeffuma_zone_t pmap_upvo_zone; /* zone for pvo entries for unmanaged pages */ 24892847Sjeffuma_zone_t pmap_mpvo_zone; /* zone for pvo entries for managed pages */ 24990643Sbennostruct vm_object pmap_upvo_zone_obj; 25090643Sbennostruct vm_object pmap_mpvo_zone_obj; 25177957Sbenno 25299037Sbenno#define BPVO_POOL_SIZE 32768 25392521Sbennostatic struct pvo_entry *pmap_bpvo_pool; 25499037Sbennostatic int pmap_bpvo_pool_index = 0; 25577957Sbenno 25690643Sbenno#define VSID_NBPW (sizeof(u_int32_t) * 8) 25790643Sbennostatic u_int pmap_vsid_bitmap[NPMAPS / VSID_NBPW]; 25877957Sbenno 25990643Sbennostatic boolean_t pmap_initialized = FALSE; 26077957Sbenno 26190643Sbenno/* 26290643Sbenno * Statistics. 26390643Sbenno */ 26490643Sbennou_int pmap_pte_valid = 0; 26590643Sbennou_int pmap_pte_overflow = 0; 26690643Sbennou_int pmap_pte_replacements = 0; 26790643Sbennou_int pmap_pvo_entries = 0; 26890643Sbennou_int pmap_pvo_enter_calls = 0; 26990643Sbennou_int pmap_pvo_remove_calls = 0; 27090643Sbennou_int pmap_pte_spills = 0; 27190643SbennoSYSCTL_INT(_machdep, OID_AUTO, pmap_pte_valid, CTLFLAG_RD, &pmap_pte_valid, 27290643Sbenno 0, ""); 27390643SbennoSYSCTL_INT(_machdep, OID_AUTO, pmap_pte_overflow, CTLFLAG_RD, 27490643Sbenno &pmap_pte_overflow, 0, ""); 27590643SbennoSYSCTL_INT(_machdep, OID_AUTO, pmap_pte_replacements, CTLFLAG_RD, 27690643Sbenno &pmap_pte_replacements, 0, ""); 27790643SbennoSYSCTL_INT(_machdep, OID_AUTO, pmap_pvo_entries, CTLFLAG_RD, &pmap_pvo_entries, 27890643Sbenno 0, ""); 27990643SbennoSYSCTL_INT(_machdep, OID_AUTO, pmap_pvo_enter_calls, CTLFLAG_RD, 28090643Sbenno &pmap_pvo_enter_calls, 0, ""); 28190643SbennoSYSCTL_INT(_machdep, OID_AUTO, pmap_pvo_remove_calls, CTLFLAG_RD, 28290643Sbenno &pmap_pvo_remove_calls, 0, ""); 28390643SbennoSYSCTL_INT(_machdep, OID_AUTO, pmap_pte_spills, CTLFLAG_RD, 28490643Sbenno &pmap_pte_spills, 0, ""); 28577957Sbenno 28690643Sbennostruct pvo_entry *pmap_pvo_zeropage; 28777957Sbenno 28890643Sbennovm_offset_t pmap_rkva_start = VM_MIN_KERNEL_ADDRESS; 28990643Sbennou_int pmap_rkva_count = 4; 29077957Sbenno 29190643Sbenno/* 29290643Sbenno * Allocate physical memory for use in pmap_bootstrap. 29390643Sbenno */ 29490643Sbennostatic vm_offset_t pmap_bootstrap_alloc(vm_size_t, u_int); 29577957Sbenno 29690643Sbenno/* 29790643Sbenno * PTE calls. 29890643Sbenno */ 29990643Sbennostatic int pmap_pte_insert(u_int, struct pte *); 30077957Sbenno 30177957Sbenno/* 30290643Sbenno * PVO calls. 30377957Sbenno */ 30492847Sjeffstatic int pmap_pvo_enter(pmap_t, uma_zone_t, struct pvo_head *, 30590643Sbenno vm_offset_t, vm_offset_t, u_int, int); 30690643Sbennostatic void pmap_pvo_remove(struct pvo_entry *, int); 30790643Sbennostatic struct pvo_entry *pmap_pvo_find_va(pmap_t, vm_offset_t, int *); 30890643Sbennostatic struct pte *pmap_pvo_to_pte(const struct pvo_entry *, int); 30990643Sbenno 31090643Sbenno/* 31190643Sbenno * Utility routines. 31290643Sbenno */ 31392654Sjeffstatic void * pmap_pvo_allocf(uma_zone_t, int, u_int8_t *, int); 31490643Sbennostatic struct pvo_entry *pmap_rkva_alloc(void); 31590643Sbennostatic void pmap_pa_map(struct pvo_entry *, vm_offset_t, 31690643Sbenno struct pte *, int *); 31790643Sbennostatic void pmap_pa_unmap(struct pvo_entry *, struct pte *, int *); 31890643Sbennostatic void pmap_syncicache(vm_offset_t, vm_size_t); 31990643Sbennostatic boolean_t pmap_query_bit(vm_page_t, int); 320110172Sgrehanstatic u_int pmap_clear_bit(vm_page_t, int, int *); 32190643Sbennostatic void tlbia(void); 32290643Sbenno 32390643Sbennostatic __inline int 32490643Sbennova_to_sr(u_int *sr, vm_offset_t va) 32577957Sbenno{ 32690643Sbenno return (sr[(uintptr_t)va >> ADDR_SR_SHFT]); 32790643Sbenno} 32877957Sbenno 32990643Sbennostatic __inline u_int 33090643Sbennova_to_pteg(u_int sr, vm_offset_t addr) 33190643Sbenno{ 33290643Sbenno u_int hash; 33390643Sbenno 33490643Sbenno hash = (sr & SR_VSID_MASK) ^ (((u_int)addr & ADDR_PIDX) >> 33590643Sbenno ADDR_PIDX_SHFT); 33690643Sbenno return (hash & pmap_pteg_mask); 33777957Sbenno} 33877957Sbenno 33990643Sbennostatic __inline struct pvo_head * 34096250Sbennopa_to_pvoh(vm_offset_t pa, vm_page_t *pg_p) 34177957Sbenno{ 34290643Sbenno struct vm_page *pg; 34377957Sbenno 34490643Sbenno pg = PHYS_TO_VM_PAGE(pa); 34590643Sbenno 34696250Sbenno if (pg_p != NULL) 34796250Sbenno *pg_p = pg; 34896250Sbenno 34990643Sbenno if (pg == NULL) 35090643Sbenno return (&pmap_pvo_unmanaged); 35190643Sbenno 35290643Sbenno return (&pg->md.mdpg_pvoh); 35377957Sbenno} 35477957Sbenno 35590643Sbennostatic __inline struct pvo_head * 35690643Sbennovm_page_to_pvoh(vm_page_t m) 35790643Sbenno{ 35890643Sbenno 35990643Sbenno return (&m->md.mdpg_pvoh); 36090643Sbenno} 36190643Sbenno 36277957Sbennostatic __inline void 36390643Sbennopmap_attr_clear(vm_page_t m, int ptebit) 36477957Sbenno{ 36590643Sbenno 36690643Sbenno m->md.mdpg_attrs &= ~ptebit; 36777957Sbenno} 36877957Sbenno 36977957Sbennostatic __inline int 37090643Sbennopmap_attr_fetch(vm_page_t m) 37177957Sbenno{ 37277957Sbenno 37390643Sbenno return (m->md.mdpg_attrs); 37477957Sbenno} 37577957Sbenno 37690643Sbennostatic __inline void 37790643Sbennopmap_attr_save(vm_page_t m, int ptebit) 37890643Sbenno{ 37990643Sbenno 38090643Sbenno m->md.mdpg_attrs |= ptebit; 38190643Sbenno} 38290643Sbenno 38377957Sbennostatic __inline int 38490643Sbennopmap_pte_compare(const struct pte *pt, const struct pte *pvo_pt) 38577957Sbenno{ 38690643Sbenno if (pt->pte_hi == pvo_pt->pte_hi) 38790643Sbenno return (1); 38890643Sbenno 38990643Sbenno return (0); 39077957Sbenno} 39177957Sbenno 39277957Sbennostatic __inline int 39390643Sbennopmap_pte_match(struct pte *pt, u_int sr, vm_offset_t va, int which) 39477957Sbenno{ 39590643Sbenno return (pt->pte_hi & ~PTE_VALID) == 39690643Sbenno (((sr & SR_VSID_MASK) << PTE_VSID_SHFT) | 39790643Sbenno ((va >> ADDR_API_SHFT) & PTE_API) | which); 39890643Sbenno} 39977957Sbenno 40090643Sbennostatic __inline void 40190643Sbennopmap_pte_create(struct pte *pt, u_int sr, vm_offset_t va, u_int pte_lo) 40290643Sbenno{ 40390643Sbenno /* 40490643Sbenno * Construct a PTE. Default to IMB initially. Valid bit only gets 40590643Sbenno * set when the real pte is set in memory. 40690643Sbenno * 40790643Sbenno * Note: Don't set the valid bit for correct operation of tlb update. 40890643Sbenno */ 40990643Sbenno pt->pte_hi = ((sr & SR_VSID_MASK) << PTE_VSID_SHFT) | 41090643Sbenno (((va & ADDR_PIDX) >> ADDR_API_SHFT) & PTE_API); 41190643Sbenno pt->pte_lo = pte_lo; 41277957Sbenno} 41377957Sbenno 41490643Sbennostatic __inline void 41590643Sbennopmap_pte_synch(struct pte *pt, struct pte *pvo_pt) 41677957Sbenno{ 41777957Sbenno 41890643Sbenno pvo_pt->pte_lo |= pt->pte_lo & (PTE_REF | PTE_CHG); 41977957Sbenno} 42077957Sbenno 42190643Sbennostatic __inline void 42290643Sbennopmap_pte_clear(struct pte *pt, vm_offset_t va, int ptebit) 42377957Sbenno{ 42477957Sbenno 42590643Sbenno /* 42690643Sbenno * As shown in Section 7.6.3.2.3 42790643Sbenno */ 42890643Sbenno pt->pte_lo &= ~ptebit; 42990643Sbenno TLBIE(va); 43090643Sbenno EIEIO(); 43190643Sbenno TLBSYNC(); 43290643Sbenno SYNC(); 43377957Sbenno} 43477957Sbenno 43590643Sbennostatic __inline void 43690643Sbennopmap_pte_set(struct pte *pt, struct pte *pvo_pt) 43777957Sbenno{ 43877957Sbenno 43990643Sbenno pvo_pt->pte_hi |= PTE_VALID; 44090643Sbenno 44177957Sbenno /* 44290643Sbenno * Update the PTE as defined in section 7.6.3.1. 44390643Sbenno * Note that the REF/CHG bits are from pvo_pt and thus should havce 44490643Sbenno * been saved so this routine can restore them (if desired). 44577957Sbenno */ 44690643Sbenno pt->pte_lo = pvo_pt->pte_lo; 44790643Sbenno EIEIO(); 44890643Sbenno pt->pte_hi = pvo_pt->pte_hi; 44990643Sbenno SYNC(); 45090643Sbenno pmap_pte_valid++; 45190643Sbenno} 45277957Sbenno 45390643Sbennostatic __inline void 45490643Sbennopmap_pte_unset(struct pte *pt, struct pte *pvo_pt, vm_offset_t va) 45590643Sbenno{ 45690643Sbenno 45790643Sbenno pvo_pt->pte_hi &= ~PTE_VALID; 45890643Sbenno 45977957Sbenno /* 46090643Sbenno * Force the reg & chg bits back into the PTEs. 46177957Sbenno */ 46290643Sbenno SYNC(); 46377957Sbenno 46490643Sbenno /* 46590643Sbenno * Invalidate the pte. 46690643Sbenno */ 46790643Sbenno pt->pte_hi &= ~PTE_VALID; 46877957Sbenno 46990643Sbenno SYNC(); 47090643Sbenno TLBIE(va); 47190643Sbenno EIEIO(); 47290643Sbenno TLBSYNC(); 47390643Sbenno SYNC(); 47477957Sbenno 47590643Sbenno /* 47690643Sbenno * Save the reg & chg bits. 47790643Sbenno */ 47890643Sbenno pmap_pte_synch(pt, pvo_pt); 47990643Sbenno pmap_pte_valid--; 48077957Sbenno} 48177957Sbenno 48290643Sbennostatic __inline void 48390643Sbennopmap_pte_change(struct pte *pt, struct pte *pvo_pt, vm_offset_t va) 48490643Sbenno{ 48590643Sbenno 48690643Sbenno /* 48790643Sbenno * Invalidate the PTE 48890643Sbenno */ 48990643Sbenno pmap_pte_unset(pt, pvo_pt, va); 49090643Sbenno pmap_pte_set(pt, pvo_pt); 49190643Sbenno} 49290643Sbenno 49377957Sbenno/* 49490643Sbenno * Quick sort callout for comparing memory regions. 49577957Sbenno */ 49690643Sbennostatic int mr_cmp(const void *a, const void *b); 49790643Sbennostatic int om_cmp(const void *a, const void *b); 49890643Sbenno 49990643Sbennostatic int 50090643Sbennomr_cmp(const void *a, const void *b) 50177957Sbenno{ 50290643Sbenno const struct mem_region *regiona; 50390643Sbenno const struct mem_region *regionb; 50477957Sbenno 50590643Sbenno regiona = a; 50690643Sbenno regionb = b; 50790643Sbenno if (regiona->mr_start < regionb->mr_start) 50890643Sbenno return (-1); 50990643Sbenno else if (regiona->mr_start > regionb->mr_start) 51090643Sbenno return (1); 51190643Sbenno else 51290643Sbenno return (0); 51390643Sbenno} 51477957Sbenno 51590643Sbennostatic int 51690643Sbennoom_cmp(const void *a, const void *b) 51790643Sbenno{ 51890643Sbenno const struct ofw_map *mapa; 51990643Sbenno const struct ofw_map *mapb; 52090643Sbenno 52190643Sbenno mapa = a; 52290643Sbenno mapb = b; 52390643Sbenno if (mapa->om_pa < mapb->om_pa) 52490643Sbenno return (-1); 52590643Sbenno else if (mapa->om_pa > mapb->om_pa) 52690643Sbenno return (1); 52790643Sbenno else 52890643Sbenno return (0); 52977957Sbenno} 53077957Sbenno 53177957Sbennovoid 53290643Sbennopmap_bootstrap(vm_offset_t kernelstart, vm_offset_t kernelend) 53377957Sbenno{ 53497346Sbenno ihandle_t mmui; 53590643Sbenno phandle_t chosen, mmu; 53690643Sbenno int sz; 53790643Sbenno int i, j; 538103604Sgrehan int ofw_mappings; 53991793Sbenno vm_size_t size, physsz; 54090643Sbenno vm_offset_t pa, va, off; 54190643Sbenno u_int batl, batu; 54277957Sbenno 54399037Sbenno /* 544103604Sgrehan * Set up BAT0 to map the lowest 256 MB area 54599037Sbenno */ 54699037Sbenno battable[0x0].batl = BATL(0x00000000, BAT_M, BAT_PP_RW); 54799037Sbenno battable[0x0].batu = BATU(0x00000000, BAT_BL_256M, BAT_Vs); 54899037Sbenno 54999037Sbenno /* 55099037Sbenno * Map PCI memory space. 55199037Sbenno */ 55299037Sbenno battable[0x8].batl = BATL(0x80000000, BAT_I|BAT_G, BAT_PP_RW); 55399037Sbenno battable[0x8].batu = BATU(0x80000000, BAT_BL_256M, BAT_Vs); 55499037Sbenno 55599037Sbenno battable[0x9].batl = BATL(0x90000000, BAT_I|BAT_G, BAT_PP_RW); 55699037Sbenno battable[0x9].batu = BATU(0x90000000, BAT_BL_256M, BAT_Vs); 55799037Sbenno 55899037Sbenno battable[0xa].batl = BATL(0xa0000000, BAT_I|BAT_G, BAT_PP_RW); 55999037Sbenno battable[0xa].batu = BATU(0xa0000000, BAT_BL_256M, BAT_Vs); 56099037Sbenno 56199037Sbenno battable[0xb].batl = BATL(0xb0000000, BAT_I|BAT_G, BAT_PP_RW); 56299037Sbenno battable[0xb].batu = BATU(0xb0000000, BAT_BL_256M, BAT_Vs); 56399037Sbenno 56499037Sbenno /* 56599037Sbenno * Map obio devices. 56699037Sbenno */ 56799037Sbenno battable[0xf].batl = BATL(0xf0000000, BAT_I|BAT_G, BAT_PP_RW); 56899037Sbenno battable[0xf].batu = BATU(0xf0000000, BAT_BL_256M, BAT_Vs); 56999037Sbenno 57077957Sbenno /* 57190643Sbenno * Use an IBAT and a DBAT to map the bottom segment of memory 57290643Sbenno * where we are. 57377957Sbenno */ 57490643Sbenno batu = BATU(0x00000000, BAT_BL_256M, BAT_Vs); 57590643Sbenno batl = BATL(0x00000000, BAT_M, BAT_PP_RW); 57690643Sbenno __asm ("mtibatu 0,%0; mtibatl 0,%1; mtdbatu 0,%0; mtdbatl 0,%1" 57790643Sbenno :: "r"(batu), "r"(batl)); 57899037Sbenno 57990643Sbenno#if 0 58099037Sbenno /* map frame buffer */ 58199037Sbenno batu = BATU(0x90000000, BAT_BL_256M, BAT_Vs); 58299037Sbenno batl = BATL(0x90000000, BAT_I|BAT_G, BAT_PP_RW); 58399037Sbenno __asm ("mtdbatu 1,%0; mtdbatl 1,%1" 58499037Sbenno :: "r"(batu), "r"(batl)); 58599037Sbenno#endif 58699037Sbenno 58799037Sbenno#if 1 58899037Sbenno /* map pci space */ 58990643Sbenno batu = BATU(0x80000000, BAT_BL_256M, BAT_Vs); 59099037Sbenno batl = BATL(0x80000000, BAT_I|BAT_G, BAT_PP_RW); 59199037Sbenno __asm ("mtdbatu 1,%0; mtdbatl 1,%1" 59290643Sbenno :: "r"(batu), "r"(batl)); 59390643Sbenno#endif 59477957Sbenno 59577957Sbenno /* 59690643Sbenno * Set the start and end of kva. 59777957Sbenno */ 59890643Sbenno virtual_avail = VM_MIN_KERNEL_ADDRESS; 59990643Sbenno virtual_end = VM_MAX_KERNEL_ADDRESS; 60090643Sbenno 60197346Sbenno mem_regions(&pregions, &pregions_sz, ®ions, ®ions_sz); 60297346Sbenno CTR0(KTR_PMAP, "pmap_bootstrap: physical memory"); 60397346Sbenno 60497346Sbenno qsort(pregions, pregions_sz, sizeof(*pregions), mr_cmp); 60597346Sbenno for (i = 0; i < pregions_sz; i++) { 606103604Sgrehan vm_offset_t pa; 607103604Sgrehan vm_offset_t end; 608103604Sgrehan 60997346Sbenno CTR3(KTR_PMAP, "physregion: %#x - %#x (%#x)", 61097346Sbenno pregions[i].mr_start, 61197346Sbenno pregions[i].mr_start + pregions[i].mr_size, 61297346Sbenno pregions[i].mr_size); 613103604Sgrehan /* 614103604Sgrehan * Install entries into the BAT table to allow all 615103604Sgrehan * of physmem to be convered by on-demand BAT entries. 616103604Sgrehan * The loop will sometimes set the same battable element 617103604Sgrehan * twice, but that's fine since they won't be used for 618103604Sgrehan * a while yet. 619103604Sgrehan */ 620103604Sgrehan pa = pregions[i].mr_start & 0xf0000000; 621103604Sgrehan end = pregions[i].mr_start + pregions[i].mr_size; 622103604Sgrehan do { 623103604Sgrehan u_int n = pa >> ADDR_SR_SHFT; 624103604Sgrehan 625103604Sgrehan battable[n].batl = BATL(pa, BAT_M, BAT_PP_RW); 626103604Sgrehan battable[n].batu = BATU(pa, BAT_BL_256M, BAT_Vs); 627103604Sgrehan pa += SEGMENT_LENGTH; 628103604Sgrehan } while (pa < end); 62997346Sbenno } 63097346Sbenno 63197346Sbenno if (sizeof(phys_avail)/sizeof(phys_avail[0]) < regions_sz) 63290643Sbenno panic("pmap_bootstrap: phys_avail too small"); 63397346Sbenno qsort(regions, regions_sz, sizeof(*regions), mr_cmp); 63490643Sbenno phys_avail_count = 0; 63591793Sbenno physsz = 0; 63697346Sbenno for (i = 0, j = 0; i < regions_sz; i++, j += 2) { 63790643Sbenno CTR3(KTR_PMAP, "region: %#x - %#x (%#x)", regions[i].mr_start, 63890643Sbenno regions[i].mr_start + regions[i].mr_size, 63990643Sbenno regions[i].mr_size); 64090643Sbenno phys_avail[j] = regions[i].mr_start; 64190643Sbenno phys_avail[j + 1] = regions[i].mr_start + regions[i].mr_size; 64290643Sbenno phys_avail_count++; 64391793Sbenno physsz += regions[i].mr_size; 64477957Sbenno } 64591793Sbenno physmem = btoc(physsz); 64677957Sbenno 64777957Sbenno /* 64890643Sbenno * Allocate PTEG table. 64977957Sbenno */ 65090643Sbenno#ifdef PTEGCOUNT 65190643Sbenno pmap_pteg_count = PTEGCOUNT; 65290643Sbenno#else 65390643Sbenno pmap_pteg_count = 0x1000; 65477957Sbenno 65590643Sbenno while (pmap_pteg_count < physmem) 65690643Sbenno pmap_pteg_count <<= 1; 65777957Sbenno 65890643Sbenno pmap_pteg_count >>= 1; 65990643Sbenno#endif /* PTEGCOUNT */ 66077957Sbenno 66190643Sbenno size = pmap_pteg_count * sizeof(struct pteg); 66290643Sbenno CTR2(KTR_PMAP, "pmap_bootstrap: %d PTEGs, %d bytes", pmap_pteg_count, 66390643Sbenno size); 66490643Sbenno pmap_pteg_table = (struct pteg *)pmap_bootstrap_alloc(size, size); 66590643Sbenno CTR1(KTR_PMAP, "pmap_bootstrap: PTEG table at %p", pmap_pteg_table); 66690643Sbenno bzero((void *)pmap_pteg_table, pmap_pteg_count * sizeof(struct pteg)); 66790643Sbenno pmap_pteg_mask = pmap_pteg_count - 1; 66877957Sbenno 66990643Sbenno /* 67094839Sbenno * Allocate pv/overflow lists. 67190643Sbenno */ 67290643Sbenno size = sizeof(struct pvo_head) * pmap_pteg_count; 67390643Sbenno pmap_pvo_table = (struct pvo_head *)pmap_bootstrap_alloc(size, 67490643Sbenno PAGE_SIZE); 67590643Sbenno CTR1(KTR_PMAP, "pmap_bootstrap: PVO table at %p", pmap_pvo_table); 67690643Sbenno for (i = 0; i < pmap_pteg_count; i++) 67790643Sbenno LIST_INIT(&pmap_pvo_table[i]); 67877957Sbenno 67990643Sbenno /* 68090643Sbenno * Allocate the message buffer. 68190643Sbenno */ 68290643Sbenno msgbuf_phys = pmap_bootstrap_alloc(MSGBUF_SIZE, 0); 68377957Sbenno 68490643Sbenno /* 68590643Sbenno * Initialise the unmanaged pvo pool. 68690643Sbenno */ 68799037Sbenno pmap_bpvo_pool = (struct pvo_entry *)pmap_bootstrap_alloc( 68899037Sbenno BPVO_POOL_SIZE*sizeof(struct pvo_entry), 0); 68992521Sbenno pmap_bpvo_pool_index = 0; 69077957Sbenno 69177957Sbenno /* 69290643Sbenno * Make sure kernel vsid is allocated as well as VSID 0. 69377957Sbenno */ 69490643Sbenno pmap_vsid_bitmap[(KERNEL_VSIDBITS & (NPMAPS - 1)) / VSID_NBPW] 69590643Sbenno |= 1 << (KERNEL_VSIDBITS % VSID_NBPW); 69690643Sbenno pmap_vsid_bitmap[0] |= 1; 69777957Sbenno 69890643Sbenno /* 69990643Sbenno * Set up the OpenFirmware pmap and add it's mappings. 70090643Sbenno */ 70190643Sbenno pmap_pinit(&ofw_pmap); 70290643Sbenno ofw_pmap.pm_sr[KERNEL_SR] = KERNEL_SEGMENT; 70390643Sbenno if ((chosen = OF_finddevice("/chosen")) == -1) 70490643Sbenno panic("pmap_bootstrap: can't find /chosen"); 70590643Sbenno OF_getprop(chosen, "mmu", &mmui, 4); 70690643Sbenno if ((mmu = OF_instance_to_package(mmui)) == -1) 70790643Sbenno panic("pmap_bootstrap: can't get mmu package"); 70890643Sbenno if ((sz = OF_getproplen(mmu, "translations")) == -1) 70990643Sbenno panic("pmap_bootstrap: can't get ofw translation count"); 710100319Sbenno translations = NULL; 711100319Sbenno for (i = 0; phys_avail[i + 2] != 0; i += 2) { 712100319Sbenno if (phys_avail[i + 1] >= sz) 713100319Sbenno translations = (struct ofw_map *)phys_avail[i]; 714100319Sbenno } 715100319Sbenno if (translations == NULL) 716100319Sbenno panic("pmap_bootstrap: no space to copy translations"); 71790643Sbenno bzero(translations, sz); 71890643Sbenno if (OF_getprop(mmu, "translations", translations, sz) == -1) 71990643Sbenno panic("pmap_bootstrap: can't get ofw translations"); 72090643Sbenno CTR0(KTR_PMAP, "pmap_bootstrap: translations"); 72197346Sbenno sz /= sizeof(*translations); 72290643Sbenno qsort(translations, sz, sizeof (*translations), om_cmp); 723103604Sgrehan for (i = 0, ofw_mappings = 0; i < sz; i++) { 72490643Sbenno CTR3(KTR_PMAP, "translation: pa=%#x va=%#x len=%#x", 72590643Sbenno translations[i].om_pa, translations[i].om_va, 72690643Sbenno translations[i].om_len); 72777957Sbenno 728103604Sgrehan /* 729103604Sgrehan * If the mapping is 1:1, let the RAM and device on-demand 730103604Sgrehan * BAT tables take care of the translation. 731103604Sgrehan */ 732103604Sgrehan if (translations[i].om_va == translations[i].om_pa) 733103604Sgrehan continue; 73477957Sbenno 735103604Sgrehan /* Enter the pages */ 73690643Sbenno for (off = 0; off < translations[i].om_len; off += PAGE_SIZE) { 73790643Sbenno struct vm_page m; 73877957Sbenno 73990643Sbenno m.phys_addr = translations[i].om_pa + off; 74090643Sbenno pmap_enter(&ofw_pmap, translations[i].om_va + off, &m, 741103604Sgrehan VM_PROT_ALL, 1); 742103604Sgrehan ofw_mappings++; 74377957Sbenno } 74477957Sbenno } 74590643Sbenno#ifdef SMP 74690643Sbenno TLBSYNC(); 74790643Sbenno#endif 74877957Sbenno 74990643Sbenno /* 75090643Sbenno * Initialize the kernel pmap (which is statically allocated). 75190643Sbenno */ 75290643Sbenno for (i = 0; i < 16; i++) { 75390643Sbenno kernel_pmap->pm_sr[i] = EMPTY_SEGMENT; 75477957Sbenno } 75590643Sbenno kernel_pmap->pm_sr[KERNEL_SR] = KERNEL_SEGMENT; 75690643Sbenno kernel_pmap->pm_active = ~0; 75777957Sbenno 75877957Sbenno /* 75990643Sbenno * Allocate a kernel stack with a guard page for thread0 and map it 76090643Sbenno * into the kernel page map. 76177957Sbenno */ 76290643Sbenno pa = pmap_bootstrap_alloc(KSTACK_PAGES * PAGE_SIZE, 0); 76390643Sbenno kstack0_phys = pa; 76490643Sbenno kstack0 = virtual_avail + (KSTACK_GUARD_PAGES * PAGE_SIZE); 76590643Sbenno CTR2(KTR_PMAP, "pmap_bootstrap: kstack0 at %#x (%#x)", kstack0_phys, 76690643Sbenno kstack0); 76790643Sbenno virtual_avail += (KSTACK_PAGES + KSTACK_GUARD_PAGES) * PAGE_SIZE; 76890643Sbenno for (i = 0; i < KSTACK_PAGES; i++) { 76990643Sbenno pa = kstack0_phys + i * PAGE_SIZE; 77090643Sbenno va = kstack0 + i * PAGE_SIZE; 77190643Sbenno pmap_kenter(va, pa); 77290643Sbenno TLBIE(va); 77377957Sbenno } 77477957Sbenno 77590643Sbenno /* 77690643Sbenno * Calculate the first and last available physical addresses. 77790643Sbenno */ 77890643Sbenno avail_start = phys_avail[0]; 77990643Sbenno for (i = 0; phys_avail[i + 2] != 0; i += 2) 78090643Sbenno ; 78190643Sbenno avail_end = phys_avail[i + 1]; 78290643Sbenno Maxmem = powerpc_btop(avail_end); 78377957Sbenno 78477957Sbenno /* 78590643Sbenno * Allocate virtual address space for the message buffer. 78677957Sbenno */ 78790643Sbenno msgbufp = (struct msgbuf *)virtual_avail; 78890643Sbenno virtual_avail += round_page(MSGBUF_SIZE); 78977957Sbenno 79077957Sbenno /* 79190643Sbenno * Initialize hardware. 79277957Sbenno */ 79377957Sbenno for (i = 0; i < 16; i++) { 79494836Sbenno mtsrin(i << ADDR_SR_SHFT, EMPTY_SEGMENT); 79577957Sbenno } 79677957Sbenno __asm __volatile ("mtsr %0,%1" 79790643Sbenno :: "n"(KERNEL_SR), "r"(KERNEL_SEGMENT)); 79877957Sbenno __asm __volatile ("sync; mtsdr1 %0; isync" 79990643Sbenno :: "r"((u_int)pmap_pteg_table | (pmap_pteg_mask >> 10))); 80077957Sbenno tlbia(); 80177957Sbenno 80290643Sbenno pmap_bootstrapped++; 80377957Sbenno} 80477957Sbenno 80577957Sbenno/* 80690643Sbenno * Activate a user pmap. The pmap must be activated before it's address 80790643Sbenno * space can be accessed in any way. 80877957Sbenno */ 80977957Sbennovoid 81090643Sbennopmap_activate(struct thread *td) 81177957Sbenno{ 81296250Sbenno pmap_t pm, pmr; 81377957Sbenno 81477957Sbenno /* 815103604Sgrehan * Load all the data we need up front to encourage the compiler to 81690643Sbenno * not issue any loads while we have interrupts disabled below. 81777957Sbenno */ 81890643Sbenno pm = &td->td_proc->p_vmspace->vm_pmap; 81977957Sbenno 82096250Sbenno if ((pmr = (pmap_t)pmap_kextract((vm_offset_t)pm)) == NULL) 82196250Sbenno pmr = pm; 82296250Sbenno 82390643Sbenno pm->pm_active |= PCPU_GET(cpumask); 82496250Sbenno PCPU_SET(curpmap, pmr); 82577957Sbenno} 82677957Sbenno 82791483Sbennovoid 82891483Sbennopmap_deactivate(struct thread *td) 82991483Sbenno{ 83091483Sbenno pmap_t pm; 83191483Sbenno 83291483Sbenno pm = &td->td_proc->p_vmspace->vm_pmap; 83391483Sbenno pm->pm_active &= ~(PCPU_GET(cpumask)); 83496250Sbenno PCPU_SET(curpmap, NULL); 83591483Sbenno} 83691483Sbenno 83790643Sbennovm_offset_t 83890643Sbennopmap_addr_hint(vm_object_t object, vm_offset_t va, vm_size_t size) 83977957Sbenno{ 84096353Sbenno 84196353Sbenno return (va); 84277957Sbenno} 84377957Sbenno 84477957Sbennovoid 84596353Sbennopmap_change_wiring(pmap_t pm, vm_offset_t va, boolean_t wired) 84677957Sbenno{ 84796353Sbenno struct pvo_entry *pvo; 84896353Sbenno 84996353Sbenno pvo = pmap_pvo_find_va(pm, va & ~ADDR_POFF, NULL); 85096353Sbenno 85196353Sbenno if (pvo != NULL) { 85296353Sbenno if (wired) { 85396353Sbenno if ((pvo->pvo_vaddr & PVO_WIRED) == 0) 85496353Sbenno pm->pm_stats.wired_count++; 85596353Sbenno pvo->pvo_vaddr |= PVO_WIRED; 85696353Sbenno } else { 85796353Sbenno if ((pvo->pvo_vaddr & PVO_WIRED) != 0) 85896353Sbenno pm->pm_stats.wired_count--; 85996353Sbenno pvo->pvo_vaddr &= ~PVO_WIRED; 86096353Sbenno } 86196353Sbenno } 86277957Sbenno} 86377957Sbenno 86477957Sbennovoid 86590643Sbennopmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, 86690643Sbenno vm_size_t len, vm_offset_t src_addr) 86777957Sbenno{ 86897385Sbenno 86997385Sbenno /* 87097385Sbenno * This is not needed as it's mainly an optimisation. 87197385Sbenno * It may want to be implemented later though. 87297385Sbenno */ 87377957Sbenno} 87477957Sbenno 87577957Sbennovoid 87697385Sbennopmap_copy_page(vm_page_t msrc, vm_page_t mdst) 87777957Sbenno{ 87897385Sbenno vm_offset_t dst; 87997385Sbenno vm_offset_t src; 88097385Sbenno 88197385Sbenno dst = VM_PAGE_TO_PHYS(mdst); 88297385Sbenno src = VM_PAGE_TO_PHYS(msrc); 88397385Sbenno 88497385Sbenno kcopy((void *)src, (void *)dst, PAGE_SIZE); 88577957Sbenno} 88677957Sbenno 88777957Sbenno/* 88890643Sbenno * Zero a page of physical memory by temporarily mapping it into the tlb. 88977957Sbenno */ 89077957Sbennovoid 89194777Speterpmap_zero_page(vm_page_t m) 89277957Sbenno{ 89394777Speter vm_offset_t pa = VM_PAGE_TO_PHYS(m); 894110172Sgrehan caddr_t va; 89577957Sbenno 89690643Sbenno if (pa < SEGMENT_LENGTH) { 89790643Sbenno va = (caddr_t) pa; 89890643Sbenno } else if (pmap_initialized) { 89990643Sbenno if (pmap_pvo_zeropage == NULL) 90090643Sbenno pmap_pvo_zeropage = pmap_rkva_alloc(); 90190643Sbenno pmap_pa_map(pmap_pvo_zeropage, pa, NULL, NULL); 90290643Sbenno va = (caddr_t)PVO_VADDR(pmap_pvo_zeropage); 90390643Sbenno } else { 90490643Sbenno panic("pmap_zero_page: can't zero pa %#x", pa); 90577957Sbenno } 90690643Sbenno 90790643Sbenno bzero(va, PAGE_SIZE); 90890643Sbenno 90990643Sbenno if (pa >= SEGMENT_LENGTH) 91090643Sbenno pmap_pa_unmap(pmap_pvo_zeropage, NULL, NULL); 91177957Sbenno} 91277957Sbenno 91377957Sbennovoid 91494777Speterpmap_zero_page_area(vm_page_t m, int off, int size) 91577957Sbenno{ 91699666Sbenno vm_offset_t pa = VM_PAGE_TO_PHYS(m); 917103604Sgrehan caddr_t va; 91899666Sbenno 91999666Sbenno if (pa < SEGMENT_LENGTH) { 92099666Sbenno va = (caddr_t) pa; 92199666Sbenno } else if (pmap_initialized) { 92299666Sbenno if (pmap_pvo_zeropage == NULL) 92399666Sbenno pmap_pvo_zeropage = pmap_rkva_alloc(); 92499666Sbenno pmap_pa_map(pmap_pvo_zeropage, pa, NULL, NULL); 92599666Sbenno va = (caddr_t)PVO_VADDR(pmap_pvo_zeropage); 92699666Sbenno } else { 92799666Sbenno panic("pmap_zero_page: can't zero pa %#x", pa); 92899666Sbenno } 92999666Sbenno 930103604Sgrehan bzero(va + off, size); 93199666Sbenno 93299666Sbenno if (pa >= SEGMENT_LENGTH) 93399666Sbenno pmap_pa_unmap(pmap_pvo_zeropage, NULL, NULL); 93477957Sbenno} 93577957Sbenno 93699571Spetervoid 93799571Speterpmap_zero_page_idle(vm_page_t m) 93899571Speter{ 93999571Speter 94099571Speter /* XXX this is called outside of Giant, is pmap_zero_page safe? */ 94199571Speter /* XXX maybe have a dedicated mapping for this to avoid the problem? */ 94299571Speter mtx_lock(&Giant); 94399571Speter pmap_zero_page(m); 94499571Speter mtx_unlock(&Giant); 94599571Speter} 94699571Speter 94777957Sbenno/* 94890643Sbenno * Map the given physical page at the specified virtual address in the 94990643Sbenno * target pmap with the protection requested. If specified the page 95090643Sbenno * will be wired down. 95177957Sbenno */ 95277957Sbennovoid 95390643Sbennopmap_enter(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot, 95490643Sbenno boolean_t wired) 95577957Sbenno{ 95690643Sbenno struct pvo_head *pvo_head; 95792847Sjeff uma_zone_t zone; 95896250Sbenno vm_page_t pg; 95996250Sbenno u_int pte_lo, pvo_flags, was_exec, i; 96090643Sbenno int error; 96177957Sbenno 96290643Sbenno if (!pmap_initialized) { 96390643Sbenno pvo_head = &pmap_pvo_kunmanaged; 96490643Sbenno zone = pmap_upvo_zone; 96590643Sbenno pvo_flags = 0; 96696250Sbenno pg = NULL; 96796250Sbenno was_exec = PTE_EXEC; 96890643Sbenno } else { 969110172Sgrehan pvo_head = vm_page_to_pvoh(m); 970110172Sgrehan pg = m; 97190643Sbenno zone = pmap_mpvo_zone; 97290643Sbenno pvo_flags = PVO_MANAGED; 97396250Sbenno was_exec = 0; 97490643Sbenno } 97577957Sbenno 97696250Sbenno /* 97796250Sbenno * If this is a managed page, and it's the first reference to the page, 97896250Sbenno * clear the execness of the page. Otherwise fetch the execness. 97996250Sbenno */ 98096250Sbenno if (pg != NULL) { 98196250Sbenno if (LIST_EMPTY(pvo_head)) { 98296250Sbenno pmap_attr_clear(pg, PTE_EXEC); 98396250Sbenno } else { 98496250Sbenno was_exec = pmap_attr_fetch(pg) & PTE_EXEC; 98596250Sbenno } 98696250Sbenno } 98796250Sbenno 98896250Sbenno 98996250Sbenno /* 99096250Sbenno * Assume the page is cache inhibited and access is guarded unless 99196250Sbenno * it's in our available memory array. 99296250Sbenno */ 99390643Sbenno pte_lo = PTE_I | PTE_G; 99497346Sbenno for (i = 0; i < pregions_sz; i++) { 99597346Sbenno if ((VM_PAGE_TO_PHYS(m) >= pregions[i].mr_start) && 99697346Sbenno (VM_PAGE_TO_PHYS(m) < 99797346Sbenno (pregions[i].mr_start + pregions[i].mr_size))) { 99896250Sbenno pte_lo &= ~(PTE_I | PTE_G); 99996250Sbenno break; 100096250Sbenno } 100196250Sbenno } 100277957Sbenno 100390643Sbenno if (prot & VM_PROT_WRITE) 100490643Sbenno pte_lo |= PTE_BW; 100590643Sbenno else 100690643Sbenno pte_lo |= PTE_BR; 100777957Sbenno 100896250Sbenno pvo_flags |= (prot & VM_PROT_EXECUTE); 100977957Sbenno 101090643Sbenno if (wired) 101190643Sbenno pvo_flags |= PVO_WIRED; 101277957Sbenno 101396250Sbenno error = pmap_pvo_enter(pmap, zone, pvo_head, va, VM_PAGE_TO_PHYS(m), 101496250Sbenno pte_lo, pvo_flags); 101590643Sbenno 101696250Sbenno /* 101796250Sbenno * Flush the real page from the instruction cache if this page is 101896250Sbenno * mapped executable and cacheable and was not previously mapped (or 101996250Sbenno * was not mapped executable). 102096250Sbenno */ 102196250Sbenno if (error == 0 && (pvo_flags & PVO_EXECUTABLE) && 102296250Sbenno (pte_lo & PTE_I) == 0 && was_exec == 0) { 102377957Sbenno /* 102490643Sbenno * Flush the real memory from the cache. 102577957Sbenno */ 102696250Sbenno pmap_syncicache(VM_PAGE_TO_PHYS(m), PAGE_SIZE); 102796250Sbenno if (pg != NULL) 102896250Sbenno pmap_attr_save(pg, PTE_EXEC); 102977957Sbenno } 1030103604Sgrehan 1031103604Sgrehan /* XXX syncicache always until problems are sorted */ 1032103604Sgrehan pmap_syncicache(VM_PAGE_TO_PHYS(m), PAGE_SIZE); 103377957Sbenno} 103477957Sbenno 1035117045Salcvm_page_t 1036117045Salcpmap_enter_quick(pmap_t pm, vm_offset_t va, vm_page_t m, vm_page_t mpte) 1037117045Salc{ 1038117045Salc 1039117045Salc pmap_enter(pm, va, m, VM_PROT_READ | VM_PROT_EXECUTE, FALSE); 1040117045Salc return (NULL); 1041117045Salc} 1042117045Salc 104390643Sbennovm_offset_t 104496353Sbennopmap_extract(pmap_t pm, vm_offset_t va) 104577957Sbenno{ 104696353Sbenno struct pvo_entry *pvo; 104796353Sbenno 104896353Sbenno pvo = pmap_pvo_find_va(pm, va & ~ADDR_POFF, NULL); 104996353Sbenno 105096353Sbenno if (pvo != NULL) { 105196353Sbenno return ((pvo->pvo_pte.pte_lo & PTE_RPGN) | (va & ADDR_POFF)); 105296353Sbenno } 105396353Sbenno 105490643Sbenno return (0); 105577957Sbenno} 105677957Sbenno 105777957Sbenno/* 1058120336Sgrehan * Atomically extract and hold the physical page with the given 1059120336Sgrehan * pmap and virtual address pair if that mapping permits the given 1060120336Sgrehan * protection. 1061120336Sgrehan */ 1062120336Sgrehanvm_page_t 1063120336Sgrehanpmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot) 1064120336Sgrehan{ 1065120336Sgrehan vm_paddr_t pa; 1066120336Sgrehan vm_page_t m; 1067120336Sgrehan 1068120336Sgrehan m = NULL; 1069120336Sgrehan mtx_lock(&Giant); 1070120336Sgrehan if ((pa = pmap_extract(pmap, va)) != 0) { 1071120336Sgrehan m = PHYS_TO_VM_PAGE(pa); 1072120336Sgrehan vm_page_lock_queues(); 1073120336Sgrehan vm_page_hold(m); 1074120336Sgrehan vm_page_unlock_queues(); 1075120336Sgrehan } 1076120336Sgrehan mtx_unlock(&Giant); 1077120336Sgrehan return (m); 1078120336Sgrehan} 1079120336Sgrehan 1080120336Sgrehan/* 108190643Sbenno * Grow the number of kernel page table entries. Unneeded. 108277957Sbenno */ 108390643Sbennovoid 108490643Sbennopmap_growkernel(vm_offset_t addr) 108577957Sbenno{ 108690643Sbenno} 108777957Sbenno 108890643Sbennovoid 108990643Sbennopmap_init(vm_offset_t phys_start, vm_offset_t phys_end) 109090643Sbenno{ 109177957Sbenno 109294753Sbenno CTR0(KTR_PMAP, "pmap_init"); 109377957Sbenno 109492847Sjeff pmap_upvo_zone = uma_zcreate("UPVO entry", sizeof (struct pvo_entry), 1095118244Sbmilekic NULL, NULL, NULL, NULL, UMA_ALIGN_PTR, UMA_ZONE_VM | UMA_ZONE_NOFREE); 109692654Sjeff uma_zone_set_allocf(pmap_upvo_zone, pmap_pvo_allocf); 109792847Sjeff pmap_mpvo_zone = uma_zcreate("MPVO entry", sizeof(struct pvo_entry), 1098118244Sbmilekic NULL, NULL, NULL, NULL, UMA_ALIGN_PTR, UMA_ZONE_VM | UMA_ZONE_NOFREE); 109992654Sjeff uma_zone_set_allocf(pmap_mpvo_zone, pmap_pvo_allocf); 110090643Sbenno pmap_initialized = TRUE; 110177957Sbenno} 110277957Sbenno 110399037Sbennovoid 110499037Sbennopmap_init2(void) 110599037Sbenno{ 110699037Sbenno 110799037Sbenno CTR0(KTR_PMAP, "pmap_init2"); 110899037Sbenno} 110999037Sbenno 111090643Sbennoboolean_t 111190643Sbennopmap_is_modified(vm_page_t m) 111290643Sbenno{ 111396353Sbenno 1114110172Sgrehan if ((m->flags & (PG_FICTITIOUS |PG_UNMANAGED)) != 0) 111596353Sbenno return (FALSE); 111696353Sbenno 111796353Sbenno return (pmap_query_bit(m, PTE_CHG)); 111890643Sbenno} 111990643Sbenno 112090643Sbennovoid 112190643Sbennopmap_clear_reference(vm_page_t m) 112290643Sbenno{ 1123110172Sgrehan 1124110172Sgrehan if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0) 1125110172Sgrehan return; 1126110172Sgrehan pmap_clear_bit(m, PTE_REF, NULL); 112790643Sbenno} 112890643Sbenno 1129110172Sgrehanvoid 1130110172Sgrehanpmap_clear_modify(vm_page_t m) 1131110172Sgrehan{ 1132110172Sgrehan 1133110172Sgrehan if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0) 1134110172Sgrehan return; 1135110172Sgrehan pmap_clear_bit(m, PTE_CHG, NULL); 1136110172Sgrehan} 1137110172Sgrehan 113891403Ssilby/* 113991403Ssilby * pmap_ts_referenced: 114091403Ssilby * 114191403Ssilby * Return a count of reference bits for a page, clearing those bits. 114291403Ssilby * It is not necessary for every reference bit to be cleared, but it 114391403Ssilby * is necessary that 0 only be returned when there are truly no 114491403Ssilby * reference bits set. 114591403Ssilby * 114691403Ssilby * XXX: The exact number of bits to check and clear is a matter that 114791403Ssilby * should be tested and standardized at some point in the future for 114891403Ssilby * optimal aging of shared pages. 114991403Ssilby */ 115090643Sbennoint 115190643Sbennopmap_ts_referenced(vm_page_t m) 115290643Sbenno{ 1153110172Sgrehan int count; 1154110172Sgrehan 1155110172Sgrehan if ((m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0) 1156110172Sgrehan return (0); 1157110172Sgrehan 1158110172Sgrehan count = pmap_clear_bit(m, PTE_REF, NULL); 1159110172Sgrehan 1160110172Sgrehan return (count); 116190643Sbenno} 116290643Sbenno 116377957Sbenno/* 116490643Sbenno * Map a wired page into kernel virtual address space. 116577957Sbenno */ 116677957Sbennovoid 116790643Sbennopmap_kenter(vm_offset_t va, vm_offset_t pa) 116877957Sbenno{ 116990643Sbenno u_int pte_lo; 117090643Sbenno int error; 117190643Sbenno int i; 117277957Sbenno 117390643Sbenno#if 0 117490643Sbenno if (va < VM_MIN_KERNEL_ADDRESS) 117590643Sbenno panic("pmap_kenter: attempt to enter non-kernel address %#x", 117690643Sbenno va); 117790643Sbenno#endif 117877957Sbenno 1179103604Sgrehan pte_lo = PTE_I | PTE_G; 1180103604Sgrehan for (i = 0; i < pregions_sz; i++) { 1181103604Sgrehan if ((pa >= pregions[i].mr_start) && 1182103604Sgrehan (pa < (pregions[i].mr_start + pregions[i].mr_size))) { 118390643Sbenno pte_lo &= ~(PTE_I | PTE_G); 118477957Sbenno break; 118577957Sbenno } 1186103604Sgrehan } 118777957Sbenno 118890643Sbenno error = pmap_pvo_enter(kernel_pmap, pmap_upvo_zone, 118990643Sbenno &pmap_pvo_kunmanaged, va, pa, pte_lo, PVO_WIRED); 119090643Sbenno 119190643Sbenno if (error != 0 && error != ENOENT) 119290643Sbenno panic("pmap_kenter: failed to enter va %#x pa %#x: %d", va, 119390643Sbenno pa, error); 119490643Sbenno 119577957Sbenno /* 119690643Sbenno * Flush the real memory from the instruction cache. 119777957Sbenno */ 119890643Sbenno if ((pte_lo & (PTE_I | PTE_G)) == 0) { 119990643Sbenno pmap_syncicache(pa, PAGE_SIZE); 120077957Sbenno } 120177957Sbenno} 120277957Sbenno 120394838Sbenno/* 120494838Sbenno * Extract the physical page address associated with the given kernel virtual 120594838Sbenno * address. 120694838Sbenno */ 120790643Sbennovm_offset_t 120890643Sbennopmap_kextract(vm_offset_t va) 120977957Sbenno{ 121094838Sbenno struct pvo_entry *pvo; 121194838Sbenno 121294838Sbenno pvo = pmap_pvo_find_va(kernel_pmap, va & ~ADDR_POFF, NULL); 121394838Sbenno if (pvo == NULL) { 121494838Sbenno return (0); 121594838Sbenno } 121694838Sbenno 121794838Sbenno return ((pvo->pvo_pte.pte_lo & PTE_RPGN) | (va & ADDR_POFF)); 121877957Sbenno} 121977957Sbenno 122091456Sbenno/* 122191456Sbenno * Remove a wired page from kernel virtual address space. 122291456Sbenno */ 122377957Sbennovoid 122477957Sbennopmap_kremove(vm_offset_t va) 122577957Sbenno{ 122691456Sbenno 1227103604Sgrehan pmap_remove(kernel_pmap, va, va + PAGE_SIZE); 122877957Sbenno} 122977957Sbenno 123077957Sbenno/* 123190643Sbenno * Map a range of physical addresses into kernel virtual address space. 123290643Sbenno * 123390643Sbenno * The value passed in *virt is a suggested virtual address for the mapping. 123490643Sbenno * Architectures which can support a direct-mapped physical to virtual region 123590643Sbenno * can return the appropriate address within that region, leaving '*virt' 123690643Sbenno * unchanged. We cannot and therefore do not; *virt is updated with the 123790643Sbenno * first usable address after the mapped region. 123877957Sbenno */ 123990643Sbennovm_offset_t 124090643Sbennopmap_map(vm_offset_t *virt, vm_offset_t pa_start, vm_offset_t pa_end, int prot) 124177957Sbenno{ 124290643Sbenno vm_offset_t sva, va; 124377957Sbenno 124490643Sbenno sva = *virt; 124590643Sbenno va = sva; 124690643Sbenno for (; pa_start < pa_end; pa_start += PAGE_SIZE, va += PAGE_SIZE) 124790643Sbenno pmap_kenter(va, pa_start); 124890643Sbenno *virt = va; 124990643Sbenno return (sva); 125077957Sbenno} 125177957Sbenno 125290643Sbennoint 125390643Sbennopmap_mincore(pmap_t pmap, vm_offset_t addr) 125477957Sbenno{ 125590643Sbenno TODO; 125690643Sbenno return (0); 125777957Sbenno} 125877957Sbenno 125977957Sbennovoid 126094838Sbennopmap_object_init_pt(pmap_t pm, vm_offset_t addr, vm_object_t object, 1261117206Salc vm_pindex_t pindex, vm_size_t size) 126290643Sbenno{ 126394838Sbenno 1264117206Salc VM_OBJECT_LOCK_ASSERT(object, MA_OWNED); 1265117206Salc KASSERT(object->type == OBJT_DEVICE, 1266117206Salc ("pmap_object_init_pt: non-device object")); 126794838Sbenno KASSERT(pm == &curproc->p_vmspace->vm_pmap || pm == kernel_pmap, 1268117206Salc ("pmap_object_init_pt: non current pmap")); 126977957Sbenno} 127077957Sbenno 127177957Sbenno/* 127290643Sbenno * Lower the permission for all mappings to a given page. 127377957Sbenno */ 127477957Sbennovoid 127577957Sbennopmap_page_protect(vm_page_t m, vm_prot_t prot) 127677957Sbenno{ 127790643Sbenno struct pvo_head *pvo_head; 127890643Sbenno struct pvo_entry *pvo, *next_pvo; 127990643Sbenno struct pte *pt; 128077957Sbenno 128190643Sbenno /* 128290643Sbenno * Since the routine only downgrades protection, if the 128390643Sbenno * maximal protection is desired, there isn't any change 128490643Sbenno * to be made. 128590643Sbenno */ 128690643Sbenno if ((prot & (VM_PROT_READ|VM_PROT_WRITE)) == 128790643Sbenno (VM_PROT_READ|VM_PROT_WRITE)) 128877957Sbenno return; 128977957Sbenno 129090643Sbenno pvo_head = vm_page_to_pvoh(m); 129190643Sbenno for (pvo = LIST_FIRST(pvo_head); pvo != NULL; pvo = next_pvo) { 129290643Sbenno next_pvo = LIST_NEXT(pvo, pvo_vlink); 129390643Sbenno PMAP_PVO_CHECK(pvo); /* sanity check */ 129490643Sbenno 129590643Sbenno /* 129690643Sbenno * Downgrading to no mapping at all, we just remove the entry. 129790643Sbenno */ 129890643Sbenno if ((prot & VM_PROT_READ) == 0) { 129990643Sbenno pmap_pvo_remove(pvo, -1); 130090643Sbenno continue; 130177957Sbenno } 130290643Sbenno 130390643Sbenno /* 130490643Sbenno * If EXEC permission is being revoked, just clear the flag 130590643Sbenno * in the PVO. 130690643Sbenno */ 130790643Sbenno if ((prot & VM_PROT_EXECUTE) == 0) 130890643Sbenno pvo->pvo_vaddr &= ~PVO_EXECUTABLE; 130990643Sbenno 131090643Sbenno /* 131190643Sbenno * If this entry is already RO, don't diddle with the page 131290643Sbenno * table. 131390643Sbenno */ 131490643Sbenno if ((pvo->pvo_pte.pte_lo & PTE_PP) == PTE_BR) { 131590643Sbenno PMAP_PVO_CHECK(pvo); 131690643Sbenno continue; 131777957Sbenno } 131890643Sbenno 131990643Sbenno /* 132090643Sbenno * Grab the PTE before we diddle the bits so pvo_to_pte can 132190643Sbenno * verify the pte contents are as expected. 132290643Sbenno */ 132390643Sbenno pt = pmap_pvo_to_pte(pvo, -1); 132490643Sbenno pvo->pvo_pte.pte_lo &= ~PTE_PP; 132590643Sbenno pvo->pvo_pte.pte_lo |= PTE_BR; 132690643Sbenno if (pt != NULL) 132790643Sbenno pmap_pte_change(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 132890643Sbenno PMAP_PVO_CHECK(pvo); /* sanity check */ 132977957Sbenno } 133077957Sbenno} 133177957Sbenno 133277957Sbenno/* 133391403Ssilby * Returns true if the pmap's pv is one of the first 133491403Ssilby * 16 pvs linked to from this page. This count may 133591403Ssilby * be changed upwards or downwards in the future; it 133691403Ssilby * is only necessary that true be returned for a small 133791403Ssilby * subset of pmaps for proper page aging. 133891403Ssilby */ 133990643Sbennoboolean_t 134091403Ssilbypmap_page_exists_quick(pmap_t pmap, vm_page_t m) 134190643Sbenno{ 1342110172Sgrehan int loops; 1343110172Sgrehan struct pvo_entry *pvo; 1344110172Sgrehan 1345110172Sgrehan if (!pmap_initialized || (m->flags & PG_FICTITIOUS)) 1346110172Sgrehan return FALSE; 1347110172Sgrehan 1348110172Sgrehan loops = 0; 1349110172Sgrehan LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) { 1350110172Sgrehan if (pvo->pvo_pmap == pmap) 1351110172Sgrehan return (TRUE); 1352110172Sgrehan if (++loops >= 16) 1353110172Sgrehan break; 1354110172Sgrehan } 1355110172Sgrehan 1356110172Sgrehan return (FALSE); 135790643Sbenno} 135877957Sbenno 135990643Sbennostatic u_int pmap_vsidcontext; 136077957Sbenno 136190643Sbennovoid 136290643Sbennopmap_pinit(pmap_t pmap) 136390643Sbenno{ 136490643Sbenno int i, mask; 136590643Sbenno u_int entropy; 136677957Sbenno 136790643Sbenno entropy = 0; 136890643Sbenno __asm __volatile("mftb %0" : "=r"(entropy)); 136977957Sbenno 137090643Sbenno /* 137190643Sbenno * Allocate some segment registers for this pmap. 137290643Sbenno */ 137390643Sbenno for (i = 0; i < NPMAPS; i += VSID_NBPW) { 137490643Sbenno u_int hash, n; 137577957Sbenno 137677957Sbenno /* 137790643Sbenno * Create a new value by mutiplying by a prime and adding in 137890643Sbenno * entropy from the timebase register. This is to make the 137990643Sbenno * VSID more random so that the PT hash function collides 138090643Sbenno * less often. (Note that the prime casues gcc to do shifts 138190643Sbenno * instead of a multiply.) 138277957Sbenno */ 138390643Sbenno pmap_vsidcontext = (pmap_vsidcontext * 0x1105) + entropy; 138490643Sbenno hash = pmap_vsidcontext & (NPMAPS - 1); 138590643Sbenno if (hash == 0) /* 0 is special, avoid it */ 138690643Sbenno continue; 138790643Sbenno n = hash >> 5; 138890643Sbenno mask = 1 << (hash & (VSID_NBPW - 1)); 138990643Sbenno hash = (pmap_vsidcontext & 0xfffff); 139090643Sbenno if (pmap_vsid_bitmap[n] & mask) { /* collision? */ 139190643Sbenno /* anything free in this bucket? */ 139290643Sbenno if (pmap_vsid_bitmap[n] == 0xffffffff) { 139390643Sbenno entropy = (pmap_vsidcontext >> 20); 139490643Sbenno continue; 139590643Sbenno } 139690643Sbenno i = ffs(~pmap_vsid_bitmap[i]) - 1; 139790643Sbenno mask = 1 << i; 139890643Sbenno hash &= 0xfffff & ~(VSID_NBPW - 1); 139990643Sbenno hash |= i; 140077957Sbenno } 140190643Sbenno pmap_vsid_bitmap[n] |= mask; 140290643Sbenno for (i = 0; i < 16; i++) 140390643Sbenno pmap->pm_sr[i] = VSID_MAKE(i, hash); 140490643Sbenno return; 140590643Sbenno } 140677957Sbenno 140790643Sbenno panic("pmap_pinit: out of segments"); 140877957Sbenno} 140977957Sbenno 141077957Sbenno/* 141190643Sbenno * Initialize the pmap associated with process 0. 141277957Sbenno */ 141377957Sbennovoid 141490643Sbennopmap_pinit0(pmap_t pm) 141577957Sbenno{ 141677957Sbenno 141790643Sbenno pmap_pinit(pm); 141890643Sbenno bzero(&pm->pm_stats, sizeof(pm->pm_stats)); 141977957Sbenno} 142077957Sbenno 142177957Sbennovoid 142290643Sbennopmap_pinit2(pmap_t pmap) 142377957Sbenno{ 142490643Sbenno /* XXX: Remove this stub when no longer called */ 142590643Sbenno} 142677957Sbenno 142790643Sbennovoid 142891802Sbennopmap_prefault(pmap_t pm, vm_offset_t va, vm_map_entry_t entry) 142990643Sbenno{ 143091802Sbenno KASSERT(pm == &curproc->p_vmspace->vm_pmap || pm == kernel_pmap, 143191802Sbenno ("pmap_prefault: non current pmap")); 143291802Sbenno /* XXX */ 143390643Sbenno} 143477957Sbenno 143594838Sbenno/* 143694838Sbenno * Set the physical protection on the specified range of this map as requested. 143794838Sbenno */ 143890643Sbennovoid 143994838Sbennopmap_protect(pmap_t pm, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot) 144090643Sbenno{ 144194838Sbenno struct pvo_entry *pvo; 144294838Sbenno struct pte *pt; 144394838Sbenno int pteidx; 144494838Sbenno 144594838Sbenno CTR4(KTR_PMAP, "pmap_protect: pm=%p sva=%#x eva=%#x prot=%#x", pm, sva, 144694838Sbenno eva, prot); 144794838Sbenno 144894838Sbenno 144994838Sbenno KASSERT(pm == &curproc->p_vmspace->vm_pmap || pm == kernel_pmap, 145094838Sbenno ("pmap_protect: non current pmap")); 145194838Sbenno 145294838Sbenno if ((prot & VM_PROT_READ) == VM_PROT_NONE) { 145394838Sbenno pmap_remove(pm, sva, eva); 145494838Sbenno return; 145594838Sbenno } 145694838Sbenno 145794838Sbenno for (; sva < eva; sva += PAGE_SIZE) { 145894838Sbenno pvo = pmap_pvo_find_va(pm, sva, &pteidx); 145994838Sbenno if (pvo == NULL) 146094838Sbenno continue; 146194838Sbenno 146294838Sbenno if ((prot & VM_PROT_EXECUTE) == 0) 146394838Sbenno pvo->pvo_vaddr &= ~PVO_EXECUTABLE; 146494838Sbenno 146594838Sbenno /* 146694838Sbenno * Grab the PTE pointer before we diddle with the cached PTE 146794838Sbenno * copy. 146894838Sbenno */ 146994838Sbenno pt = pmap_pvo_to_pte(pvo, pteidx); 147094838Sbenno /* 147194838Sbenno * Change the protection of the page. 147294838Sbenno */ 147394838Sbenno pvo->pvo_pte.pte_lo &= ~PTE_PP; 147494838Sbenno pvo->pvo_pte.pte_lo |= PTE_BR; 147594838Sbenno 147694838Sbenno /* 147794838Sbenno * If the PVO is in the page table, update that pte as well. 147894838Sbenno */ 147994838Sbenno if (pt != NULL) 148094838Sbenno pmap_pte_change(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 148194838Sbenno } 148277957Sbenno} 148377957Sbenno 148491456Sbenno/* 148591456Sbenno * Map a list of wired pages into kernel virtual address space. This is 148691456Sbenno * intended for temporary mappings which do not need page modification or 148791456Sbenno * references recorded. Existing mappings in the region are overwritten. 148891456Sbenno */ 148990643Sbennovoid 1490110172Sgrehanpmap_qenter(vm_offset_t sva, vm_page_t *m, int count) 149177957Sbenno{ 1492110172Sgrehan vm_offset_t va; 149377957Sbenno 1494110172Sgrehan va = sva; 1495110172Sgrehan while (count-- > 0) { 1496110172Sgrehan pmap_kenter(va, VM_PAGE_TO_PHYS(*m)); 1497110172Sgrehan va += PAGE_SIZE; 1498110172Sgrehan m++; 1499110172Sgrehan } 150090643Sbenno} 150177957Sbenno 150291456Sbenno/* 150391456Sbenno * Remove page mappings from kernel virtual address space. Intended for 150491456Sbenno * temporary mappings entered by pmap_qenter. 150591456Sbenno */ 150690643Sbennovoid 1507110172Sgrehanpmap_qremove(vm_offset_t sva, int count) 150890643Sbenno{ 1509110172Sgrehan vm_offset_t va; 151091456Sbenno 1511110172Sgrehan va = sva; 1512110172Sgrehan while (count-- > 0) { 151391456Sbenno pmap_kremove(va); 1514110172Sgrehan va += PAGE_SIZE; 1515110172Sgrehan } 151677957Sbenno} 151777957Sbenno 151890643Sbennovoid 151990643Sbennopmap_release(pmap_t pmap) 152090643Sbenno{ 1521103604Sgrehan int idx, mask; 1522103604Sgrehan 1523103604Sgrehan /* 1524103604Sgrehan * Free segment register's VSID 1525103604Sgrehan */ 1526103604Sgrehan if (pmap->pm_sr[0] == 0) 1527103604Sgrehan panic("pmap_release"); 1528103604Sgrehan 1529103604Sgrehan idx = VSID_TO_HASH(pmap->pm_sr[0]) & (NPMAPS-1); 1530103604Sgrehan mask = 1 << (idx % VSID_NBPW); 1531103604Sgrehan idx /= VSID_NBPW; 1532103604Sgrehan pmap_vsid_bitmap[idx] &= ~mask; 153377957Sbenno} 153477957Sbenno 153591456Sbenno/* 153691456Sbenno * Remove the given range of addresses from the specified map. 153791456Sbenno */ 153890643Sbennovoid 153991456Sbennopmap_remove(pmap_t pm, vm_offset_t sva, vm_offset_t eva) 154077957Sbenno{ 154191456Sbenno struct pvo_entry *pvo; 154291456Sbenno int pteidx; 154391456Sbenno 154491456Sbenno for (; sva < eva; sva += PAGE_SIZE) { 154591456Sbenno pvo = pmap_pvo_find_va(pm, sva, &pteidx); 154691456Sbenno if (pvo != NULL) { 154791456Sbenno pmap_pvo_remove(pvo, pteidx); 154891456Sbenno } 154991456Sbenno } 155077957Sbenno} 155177957Sbenno 155294838Sbenno/* 1553110172Sgrehan * Remove physical page from all pmaps in which it resides. pmap_pvo_remove() 1554110172Sgrehan * will reflect changes in pte's back to the vm_page. 1555110172Sgrehan */ 1556110172Sgrehanvoid 1557110172Sgrehanpmap_remove_all(vm_page_t m) 1558110172Sgrehan{ 1559110172Sgrehan struct pvo_head *pvo_head; 1560110172Sgrehan struct pvo_entry *pvo, *next_pvo; 1561110172Sgrehan 1562120336Sgrehan mtx_assert(&vm_page_queue_mtx, MA_OWNED); 1563120336Sgrehan 1564110172Sgrehan pvo_head = vm_page_to_pvoh(m); 1565110172Sgrehan for (pvo = LIST_FIRST(pvo_head); pvo != NULL; pvo = next_pvo) { 1566110172Sgrehan next_pvo = LIST_NEXT(pvo, pvo_vlink); 1567110172Sgrehan 1568110172Sgrehan PMAP_PVO_CHECK(pvo); /* sanity check */ 1569110172Sgrehan pmap_pvo_remove(pvo, -1); 1570110172Sgrehan } 1571110172Sgrehan vm_page_flag_clear(m, PG_WRITEABLE); 1572110172Sgrehan} 1573110172Sgrehan 1574110172Sgrehan/* 157594838Sbenno * Remove all pages from specified address space, this aids process exit 157694838Sbenno * speeds. This is much faster than pmap_remove in the case of running down 157794838Sbenno * an entire address space. Only works for the current pmap. 157894838Sbenno */ 157990643Sbennovoid 158094838Sbennopmap_remove_pages(pmap_t pm, vm_offset_t sva, vm_offset_t eva) 158177957Sbenno{ 158294838Sbenno 158394838Sbenno KASSERT(pm == &curproc->p_vmspace->vm_pmap || pm == kernel_pmap, 158494838Sbenno ("pmap_remove_pages: non current pmap")); 158594838Sbenno pmap_remove(pm, sva, eva); 158677957Sbenno} 158777957Sbenno 158877957Sbenno/* 158990643Sbenno * Allocate a physical page of memory directly from the phys_avail map. 159090643Sbenno * Can only be called from pmap_bootstrap before avail start and end are 159190643Sbenno * calculated. 159283682Smp */ 159390643Sbennostatic vm_offset_t 159490643Sbennopmap_bootstrap_alloc(vm_size_t size, u_int align) 159583682Smp{ 159690643Sbenno vm_offset_t s, e; 159790643Sbenno int i, j; 159883682Smp 159990643Sbenno size = round_page(size); 160090643Sbenno for (i = 0; phys_avail[i + 1] != 0; i += 2) { 160190643Sbenno if (align != 0) 160290643Sbenno s = (phys_avail[i] + align - 1) & ~(align - 1); 160390643Sbenno else 160490643Sbenno s = phys_avail[i]; 160590643Sbenno e = s + size; 160690643Sbenno 160790643Sbenno if (s < phys_avail[i] || e > phys_avail[i + 1]) 160890643Sbenno continue; 160990643Sbenno 161090643Sbenno if (s == phys_avail[i]) { 161190643Sbenno phys_avail[i] += size; 161290643Sbenno } else if (e == phys_avail[i + 1]) { 161390643Sbenno phys_avail[i + 1] -= size; 161490643Sbenno } else { 161590643Sbenno for (j = phys_avail_count * 2; j > i; j -= 2) { 161690643Sbenno phys_avail[j] = phys_avail[j - 2]; 161790643Sbenno phys_avail[j + 1] = phys_avail[j - 1]; 161890643Sbenno } 161990643Sbenno 162090643Sbenno phys_avail[i + 3] = phys_avail[i + 1]; 162190643Sbenno phys_avail[i + 1] = s; 162290643Sbenno phys_avail[i + 2] = e; 162390643Sbenno phys_avail_count++; 162490643Sbenno } 162590643Sbenno 162690643Sbenno return (s); 162783682Smp } 162890643Sbenno panic("pmap_bootstrap_alloc: could not allocate memory"); 162983682Smp} 163083682Smp 163183682Smp/* 163290643Sbenno * Return an unmapped pvo for a kernel virtual address. 163390643Sbenno * Used by pmap functions that operate on physical pages. 163483682Smp */ 163590643Sbennostatic struct pvo_entry * 163690643Sbennopmap_rkva_alloc(void) 163783682Smp{ 163890643Sbenno struct pvo_entry *pvo; 163990643Sbenno struct pte *pt; 164090643Sbenno vm_offset_t kva; 164190643Sbenno int pteidx; 164283682Smp 164390643Sbenno if (pmap_rkva_count == 0) 164490643Sbenno panic("pmap_rkva_alloc: no more reserved KVAs"); 164590643Sbenno 164690643Sbenno kva = pmap_rkva_start + (PAGE_SIZE * --pmap_rkva_count); 164790643Sbenno pmap_kenter(kva, 0); 164890643Sbenno 164990643Sbenno pvo = pmap_pvo_find_va(kernel_pmap, kva, &pteidx); 165090643Sbenno 165190643Sbenno if (pvo == NULL) 165290643Sbenno panic("pmap_kva_alloc: pmap_pvo_find_va failed"); 165390643Sbenno 165490643Sbenno pt = pmap_pvo_to_pte(pvo, pteidx); 165590643Sbenno 165690643Sbenno if (pt == NULL) 165790643Sbenno panic("pmap_kva_alloc: pmap_pvo_to_pte failed"); 165890643Sbenno 165990643Sbenno pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 166090643Sbenno PVO_PTEGIDX_CLR(pvo); 166190643Sbenno 166290643Sbenno pmap_pte_overflow++; 166390643Sbenno 166490643Sbenno return (pvo); 166590643Sbenno} 166690643Sbenno 166790643Sbennostatic void 166890643Sbennopmap_pa_map(struct pvo_entry *pvo, vm_offset_t pa, struct pte *saved_pt, 166990643Sbenno int *depth_p) 167090643Sbenno{ 167190643Sbenno struct pte *pt; 167290643Sbenno 167390643Sbenno /* 167490643Sbenno * If this pvo already has a valid pte, we need to save it so it can 167590643Sbenno * be restored later. We then just reload the new PTE over the old 167690643Sbenno * slot. 167790643Sbenno */ 167890643Sbenno if (saved_pt != NULL) { 167990643Sbenno pt = pmap_pvo_to_pte(pvo, -1); 168090643Sbenno 168190643Sbenno if (pt != NULL) { 168290643Sbenno pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 168390643Sbenno PVO_PTEGIDX_CLR(pvo); 168490643Sbenno pmap_pte_overflow++; 168583682Smp } 168690643Sbenno 168790643Sbenno *saved_pt = pvo->pvo_pte; 168890643Sbenno 168990643Sbenno pvo->pvo_pte.pte_lo &= ~PTE_RPGN; 169083682Smp } 169190643Sbenno 169290643Sbenno pvo->pvo_pte.pte_lo |= pa; 169390643Sbenno 169490643Sbenno if (!pmap_pte_spill(pvo->pvo_vaddr)) 169590643Sbenno panic("pmap_pa_map: could not spill pvo %p", pvo); 169690643Sbenno 169790643Sbenno if (depth_p != NULL) 169890643Sbenno (*depth_p)++; 169983682Smp} 170083682Smp 170190643Sbennostatic void 170290643Sbennopmap_pa_unmap(struct pvo_entry *pvo, struct pte *saved_pt, int *depth_p) 170377957Sbenno{ 170490643Sbenno struct pte *pt; 170577957Sbenno 170690643Sbenno pt = pmap_pvo_to_pte(pvo, -1); 170790643Sbenno 170890643Sbenno if (pt != NULL) { 170990643Sbenno pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 171090643Sbenno PVO_PTEGIDX_CLR(pvo); 171190643Sbenno pmap_pte_overflow++; 171290643Sbenno } 171390643Sbenno 171490643Sbenno pvo->pvo_pte.pte_lo &= ~PTE_RPGN; 171590643Sbenno 171690643Sbenno /* 171790643Sbenno * If there is a saved PTE and it's valid, restore it and return. 171890643Sbenno */ 171990643Sbenno if (saved_pt != NULL && (saved_pt->pte_lo & PTE_RPGN) != 0) { 172090643Sbenno if (depth_p != NULL && --(*depth_p) == 0) 172190643Sbenno panic("pmap_pa_unmap: restoring but depth == 0"); 172290643Sbenno 172390643Sbenno pvo->pvo_pte = *saved_pt; 172490643Sbenno 172590643Sbenno if (!pmap_pte_spill(pvo->pvo_vaddr)) 172690643Sbenno panic("pmap_pa_unmap: could not spill pvo %p", pvo); 172790643Sbenno } 172877957Sbenno} 172977957Sbenno 173090643Sbennostatic void 173190643Sbennopmap_syncicache(vm_offset_t pa, vm_size_t len) 173277957Sbenno{ 173390643Sbenno __syncicache((void *)pa, len); 173490643Sbenno} 173577957Sbenno 173690643Sbennostatic void 173790643Sbennotlbia(void) 173890643Sbenno{ 173990643Sbenno caddr_t i; 174090643Sbenno 174190643Sbenno SYNC(); 174290643Sbenno for (i = 0; i < (caddr_t)0x00040000; i += 0x00001000) { 174390643Sbenno TLBIE(i); 174490643Sbenno EIEIO(); 174590643Sbenno } 174690643Sbenno TLBSYNC(); 174790643Sbenno SYNC(); 174877957Sbenno} 174977957Sbenno 175090643Sbennostatic int 175192847Sjeffpmap_pvo_enter(pmap_t pm, uma_zone_t zone, struct pvo_head *pvo_head, 175290643Sbenno vm_offset_t va, vm_offset_t pa, u_int pte_lo, int flags) 175377957Sbenno{ 175490643Sbenno struct pvo_entry *pvo; 175590643Sbenno u_int sr; 175690643Sbenno int first; 175790643Sbenno u_int ptegidx; 175890643Sbenno int i; 1759103604Sgrehan int bootstrap; 176077957Sbenno 176190643Sbenno pmap_pvo_enter_calls++; 176296250Sbenno first = 0; 1763103604Sgrehan 1764103604Sgrehan bootstrap = 0; 176590643Sbenno 176690643Sbenno /* 176790643Sbenno * Compute the PTE Group index. 176890643Sbenno */ 176990643Sbenno va &= ~ADDR_POFF; 177090643Sbenno sr = va_to_sr(pm->pm_sr, va); 177190643Sbenno ptegidx = va_to_pteg(sr, va); 177290643Sbenno 177390643Sbenno /* 177490643Sbenno * Remove any existing mapping for this page. Reuse the pvo entry if 177590643Sbenno * there is a mapping. 177690643Sbenno */ 177790643Sbenno LIST_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 177890643Sbenno if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) { 177996334Sbenno if ((pvo->pvo_pte.pte_lo & PTE_RPGN) == pa && 178096334Sbenno (pvo->pvo_pte.pte_lo & PTE_PP) == 178196334Sbenno (pte_lo & PTE_PP)) { 178292521Sbenno return (0); 178396334Sbenno } 178490643Sbenno pmap_pvo_remove(pvo, -1); 178590643Sbenno break; 178690643Sbenno } 178790643Sbenno } 178890643Sbenno 178990643Sbenno /* 179090643Sbenno * If we aren't overwriting a mapping, try to allocate. 179190643Sbenno */ 179292521Sbenno if (pmap_initialized) { 179392847Sjeff pvo = uma_zalloc(zone, M_NOWAIT); 179492521Sbenno } else { 179599037Sbenno if (pmap_bpvo_pool_index >= BPVO_POOL_SIZE) { 179699037Sbenno panic("pmap_enter: bpvo pool exhausted, %d, %d, %d", 179799037Sbenno pmap_bpvo_pool_index, BPVO_POOL_SIZE, 179899037Sbenno BPVO_POOL_SIZE * sizeof(struct pvo_entry)); 179992521Sbenno } 180092521Sbenno pvo = &pmap_bpvo_pool[pmap_bpvo_pool_index]; 180192521Sbenno pmap_bpvo_pool_index++; 1802103604Sgrehan bootstrap = 1; 180392521Sbenno } 180490643Sbenno 180590643Sbenno if (pvo == NULL) { 180690643Sbenno return (ENOMEM); 180790643Sbenno } 180890643Sbenno 180990643Sbenno pmap_pvo_entries++; 181090643Sbenno pvo->pvo_vaddr = va; 181190643Sbenno pvo->pvo_pmap = pm; 181290643Sbenno LIST_INSERT_HEAD(&pmap_pvo_table[ptegidx], pvo, pvo_olink); 181390643Sbenno pvo->pvo_vaddr &= ~ADDR_POFF; 181490643Sbenno if (flags & VM_PROT_EXECUTE) 181590643Sbenno pvo->pvo_vaddr |= PVO_EXECUTABLE; 181690643Sbenno if (flags & PVO_WIRED) 181790643Sbenno pvo->pvo_vaddr |= PVO_WIRED; 181890643Sbenno if (pvo_head != &pmap_pvo_kunmanaged) 181990643Sbenno pvo->pvo_vaddr |= PVO_MANAGED; 1820103604Sgrehan if (bootstrap) 1821103604Sgrehan pvo->pvo_vaddr |= PVO_BOOTSTRAP; 182290643Sbenno pmap_pte_create(&pvo->pvo_pte, sr, va, pa | pte_lo); 182390643Sbenno 182490643Sbenno /* 182590643Sbenno * Remember if the list was empty and therefore will be the first 182690643Sbenno * item. 182790643Sbenno */ 182896250Sbenno if (LIST_FIRST(pvo_head) == NULL) 182996250Sbenno first = 1; 183090643Sbenno 183190643Sbenno LIST_INSERT_HEAD(pvo_head, pvo, pvo_vlink); 183290643Sbenno if (pvo->pvo_pte.pte_lo & PVO_WIRED) 183390643Sbenno pvo->pvo_pmap->pm_stats.wired_count++; 183490643Sbenno pvo->pvo_pmap->pm_stats.resident_count++; 183590643Sbenno 183690643Sbenno /* 183790643Sbenno * We hope this succeeds but it isn't required. 183890643Sbenno */ 183990643Sbenno i = pmap_pte_insert(ptegidx, &pvo->pvo_pte); 184090643Sbenno if (i >= 0) { 184190643Sbenno PVO_PTEGIDX_SET(pvo, i); 184290643Sbenno } else { 184390643Sbenno panic("pmap_pvo_enter: overflow"); 184490643Sbenno pmap_pte_overflow++; 184590643Sbenno } 184690643Sbenno 184790643Sbenno return (first ? ENOENT : 0); 184877957Sbenno} 184977957Sbenno 185090643Sbennostatic void 185190643Sbennopmap_pvo_remove(struct pvo_entry *pvo, int pteidx) 185277957Sbenno{ 185390643Sbenno struct pte *pt; 185477957Sbenno 185590643Sbenno /* 185690643Sbenno * If there is an active pte entry, we need to deactivate it (and 185790643Sbenno * save the ref & cfg bits). 185890643Sbenno */ 185990643Sbenno pt = pmap_pvo_to_pte(pvo, pteidx); 186090643Sbenno if (pt != NULL) { 186190643Sbenno pmap_pte_unset(pt, &pvo->pvo_pte, pvo->pvo_vaddr); 186290643Sbenno PVO_PTEGIDX_CLR(pvo); 186390643Sbenno } else { 186490643Sbenno pmap_pte_overflow--; 1865110172Sgrehan } 186690643Sbenno 186790643Sbenno /* 186890643Sbenno * Update our statistics. 186990643Sbenno */ 187090643Sbenno pvo->pvo_pmap->pm_stats.resident_count--; 187190643Sbenno if (pvo->pvo_pte.pte_lo & PVO_WIRED) 187290643Sbenno pvo->pvo_pmap->pm_stats.wired_count--; 187390643Sbenno 187490643Sbenno /* 187590643Sbenno * Save the REF/CHG bits into their cache if the page is managed. 187690643Sbenno */ 187790643Sbenno if (pvo->pvo_vaddr & PVO_MANAGED) { 187890643Sbenno struct vm_page *pg; 187990643Sbenno 188092067Sbenno pg = PHYS_TO_VM_PAGE(pvo->pvo_pte.pte_lo & PTE_RPGN); 188190643Sbenno if (pg != NULL) { 188290643Sbenno pmap_attr_save(pg, pvo->pvo_pte.pte_lo & 188390643Sbenno (PTE_REF | PTE_CHG)); 188490643Sbenno } 188590643Sbenno } 188690643Sbenno 188790643Sbenno /* 188890643Sbenno * Remove this PVO from the PV list. 188990643Sbenno */ 189090643Sbenno LIST_REMOVE(pvo, pvo_vlink); 189190643Sbenno 189290643Sbenno /* 189390643Sbenno * Remove this from the overflow list and return it to the pool 189490643Sbenno * if we aren't going to reuse it. 189590643Sbenno */ 189690643Sbenno LIST_REMOVE(pvo, pvo_olink); 189792521Sbenno if (!(pvo->pvo_vaddr & PVO_BOOTSTRAP)) 189892847Sjeff uma_zfree(pvo->pvo_vaddr & PVO_MANAGED ? pmap_mpvo_zone : 189992521Sbenno pmap_upvo_zone, pvo); 190090643Sbenno pmap_pvo_entries--; 190190643Sbenno pmap_pvo_remove_calls++; 190277957Sbenno} 190377957Sbenno 190490643Sbennostatic __inline int 190590643Sbennopmap_pvo_pte_index(const struct pvo_entry *pvo, int ptegidx) 190677957Sbenno{ 190790643Sbenno int pteidx; 190877957Sbenno 190990643Sbenno /* 191090643Sbenno * We can find the actual pte entry without searching by grabbing 191190643Sbenno * the PTEG index from 3 unused bits in pte_lo[11:9] and by 191290643Sbenno * noticing the HID bit. 191390643Sbenno */ 191490643Sbenno pteidx = ptegidx * 8 + PVO_PTEGIDX_GET(pvo); 191590643Sbenno if (pvo->pvo_pte.pte_hi & PTE_HID) 191690643Sbenno pteidx ^= pmap_pteg_mask * 8; 191790643Sbenno 191890643Sbenno return (pteidx); 191977957Sbenno} 192077957Sbenno 192190643Sbennostatic struct pvo_entry * 192290643Sbennopmap_pvo_find_va(pmap_t pm, vm_offset_t va, int *pteidx_p) 192377957Sbenno{ 192490643Sbenno struct pvo_entry *pvo; 192590643Sbenno int ptegidx; 192690643Sbenno u_int sr; 192777957Sbenno 192890643Sbenno va &= ~ADDR_POFF; 192990643Sbenno sr = va_to_sr(pm->pm_sr, va); 193090643Sbenno ptegidx = va_to_pteg(sr, va); 193190643Sbenno 193290643Sbenno LIST_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 193390643Sbenno if (pvo->pvo_pmap == pm && PVO_VADDR(pvo) == va) { 193490643Sbenno if (pteidx_p) 193590643Sbenno *pteidx_p = pmap_pvo_pte_index(pvo, ptegidx); 193690643Sbenno return (pvo); 193790643Sbenno } 193890643Sbenno } 193990643Sbenno 194090643Sbenno return (NULL); 194177957Sbenno} 194277957Sbenno 194390643Sbennostatic struct pte * 194490643Sbennopmap_pvo_to_pte(const struct pvo_entry *pvo, int pteidx) 194577957Sbenno{ 194690643Sbenno struct pte *pt; 194777957Sbenno 194890643Sbenno /* 194990643Sbenno * If we haven't been supplied the ptegidx, calculate it. 195090643Sbenno */ 195190643Sbenno if (pteidx == -1) { 195290643Sbenno int ptegidx; 195390643Sbenno u_int sr; 195477957Sbenno 195590643Sbenno sr = va_to_sr(pvo->pvo_pmap->pm_sr, pvo->pvo_vaddr); 195690643Sbenno ptegidx = va_to_pteg(sr, pvo->pvo_vaddr); 195790643Sbenno pteidx = pmap_pvo_pte_index(pvo, ptegidx); 195890643Sbenno } 195990643Sbenno 196090643Sbenno pt = &pmap_pteg_table[pteidx >> 3].pt[pteidx & 7]; 196190643Sbenno 196290643Sbenno if ((pvo->pvo_pte.pte_hi & PTE_VALID) && !PVO_PTEGIDX_ISSET(pvo)) { 196390643Sbenno panic("pmap_pvo_to_pte: pvo %p has valid pte in pvo but no " 196490643Sbenno "valid pte index", pvo); 196590643Sbenno } 196690643Sbenno 196790643Sbenno if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0 && PVO_PTEGIDX_ISSET(pvo)) { 196890643Sbenno panic("pmap_pvo_to_pte: pvo %p has valid pte index in pvo " 196990643Sbenno "pvo but no valid pte", pvo); 197090643Sbenno } 197190643Sbenno 197290643Sbenno if ((pt->pte_hi ^ (pvo->pvo_pte.pte_hi & ~PTE_VALID)) == PTE_VALID) { 197390643Sbenno if ((pvo->pvo_pte.pte_hi & PTE_VALID) == 0) { 197490643Sbenno panic("pmap_pvo_to_pte: pvo %p has valid pte in " 197590643Sbenno "pmap_pteg_table %p but invalid in pvo", pvo, pt); 197677957Sbenno } 197790643Sbenno 197890643Sbenno if (((pt->pte_lo ^ pvo->pvo_pte.pte_lo) & ~(PTE_CHG|PTE_REF)) 197990643Sbenno != 0) { 198090643Sbenno panic("pmap_pvo_to_pte: pvo %p pte does not match " 198190643Sbenno "pte %p in pmap_pteg_table", pvo, pt); 198290643Sbenno } 198390643Sbenno 198490643Sbenno return (pt); 198577957Sbenno } 198677957Sbenno 198790643Sbenno if (pvo->pvo_pte.pte_hi & PTE_VALID) { 198890643Sbenno panic("pmap_pvo_to_pte: pvo %p has invalid pte %p in " 198990643Sbenno "pmap_pteg_table but valid in pvo", pvo, pt); 199090643Sbenno } 199177957Sbenno 199290643Sbenno return (NULL); 199377957Sbenno} 199478880Sbenno 199592654Sjeffstatic void * 199692654Sjeffpmap_pvo_allocf(uma_zone_t zone, int bytes, u_int8_t *flags, int wait) 199792654Sjeff{ 1998118100Salc static vm_pindex_t color; 199992654Sjeff vm_page_t m; 200092654Sjeff 200192654Sjeff if (bytes != PAGE_SIZE) 200292654Sjeff panic("pmap_pvo_allocf: benno was shortsighted. hit him."); 200392654Sjeff 200492654Sjeff *flags = UMA_SLAB_PRIV; 2005118100Salc /* 2006118100Salc * The color is only a hint. Thus, a data race in the read- 2007118100Salc * modify-write operation below isn't a catastrophe. 2008118100Salc */ 2009118100Salc m = vm_page_alloc(NULL, color++, VM_ALLOC_NOOBJ | VM_ALLOC_SYSTEM); 201092654Sjeff if (m == NULL) 201192654Sjeff return (NULL); 201292654Sjeff return ((void *)VM_PAGE_TO_PHYS(m)); 201392654Sjeff} 201492654Sjeff 201578880Sbenno/* 201690643Sbenno * XXX: THIS STUFF SHOULD BE IN pte.c? 201778880Sbenno */ 201890643Sbennoint 201990643Sbennopmap_pte_spill(vm_offset_t addr) 202078880Sbenno{ 202190643Sbenno struct pvo_entry *source_pvo, *victim_pvo; 202290643Sbenno struct pvo_entry *pvo; 202390643Sbenno int ptegidx, i, j; 202490643Sbenno u_int sr; 202590643Sbenno struct pteg *pteg; 202690643Sbenno struct pte *pt; 202778880Sbenno 202890643Sbenno pmap_pte_spills++; 202990643Sbenno 203094836Sbenno sr = mfsrin(addr); 203190643Sbenno ptegidx = va_to_pteg(sr, addr); 203290643Sbenno 203378880Sbenno /* 203490643Sbenno * Have to substitute some entry. Use the primary hash for this. 203590643Sbenno * Use low bits of timebase as random generator. 203678880Sbenno */ 203790643Sbenno pteg = &pmap_pteg_table[ptegidx]; 203890643Sbenno __asm __volatile("mftb %0" : "=r"(i)); 203990643Sbenno i &= 7; 204090643Sbenno pt = &pteg->pt[i]; 204178880Sbenno 204290643Sbenno source_pvo = NULL; 204390643Sbenno victim_pvo = NULL; 204490643Sbenno LIST_FOREACH(pvo, &pmap_pvo_table[ptegidx], pvo_olink) { 204578880Sbenno /* 204690643Sbenno * We need to find a pvo entry for this address. 204778880Sbenno */ 204890643Sbenno PMAP_PVO_CHECK(pvo); 204990643Sbenno if (source_pvo == NULL && 205090643Sbenno pmap_pte_match(&pvo->pvo_pte, sr, addr, 205190643Sbenno pvo->pvo_pte.pte_hi & PTE_HID)) { 205290643Sbenno /* 205390643Sbenno * Now found an entry to be spilled into the pteg. 205490643Sbenno * The PTE is now valid, so we know it's active. 205590643Sbenno */ 205690643Sbenno j = pmap_pte_insert(ptegidx, &pvo->pvo_pte); 205778880Sbenno 205890643Sbenno if (j >= 0) { 205990643Sbenno PVO_PTEGIDX_SET(pvo, j); 206090643Sbenno pmap_pte_overflow--; 206190643Sbenno PMAP_PVO_CHECK(pvo); 206290643Sbenno return (1); 206390643Sbenno } 206490643Sbenno 206590643Sbenno source_pvo = pvo; 206690643Sbenno 206790643Sbenno if (victim_pvo != NULL) 206890643Sbenno break; 206990643Sbenno } 207090643Sbenno 207178880Sbenno /* 207290643Sbenno * We also need the pvo entry of the victim we are replacing 207390643Sbenno * so save the R & C bits of the PTE. 207478880Sbenno */ 207590643Sbenno if ((pt->pte_hi & PTE_HID) == 0 && victim_pvo == NULL && 207690643Sbenno pmap_pte_compare(pt, &pvo->pvo_pte)) { 207790643Sbenno victim_pvo = pvo; 207890643Sbenno if (source_pvo != NULL) 207990643Sbenno break; 208090643Sbenno } 208190643Sbenno } 208278880Sbenno 208390643Sbenno if (source_pvo == NULL) 208490643Sbenno return (0); 208590643Sbenno 208690643Sbenno if (victim_pvo == NULL) { 208790643Sbenno if ((pt->pte_hi & PTE_HID) == 0) 208890643Sbenno panic("pmap_pte_spill: victim p-pte (%p) has no pvo" 208990643Sbenno "entry", pt); 209090643Sbenno 209178880Sbenno /* 209290643Sbenno * If this is a secondary PTE, we need to search it's primary 209390643Sbenno * pvo bucket for the matching PVO. 209478880Sbenno */ 209590643Sbenno LIST_FOREACH(pvo, &pmap_pvo_table[ptegidx ^ pmap_pteg_mask], 209690643Sbenno pvo_olink) { 209790643Sbenno PMAP_PVO_CHECK(pvo); 209890643Sbenno /* 209990643Sbenno * We also need the pvo entry of the victim we are 210090643Sbenno * replacing so save the R & C bits of the PTE. 210190643Sbenno */ 210290643Sbenno if (pmap_pte_compare(pt, &pvo->pvo_pte)) { 210390643Sbenno victim_pvo = pvo; 210490643Sbenno break; 210590643Sbenno } 210690643Sbenno } 210778880Sbenno 210890643Sbenno if (victim_pvo == NULL) 210990643Sbenno panic("pmap_pte_spill: victim s-pte (%p) has no pvo" 211090643Sbenno "entry", pt); 211190643Sbenno } 211278880Sbenno 211390643Sbenno /* 211490643Sbenno * We are invalidating the TLB entry for the EA we are replacing even 211590643Sbenno * though it's valid. If we don't, we lose any ref/chg bit changes 211690643Sbenno * contained in the TLB entry. 211790643Sbenno */ 211890643Sbenno source_pvo->pvo_pte.pte_hi &= ~PTE_HID; 211978880Sbenno 212090643Sbenno pmap_pte_unset(pt, &victim_pvo->pvo_pte, victim_pvo->pvo_vaddr); 212190643Sbenno pmap_pte_set(pt, &source_pvo->pvo_pte); 212290643Sbenno 212390643Sbenno PVO_PTEGIDX_CLR(victim_pvo); 212490643Sbenno PVO_PTEGIDX_SET(source_pvo, i); 212590643Sbenno pmap_pte_replacements++; 212690643Sbenno 212790643Sbenno PMAP_PVO_CHECK(victim_pvo); 212890643Sbenno PMAP_PVO_CHECK(source_pvo); 212990643Sbenno 213090643Sbenno return (1); 213190643Sbenno} 213290643Sbenno 213390643Sbennostatic int 213490643Sbennopmap_pte_insert(u_int ptegidx, struct pte *pvo_pt) 213590643Sbenno{ 213690643Sbenno struct pte *pt; 213790643Sbenno int i; 213890643Sbenno 213990643Sbenno /* 214090643Sbenno * First try primary hash. 214190643Sbenno */ 214290643Sbenno for (pt = pmap_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) { 214390643Sbenno if ((pt->pte_hi & PTE_VALID) == 0) { 214490643Sbenno pvo_pt->pte_hi &= ~PTE_HID; 214590643Sbenno pmap_pte_set(pt, pvo_pt); 214690643Sbenno return (i); 214778880Sbenno } 214890643Sbenno } 214978880Sbenno 215090643Sbenno /* 215190643Sbenno * Now try secondary hash. 215290643Sbenno */ 215390643Sbenno ptegidx ^= pmap_pteg_mask; 215490643Sbenno ptegidx++; 215590643Sbenno for (pt = pmap_pteg_table[ptegidx].pt, i = 0; i < 8; i++, pt++) { 215690643Sbenno if ((pt->pte_hi & PTE_VALID) == 0) { 215790643Sbenno pvo_pt->pte_hi |= PTE_HID; 215890643Sbenno pmap_pte_set(pt, pvo_pt); 215990643Sbenno return (i); 216090643Sbenno } 216190643Sbenno } 216278880Sbenno 216390643Sbenno panic("pmap_pte_insert: overflow"); 216490643Sbenno return (-1); 216578880Sbenno} 216684921Sbenno 216790643Sbennostatic boolean_t 216890643Sbennopmap_query_bit(vm_page_t m, int ptebit) 216984921Sbenno{ 217090643Sbenno struct pvo_entry *pvo; 217190643Sbenno struct pte *pt; 217284921Sbenno 217390643Sbenno if (pmap_attr_fetch(m) & ptebit) 217490643Sbenno return (TRUE); 217584921Sbenno 217690643Sbenno LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) { 217790643Sbenno PMAP_PVO_CHECK(pvo); /* sanity check */ 217884921Sbenno 217990643Sbenno /* 218090643Sbenno * See if we saved the bit off. If so, cache it and return 218190643Sbenno * success. 218290643Sbenno */ 218390643Sbenno if (pvo->pvo_pte.pte_lo & ptebit) { 218490643Sbenno pmap_attr_save(m, ptebit); 218590643Sbenno PMAP_PVO_CHECK(pvo); /* sanity check */ 218690643Sbenno return (TRUE); 218790643Sbenno } 218890643Sbenno } 218984921Sbenno 219090643Sbenno /* 219190643Sbenno * No luck, now go through the hard part of looking at the PTEs 219290643Sbenno * themselves. Sync so that any pending REF/CHG bits are flushed to 219390643Sbenno * the PTEs. 219490643Sbenno */ 219590643Sbenno SYNC(); 219690643Sbenno LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) { 219790643Sbenno PMAP_PVO_CHECK(pvo); /* sanity check */ 219890643Sbenno 219990643Sbenno /* 220090643Sbenno * See if this pvo has a valid PTE. if so, fetch the 220190643Sbenno * REF/CHG bits from the valid PTE. If the appropriate 220290643Sbenno * ptebit is set, cache it and return success. 220390643Sbenno */ 220490643Sbenno pt = pmap_pvo_to_pte(pvo, -1); 220590643Sbenno if (pt != NULL) { 220690643Sbenno pmap_pte_synch(pt, &pvo->pvo_pte); 220790643Sbenno if (pvo->pvo_pte.pte_lo & ptebit) { 220890643Sbenno pmap_attr_save(m, ptebit); 220990643Sbenno PMAP_PVO_CHECK(pvo); /* sanity check */ 221090643Sbenno return (TRUE); 221190643Sbenno } 221290643Sbenno } 221384921Sbenno } 221484921Sbenno 221590643Sbenno return (TRUE); 221684921Sbenno} 221790643Sbenno 2218110172Sgrehanstatic u_int 2219110172Sgrehanpmap_clear_bit(vm_page_t m, int ptebit, int *origbit) 222090643Sbenno{ 2221110172Sgrehan u_int count; 222290643Sbenno struct pvo_entry *pvo; 222390643Sbenno struct pte *pt; 222490643Sbenno int rv; 222590643Sbenno 222690643Sbenno /* 222790643Sbenno * Clear the cached value. 222890643Sbenno */ 222990643Sbenno rv = pmap_attr_fetch(m); 223090643Sbenno pmap_attr_clear(m, ptebit); 223190643Sbenno 223290643Sbenno /* 223390643Sbenno * Sync so that any pending REF/CHG bits are flushed to the PTEs (so 223490643Sbenno * we can reset the right ones). note that since the pvo entries and 223590643Sbenno * list heads are accessed via BAT0 and are never placed in the page 223690643Sbenno * table, we don't have to worry about further accesses setting the 223790643Sbenno * REF/CHG bits. 223890643Sbenno */ 223990643Sbenno SYNC(); 224090643Sbenno 224190643Sbenno /* 224290643Sbenno * For each pvo entry, clear the pvo's ptebit. If this pvo has a 224390643Sbenno * valid pte clear the ptebit from the valid pte. 224490643Sbenno */ 2245110172Sgrehan count = 0; 224690643Sbenno LIST_FOREACH(pvo, vm_page_to_pvoh(m), pvo_vlink) { 224790643Sbenno PMAP_PVO_CHECK(pvo); /* sanity check */ 224890643Sbenno pt = pmap_pvo_to_pte(pvo, -1); 224990643Sbenno if (pt != NULL) { 225090643Sbenno pmap_pte_synch(pt, &pvo->pvo_pte); 2251110172Sgrehan if (pvo->pvo_pte.pte_lo & ptebit) { 2252110172Sgrehan count++; 225390643Sbenno pmap_pte_clear(pt, PVO_VADDR(pvo), ptebit); 2254110172Sgrehan } 225590643Sbenno } 225690643Sbenno rv |= pvo->pvo_pte.pte_lo; 225790643Sbenno pvo->pvo_pte.pte_lo &= ~ptebit; 225890643Sbenno PMAP_PVO_CHECK(pvo); /* sanity check */ 225990643Sbenno } 226090643Sbenno 2261110172Sgrehan if (origbit != NULL) { 2262110172Sgrehan *origbit = rv; 2263110172Sgrehan } 2264110172Sgrehan 2265110172Sgrehan return (count); 226690643Sbenno} 226799038Sbenno 226899038Sbenno/* 2269103604Sgrehan * Return true if the physical range is encompassed by the battable[idx] 2270103604Sgrehan */ 2271103604Sgrehanstatic int 2272103604Sgrehanpmap_bat_mapped(int idx, vm_offset_t pa, vm_size_t size) 2273103604Sgrehan{ 2274103604Sgrehan u_int prot; 2275103604Sgrehan u_int32_t start; 2276103604Sgrehan u_int32_t end; 2277103604Sgrehan u_int32_t bat_ble; 2278103604Sgrehan 2279103604Sgrehan /* 2280103604Sgrehan * Return immediately if not a valid mapping 2281103604Sgrehan */ 2282103604Sgrehan if (!battable[idx].batu & BAT_Vs) 2283103604Sgrehan return (EINVAL); 2284103604Sgrehan 2285103604Sgrehan /* 2286103604Sgrehan * The BAT entry must be cache-inhibited, guarded, and r/w 2287103604Sgrehan * so it can function as an i/o page 2288103604Sgrehan */ 2289103604Sgrehan prot = battable[idx].batl & (BAT_I|BAT_G|BAT_PP_RW); 2290103604Sgrehan if (prot != (BAT_I|BAT_G|BAT_PP_RW)) 2291103604Sgrehan return (EPERM); 2292103604Sgrehan 2293103604Sgrehan /* 2294103604Sgrehan * The address should be within the BAT range. Assume that the 2295103604Sgrehan * start address in the BAT has the correct alignment (thus 2296103604Sgrehan * not requiring masking) 2297103604Sgrehan */ 2298103604Sgrehan start = battable[idx].batl & BAT_PBS; 2299103604Sgrehan bat_ble = (battable[idx].batu & ~(BAT_EBS)) | 0x03; 2300103604Sgrehan end = start | (bat_ble << 15) | 0x7fff; 2301103604Sgrehan 2302103604Sgrehan if ((pa < start) || ((pa + size) > end)) 2303103604Sgrehan return (ERANGE); 2304103604Sgrehan 2305103604Sgrehan return (0); 2306103604Sgrehan} 2307103604Sgrehan 2308103604Sgrehan 2309103604Sgrehan/* 231099038Sbenno * Map a set of physical memory pages into the kernel virtual 231199038Sbenno * address space. Return a pointer to where it is mapped. This 231299038Sbenno * routine is intended to be used for mapping device memory, 231399038Sbenno * NOT real memory. 231499038Sbenno */ 231599038Sbennovoid * 231699038Sbennopmap_mapdev(vm_offset_t pa, vm_size_t size) 231799038Sbenno{ 2318103604Sgrehan vm_offset_t va, tmpva, ppa, offset; 2319103604Sgrehan int i; 2320103604Sgrehan 2321103604Sgrehan ppa = trunc_page(pa); 232299038Sbenno offset = pa & PAGE_MASK; 232399038Sbenno size = roundup(offset + size, PAGE_SIZE); 232499038Sbenno 232599038Sbenno GIANT_REQUIRED; 232699038Sbenno 2327103604Sgrehan /* 2328103604Sgrehan * If the physical address lies within a valid BAT table entry, 2329103604Sgrehan * return the 1:1 mapping. This currently doesn't work 2330103604Sgrehan * for regions that overlap 256M BAT segments. 2331103604Sgrehan */ 2332103604Sgrehan for (i = 0; i < 16; i++) { 2333103604Sgrehan if (pmap_bat_mapped(i, pa, size) == 0) 2334103604Sgrehan return ((void *) pa); 2335103604Sgrehan } 2336103604Sgrehan 2337118365Salc va = kmem_alloc_nofault(kernel_map, size); 233899038Sbenno if (!va) 233999038Sbenno panic("pmap_mapdev: Couldn't alloc kernel virtual memory"); 234099038Sbenno 234199038Sbenno for (tmpva = va; size > 0;) { 2342103604Sgrehan pmap_kenter(tmpva, ppa); 234399038Sbenno TLBIE(tmpva); /* XXX or should it be invalidate-all ? */ 234499038Sbenno size -= PAGE_SIZE; 234599038Sbenno tmpva += PAGE_SIZE; 2346103604Sgrehan ppa += PAGE_SIZE; 234799038Sbenno } 234899038Sbenno 234999038Sbenno return ((void *)(va + offset)); 235099038Sbenno} 235199038Sbenno 235299038Sbennovoid 235399038Sbennopmap_unmapdev(vm_offset_t va, vm_size_t size) 235499038Sbenno{ 235599038Sbenno vm_offset_t base, offset; 235699038Sbenno 2357103604Sgrehan /* 2358103604Sgrehan * If this is outside kernel virtual space, then it's a 2359103604Sgrehan * battable entry and doesn't require unmapping 2360103604Sgrehan */ 2361103604Sgrehan if ((va >= VM_MIN_KERNEL_ADDRESS) && (va <= VM_MAX_KERNEL_ADDRESS)) { 2362103604Sgrehan base = trunc_page(va); 2363103604Sgrehan offset = va & PAGE_MASK; 2364103604Sgrehan size = roundup(offset + size, PAGE_SIZE); 2365103604Sgrehan kmem_free(kernel_map, base, size); 2366103604Sgrehan } 236799038Sbenno} 2368