1219820Sjeff/* 2219820Sjeff * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved. 3219820Sjeff * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved. 4219820Sjeff * Copyright (c) 2005, 2006, 2007, 2008 Mellanox Technologies. All rights reserved. 5219820Sjeff * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved. 6219820Sjeff * 7219820Sjeff * This software is available to you under a choice of one of two 8219820Sjeff * licenses. You may choose to be licensed under the terms of the GNU 9219820Sjeff * General Public License (GPL) Version 2, available from the file 10219820Sjeff * COPYING in the main directory of this source tree, or the 11219820Sjeff * OpenIB.org BSD license below: 12219820Sjeff * 13219820Sjeff * Redistribution and use in source and binary forms, with or 14219820Sjeff * without modification, are permitted provided that the following 15219820Sjeff * conditions are met: 16219820Sjeff * 17219820Sjeff * - Redistributions of source code must retain the above 18219820Sjeff * copyright notice, this list of conditions and the following 19219820Sjeff * disclaimer. 20219820Sjeff * 21219820Sjeff * - Redistributions in binary form must reproduce the above 22219820Sjeff * copyright notice, this list of conditions and the following 23219820Sjeff * disclaimer in the documentation and/or other materials 24219820Sjeff * provided with the distribution. 25219820Sjeff * 26219820Sjeff * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 27219820Sjeff * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 28219820Sjeff * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 29219820Sjeff * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 30219820Sjeff * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 31219820Sjeff * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 32219820Sjeff * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 33219820Sjeff * SOFTWARE. 34219820Sjeff */ 35219820Sjeff 36219820Sjeff#include <linux/module.h> 37219820Sjeff#include <linux/init.h> 38219820Sjeff#include <linux/errno.h> 39219820Sjeff#include <linux/pci.h> 40219820Sjeff#include <linux/dma-mapping.h> 41255932Salfred#include <linux/slab.h> 42219820Sjeff#include <linux/io-mapping.h> 43255932Salfred#include <linux/delay.h> 44255932Salfred#include <linux/netdevice.h> 45219820Sjeff 46219820Sjeff#include <linux/mlx4/device.h> 47219820Sjeff#include <linux/mlx4/doorbell.h> 48219820Sjeff 49219820Sjeff#include "mlx4.h" 50219820Sjeff#include "fw.h" 51219820Sjeff#include "icm.h" 52219820Sjeff 53219820SjeffMODULE_AUTHOR("Roland Dreier"); 54219820SjeffMODULE_DESCRIPTION("Mellanox ConnectX HCA low-level driver"); 55219820SjeffMODULE_LICENSE("Dual BSD/GPL"); 56219820SjeffMODULE_VERSION(DRV_VERSION); 57219820Sjeff 58219820Sjeffstruct workqueue_struct *mlx4_wq; 59219820Sjeff 60219820Sjeff#ifdef CONFIG_MLX4_DEBUG 61219820Sjeff 62219820Sjeffint mlx4_debug_level = 0; 63219820Sjeffmodule_param_named(debug_level, mlx4_debug_level, int, 0644); 64219820SjeffMODULE_PARM_DESC(debug_level, "Enable debug tracing if > 0"); 65219820Sjeff 66219820Sjeff#endif /* CONFIG_MLX4_DEBUG */ 67219820Sjeff 68219820Sjeff#ifdef CONFIG_PCI_MSI 69219820Sjeff 70219820Sjeffstatic int msi_x = 1; 71219820Sjeffmodule_param(msi_x, int, 0444); 72219820SjeffMODULE_PARM_DESC(msi_x, "attempt to use MSI-X if nonzero"); 73219820Sjeff 74219820Sjeff#else /* CONFIG_PCI_MSI */ 75219820Sjeff 76219820Sjeff#define msi_x (0) 77219820Sjeff 78219820Sjeff#endif /* CONFIG_PCI_MSI */ 79219820Sjeff 80255932Salfredstatic int enable_sys_tune = 0; 81255932Salfredmodule_param(enable_sys_tune, int, 0444); 82255932SalfredMODULE_PARM_DESC(enable_sys_tune, "Tune the cpu's for better performance (default 0)"); 83255932Salfred 84255932Salfredint mlx4_blck_lb = 1; 85255932Salfredmodule_param_named(block_loopback, mlx4_blck_lb, int, 0644); 86255932SalfredMODULE_PARM_DESC(block_loopback, "Block multicast loopback packets if > 0 " 87255932Salfred "(default: 1)"); 88255932Salfred 89255932Salfredstatic int num_vfs; 90255932Salfredmodule_param(num_vfs, int, 0444); 91255932SalfredMODULE_PARM_DESC(num_vfs, "enable #num_vfs functions if num_vfs > 0"); 92255932Salfred 93255932Salfredstatic int probe_vf; 94255932Salfredmodule_param(probe_vf, int, 0644); 95255932SalfredMODULE_PARM_DESC(probe_vf, "number of vfs to probe by pf driver (num_vfs > 0)"); 96255932Salfred 97255932Salfredint mlx4_log_num_mgm_entry_size = MLX4_DEFAULT_MGM_LOG_ENTRY_SIZE; 98255932Salfred 99255932Salfredmodule_param_named(log_num_mgm_entry_size, 100255932Salfred mlx4_log_num_mgm_entry_size, int, 0444); 101255932SalfredMODULE_PARM_DESC(log_num_mgm_entry_size, "log mgm size, that defines the num" 102255932Salfred " of qp per mcg, for example:" 103255932Salfred " 10 gives 248.range: 7 <=" 104255932Salfred " log_num_mgm_entry_size <= 12." 105255932Salfred " To activate device managed" 106255932Salfred " flow steering when available, set to -1"); 107255932Salfred 108255932Salfredstatic int high_rate_steer; 109255932Salfredmodule_param(high_rate_steer, int, 0444); 110255932SalfredMODULE_PARM_DESC(high_rate_steer, "Enable steering mode for higher packet rate" 111255932Salfred " (default off)"); 112255932Salfred 113255932Salfredstatic int fast_drop; 114255932Salfredmodule_param_named(fast_drop, fast_drop, int, 0444); 115255932SalfredMODULE_PARM_DESC(fast_drop, 116255932Salfred "Enable fast packet drop when no recieve WQEs are posted"); 117255932Salfred 118255932Salfredint mlx4_enable_64b_cqe_eqe; 119255932Salfredmodule_param_named(enable_64b_cqe_eqe, mlx4_enable_64b_cqe_eqe, int, 0644); 120255932SalfredMODULE_PARM_DESC(enable_64b_cqe_eqe, 121255932Salfred "Enable 64 byte CQEs/EQEs when the the FW supports this, if nonzero"); 122255932Salfred 123255932Salfred#define HCA_GLOBAL_CAP_MASK 0 124255932Salfred 125255932Salfred#define PF_CONTEXT_BEHAVIOUR_MASK MLX4_FUNC_CAP_64B_EQE_CQE 126255932Salfred 127219820Sjeffstatic char mlx4_version[] __devinitdata = 128219820Sjeff DRV_NAME ": Mellanox ConnectX core driver v" 129219820Sjeff DRV_VERSION " (" DRV_RELDATE ")\n"; 130219820Sjeff 131255932Salfredstatic int log_num_mac = 7; 132219820Sjeffmodule_param_named(log_num_mac, log_num_mac, int, 0444); 133219820SjeffMODULE_PARM_DESC(log_num_mac, "Log2 max number of MACs per ETH port (1-7)"); 134219820Sjeff 135255932Salfredstatic int log_num_vlan; 136255932Salfredmodule_param_named(log_num_vlan, log_num_vlan, int, 0444); 137255932SalfredMODULE_PARM_DESC(log_num_vlan, 138255932Salfred "(Obsolete) Log2 max number of VLANs per ETH port (0-7)"); 139255932Salfred/* Log2 max number of VLANs per ETH port (0-7) */ 140255932Salfred#define MLX4_LOG_NUM_VLANS 7 141219820Sjeff 142255932Salfredint log_mtts_per_seg = ilog2(1); 143255932Salfredmodule_param_named(log_mtts_per_seg, log_mtts_per_seg, int, 0444); 144255932SalfredMODULE_PARM_DESC(log_mtts_per_seg, "Log2 number of MTT entries per segment " 145255932Salfred "(0-7) (default: 0)"); 146219820Sjeff 147255932Salfredstatic int port_type_array[2] = {MLX4_PORT_TYPE_NONE, MLX4_PORT_TYPE_NONE}; 148255932Salfred#if 0 149255932Salfredstatic int arr_argc = 2; 150255932Salfredmodule_param_array(port_type_array, int, &arr_argc, 0444); 151255932SalfredMODULE_PARM_DESC(port_type_array, "Array of port types: HW_DEFAULT (0) is default " 152255932Salfred "1 for IB, 2 for Ethernet"); 153255932Salfred#endif 154255932Salfred 155255932Salfredstruct mlx4_port_config { 156255932Salfred struct list_head list; 157255932Salfred enum mlx4_port_type port_type[MLX4_MAX_PORTS + 1]; 158255932Salfred struct pci_dev *pdev; 159255932Salfred}; 160255932Salfred 161255932Salfred#define MLX4_LOG_NUM_MTT 20 162255932Salfred/* We limit to 30 as of a bit map issue which uses int and not uint. 163255932Salfred see mlx4_buddy_init -> bitmap_zero which gets int. 164255932Salfred*/ 165255932Salfred#define MLX4_MAX_LOG_NUM_MTT 30 166255932Salfredstatic struct mlx4_profile mod_param_profile = { 167255932Salfred .num_qp = 19, 168255932Salfred .num_srq = 16, 169255932Salfred .rdmarc_per_qp = 4, 170255932Salfred .num_cq = 16, 171255932Salfred .num_mcg = 13, 172255932Salfred .num_mpt = 19, 173255932Salfred .num_mtt = 0, /* max(20, 2*MTTs for host memory)) */ 174255932Salfred}; 175255932Salfred 176219820Sjeffmodule_param_named(log_num_qp, mod_param_profile.num_qp, int, 0444); 177255932SalfredMODULE_PARM_DESC(log_num_qp, "log maximum number of QPs per HCA (default: 19)"); 178219820Sjeff 179219820Sjeffmodule_param_named(log_num_srq, mod_param_profile.num_srq, int, 0444); 180255932SalfredMODULE_PARM_DESC(log_num_srq, "log maximum number of SRQs per HCA " 181255932Salfred "(default: 16)"); 182219820Sjeff 183255932Salfredmodule_param_named(log_rdmarc_per_qp, mod_param_profile.rdmarc_per_qp, int, 184255932Salfred 0444); 185255932SalfredMODULE_PARM_DESC(log_rdmarc_per_qp, "log number of RDMARC buffers per QP " 186255932Salfred "(default: 4)"); 187219820Sjeff 188219820Sjeffmodule_param_named(log_num_cq, mod_param_profile.num_cq, int, 0444); 189255932SalfredMODULE_PARM_DESC(log_num_cq, "log maximum number of CQs per HCA (default: 16)"); 190219820Sjeff 191219820Sjeffmodule_param_named(log_num_mcg, mod_param_profile.num_mcg, int, 0444); 192255932SalfredMODULE_PARM_DESC(log_num_mcg, "log maximum number of multicast groups per HCA " 193255932Salfred "(default: 13)"); 194219820Sjeff 195219820Sjeffmodule_param_named(log_num_mpt, mod_param_profile.num_mpt, int, 0444); 196219820SjeffMODULE_PARM_DESC(log_num_mpt, 197255932Salfred "log maximum number of memory protection table entries per " 198255932Salfred "HCA (default: 19)"); 199219820Sjeff 200219820Sjeffmodule_param_named(log_num_mtt, mod_param_profile.num_mtt, int, 0444); 201219820SjeffMODULE_PARM_DESC(log_num_mtt, 202255932Salfred "log maximum number of memory translation table segments per " 203255932Salfred "HCA (default: max(20, 2*MTTs for register all of the host memory limited to 30))"); 204219820Sjeff 205255932Salfredenum { 206255932Salfred MLX4_IF_STATE_BASIC, 207255932Salfred MLX4_IF_STATE_EXTENDED 208255932Salfred}; 209255932Salfredstatic void process_mod_param_profile(struct mlx4_profile *profile) 210219820Sjeff{ 211219820Sjeff 212255932Salfred vm_size_t hwphyssz; 213255932Salfred hwphyssz = 0; 214255932Salfred TUNABLE_ULONG_FETCH("hw.realmem", (u_long *) &hwphyssz); 215219820Sjeff 216255932Salfred profile->num_qp = 1 << mod_param_profile.num_qp; 217255932Salfred profile->num_srq = 1 << mod_param_profile.num_srq; 218255932Salfred profile->rdmarc_per_qp = 1 << mod_param_profile.rdmarc_per_qp; 219255932Salfred profile->num_cq = 1 << mod_param_profile.num_cq; 220255932Salfred profile->num_mcg = 1 << mod_param_profile.num_mcg; 221255932Salfred profile->num_mpt = 1 << mod_param_profile.num_mpt; 222255932Salfred /* 223255932Salfred * We want to scale the number of MTTs with the size of the 224255932Salfred * system memory, since it makes sense to register a lot of 225255932Salfred * memory on a system with a lot of memory. As a heuristic, 226255932Salfred * make sure we have enough MTTs to register twice the system 227255932Salfred * memory (with PAGE_SIZE entries). 228255932Salfred * 229255932Salfred * This number has to be a power of two and fit into 32 bits 230255932Salfred * due to device limitations. We cap this at 2^30 as of bit map 231255932Salfred * limitation to work with int instead of uint (mlx4_buddy_init -> bitmap_zero) 232255932Salfred * That limits us to 4TB of memory registration per HCA with 233255932Salfred * 4KB pages, which is probably OK for the next few months. 234255932Salfred */ 235255932Salfred if (mod_param_profile.num_mtt) 236255932Salfred profile->num_mtt = 1 << mod_param_profile.num_mtt; 237255932Salfred else { 238255932Salfred profile->num_mtt = 239255932Salfred roundup_pow_of_two(max_t(unsigned, 240255932Salfred 1 << (MLX4_LOG_NUM_MTT - log_mtts_per_seg), 241255932Salfred min(1UL << 242255932Salfred (MLX4_MAX_LOG_NUM_MTT - 243255932Salfred log_mtts_per_seg), 244255932Salfred (hwphyssz << 1) 245255932Salfred >> log_mtts_per_seg))); 246255932Salfred /* set the actual value, so it will be reflected to the user 247255932Salfred using the sysfs */ 248255932Salfred mod_param_profile.num_mtt = ilog2(profile->num_mtt * (1 << log_mtts_per_seg)); 249219820Sjeff } 250219820Sjeff} 251219820Sjeff 252219820Sjeffint mlx4_check_port_params(struct mlx4_dev *dev, 253219820Sjeff enum mlx4_port_type *port_type) 254219820Sjeff{ 255219820Sjeff int i; 256219820Sjeff 257219820Sjeff for (i = 0; i < dev->caps.num_ports - 1; i++) { 258219820Sjeff if (port_type[i] != port_type[i + 1]) { 259219820Sjeff if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_DPDP)) { 260219820Sjeff mlx4_err(dev, "Only same port types supported " 261219820Sjeff "on this HCA, aborting.\n"); 262219820Sjeff return -EINVAL; 263219820Sjeff } 264219820Sjeff } 265219820Sjeff } 266219820Sjeff 267219820Sjeff for (i = 0; i < dev->caps.num_ports; i++) { 268219820Sjeff if (!(port_type[i] & dev->caps.supported_type[i+1])) { 269219820Sjeff mlx4_err(dev, "Requested port type for port %d is not " 270219820Sjeff "supported on this HCA\n", i + 1); 271219820Sjeff return -EINVAL; 272219820Sjeff } 273219820Sjeff } 274219820Sjeff return 0; 275219820Sjeff} 276219820Sjeff 277219820Sjeffstatic void mlx4_set_port_mask(struct mlx4_dev *dev) 278219820Sjeff{ 279219820Sjeff int i; 280219820Sjeff 281219820Sjeff for (i = 1; i <= dev->caps.num_ports; ++i) 282219820Sjeff dev->caps.port_mask[i] = dev->caps.port_type[i]; 283219820Sjeff} 284219820Sjeff 285219820Sjeffstatic int mlx4_dev_cap(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap) 286219820Sjeff{ 287219820Sjeff int err; 288219820Sjeff int i; 289219820Sjeff 290219820Sjeff err = mlx4_QUERY_DEV_CAP(dev, dev_cap); 291219820Sjeff if (err) { 292219820Sjeff mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting.\n"); 293219820Sjeff return err; 294219820Sjeff } 295219820Sjeff 296219820Sjeff if (dev_cap->min_page_sz > PAGE_SIZE) { 297219820Sjeff mlx4_err(dev, "HCA minimum page size of %d bigger than " 298219820Sjeff "kernel PAGE_SIZE of %d, aborting.\n", 299219820Sjeff dev_cap->min_page_sz, PAGE_SIZE); 300219820Sjeff return -ENODEV; 301219820Sjeff } 302219820Sjeff if (dev_cap->num_ports > MLX4_MAX_PORTS) { 303219820Sjeff mlx4_err(dev, "HCA has %d ports, but we only support %d, " 304219820Sjeff "aborting.\n", 305219820Sjeff dev_cap->num_ports, MLX4_MAX_PORTS); 306219820Sjeff return -ENODEV; 307219820Sjeff } 308219820Sjeff 309219820Sjeff if (dev_cap->uar_size > pci_resource_len(dev->pdev, 2)) { 310219820Sjeff mlx4_err(dev, "HCA reported UAR size of 0x%x bigger than " 311219820Sjeff "PCI resource 2 size of 0x%llx, aborting.\n", 312219820Sjeff dev_cap->uar_size, 313219820Sjeff (unsigned long long) pci_resource_len(dev->pdev, 2)); 314219820Sjeff return -ENODEV; 315219820Sjeff } 316219820Sjeff 317219820Sjeff dev->caps.num_ports = dev_cap->num_ports; 318255932Salfred dev->phys_caps.num_phys_eqs = MLX4_MAX_EQ_NUM; 319219820Sjeff for (i = 1; i <= dev->caps.num_ports; ++i) { 320219820Sjeff dev->caps.vl_cap[i] = dev_cap->max_vl[i]; 321219820Sjeff dev->caps.ib_mtu_cap[i] = dev_cap->ib_mtu[i]; 322255932Salfred dev->phys_caps.gid_phys_table_len[i] = dev_cap->max_gids[i]; 323255932Salfred dev->phys_caps.pkey_phys_table_len[i] = dev_cap->max_pkeys[i]; 324255932Salfred /* set gid and pkey table operating lengths by default 325255932Salfred * to non-sriov values */ 326219820Sjeff dev->caps.gid_table_len[i] = dev_cap->max_gids[i]; 327219820Sjeff dev->caps.pkey_table_len[i] = dev_cap->max_pkeys[i]; 328219820Sjeff dev->caps.port_width_cap[i] = dev_cap->max_port_width[i]; 329219820Sjeff dev->caps.eth_mtu_cap[i] = dev_cap->eth_mtu[i]; 330219820Sjeff dev->caps.def_mac[i] = dev_cap->def_mac[i]; 331219820Sjeff dev->caps.supported_type[i] = dev_cap->supported_port_types[i]; 332255932Salfred dev->caps.suggested_type[i] = dev_cap->suggested_type[i]; 333255932Salfred dev->caps.default_sense[i] = dev_cap->default_sense[i]; 334219820Sjeff dev->caps.trans_type[i] = dev_cap->trans_type[i]; 335219820Sjeff dev->caps.vendor_oui[i] = dev_cap->vendor_oui[i]; 336219820Sjeff dev->caps.wavelength[i] = dev_cap->wavelength[i]; 337219820Sjeff dev->caps.trans_code[i] = dev_cap->trans_code[i]; 338219820Sjeff } 339219820Sjeff 340255932Salfred dev->caps.uar_page_size = PAGE_SIZE; 341219820Sjeff dev->caps.num_uars = dev_cap->uar_size / PAGE_SIZE; 342219820Sjeff dev->caps.local_ca_ack_delay = dev_cap->local_ca_ack_delay; 343219820Sjeff dev->caps.bf_reg_size = dev_cap->bf_reg_size; 344219820Sjeff dev->caps.bf_regs_per_page = dev_cap->bf_regs_per_page; 345219820Sjeff dev->caps.max_sq_sg = dev_cap->max_sq_sg; 346219820Sjeff dev->caps.max_rq_sg = dev_cap->max_rq_sg; 347219820Sjeff dev->caps.max_wqes = dev_cap->max_qp_sz; 348219820Sjeff dev->caps.max_qp_init_rdma = dev_cap->max_requester_per_qp; 349219820Sjeff dev->caps.max_srq_wqes = dev_cap->max_srq_sz; 350219820Sjeff dev->caps.max_srq_sge = dev_cap->max_rq_sg - 1; 351219820Sjeff dev->caps.reserved_srqs = dev_cap->reserved_srqs; 352219820Sjeff dev->caps.max_sq_desc_sz = dev_cap->max_sq_desc_sz; 353219820Sjeff dev->caps.max_rq_desc_sz = dev_cap->max_rq_desc_sz; 354219820Sjeff /* 355219820Sjeff * Subtract 1 from the limit because we need to allocate a 356255932Salfred * spare CQE to enable resizing the CQ 357219820Sjeff */ 358219820Sjeff dev->caps.max_cqes = dev_cap->max_cq_sz - 1; 359219820Sjeff dev->caps.reserved_cqs = dev_cap->reserved_cqs; 360219820Sjeff dev->caps.reserved_eqs = dev_cap->reserved_eqs; 361255932Salfred dev->caps.reserved_mtts = dev_cap->reserved_mtts; 362219820Sjeff dev->caps.reserved_mrws = dev_cap->reserved_mrws; 363255932Salfred 364255932Salfred /* The first 128 UARs are used for EQ doorbells */ 365255932Salfred dev->caps.reserved_uars = max_t(int, 128, dev_cap->reserved_uars); 366219820Sjeff dev->caps.reserved_pds = dev_cap->reserved_pds; 367255932Salfred dev->caps.reserved_xrcds = (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) ? 368255932Salfred dev_cap->reserved_xrcds : 0; 369255932Salfred dev->caps.max_xrcds = (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) ? 370255932Salfred dev_cap->max_xrcds : 0; 371255932Salfred dev->caps.mtt_entry_sz = dev_cap->mtt_entry_sz; 372255932Salfred 373219820Sjeff dev->caps.max_msg_sz = dev_cap->max_msg_sz; 374219820Sjeff dev->caps.page_size_cap = ~(u32) (dev_cap->min_page_sz - 1); 375219820Sjeff dev->caps.flags = dev_cap->flags; 376255932Salfred dev->caps.flags2 = dev_cap->flags2; 377219820Sjeff dev->caps.bmme_flags = dev_cap->bmme_flags; 378219820Sjeff dev->caps.reserved_lkey = dev_cap->reserved_lkey; 379219820Sjeff dev->caps.stat_rate_support = dev_cap->stat_rate_support; 380255932Salfred dev->caps.cq_timestamp = dev_cap->timestamp_support; 381219820Sjeff dev->caps.max_gso_sz = dev_cap->max_gso_sz; 382255932Salfred dev->caps.max_rss_tbl_sz = dev_cap->max_rss_tbl_sz; 383219820Sjeff 384255932Salfred /* Sense port always allowed on supported devices for ConnectX-1 and -2 */ 385255932Salfred if (mlx4_priv(dev)->pci_dev_data & MLX4_PCI_DEV_FORCE_SENSE_PORT) 386255932Salfred dev->caps.flags |= MLX4_DEV_CAP_FLAG_SENSE_SUPPORT; 387255932Salfred /* Don't do sense port on multifunction devices (for now at least) */ 388255932Salfred if (mlx4_is_mfunc(dev)) 389255932Salfred dev->caps.flags &= ~MLX4_DEV_CAP_FLAG_SENSE_SUPPORT; 390255932Salfred 391219820Sjeff dev->caps.log_num_macs = log_num_mac; 392255932Salfred dev->caps.log_num_vlans = MLX4_LOG_NUM_VLANS; 393219820Sjeff 394255932Salfred dev->caps.fast_drop = fast_drop ? 395255932Salfred !!(dev->caps.flags & MLX4_DEV_CAP_FLAG_FAST_DROP) : 396255932Salfred 0; 397255932Salfred 398219820Sjeff for (i = 1; i <= dev->caps.num_ports; ++i) { 399219820Sjeff dev->caps.port_type[i] = MLX4_PORT_TYPE_NONE; 400219820Sjeff if (dev->caps.supported_type[i]) { 401255932Salfred /* if only ETH is supported - assign ETH */ 402255932Salfred if (dev->caps.supported_type[i] == MLX4_PORT_TYPE_ETH) 403255932Salfred dev->caps.port_type[i] = MLX4_PORT_TYPE_ETH; 404255932Salfred /* if only IB is supported, assign IB */ 405255932Salfred else if (dev->caps.supported_type[i] == 406255932Salfred MLX4_PORT_TYPE_IB) 407219820Sjeff dev->caps.port_type[i] = MLX4_PORT_TYPE_IB; 408255932Salfred else { 409255932Salfred /* if IB and ETH are supported, we set the port 410255932Salfred * type according to user selection of port type; 411255932Salfred * if user selected none, take the FW hint */ 412255932Salfred if (port_type_array[i - 1] == MLX4_PORT_TYPE_NONE) 413255932Salfred dev->caps.port_type[i] = dev->caps.suggested_type[i] ? 414255932Salfred MLX4_PORT_TYPE_ETH : MLX4_PORT_TYPE_IB; 415255932Salfred else 416255932Salfred dev->caps.port_type[i] = port_type_array[i - 1]; 417255932Salfred } 418219820Sjeff } 419255932Salfred /* 420255932Salfred * Link sensing is allowed on the port if 3 conditions are true: 421255932Salfred * 1. Both protocols are supported on the port. 422255932Salfred * 2. Different types are supported on the port 423255932Salfred * 3. FW declared that it supports link sensing 424255932Salfred */ 425219820Sjeff mlx4_priv(dev)->sense.sense_allowed[i] = 426255932Salfred ((dev->caps.supported_type[i] == MLX4_PORT_TYPE_AUTO) && 427255932Salfred (dev->caps.flags & MLX4_DEV_CAP_FLAG_DPDP) && 428255932Salfred (dev->caps.flags & MLX4_DEV_CAP_FLAG_SENSE_SUPPORT)); 429219820Sjeff 430255932Salfred /* 431255932Salfred * If "default_sense" bit is set, we move the port to "AUTO" mode 432255932Salfred * and perform sense_port FW command to try and set the correct 433255932Salfred * port type from beginning 434255932Salfred */ 435255932Salfred if (mlx4_priv(dev)->sense.sense_allowed[i] && dev->caps.default_sense[i]) { 436255932Salfred enum mlx4_port_type sensed_port = MLX4_PORT_TYPE_NONE; 437255932Salfred dev->caps.possible_type[i] = MLX4_PORT_TYPE_AUTO; 438255932Salfred mlx4_SENSE_PORT(dev, i, &sensed_port); 439255932Salfred if (sensed_port != MLX4_PORT_TYPE_NONE) 440255932Salfred dev->caps.port_type[i] = sensed_port; 441255932Salfred } else { 442255932Salfred dev->caps.possible_type[i] = dev->caps.port_type[i]; 443255932Salfred } 444255932Salfred 445219820Sjeff if (dev->caps.log_num_macs > dev_cap->log_max_macs[i]) { 446219820Sjeff dev->caps.log_num_macs = dev_cap->log_max_macs[i]; 447219820Sjeff mlx4_warn(dev, "Requested number of MACs is too much " 448219820Sjeff "for port %d, reducing to %d.\n", 449219820Sjeff i, 1 << dev->caps.log_num_macs); 450219820Sjeff } 451255932Salfred if (dev->caps.log_num_vlans > dev_cap->log_max_vlans[i]) { 452255932Salfred dev->caps.log_num_vlans = dev_cap->log_max_vlans[i]; 453255932Salfred mlx4_warn(dev, "Requested number of VLANs is too much " 454255932Salfred "for port %d, reducing to %d.\n", 455255932Salfred i, 1 << dev->caps.log_num_vlans); 456255932Salfred } 457219820Sjeff } 458219820Sjeff 459255932Salfred dev->caps.max_basic_counters = dev_cap->max_basic_counters; 460255932Salfred dev->caps.max_extended_counters = dev_cap->max_extended_counters; 461255932Salfred /* support extended counters if available */ 462255932Salfred if (dev->caps.flags & MLX4_DEV_CAP_FLAG_COUNTERS_EXT) 463255932Salfred dev->caps.max_counters = dev->caps.max_extended_counters; 464255932Salfred else 465255932Salfred dev->caps.max_counters = dev->caps.max_basic_counters; 466219820Sjeff 467219820Sjeff dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW] = dev_cap->reserved_qps; 468219820Sjeff dev->caps.reserved_qps_cnt[MLX4_QP_REGION_ETH_ADDR] = 469219820Sjeff dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_ADDR] = 470219820Sjeff (1 << dev->caps.log_num_macs) * 471219820Sjeff (1 << dev->caps.log_num_vlans) * 472219820Sjeff dev->caps.num_ports; 473255932Salfred dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_EXCH] = MLX4_NUM_FEXCH; 474219820Sjeff 475219820Sjeff dev->caps.reserved_qps = dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW] + 476219820Sjeff dev->caps.reserved_qps_cnt[MLX4_QP_REGION_ETH_ADDR] + 477255932Salfred dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_ADDR] + 478255932Salfred dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_EXCH]; 479219820Sjeff 480255932Salfred dev->caps.sync_qp = dev_cap->sync_qp; 481255932Salfred dev->caps.sqp_demux = (mlx4_is_master(dev)) ? MLX4_MAX_NUM_SLAVES : 0; 482255932Salfred 483255932Salfred if (!mlx4_enable_64b_cqe_eqe) { 484255932Salfred if (dev_cap->flags & 485255932Salfred (MLX4_DEV_CAP_FLAG_64B_CQE | MLX4_DEV_CAP_FLAG_64B_EQE)) { 486255932Salfred mlx4_warn(dev, "64B EQEs/CQEs supported by the device but not enabled\n"); 487255932Salfred dev->caps.flags &= ~MLX4_DEV_CAP_FLAG_64B_CQE; 488255932Salfred dev->caps.flags &= ~MLX4_DEV_CAP_FLAG_64B_EQE; 489255932Salfred } 490255932Salfred } 491255932Salfred 492255932Salfred if ((dev->caps.flags & 493255932Salfred (MLX4_DEV_CAP_FLAG_64B_CQE | MLX4_DEV_CAP_FLAG_64B_EQE)) && 494255932Salfred mlx4_is_master(dev)) 495255932Salfred dev->caps.function_caps |= MLX4_FUNC_CAP_64B_EQE_CQE; 496255932Salfred 497219820Sjeff return 0; 498219820Sjeff} 499255932Salfred/*The function checks if there are live vf, return the num of them*/ 500255932Salfredstatic int mlx4_how_many_lives_vf(struct mlx4_dev *dev) 501219820Sjeff{ 502255932Salfred struct mlx4_priv *priv = mlx4_priv(dev); 503255932Salfred struct mlx4_slave_state *s_state; 504219820Sjeff int i; 505255932Salfred int ret = 0; 506219820Sjeff 507255932Salfred for (i = 1/*the ppf is 0*/; i < dev->num_slaves; ++i) { 508255932Salfred s_state = &priv->mfunc.master.slave_state[i]; 509255932Salfred if (s_state->active && s_state->last_cmd != 510255932Salfred MLX4_COMM_CMD_RESET) { 511255932Salfred mlx4_warn(dev, "%s: slave: %d is still active\n", 512255932Salfred __func__, i); 513255932Salfred ret++; 514219820Sjeff } 515219820Sjeff } 516255932Salfred return ret; 517255932Salfred} 518219820Sjeff 519255932Salfredint mlx4_get_parav_qkey(struct mlx4_dev *dev, u32 qpn, u32 *qkey) 520255932Salfred{ 521255932Salfred u32 qk = MLX4_RESERVED_QKEY_BASE; 522219820Sjeff 523255932Salfred if (qpn >= dev->phys_caps.base_tunnel_sqpn + 8 * MLX4_MFUNC_MAX || 524255932Salfred qpn < dev->phys_caps.base_proxy_sqpn) 525255932Salfred return -EINVAL; 526219820Sjeff 527255932Salfred if (qpn >= dev->phys_caps.base_tunnel_sqpn) 528255932Salfred /* tunnel qp */ 529255932Salfred qk += qpn - dev->phys_caps.base_tunnel_sqpn; 530255932Salfred else 531255932Salfred qk += qpn - dev->phys_caps.base_proxy_sqpn; 532255932Salfred *qkey = qk; 533255932Salfred return 0; 534255932Salfred} 535255932SalfredEXPORT_SYMBOL(mlx4_get_parav_qkey); 536219820Sjeff 537255932Salfredvoid mlx4_sync_pkey_table(struct mlx4_dev *dev, int slave, int port, int i, int val) 538255932Salfred{ 539255932Salfred struct mlx4_priv *priv = container_of(dev, struct mlx4_priv, dev); 540255932Salfred 541255932Salfred if (!mlx4_is_master(dev)) 542255932Salfred return; 543255932Salfred 544255932Salfred priv->virt2phys_pkey[slave][port - 1][i] = val; 545255932Salfred} 546255932SalfredEXPORT_SYMBOL(mlx4_sync_pkey_table); 547255932Salfred 548255932Salfredvoid mlx4_put_slave_node_guid(struct mlx4_dev *dev, int slave, __be64 guid) 549255932Salfred{ 550255932Salfred struct mlx4_priv *priv = container_of(dev, struct mlx4_priv, dev); 551255932Salfred 552255932Salfred if (!mlx4_is_master(dev)) 553255932Salfred return; 554255932Salfred 555255932Salfred priv->slave_node_guids[slave] = guid; 556255932Salfred} 557255932SalfredEXPORT_SYMBOL(mlx4_put_slave_node_guid); 558255932Salfred 559255932Salfred__be64 mlx4_get_slave_node_guid(struct mlx4_dev *dev, int slave) 560255932Salfred{ 561255932Salfred struct mlx4_priv *priv = container_of(dev, struct mlx4_priv, dev); 562255932Salfred 563255932Salfred if (!mlx4_is_master(dev)) 564255932Salfred return 0; 565255932Salfred 566255932Salfred return priv->slave_node_guids[slave]; 567255932Salfred} 568255932SalfredEXPORT_SYMBOL(mlx4_get_slave_node_guid); 569255932Salfred 570255932Salfredint mlx4_is_slave_active(struct mlx4_dev *dev, int slave) 571255932Salfred{ 572255932Salfred struct mlx4_priv *priv = mlx4_priv(dev); 573255932Salfred struct mlx4_slave_state *s_slave; 574255932Salfred 575255932Salfred if (!mlx4_is_master(dev)) 576255932Salfred return 0; 577255932Salfred 578255932Salfred s_slave = &priv->mfunc.master.slave_state[slave]; 579255932Salfred return !!s_slave->active; 580255932Salfred} 581255932SalfredEXPORT_SYMBOL(mlx4_is_slave_active); 582255932Salfred 583255932Salfredstatic void slave_adjust_steering_mode(struct mlx4_dev *dev, 584255932Salfred struct mlx4_dev_cap *dev_cap, 585255932Salfred struct mlx4_init_hca_param *hca_param) 586255932Salfred{ 587255932Salfred dev->caps.steering_mode = hca_param->steering_mode; 588255932Salfred if (dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED) 589255932Salfred dev->caps.num_qp_per_mgm = dev_cap->fs_max_num_qp_per_entry; 590255932Salfred else 591255932Salfred dev->caps.num_qp_per_mgm = 592255932Salfred 4 * ((1 << hca_param->log_mc_entry_sz)/16 - 2); 593255932Salfred 594255932Salfred mlx4_dbg(dev, "Steering mode is: %s\n", 595255932Salfred mlx4_steering_mode_str(dev->caps.steering_mode)); 596255932Salfred} 597255932Salfred 598255932Salfredstatic int mlx4_slave_cap(struct mlx4_dev *dev) 599255932Salfred{ 600255932Salfred int err; 601255932Salfred u32 page_size; 602255932Salfred struct mlx4_dev_cap dev_cap; 603255932Salfred struct mlx4_func_cap func_cap; 604255932Salfred struct mlx4_init_hca_param hca_param; 605255932Salfred int i; 606255932Salfred 607255932Salfred memset(&hca_param, 0, sizeof(hca_param)); 608255932Salfred err = mlx4_QUERY_HCA(dev, &hca_param); 609255932Salfred if (err) { 610255932Salfred mlx4_err(dev, "QUERY_HCA command failed, aborting.\n"); 611255932Salfred return err; 612255932Salfred } 613255932Salfred 614255932Salfred /*fail if the hca has an unknown capability */ 615255932Salfred if ((hca_param.global_caps | HCA_GLOBAL_CAP_MASK) != 616255932Salfred HCA_GLOBAL_CAP_MASK) { 617255932Salfred mlx4_err(dev, "Unknown hca global capabilities\n"); 618255932Salfred return -ENOSYS; 619255932Salfred } 620255932Salfred 621255932Salfred mlx4_log_num_mgm_entry_size = hca_param.log_mc_entry_sz; 622255932Salfred 623255932Salfred dev->caps.hca_core_clock = hca_param.hca_core_clock; 624255932Salfred 625255932Salfred memset(&dev_cap, 0, sizeof(dev_cap)); 626255932Salfred dev->caps.max_qp_dest_rdma = 1 << hca_param.log_rd_per_qp; 627255932Salfred err = mlx4_dev_cap(dev, &dev_cap); 628255932Salfred if (err) { 629255932Salfred mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting.\n"); 630255932Salfred return err; 631255932Salfred } 632255932Salfred 633255932Salfred err = mlx4_QUERY_FW(dev); 634255932Salfred if (err) 635255932Salfred mlx4_err(dev, "QUERY_FW command failed: could not get FW version.\n"); 636255932Salfred 637255932Salfred page_size = ~dev->caps.page_size_cap + 1; 638255932Salfred mlx4_warn(dev, "HCA minimum page size:%d\n", page_size); 639255932Salfred if (page_size > PAGE_SIZE) { 640255932Salfred mlx4_err(dev, "HCA minimum page size of %d bigger than " 641255932Salfred "kernel PAGE_SIZE of %d, aborting.\n", 642255932Salfred page_size, PAGE_SIZE); 643255932Salfred return -ENODEV; 644255932Salfred } 645255932Salfred 646255932Salfred /* slave gets uar page size from QUERY_HCA fw command */ 647255932Salfred dev->caps.uar_page_size = 1 << (hca_param.uar_page_sz + 12); 648255932Salfred 649255932Salfred /* TODO: relax this assumption */ 650255932Salfred if (dev->caps.uar_page_size != PAGE_SIZE) { 651255932Salfred mlx4_err(dev, "UAR size:%d != kernel PAGE_SIZE of %d\n", 652255932Salfred dev->caps.uar_page_size, PAGE_SIZE); 653255932Salfred return -ENODEV; 654255932Salfred } 655255932Salfred 656255932Salfred memset(&func_cap, 0, sizeof(func_cap)); 657255932Salfred err = mlx4_QUERY_FUNC_CAP(dev, 0, &func_cap); 658255932Salfred if (err) { 659255932Salfred mlx4_err(dev, "QUERY_FUNC_CAP general command failed, aborting (%d).\n", 660255932Salfred err); 661255932Salfred return err; 662255932Salfred } 663255932Salfred 664255932Salfred if ((func_cap.pf_context_behaviour | PF_CONTEXT_BEHAVIOUR_MASK) != 665255932Salfred PF_CONTEXT_BEHAVIOUR_MASK) { 666255932Salfred mlx4_err(dev, "Unknown pf context behaviour\n"); 667255932Salfred return -ENOSYS; 668255932Salfred } 669255932Salfred 670255932Salfred dev->caps.num_ports = func_cap.num_ports; 671255932Salfred dev->quotas.qp = func_cap.qp_quota; 672255932Salfred dev->quotas.srq = func_cap.srq_quota; 673255932Salfred dev->quotas.cq = func_cap.cq_quota; 674255932Salfred dev->quotas.mpt = func_cap.mpt_quota; 675255932Salfred dev->quotas.mtt = func_cap.mtt_quota; 676255932Salfred dev->caps.num_qps = 1 << hca_param.log_num_qps; 677255932Salfred dev->caps.num_srqs = 1 << hca_param.log_num_srqs; 678255932Salfred dev->caps.num_cqs = 1 << hca_param.log_num_cqs; 679255932Salfred dev->caps.num_mpts = 1 << hca_param.log_mpt_sz; 680255932Salfred dev->caps.num_eqs = func_cap.max_eq; 681255932Salfred dev->caps.reserved_eqs = func_cap.reserved_eq; 682255932Salfred dev->caps.num_pds = MLX4_NUM_PDS; 683255932Salfred dev->caps.num_mgms = 0; 684255932Salfred dev->caps.num_amgms = 0; 685255932Salfred 686255932Salfred if (dev->caps.num_ports > MLX4_MAX_PORTS) { 687255932Salfred mlx4_err(dev, "HCA has %d ports, but we only support %d, " 688255932Salfred "aborting.\n", dev->caps.num_ports, MLX4_MAX_PORTS); 689255932Salfred return -ENODEV; 690255932Salfred } 691255932Salfred 692255932Salfred dev->caps.qp0_tunnel = kcalloc(dev->caps.num_ports, sizeof (u32), GFP_KERNEL); 693255932Salfred dev->caps.qp0_proxy = kcalloc(dev->caps.num_ports, sizeof (u32), GFP_KERNEL); 694255932Salfred dev->caps.qp1_tunnel = kcalloc(dev->caps.num_ports, sizeof (u32), GFP_KERNEL); 695255932Salfred dev->caps.qp1_proxy = kcalloc(dev->caps.num_ports, sizeof (u32), GFP_KERNEL); 696255932Salfred 697255932Salfred if (!dev->caps.qp0_tunnel || !dev->caps.qp0_proxy || 698255932Salfred !dev->caps.qp1_tunnel || !dev->caps.qp1_proxy) { 699255932Salfred err = -ENOMEM; 700255932Salfred goto err_mem; 701255932Salfred } 702255932Salfred 703255932Salfred for (i = 1; i <= dev->caps.num_ports; ++i) { 704255932Salfred err = mlx4_QUERY_FUNC_CAP(dev, (u32) i, &func_cap); 705255932Salfred if (err) { 706255932Salfred mlx4_err(dev, "QUERY_FUNC_CAP port command failed for" 707255932Salfred " port %d, aborting (%d).\n", i, err); 708255932Salfred goto err_mem; 709255932Salfred } 710255932Salfred dev->caps.qp0_tunnel[i - 1] = func_cap.qp0_tunnel_qpn; 711255932Salfred dev->caps.qp0_proxy[i - 1] = func_cap.qp0_proxy_qpn; 712255932Salfred dev->caps.qp1_tunnel[i - 1] = func_cap.qp1_tunnel_qpn; 713255932Salfred dev->caps.qp1_proxy[i - 1] = func_cap.qp1_proxy_qpn; 714255932Salfred dev->caps.port_mask[i] = dev->caps.port_type[i]; 715255932Salfred err = mlx4_get_slave_pkey_gid_tbl_len(dev, i, 716255932Salfred &dev->caps.gid_table_len[i], 717255932Salfred &dev->caps.pkey_table_len[i]); 718255932Salfred if (err) 719255932Salfred goto err_mem; 720255932Salfred } 721255932Salfred 722255932Salfred if (dev->caps.uar_page_size * (dev->caps.num_uars - 723255932Salfred dev->caps.reserved_uars) > 724255932Salfred pci_resource_len(dev->pdev, 2)) { 725255932Salfred mlx4_err(dev, "HCA reported UAR region size of 0x%x bigger than " 726255932Salfred "PCI resource 2 size of 0x%llx, aborting.\n", 727255932Salfred dev->caps.uar_page_size * dev->caps.num_uars, 728255932Salfred (unsigned long long) pci_resource_len(dev->pdev, 2)); 729255932Salfred err = -ENOMEM; 730255932Salfred goto err_mem; 731255932Salfred } 732255932Salfred 733255932Salfred if (hca_param.dev_cap_enabled & MLX4_DEV_CAP_64B_EQE_ENABLED) { 734255932Salfred dev->caps.eqe_size = 64; 735255932Salfred dev->caps.eqe_factor = 1; 736255932Salfred } else { 737255932Salfred dev->caps.eqe_size = 32; 738255932Salfred dev->caps.eqe_factor = 0; 739255932Salfred } 740255932Salfred 741255932Salfred if (hca_param.dev_cap_enabled & MLX4_DEV_CAP_64B_CQE_ENABLED) { 742255932Salfred dev->caps.cqe_size = 64; 743255932Salfred dev->caps.userspace_caps |= MLX4_USER_DEV_CAP_64B_CQE; 744255932Salfred } else { 745255932Salfred dev->caps.cqe_size = 32; 746255932Salfred } 747255932Salfred 748255932Salfred slave_adjust_steering_mode(dev, &dev_cap, &hca_param); 749255932Salfred 750219820Sjeff return 0; 751255932Salfred 752255932Salfrederr_mem: 753255932Salfred kfree(dev->caps.qp0_tunnel); 754255932Salfred kfree(dev->caps.qp0_proxy); 755255932Salfred kfree(dev->caps.qp1_tunnel); 756255932Salfred kfree(dev->caps.qp1_proxy); 757255932Salfred dev->caps.qp0_tunnel = dev->caps.qp0_proxy = 758255932Salfred dev->caps.qp1_tunnel = dev->caps.qp1_proxy = NULL; 759255932Salfred 760255932Salfred return err; 761219820Sjeff} 762219820Sjeff 763219820Sjeff/* 764219820Sjeff * Change the port configuration of the device. 765219820Sjeff * Every user of this function must hold the port mutex. 766219820Sjeff */ 767219820Sjeffint mlx4_change_port_types(struct mlx4_dev *dev, 768219820Sjeff enum mlx4_port_type *port_types) 769219820Sjeff{ 770219820Sjeff int err = 0; 771219820Sjeff int change = 0; 772219820Sjeff int port; 773219820Sjeff 774219820Sjeff for (port = 0; port < dev->caps.num_ports; port++) { 775219820Sjeff /* Change the port type only if the new type is different 776219820Sjeff * from the current, and not set to Auto */ 777255932Salfred if (port_types[port] != dev->caps.port_type[port + 1]) 778219820Sjeff change = 1; 779219820Sjeff } 780219820Sjeff if (change) { 781219820Sjeff mlx4_unregister_device(dev); 782219820Sjeff for (port = 1; port <= dev->caps.num_ports; port++) { 783219820Sjeff mlx4_CLOSE_PORT(dev, port); 784255932Salfred dev->caps.port_type[port] = port_types[port - 1]; 785255932Salfred err = mlx4_SET_PORT(dev, port, -1); 786219820Sjeff if (err) { 787219820Sjeff mlx4_err(dev, "Failed to set port %d, " 788219820Sjeff "aborting\n", port); 789219820Sjeff goto out; 790219820Sjeff } 791219820Sjeff } 792219820Sjeff mlx4_set_port_mask(dev); 793219820Sjeff err = mlx4_register_device(dev); 794219820Sjeff } 795219820Sjeff 796219820Sjeffout: 797219820Sjeff return err; 798219820Sjeff} 799219820Sjeff 800219820Sjeffstatic ssize_t show_port_type(struct device *dev, 801219820Sjeff struct device_attribute *attr, 802219820Sjeff char *buf) 803219820Sjeff{ 804219820Sjeff struct mlx4_port_info *info = container_of(attr, struct mlx4_port_info, 805219820Sjeff port_attr); 806219820Sjeff struct mlx4_dev *mdev = info->dev; 807219820Sjeff char type[8]; 808219820Sjeff 809219820Sjeff sprintf(type, "%s", 810219820Sjeff (mdev->caps.port_type[info->port] == MLX4_PORT_TYPE_IB) ? 811219820Sjeff "ib" : "eth"); 812219820Sjeff if (mdev->caps.possible_type[info->port] == MLX4_PORT_TYPE_AUTO) 813219820Sjeff sprintf(buf, "auto (%s)\n", type); 814219820Sjeff else 815219820Sjeff sprintf(buf, "%s\n", type); 816219820Sjeff 817219820Sjeff return strlen(buf); 818219820Sjeff} 819219820Sjeff 820219820Sjeffstatic ssize_t set_port_type(struct device *dev, 821219820Sjeff struct device_attribute *attr, 822219820Sjeff const char *buf, size_t count) 823219820Sjeff{ 824219820Sjeff struct mlx4_port_info *info = container_of(attr, struct mlx4_port_info, 825219820Sjeff port_attr); 826219820Sjeff struct mlx4_dev *mdev = info->dev; 827219820Sjeff struct mlx4_priv *priv = mlx4_priv(mdev); 828219820Sjeff enum mlx4_port_type types[MLX4_MAX_PORTS]; 829219820Sjeff enum mlx4_port_type new_types[MLX4_MAX_PORTS]; 830219820Sjeff int i; 831219820Sjeff int err = 0; 832219820Sjeff 833253449Sjhb if (!strcmp(buf, "ib\n")) 834219820Sjeff info->tmp_type = MLX4_PORT_TYPE_IB; 835253449Sjhb else if (!strcmp(buf, "eth\n")) 836219820Sjeff info->tmp_type = MLX4_PORT_TYPE_ETH; 837253449Sjhb else if (!strcmp(buf, "auto\n")) 838219820Sjeff info->tmp_type = MLX4_PORT_TYPE_AUTO; 839219820Sjeff else { 840219820Sjeff mlx4_err(mdev, "%s is not supported port type\n", buf); 841219820Sjeff return -EINVAL; 842219820Sjeff } 843219820Sjeff 844255932Salfred mlx4_stop_sense(mdev); 845219820Sjeff mutex_lock(&priv->port_mutex); 846219820Sjeff /* Possible type is always the one that was delivered */ 847219820Sjeff mdev->caps.possible_type[info->port] = info->tmp_type; 848219820Sjeff 849219820Sjeff for (i = 0; i < mdev->caps.num_ports; i++) { 850219820Sjeff types[i] = priv->port[i+1].tmp_type ? priv->port[i+1].tmp_type : 851219820Sjeff mdev->caps.possible_type[i+1]; 852219820Sjeff if (types[i] == MLX4_PORT_TYPE_AUTO) 853219820Sjeff types[i] = mdev->caps.port_type[i+1]; 854219820Sjeff } 855219820Sjeff 856255932Salfred if (!(mdev->caps.flags & MLX4_DEV_CAP_FLAG_DPDP) && 857255932Salfred !(mdev->caps.flags & MLX4_DEV_CAP_FLAG_SENSE_SUPPORT)) { 858219820Sjeff for (i = 1; i <= mdev->caps.num_ports; i++) { 859219820Sjeff if (mdev->caps.possible_type[i] == MLX4_PORT_TYPE_AUTO) { 860219820Sjeff mdev->caps.possible_type[i] = mdev->caps.port_type[i]; 861219820Sjeff err = -EINVAL; 862219820Sjeff } 863219820Sjeff } 864219820Sjeff } 865219820Sjeff if (err) { 866219820Sjeff mlx4_err(mdev, "Auto sensing is not supported on this HCA. " 867219820Sjeff "Set only 'eth' or 'ib' for both ports " 868219820Sjeff "(should be the same)\n"); 869219820Sjeff goto out; 870219820Sjeff } 871219820Sjeff 872219820Sjeff mlx4_do_sense_ports(mdev, new_types, types); 873219820Sjeff 874219820Sjeff err = mlx4_check_port_params(mdev, new_types); 875219820Sjeff if (err) 876219820Sjeff goto out; 877219820Sjeff 878219820Sjeff /* We are about to apply the changes after the configuration 879219820Sjeff * was verified, no need to remember the temporary types 880219820Sjeff * any more */ 881219820Sjeff for (i = 0; i < mdev->caps.num_ports; i++) 882219820Sjeff priv->port[i + 1].tmp_type = 0; 883219820Sjeff 884219820Sjeff err = mlx4_change_port_types(mdev, new_types); 885219820Sjeff 886219820Sjeffout: 887219820Sjeff mlx4_start_sense(mdev); 888219820Sjeff mutex_unlock(&priv->port_mutex); 889219820Sjeff return err ? err : count; 890219820Sjeff} 891219820Sjeff 892255932Salfredenum ibta_mtu { 893255932Salfred IB_MTU_256 = 1, 894255932Salfred IB_MTU_512 = 2, 895255932Salfred IB_MTU_1024 = 3, 896255932Salfred IB_MTU_2048 = 4, 897255932Salfred IB_MTU_4096 = 5 898255932Salfred}; 899255932Salfred 900255932Salfredstatic inline int int_to_ibta_mtu(int mtu) 901219820Sjeff{ 902255932Salfred switch (mtu) { 903255932Salfred case 256: return IB_MTU_256; 904255932Salfred case 512: return IB_MTU_512; 905255932Salfred case 1024: return IB_MTU_1024; 906255932Salfred case 2048: return IB_MTU_2048; 907255932Salfred case 4096: return IB_MTU_4096; 908255932Salfred default: return -1; 909255932Salfred } 910255932Salfred} 911219820Sjeff 912255932Salfredstatic inline int ibta_mtu_to_int(enum ibta_mtu mtu) 913255932Salfred{ 914255932Salfred switch (mtu) { 915255932Salfred case IB_MTU_256: return 256; 916255932Salfred case IB_MTU_512: return 512; 917255932Salfred case IB_MTU_1024: return 1024; 918255932Salfred case IB_MTU_2048: return 2048; 919255932Salfred case IB_MTU_4096: return 4096; 920255932Salfred default: return -1; 921255932Salfred } 922255932Salfred} 923219820Sjeff 924255932Salfredstatic ssize_t show_port_ib_mtu(struct device *dev, 925255932Salfred struct device_attribute *attr, 926255932Salfred char *buf) 927255932Salfred{ 928255932Salfred struct mlx4_port_info *info = container_of(attr, struct mlx4_port_info, 929255932Salfred port_mtu_attr); 930255932Salfred struct mlx4_dev *mdev = info->dev; 931255932Salfred 932255932Salfred if (mdev->caps.port_type[info->port] == MLX4_PORT_TYPE_ETH) 933255932Salfred mlx4_warn(mdev, "port level mtu is only used for IB ports\n"); 934255932Salfred 935255932Salfred sprintf(buf, "%d\n", 936255932Salfred ibta_mtu_to_int(mdev->caps.port_ib_mtu[info->port])); 937255932Salfred return strlen(buf); 938255932Salfred} 939255932Salfred 940255932Salfredstatic ssize_t set_port_ib_mtu(struct device *dev, 941255932Salfred struct device_attribute *attr, 942255932Salfred const char *buf, size_t count) 943255932Salfred{ 944255932Salfred struct mlx4_port_info *info = container_of(attr, struct mlx4_port_info, 945255932Salfred port_mtu_attr); 946255932Salfred struct mlx4_dev *mdev = info->dev; 947255932Salfred struct mlx4_priv *priv = mlx4_priv(mdev); 948255932Salfred int err, port, mtu, ibta_mtu = -1; 949255932Salfred 950255932Salfred if (mdev->caps.port_type[info->port] == MLX4_PORT_TYPE_ETH) { 951255932Salfred mlx4_warn(mdev, "port level mtu is only used for IB ports\n"); 952255932Salfred return -EINVAL; 953255932Salfred } 954255932Salfred 955255932Salfred mtu = (int) simple_strtol(buf, NULL, 0); 956255932Salfred ibta_mtu = int_to_ibta_mtu(mtu); 957255932Salfred 958255932Salfred if (ibta_mtu < 0) { 959255932Salfred mlx4_err(mdev, "%s is invalid IBTA mtu\n", buf); 960255932Salfred return -EINVAL; 961255932Salfred } 962255932Salfred 963255932Salfred mdev->caps.port_ib_mtu[info->port] = ibta_mtu; 964255932Salfred 965255932Salfred mlx4_stop_sense(mdev); 966219820Sjeff mutex_lock(&priv->port_mutex); 967255932Salfred mlx4_unregister_device(mdev); 968255932Salfred for (port = 1; port <= mdev->caps.num_ports; port++) { 969255932Salfred mlx4_CLOSE_PORT(mdev, port); 970255932Salfred err = mlx4_SET_PORT(mdev, port, -1); 971255932Salfred if (err) { 972255932Salfred mlx4_err(mdev, "Failed to set port %d, " 973255932Salfred "aborting\n", port); 974255932Salfred goto err_set_port; 975255932Salfred } 976255932Salfred } 977255932Salfred err = mlx4_register_device(mdev); 978255932Salfrederr_set_port: 979219820Sjeff mutex_unlock(&priv->port_mutex); 980255932Salfred mlx4_start_sense(mdev); 981255932Salfred return err ? err : count; 982219820Sjeff} 983219820Sjeff 984219820Sjeffstatic int mlx4_load_fw(struct mlx4_dev *dev) 985219820Sjeff{ 986219820Sjeff struct mlx4_priv *priv = mlx4_priv(dev); 987219820Sjeff int err; 988219820Sjeff 989219820Sjeff priv->fw.fw_icm = mlx4_alloc_icm(dev, priv->fw.fw_pages, 990219820Sjeff GFP_HIGHUSER | __GFP_NOWARN, 0); 991219820Sjeff if (!priv->fw.fw_icm) { 992219820Sjeff mlx4_err(dev, "Couldn't allocate FW area, aborting.\n"); 993219820Sjeff return -ENOMEM; 994219820Sjeff } 995219820Sjeff 996219820Sjeff err = mlx4_MAP_FA(dev, priv->fw.fw_icm); 997219820Sjeff if (err) { 998219820Sjeff mlx4_err(dev, "MAP_FA command failed, aborting.\n"); 999219820Sjeff goto err_free; 1000219820Sjeff } 1001219820Sjeff 1002219820Sjeff err = mlx4_RUN_FW(dev); 1003219820Sjeff if (err) { 1004219820Sjeff mlx4_err(dev, "RUN_FW command failed, aborting.\n"); 1005219820Sjeff goto err_unmap_fa; 1006219820Sjeff } 1007219820Sjeff 1008219820Sjeff return 0; 1009219820Sjeff 1010219820Sjefferr_unmap_fa: 1011219820Sjeff mlx4_UNMAP_FA(dev); 1012219820Sjeff 1013219820Sjefferr_free: 1014219820Sjeff mlx4_free_icm(dev, priv->fw.fw_icm, 0); 1015219820Sjeff return err; 1016219820Sjeff} 1017219820Sjeff 1018219820Sjeffstatic int mlx4_init_cmpt_table(struct mlx4_dev *dev, u64 cmpt_base, 1019219820Sjeff int cmpt_entry_sz) 1020219820Sjeff{ 1021219820Sjeff struct mlx4_priv *priv = mlx4_priv(dev); 1022219820Sjeff int err; 1023255932Salfred int num_eqs; 1024219820Sjeff 1025219820Sjeff err = mlx4_init_icm_table(dev, &priv->qp_table.cmpt_table, 1026219820Sjeff cmpt_base + 1027219820Sjeff ((u64) (MLX4_CMPT_TYPE_QP * 1028219820Sjeff cmpt_entry_sz) << MLX4_CMPT_SHIFT), 1029219820Sjeff cmpt_entry_sz, dev->caps.num_qps, 1030219820Sjeff dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW], 1031219820Sjeff 0, 0); 1032219820Sjeff if (err) 1033219820Sjeff goto err; 1034219820Sjeff 1035219820Sjeff err = mlx4_init_icm_table(dev, &priv->srq_table.cmpt_table, 1036219820Sjeff cmpt_base + 1037219820Sjeff ((u64) (MLX4_CMPT_TYPE_SRQ * 1038219820Sjeff cmpt_entry_sz) << MLX4_CMPT_SHIFT), 1039219820Sjeff cmpt_entry_sz, dev->caps.num_srqs, 1040219820Sjeff dev->caps.reserved_srqs, 0, 0); 1041219820Sjeff if (err) 1042219820Sjeff goto err_qp; 1043219820Sjeff 1044219820Sjeff err = mlx4_init_icm_table(dev, &priv->cq_table.cmpt_table, 1045219820Sjeff cmpt_base + 1046219820Sjeff ((u64) (MLX4_CMPT_TYPE_CQ * 1047219820Sjeff cmpt_entry_sz) << MLX4_CMPT_SHIFT), 1048219820Sjeff cmpt_entry_sz, dev->caps.num_cqs, 1049219820Sjeff dev->caps.reserved_cqs, 0, 0); 1050219820Sjeff if (err) 1051219820Sjeff goto err_srq; 1052219820Sjeff 1053255932Salfred num_eqs = (mlx4_is_master(dev)) ? dev->phys_caps.num_phys_eqs : 1054255932Salfred dev->caps.num_eqs; 1055219820Sjeff err = mlx4_init_icm_table(dev, &priv->eq_table.cmpt_table, 1056219820Sjeff cmpt_base + 1057219820Sjeff ((u64) (MLX4_CMPT_TYPE_EQ * 1058219820Sjeff cmpt_entry_sz) << MLX4_CMPT_SHIFT), 1059255932Salfred cmpt_entry_sz, num_eqs, num_eqs, 0, 0); 1060219820Sjeff if (err) 1061219820Sjeff goto err_cq; 1062219820Sjeff 1063219820Sjeff return 0; 1064219820Sjeff 1065219820Sjefferr_cq: 1066219820Sjeff mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table); 1067219820Sjeff 1068219820Sjefferr_srq: 1069219820Sjeff mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table); 1070219820Sjeff 1071219820Sjefferr_qp: 1072219820Sjeff mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table); 1073219820Sjeff 1074219820Sjefferr: 1075219820Sjeff return err; 1076219820Sjeff} 1077219820Sjeff 1078219820Sjeffstatic int mlx4_init_icm(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap, 1079219820Sjeff struct mlx4_init_hca_param *init_hca, u64 icm_size) 1080219820Sjeff{ 1081219820Sjeff struct mlx4_priv *priv = mlx4_priv(dev); 1082219820Sjeff u64 aux_pages; 1083255932Salfred int num_eqs; 1084219820Sjeff int err; 1085219820Sjeff 1086219820Sjeff err = mlx4_SET_ICM_SIZE(dev, icm_size, &aux_pages); 1087219820Sjeff if (err) { 1088219820Sjeff mlx4_err(dev, "SET_ICM_SIZE command failed, aborting.\n"); 1089219820Sjeff return err; 1090219820Sjeff } 1091219820Sjeff 1092219820Sjeff mlx4_dbg(dev, "%lld KB of HCA context requires %lld KB aux memory.\n", 1093219820Sjeff (unsigned long long) icm_size >> 10, 1094219820Sjeff (unsigned long long) aux_pages << 2); 1095219820Sjeff 1096219820Sjeff priv->fw.aux_icm = mlx4_alloc_icm(dev, aux_pages, 1097219820Sjeff GFP_HIGHUSER | __GFP_NOWARN, 0); 1098219820Sjeff if (!priv->fw.aux_icm) { 1099219820Sjeff mlx4_err(dev, "Couldn't allocate aux memory, aborting.\n"); 1100219820Sjeff return -ENOMEM; 1101219820Sjeff } 1102219820Sjeff 1103219820Sjeff err = mlx4_MAP_ICM_AUX(dev, priv->fw.aux_icm); 1104219820Sjeff if (err) { 1105219820Sjeff mlx4_err(dev, "MAP_ICM_AUX command failed, aborting.\n"); 1106219820Sjeff goto err_free_aux; 1107219820Sjeff } 1108219820Sjeff 1109219820Sjeff err = mlx4_init_cmpt_table(dev, init_hca->cmpt_base, dev_cap->cmpt_entry_sz); 1110219820Sjeff if (err) { 1111219820Sjeff mlx4_err(dev, "Failed to map cMPT context memory, aborting.\n"); 1112219820Sjeff goto err_unmap_aux; 1113219820Sjeff } 1114219820Sjeff 1115255932Salfred 1116255932Salfred num_eqs = (mlx4_is_master(dev)) ? dev->phys_caps.num_phys_eqs : 1117255932Salfred dev->caps.num_eqs; 1118219820Sjeff err = mlx4_init_icm_table(dev, &priv->eq_table.table, 1119219820Sjeff init_hca->eqc_base, dev_cap->eqc_entry_sz, 1120255932Salfred num_eqs, num_eqs, 0, 0); 1121219820Sjeff if (err) { 1122219820Sjeff mlx4_err(dev, "Failed to map EQ context memory, aborting.\n"); 1123219820Sjeff goto err_unmap_cmpt; 1124219820Sjeff } 1125219820Sjeff 1126219820Sjeff /* 1127219820Sjeff * Reserved MTT entries must be aligned up to a cacheline 1128219820Sjeff * boundary, since the FW will write to them, while the driver 1129219820Sjeff * writes to all other MTT entries. (The variable 1130219820Sjeff * dev->caps.mtt_entry_sz below is really the MTT segment 1131219820Sjeff * size, not the raw entry size) 1132219820Sjeff */ 1133219820Sjeff dev->caps.reserved_mtts = 1134219820Sjeff ALIGN(dev->caps.reserved_mtts * dev->caps.mtt_entry_sz, 1135219820Sjeff dma_get_cache_alignment()) / dev->caps.mtt_entry_sz; 1136219820Sjeff 1137219820Sjeff err = mlx4_init_icm_table(dev, &priv->mr_table.mtt_table, 1138219820Sjeff init_hca->mtt_base, 1139219820Sjeff dev->caps.mtt_entry_sz, 1140255932Salfred dev->caps.num_mtts, 1141219820Sjeff dev->caps.reserved_mtts, 1, 0); 1142219820Sjeff if (err) { 1143219820Sjeff mlx4_err(dev, "Failed to map MTT context memory, aborting.\n"); 1144219820Sjeff goto err_unmap_eq; 1145219820Sjeff } 1146219820Sjeff 1147219820Sjeff err = mlx4_init_icm_table(dev, &priv->mr_table.dmpt_table, 1148219820Sjeff init_hca->dmpt_base, 1149219820Sjeff dev_cap->dmpt_entry_sz, 1150219820Sjeff dev->caps.num_mpts, 1151219820Sjeff dev->caps.reserved_mrws, 1, 1); 1152219820Sjeff if (err) { 1153219820Sjeff mlx4_err(dev, "Failed to map dMPT context memory, aborting.\n"); 1154219820Sjeff goto err_unmap_mtt; 1155219820Sjeff } 1156219820Sjeff 1157219820Sjeff err = mlx4_init_icm_table(dev, &priv->qp_table.qp_table, 1158219820Sjeff init_hca->qpc_base, 1159219820Sjeff dev_cap->qpc_entry_sz, 1160219820Sjeff dev->caps.num_qps, 1161219820Sjeff dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW], 1162219820Sjeff 0, 0); 1163219820Sjeff if (err) { 1164219820Sjeff mlx4_err(dev, "Failed to map QP context memory, aborting.\n"); 1165219820Sjeff goto err_unmap_dmpt; 1166219820Sjeff } 1167219820Sjeff 1168219820Sjeff err = mlx4_init_icm_table(dev, &priv->qp_table.auxc_table, 1169219820Sjeff init_hca->auxc_base, 1170219820Sjeff dev_cap->aux_entry_sz, 1171219820Sjeff dev->caps.num_qps, 1172219820Sjeff dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW], 1173219820Sjeff 0, 0); 1174219820Sjeff if (err) { 1175219820Sjeff mlx4_err(dev, "Failed to map AUXC context memory, aborting.\n"); 1176219820Sjeff goto err_unmap_qp; 1177219820Sjeff } 1178219820Sjeff 1179219820Sjeff err = mlx4_init_icm_table(dev, &priv->qp_table.altc_table, 1180219820Sjeff init_hca->altc_base, 1181219820Sjeff dev_cap->altc_entry_sz, 1182219820Sjeff dev->caps.num_qps, 1183219820Sjeff dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW], 1184219820Sjeff 0, 0); 1185219820Sjeff if (err) { 1186219820Sjeff mlx4_err(dev, "Failed to map ALTC context memory, aborting.\n"); 1187219820Sjeff goto err_unmap_auxc; 1188219820Sjeff } 1189219820Sjeff 1190219820Sjeff err = mlx4_init_icm_table(dev, &priv->qp_table.rdmarc_table, 1191219820Sjeff init_hca->rdmarc_base, 1192219820Sjeff dev_cap->rdmarc_entry_sz << priv->qp_table.rdmarc_shift, 1193219820Sjeff dev->caps.num_qps, 1194219820Sjeff dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW], 1195219820Sjeff 0, 0); 1196219820Sjeff if (err) { 1197219820Sjeff mlx4_err(dev, "Failed to map RDMARC context memory, aborting\n"); 1198219820Sjeff goto err_unmap_altc; 1199219820Sjeff } 1200219820Sjeff 1201219820Sjeff err = mlx4_init_icm_table(dev, &priv->cq_table.table, 1202219820Sjeff init_hca->cqc_base, 1203219820Sjeff dev_cap->cqc_entry_sz, 1204219820Sjeff dev->caps.num_cqs, 1205219820Sjeff dev->caps.reserved_cqs, 0, 0); 1206219820Sjeff if (err) { 1207219820Sjeff mlx4_err(dev, "Failed to map CQ context memory, aborting.\n"); 1208219820Sjeff goto err_unmap_rdmarc; 1209219820Sjeff } 1210219820Sjeff 1211219820Sjeff err = mlx4_init_icm_table(dev, &priv->srq_table.table, 1212219820Sjeff init_hca->srqc_base, 1213219820Sjeff dev_cap->srq_entry_sz, 1214219820Sjeff dev->caps.num_srqs, 1215219820Sjeff dev->caps.reserved_srqs, 0, 0); 1216219820Sjeff if (err) { 1217219820Sjeff mlx4_err(dev, "Failed to map SRQ context memory, aborting.\n"); 1218219820Sjeff goto err_unmap_cq; 1219219820Sjeff } 1220219820Sjeff 1221219820Sjeff /* 1222255932Salfred * For flow steering device managed mode it is required to use 1223255932Salfred * mlx4_init_icm_table. For B0 steering mode it's not strictly 1224255932Salfred * required, but for simplicity just map the whole multicast 1225255932Salfred * group table now. The table isn't very big and it's a lot 1226255932Salfred * easier than trying to track ref counts. 1227219820Sjeff */ 1228219820Sjeff err = mlx4_init_icm_table(dev, &priv->mcg_table.table, 1229255932Salfred init_hca->mc_base, 1230255932Salfred mlx4_get_mgm_entry_size(dev), 1231219820Sjeff dev->caps.num_mgms + dev->caps.num_amgms, 1232219820Sjeff dev->caps.num_mgms + dev->caps.num_amgms, 1233219820Sjeff 0, 0); 1234219820Sjeff if (err) { 1235219820Sjeff mlx4_err(dev, "Failed to map MCG context memory, aborting.\n"); 1236219820Sjeff goto err_unmap_srq; 1237219820Sjeff } 1238219820Sjeff 1239219820Sjeff return 0; 1240219820Sjeff 1241219820Sjefferr_unmap_srq: 1242219820Sjeff mlx4_cleanup_icm_table(dev, &priv->srq_table.table); 1243219820Sjeff 1244219820Sjefferr_unmap_cq: 1245219820Sjeff mlx4_cleanup_icm_table(dev, &priv->cq_table.table); 1246219820Sjeff 1247219820Sjefferr_unmap_rdmarc: 1248219820Sjeff mlx4_cleanup_icm_table(dev, &priv->qp_table.rdmarc_table); 1249219820Sjeff 1250219820Sjefferr_unmap_altc: 1251219820Sjeff mlx4_cleanup_icm_table(dev, &priv->qp_table.altc_table); 1252219820Sjeff 1253219820Sjefferr_unmap_auxc: 1254219820Sjeff mlx4_cleanup_icm_table(dev, &priv->qp_table.auxc_table); 1255219820Sjeff 1256219820Sjefferr_unmap_qp: 1257219820Sjeff mlx4_cleanup_icm_table(dev, &priv->qp_table.qp_table); 1258219820Sjeff 1259219820Sjefferr_unmap_dmpt: 1260219820Sjeff mlx4_cleanup_icm_table(dev, &priv->mr_table.dmpt_table); 1261219820Sjeff 1262219820Sjefferr_unmap_mtt: 1263219820Sjeff mlx4_cleanup_icm_table(dev, &priv->mr_table.mtt_table); 1264219820Sjeff 1265219820Sjefferr_unmap_eq: 1266219820Sjeff mlx4_cleanup_icm_table(dev, &priv->eq_table.table); 1267219820Sjeff 1268219820Sjefferr_unmap_cmpt: 1269219820Sjeff mlx4_cleanup_icm_table(dev, &priv->eq_table.cmpt_table); 1270219820Sjeff mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table); 1271219820Sjeff mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table); 1272219820Sjeff mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table); 1273219820Sjeff 1274219820Sjefferr_unmap_aux: 1275219820Sjeff mlx4_UNMAP_ICM_AUX(dev); 1276219820Sjeff 1277219820Sjefferr_free_aux: 1278219820Sjeff mlx4_free_icm(dev, priv->fw.aux_icm, 0); 1279219820Sjeff 1280219820Sjeff return err; 1281219820Sjeff} 1282219820Sjeff 1283219820Sjeffstatic void mlx4_free_icms(struct mlx4_dev *dev) 1284219820Sjeff{ 1285219820Sjeff struct mlx4_priv *priv = mlx4_priv(dev); 1286219820Sjeff 1287219820Sjeff mlx4_cleanup_icm_table(dev, &priv->mcg_table.table); 1288219820Sjeff mlx4_cleanup_icm_table(dev, &priv->srq_table.table); 1289219820Sjeff mlx4_cleanup_icm_table(dev, &priv->cq_table.table); 1290219820Sjeff mlx4_cleanup_icm_table(dev, &priv->qp_table.rdmarc_table); 1291219820Sjeff mlx4_cleanup_icm_table(dev, &priv->qp_table.altc_table); 1292219820Sjeff mlx4_cleanup_icm_table(dev, &priv->qp_table.auxc_table); 1293219820Sjeff mlx4_cleanup_icm_table(dev, &priv->qp_table.qp_table); 1294219820Sjeff mlx4_cleanup_icm_table(dev, &priv->mr_table.dmpt_table); 1295219820Sjeff mlx4_cleanup_icm_table(dev, &priv->mr_table.mtt_table); 1296219820Sjeff mlx4_cleanup_icm_table(dev, &priv->eq_table.table); 1297219820Sjeff mlx4_cleanup_icm_table(dev, &priv->eq_table.cmpt_table); 1298219820Sjeff mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table); 1299219820Sjeff mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table); 1300219820Sjeff mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table); 1301219820Sjeff 1302219820Sjeff mlx4_UNMAP_ICM_AUX(dev); 1303219820Sjeff mlx4_free_icm(dev, priv->fw.aux_icm, 0); 1304219820Sjeff} 1305219820Sjeff 1306255932Salfredstatic void mlx4_slave_exit(struct mlx4_dev *dev) 1307255932Salfred{ 1308255932Salfred struct mlx4_priv *priv = mlx4_priv(dev); 1309255932Salfred 1310255932Salfred mutex_lock(&priv->cmd.slave_cmd_mutex); 1311255932Salfred if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_RESET, 0, MLX4_COMM_TIME)) 1312255932Salfred mlx4_warn(dev, "Failed to close slave function.\n"); 1313255932Salfred mutex_unlock(&priv->cmd.slave_cmd_mutex); 1314255932Salfred} 1315255932Salfred 1316219820Sjeffstatic int map_bf_area(struct mlx4_dev *dev) 1317219820Sjeff{ 1318219820Sjeff struct mlx4_priv *priv = mlx4_priv(dev); 1319219820Sjeff resource_size_t bf_start; 1320219820Sjeff resource_size_t bf_len; 1321219820Sjeff int err = 0; 1322219820Sjeff 1323255932Salfred if (!dev->caps.bf_reg_size) 1324255932Salfred return -ENXIO; 1325255932Salfred 1326255932Salfred bf_start = pci_resource_start(dev->pdev, 2) + 1327255932Salfred (dev->caps.num_uars << PAGE_SHIFT); 1328255932Salfred bf_len = pci_resource_len(dev->pdev, 2) - 1329255932Salfred (dev->caps.num_uars << PAGE_SHIFT); 1330219820Sjeff priv->bf_mapping = io_mapping_create_wc(bf_start, bf_len); 1331219820Sjeff if (!priv->bf_mapping) 1332219820Sjeff err = -ENOMEM; 1333219820Sjeff 1334219820Sjeff return err; 1335219820Sjeff} 1336219820Sjeff 1337219820Sjeffstatic void unmap_bf_area(struct mlx4_dev *dev) 1338219820Sjeff{ 1339219820Sjeff if (mlx4_priv(dev)->bf_mapping) 1340219820Sjeff io_mapping_free(mlx4_priv(dev)->bf_mapping); 1341219820Sjeff} 1342219820Sjeff 1343255932Salfredcycle_t mlx4_read_clock(struct mlx4_dev *dev) 1344255932Salfred{ 1345255932Salfred u32 clockhi, clocklo, clockhi1; 1346255932Salfred cycle_t cycles; 1347255932Salfred int i; 1348255932Salfred struct mlx4_priv *priv = mlx4_priv(dev); 1349255932Salfred 1350255932Salfred for (i = 0; i < 10; i++) { 1351255932Salfred clockhi = swab32(readl(priv->clock_mapping)); 1352255932Salfred clocklo = swab32(readl(priv->clock_mapping + 4)); 1353255932Salfred clockhi1 = swab32(readl(priv->clock_mapping)); 1354255932Salfred if (clockhi == clockhi1) 1355255932Salfred break; 1356255932Salfred } 1357255932Salfred 1358255932Salfred cycles = (u64) clockhi << 32 | (u64) clocklo; 1359255932Salfred 1360255932Salfred return cycles; 1361255932Salfred} 1362255932SalfredEXPORT_SYMBOL_GPL(mlx4_read_clock); 1363255932Salfred 1364255932Salfred 1365255932Salfredstatic int map_internal_clock(struct mlx4_dev *dev) 1366255932Salfred{ 1367255932Salfred struct mlx4_priv *priv = mlx4_priv(dev); 1368255932Salfred 1369255932Salfred priv->clock_mapping = ioremap(pci_resource_start(dev->pdev, 1370255932Salfred priv->fw.clock_bar) + 1371255932Salfred priv->fw.clock_offset, MLX4_CLOCK_SIZE); 1372255932Salfred 1373255932Salfred if (!priv->clock_mapping) 1374255932Salfred return -ENOMEM; 1375255932Salfred 1376255932Salfred return 0; 1377255932Salfred} 1378255932Salfred 1379255932Salfredstatic void unmap_internal_clock(struct mlx4_dev *dev) 1380255932Salfred{ 1381255932Salfred struct mlx4_priv *priv = mlx4_priv(dev); 1382255932Salfred 1383255932Salfred if (priv->clock_mapping) 1384255932Salfred iounmap(priv->clock_mapping); 1385255932Salfred} 1386255932Salfred 1387219820Sjeffstatic void mlx4_close_hca(struct mlx4_dev *dev) 1388219820Sjeff{ 1389255932Salfred unmap_internal_clock(dev); 1390219820Sjeff unmap_bf_area(dev); 1391255932Salfred if (mlx4_is_slave(dev)) 1392255932Salfred mlx4_slave_exit(dev); 1393255932Salfred else { 1394255932Salfred mlx4_CLOSE_HCA(dev, 0); 1395255932Salfred mlx4_free_icms(dev); 1396255932Salfred mlx4_UNMAP_FA(dev); 1397255932Salfred mlx4_free_icm(dev, mlx4_priv(dev)->fw.fw_icm, 0); 1398255932Salfred } 1399219820Sjeff} 1400219820Sjeff 1401255932Salfredstatic int mlx4_init_slave(struct mlx4_dev *dev) 1402255932Salfred{ 1403255932Salfred struct mlx4_priv *priv = mlx4_priv(dev); 1404255932Salfred u64 dma = (u64) priv->mfunc.vhcr_dma; 1405255932Salfred int num_of_reset_retries = NUM_OF_RESET_RETRIES; 1406255932Salfred int ret_from_reset = 0; 1407255932Salfred u32 slave_read; 1408255932Salfred u32 cmd_channel_ver; 1409255932Salfred 1410255932Salfred mutex_lock(&priv->cmd.slave_cmd_mutex); 1411255932Salfred priv->cmd.max_cmds = 1; 1412255932Salfred mlx4_warn(dev, "Sending reset\n"); 1413255932Salfred ret_from_reset = mlx4_comm_cmd(dev, MLX4_COMM_CMD_RESET, 0, 1414255932Salfred MLX4_COMM_TIME); 1415255932Salfred /* if we are in the middle of flr the slave will try 1416255932Salfred * NUM_OF_RESET_RETRIES times before leaving.*/ 1417255932Salfred if (ret_from_reset) { 1418255932Salfred if (MLX4_DELAY_RESET_SLAVE == ret_from_reset) { 1419255932Salfred msleep(SLEEP_TIME_IN_RESET); 1420255932Salfred while (ret_from_reset && num_of_reset_retries) { 1421255932Salfred mlx4_warn(dev, "slave is currently in the" 1422255932Salfred "middle of FLR. retrying..." 1423255932Salfred "(try num:%d)\n", 1424255932Salfred (NUM_OF_RESET_RETRIES - 1425255932Salfred num_of_reset_retries + 1)); 1426255932Salfred ret_from_reset = 1427255932Salfred mlx4_comm_cmd(dev, MLX4_COMM_CMD_RESET, 1428255932Salfred 0, MLX4_COMM_TIME); 1429255932Salfred num_of_reset_retries = num_of_reset_retries - 1; 1430255932Salfred } 1431255932Salfred } else 1432255932Salfred goto err; 1433255932Salfred } 1434255932Salfred 1435255932Salfred /* check the driver version - the slave I/F revision 1436255932Salfred * must match the master's */ 1437255932Salfred slave_read = swab32(readl(&priv->mfunc.comm->slave_read)); 1438255932Salfred cmd_channel_ver = mlx4_comm_get_version(); 1439255932Salfred 1440255932Salfred if (MLX4_COMM_GET_IF_REV(cmd_channel_ver) != 1441255932Salfred MLX4_COMM_GET_IF_REV(slave_read)) { 1442255932Salfred mlx4_err(dev, "slave driver version is not supported" 1443255932Salfred " by the master\n"); 1444255932Salfred goto err; 1445255932Salfred } 1446255932Salfred 1447255932Salfred mlx4_warn(dev, "Sending vhcr0\n"); 1448255932Salfred if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_VHCR0, dma >> 48, 1449255932Salfred MLX4_COMM_TIME)) 1450255932Salfred goto err; 1451255932Salfred if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_VHCR1, dma >> 32, 1452255932Salfred MLX4_COMM_TIME)) 1453255932Salfred goto err; 1454255932Salfred if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_VHCR2, dma >> 16, 1455255932Salfred MLX4_COMM_TIME)) 1456255932Salfred goto err; 1457255932Salfred if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_VHCR_EN, dma, MLX4_COMM_TIME)) 1458255932Salfred goto err; 1459255932Salfred 1460255932Salfred mutex_unlock(&priv->cmd.slave_cmd_mutex); 1461255932Salfred return 0; 1462255932Salfred 1463255932Salfrederr: 1464255932Salfred mlx4_comm_cmd(dev, MLX4_COMM_CMD_RESET, 0, 0); 1465255932Salfred mutex_unlock(&priv->cmd.slave_cmd_mutex); 1466255932Salfred return -EIO; 1467255932Salfred} 1468255932Salfred 1469255932Salfredstatic void mlx4_parav_master_pf_caps(struct mlx4_dev *dev) 1470255932Salfred{ 1471255932Salfred int i; 1472255932Salfred 1473255932Salfred for (i = 1; i <= dev->caps.num_ports; i++) { 1474255932Salfred if (dev->caps.port_type[i] == MLX4_PORT_TYPE_ETH) 1475255932Salfred dev->caps.gid_table_len[i] = 1476255932Salfred mlx4_get_slave_num_gids(dev, 0); 1477255932Salfred else 1478255932Salfred dev->caps.gid_table_len[i] = 1; 1479255932Salfred dev->caps.pkey_table_len[i] = 1480255932Salfred dev->phys_caps.pkey_phys_table_len[i] - 1; 1481255932Salfred } 1482255932Salfred} 1483255932Salfred 1484255932Salfredstatic int choose_log_fs_mgm_entry_size(int qp_per_entry) 1485255932Salfred{ 1486255932Salfred int i = MLX4_MIN_MGM_LOG_ENTRY_SIZE; 1487255932Salfred 1488255932Salfred for (i = MLX4_MIN_MGM_LOG_ENTRY_SIZE; i <= MLX4_MAX_MGM_LOG_ENTRY_SIZE; 1489255932Salfred i++) { 1490255932Salfred if (qp_per_entry <= 4 * ((1 << i) / 16 - 2)) 1491255932Salfred break; 1492255932Salfred } 1493255932Salfred 1494255932Salfred return (i <= MLX4_MAX_MGM_LOG_ENTRY_SIZE) ? i : -1; 1495255932Salfred} 1496255932Salfred 1497255932Salfredstatic void choose_steering_mode(struct mlx4_dev *dev, 1498255932Salfred struct mlx4_dev_cap *dev_cap) 1499255932Salfred{ 1500255932Salfred // This is only valid to the integrated driver. 1501255932Salfred // The new ported mlx4_core driver is in B0 steering mode by default 1502255932Salfred // and the old mlx4_en driver is in A0 steering mode by default. 1503255932Salfred // If high_rate_steer == TRUE it means that A0 steering mode is on. 1504255932Salfred // The integration fix is to hard code high_rate_steer to TRUE. 1505255932Salfred high_rate_steer = 1; 1506255932Salfred 1507255932Salfred if (high_rate_steer && !mlx4_is_mfunc(dev)) { 1508255932Salfred dev->caps.flags &= ~(MLX4_DEV_CAP_FLAG_VEP_MC_STEER | 1509255932Salfred MLX4_DEV_CAP_FLAG_VEP_UC_STEER); 1510255932Salfred dev_cap->flags2 &= ~MLX4_DEV_CAP_FLAG2_FS_EN; 1511255932Salfred } 1512255932Salfred 1513255932Salfred if (mlx4_log_num_mgm_entry_size == -1 && 1514255932Salfred dev_cap->flags2 & MLX4_DEV_CAP_FLAG2_FS_EN && 1515255932Salfred dev_cap->fs_log_max_ucast_qp_range_size == 0 && 1516255932Salfred (!mlx4_is_mfunc(dev) || 1517255932Salfred (dev_cap->fs_max_num_qp_per_entry >= (num_vfs + 1))) && 1518255932Salfred choose_log_fs_mgm_entry_size(dev_cap->fs_max_num_qp_per_entry) >= 1519255932Salfred MLX4_MIN_MGM_LOG_ENTRY_SIZE) { 1520255932Salfred dev->oper_log_mgm_entry_size = 1521255932Salfred choose_log_fs_mgm_entry_size(dev_cap->fs_max_num_qp_per_entry); 1522255932Salfred dev->caps.steering_mode = MLX4_STEERING_MODE_DEVICE_MANAGED; 1523255932Salfred dev->caps.num_qp_per_mgm = dev_cap->fs_max_num_qp_per_entry; 1524255932Salfred } else { 1525255932Salfred if (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER && 1526255932Salfred dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER) { 1527255932Salfred dev->caps.steering_mode = MLX4_STEERING_MODE_B0; 1528255932Salfred } 1529255932Salfred else { 1530255932Salfred dev->caps.steering_mode = MLX4_STEERING_MODE_A0; 1531255932Salfred 1532255932Salfred if (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER || 1533255932Salfred dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER) 1534255932Salfred mlx4_warn(dev, "Must have both UC_STEER and MC_STEER flags " 1535255932Salfred "set to use B0 steering. Falling back to A0 steering mode.\n"); 1536255932Salfred } 1537255932Salfred dev->oper_log_mgm_entry_size = 1538255932Salfred mlx4_log_num_mgm_entry_size > 0 ? 1539255932Salfred mlx4_log_num_mgm_entry_size : 1540255932Salfred MLX4_DEFAULT_MGM_LOG_ENTRY_SIZE; 1541255932Salfred dev->caps.num_qp_per_mgm = mlx4_get_qp_per_mgm(dev); 1542255932Salfred } 1543255932Salfred mlx4_dbg(dev, "Steering mode is: %s, oper_log_mgm_entry_size = %d, " 1544255932Salfred "log_num_mgm_entry_size = %d\n", 1545255932Salfred mlx4_steering_mode_str(dev->caps.steering_mode), 1546255932Salfred dev->oper_log_mgm_entry_size, mlx4_log_num_mgm_entry_size); 1547255932Salfred} 1548255932Salfred 1549219820Sjeffstatic int mlx4_init_hca(struct mlx4_dev *dev) 1550219820Sjeff{ 1551219820Sjeff struct mlx4_priv *priv = mlx4_priv(dev); 1552255932Salfred struct mlx4_dev_cap *dev_cap = NULL; 1553219820Sjeff struct mlx4_adapter adapter; 1554219820Sjeff struct mlx4_mod_stat_cfg mlx4_cfg; 1555219820Sjeff struct mlx4_profile profile; 1556219820Sjeff struct mlx4_init_hca_param init_hca; 1557219820Sjeff u64 icm_size; 1558219820Sjeff int err; 1559219820Sjeff 1560255932Salfred if (!mlx4_is_slave(dev)) { 1561255932Salfred err = mlx4_QUERY_FW(dev); 1562255932Salfred if (err) { 1563255932Salfred if (err == -EACCES) 1564255932Salfred mlx4_info(dev, "non-primary physical function, skipping.\n"); 1565255932Salfred else 1566255932Salfred mlx4_err(dev, "QUERY_FW command failed, aborting.\n"); 1567255932Salfred return err; 1568255932Salfred } 1569219820Sjeff 1570255932Salfred err = mlx4_load_fw(dev); 1571255932Salfred if (err) { 1572255932Salfred mlx4_err(dev, "Failed to start FW, aborting.\n"); 1573255932Salfred return err; 1574255932Salfred } 1575219820Sjeff 1576255932Salfred mlx4_cfg.log_pg_sz_m = 1; 1577255932Salfred mlx4_cfg.log_pg_sz = 0; 1578255932Salfred err = mlx4_MOD_STAT_CFG(dev, &mlx4_cfg); 1579255932Salfred if (err) 1580255932Salfred mlx4_warn(dev, "Failed to override log_pg_sz parameter\n"); 1581219820Sjeff 1582255932Salfred dev_cap = kzalloc(sizeof *dev_cap, GFP_KERNEL); 1583255932Salfred if (!dev_cap) { 1584255932Salfred mlx4_err(dev, "Failed to allocate memory for dev_cap\n"); 1585255932Salfred err = -ENOMEM; 1586255932Salfred goto err_stop_fw; 1587255932Salfred } 1588219820Sjeff 1589255932Salfred err = mlx4_dev_cap(dev, dev_cap); 1590255932Salfred if (err) { 1591255932Salfred mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting.\n"); 1592255932Salfred goto err_stop_fw; 1593255932Salfred } 1594219820Sjeff 1595255932Salfred choose_steering_mode(dev, dev_cap); 1596255932Salfred 1597255932Salfred if (mlx4_is_master(dev)) 1598255932Salfred mlx4_parav_master_pf_caps(dev); 1599255932Salfred 1600255932Salfred process_mod_param_profile(&profile); 1601255932Salfred if (dev->caps.steering_mode == 1602255932Salfred MLX4_STEERING_MODE_DEVICE_MANAGED) 1603255932Salfred profile.num_mcg = MLX4_FS_NUM_MCG; 1604255932Salfred 1605255932Salfred icm_size = mlx4_make_profile(dev, &profile, dev_cap, 1606255932Salfred &init_hca); 1607255932Salfred if ((long long) icm_size < 0) { 1608255932Salfred err = icm_size; 1609255932Salfred goto err_stop_fw; 1610219820Sjeff } 1611219820Sjeff 1612255932Salfred dev->caps.max_fmr_maps = (1 << (32 - ilog2(dev->caps.num_mpts))) - 1; 1613255932Salfred 1614255932Salfred init_hca.log_uar_sz = ilog2(dev->caps.num_uars); 1615255932Salfred init_hca.uar_page_sz = PAGE_SHIFT - 12; 1616255932Salfred 1617255932Salfred err = mlx4_init_icm(dev, dev_cap, &init_hca, icm_size); 1618255932Salfred if (err) 1619255932Salfred goto err_stop_fw; 1620255932Salfred 1621255932Salfred err = mlx4_INIT_HCA(dev, &init_hca); 1622255932Salfred if (err) { 1623255932Salfred mlx4_err(dev, "INIT_HCA command failed, aborting.\n"); 1624255932Salfred goto err_free_icm; 1625255932Salfred } 1626255932Salfred } else { 1627255932Salfred err = mlx4_init_slave(dev); 1628255932Salfred if (err) { 1629255932Salfred mlx4_err(dev, "Failed to initialize slave\n"); 1630255932Salfred return err; 1631255932Salfred } 1632255932Salfred 1633255932Salfred err = mlx4_slave_cap(dev); 1634255932Salfred if (err) { 1635255932Salfred mlx4_err(dev, "Failed to obtain slave caps\n"); 1636255932Salfred goto err_close; 1637255932Salfred } 1638219820Sjeff } 1639219820Sjeff 1640219820Sjeff if (map_bf_area(dev)) 1641255932Salfred mlx4_dbg(dev, "Failed to map blue flame area\n"); 1642219820Sjeff 1643255932Salfred /* 1644255932Salfred * Read HCA frequency by QUERY_HCA command 1645255932Salfred */ 1646255932Salfred if (dev->caps.cq_timestamp) { 1647255932Salfred memset(&init_hca, 0, sizeof(init_hca)); 1648255932Salfred err = mlx4_QUERY_HCA(dev, &init_hca); 1649255932Salfred if (err) { 1650255932Salfred mlx4_err(dev, "QUERY_HCA command failed, disable timestamp.\n"); 1651255932Salfred dev->caps.cq_timestamp = 0; 1652255932Salfred } else 1653255932Salfred dev->caps.hca_core_clock = init_hca.hca_core_clock; 1654219820Sjeff 1655255932Salfred /* 1656255932Salfred * In case we got HCA frequency 0 - disable timestamping 1657255932Salfred * to avoid dividing by zero 1658255932Salfred */ 1659255932Salfred if (!dev->caps.hca_core_clock) { 1660255932Salfred dev->caps.cq_timestamp = 0; 1661255932Salfred mlx4_err(dev, "HCA frequency is 0. " 1662255932Salfred "Timestamping is not supported."); 1663255932Salfred } 1664219820Sjeff 1665255932Salfred /* 1666255932Salfred * Map internal clock, in case of failure disable timestamping 1667255932Salfred */ 1668255932Salfred if (map_internal_clock(dev)) { 1669255932Salfred dev->caps.cq_timestamp = 0; 1670255932Salfred mlx4_err(dev, "Failed to map internal clock. " 1671255932Salfred "Timestamping is not supported.\n"); 1672255932Salfred } 1673219820Sjeff } 1674219820Sjeff 1675255932Salfred /*Only the master set the ports, all the rest got it from it.*/ 1676255932Salfred if (!mlx4_is_slave(dev)) 1677255932Salfred mlx4_set_port_mask(dev); 1678255932Salfred 1679219820Sjeff err = mlx4_QUERY_ADAPTER(dev, &adapter); 1680219820Sjeff if (err) { 1681219820Sjeff mlx4_err(dev, "QUERY_ADAPTER command failed, aborting.\n"); 1682255932Salfred goto unmap_bf; 1683219820Sjeff } 1684219820Sjeff 1685219820Sjeff priv->eq_table.inta_pin = adapter.inta_pin; 1686219820Sjeff memcpy(dev->board_id, adapter.board_id, sizeof dev->board_id); 1687219820Sjeff 1688255932Salfred if (!mlx4_is_slave(dev)) 1689255932Salfred kfree(dev_cap); 1690255932Salfred 1691219820Sjeff return 0; 1692219820Sjeff 1693255932Salfredunmap_bf: 1694255932Salfred unmap_internal_clock(dev); 1695255932Salfred unmap_bf_area(dev); 1696255932Salfred 1697255932Salfred if (mlx4_is_slave(dev)) { 1698255932Salfred kfree(dev->caps.qp0_tunnel); 1699255932Salfred kfree(dev->caps.qp0_proxy); 1700255932Salfred kfree(dev->caps.qp1_tunnel); 1701255932Salfred kfree(dev->caps.qp1_proxy); 1702255932Salfred } 1703255932Salfred 1704219820Sjefferr_close: 1705255932Salfred if (mlx4_is_slave(dev)) 1706255932Salfred mlx4_slave_exit(dev); 1707255932Salfred else 1708255932Salfred mlx4_CLOSE_HCA(dev, 0); 1709219820Sjeff 1710219820Sjefferr_free_icm: 1711255932Salfred if (!mlx4_is_slave(dev)) 1712255932Salfred mlx4_free_icms(dev); 1713219820Sjeff 1714219820Sjefferr_stop_fw: 1715255932Salfred if (!mlx4_is_slave(dev)) { 1716255932Salfred mlx4_UNMAP_FA(dev); 1717255932Salfred mlx4_free_icm(dev, priv->fw.fw_icm, 0); 1718255932Salfred if (dev_cap) 1719255932Salfred kfree(dev_cap); 1720255932Salfred } 1721219820Sjeff return err; 1722219820Sjeff} 1723219820Sjeff 1724219820Sjeffstatic int mlx4_init_counters_table(struct mlx4_dev *dev) 1725219820Sjeff{ 1726219820Sjeff struct mlx4_priv *priv = mlx4_priv(dev); 1727255932Salfred int res; 1728255932Salfred int nent_pow2; 1729219820Sjeff 1730255932Salfred if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_COUNTERS)) 1731219820Sjeff return -ENOENT; 1732219820Sjeff 1733255932Salfred nent_pow2 = roundup_pow_of_two(dev->caps.max_counters); 1734255932Salfred res = mlx4_bitmap_init(&priv->counters_bitmap, nent_pow2, 1735255932Salfred nent_pow2 - 1, 0, 1736255932Salfred nent_pow2 - dev->caps.max_counters); 1737255932Salfred if (res) 1738255932Salfred return res; 1739255932Salfred 1740255932Salfred if (dev->caps.max_counters == dev->caps.max_basic_counters) 1741255932Salfred return 0; 1742255932Salfred 1743255932Salfred res = mlx4_cmd(dev, MLX4_IF_STATE_EXTENDED, 0, 0, 1744255932Salfred MLX4_CMD_SET_IF_STAT, MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE); 1745255932Salfred 1746255932Salfred if (res) 1747255932Salfred mlx4_err(dev, "Failed to set extended counters (err=%d)\n", 1748255932Salfred res); 1749255932Salfred return res; 1750255932Salfred 1751219820Sjeff} 1752219820Sjeff 1753219820Sjeffstatic void mlx4_cleanup_counters_table(struct mlx4_dev *dev) 1754219820Sjeff{ 1755255932Salfred if (!mlx4_is_slave(dev) && 1756255932Salfred (dev->caps.flags & MLX4_DEV_CAP_FLAG_COUNTERS)) 1757219820Sjeff mlx4_bitmap_cleanup(&mlx4_priv(dev)->counters_bitmap); 1758219820Sjeff} 1759219820Sjeff 1760255932Salfredint __mlx4_counter_alloc(struct mlx4_dev *dev, u32 *idx) 1761219820Sjeff{ 1762219820Sjeff struct mlx4_priv *priv = mlx4_priv(dev); 1763219820Sjeff 1764255932Salfred if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_COUNTERS)) 1765255932Salfred return -ENOENT; 1766255932Salfred 1767255932Salfred *idx = mlx4_bitmap_alloc(&priv->counters_bitmap); 1768255932Salfred if (*idx == -1) 1769219820Sjeff return -ENOMEM; 1770255932Salfred 1771255932Salfred return 0; 1772255932Salfred} 1773255932Salfred 1774255932Salfredint mlx4_counter_alloc(struct mlx4_dev *dev, u32 *idx) 1775255932Salfred{ 1776255932Salfred u64 out_param; 1777255932Salfred int err; 1778255932Salfred 1779255932Salfred if (mlx4_is_mfunc(dev)) { 1780255932Salfred err = mlx4_cmd_imm(dev, 0, &out_param, RES_COUNTER, 1781255932Salfred RES_OP_RESERVE, MLX4_CMD_ALLOC_RES, 1782255932Salfred MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED); 1783255932Salfred if (!err) 1784255932Salfred *idx = get_param_l(&out_param); 1785255932Salfred 1786255932Salfred return err; 1787219820Sjeff } 1788255932Salfred return __mlx4_counter_alloc(dev, idx); 1789219820Sjeff} 1790219820SjeffEXPORT_SYMBOL_GPL(mlx4_counter_alloc); 1791219820Sjeff 1792255932Salfredvoid __mlx4_counter_free(struct mlx4_dev *dev, u32 idx) 1793255932Salfred{ 1794255932Salfred mlx4_bitmap_free(&mlx4_priv(dev)->counters_bitmap, idx); 1795255932Salfred return; 1796255932Salfred} 1797255932Salfred 1798219820Sjeffvoid mlx4_counter_free(struct mlx4_dev *dev, u32 idx) 1799219820Sjeff{ 1800255932Salfred u64 in_param = 0; 1801255932Salfred 1802255932Salfred if (mlx4_is_mfunc(dev)) { 1803255932Salfred set_param_l(&in_param, idx); 1804255932Salfred mlx4_cmd(dev, in_param, RES_COUNTER, RES_OP_RESERVE, 1805255932Salfred MLX4_CMD_FREE_RES, MLX4_CMD_TIME_CLASS_A, 1806255932Salfred MLX4_CMD_WRAPPED); 1807219820Sjeff return; 1808219820Sjeff } 1809255932Salfred __mlx4_counter_free(dev, idx); 1810219820Sjeff} 1811219820SjeffEXPORT_SYMBOL_GPL(mlx4_counter_free); 1812219820Sjeff 1813219820Sjeffstatic int mlx4_setup_hca(struct mlx4_dev *dev) 1814219820Sjeff{ 1815219820Sjeff struct mlx4_priv *priv = mlx4_priv(dev); 1816219820Sjeff int err; 1817219820Sjeff int port; 1818219820Sjeff __be32 ib_port_default_caps; 1819219820Sjeff 1820219820Sjeff err = mlx4_init_uar_table(dev); 1821219820Sjeff if (err) { 1822219820Sjeff mlx4_err(dev, "Failed to initialize " 1823255932Salfred "user access region table (err=%d), aborting.\n", 1824255932Salfred err); 1825219820Sjeff return err; 1826219820Sjeff } 1827219820Sjeff 1828219820Sjeff err = mlx4_uar_alloc(dev, &priv->driver_uar); 1829219820Sjeff if (err) { 1830255932Salfred mlx4_err(dev, "Failed to allocate driver access region " 1831255932Salfred "(err=%d), aborting.\n", err); 1832219820Sjeff goto err_uar_table_free; 1833219820Sjeff } 1834219820Sjeff 1835255932Salfred priv->kar = ioremap((phys_addr_t) priv->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE); 1836219820Sjeff if (!priv->kar) { 1837219820Sjeff mlx4_err(dev, "Couldn't map kernel access region, " 1838219820Sjeff "aborting.\n"); 1839219820Sjeff err = -ENOMEM; 1840219820Sjeff goto err_uar_free; 1841219820Sjeff } 1842219820Sjeff 1843219820Sjeff err = mlx4_init_pd_table(dev); 1844219820Sjeff if (err) { 1845219820Sjeff mlx4_err(dev, "Failed to initialize " 1846255932Salfred "protection domain table (err=%d), aborting.\n", err); 1847219820Sjeff goto err_kar_unmap; 1848219820Sjeff } 1849219820Sjeff 1850219820Sjeff err = mlx4_init_xrcd_table(dev); 1851219820Sjeff if (err) { 1852255932Salfred mlx4_err(dev, "Failed to initialize " 1853255932Salfred "reliable connection domain table (err=%d), " 1854255932Salfred "aborting.\n", err); 1855219820Sjeff goto err_pd_table_free; 1856219820Sjeff } 1857219820Sjeff 1858219820Sjeff err = mlx4_init_mr_table(dev); 1859219820Sjeff if (err) { 1860219820Sjeff mlx4_err(dev, "Failed to initialize " 1861255932Salfred "memory region table (err=%d), aborting.\n", err); 1862219820Sjeff goto err_xrcd_table_free; 1863219820Sjeff } 1864219820Sjeff 1865219820Sjeff err = mlx4_init_eq_table(dev); 1866219820Sjeff if (err) { 1867219820Sjeff mlx4_err(dev, "Failed to initialize " 1868255932Salfred "event queue table (err=%d), aborting.\n", err); 1869219820Sjeff goto err_mr_table_free; 1870219820Sjeff } 1871219820Sjeff 1872219820Sjeff err = mlx4_cmd_use_events(dev); 1873219820Sjeff if (err) { 1874219820Sjeff mlx4_err(dev, "Failed to switch to event-driven " 1875255932Salfred "firmware commands (err=%d), aborting.\n", err); 1876219820Sjeff goto err_eq_table_free; 1877219820Sjeff } 1878219820Sjeff 1879219820Sjeff err = mlx4_NOP(dev); 1880219820Sjeff if (err) { 1881219820Sjeff if (dev->flags & MLX4_FLAG_MSI_X) { 1882219820Sjeff mlx4_warn(dev, "NOP command failed to generate MSI-X " 1883219820Sjeff "interrupt IRQ %d).\n", 1884219820Sjeff priv->eq_table.eq[dev->caps.num_comp_vectors].irq); 1885219820Sjeff mlx4_warn(dev, "Trying again without MSI-X.\n"); 1886219820Sjeff } else { 1887219820Sjeff mlx4_err(dev, "NOP command failed to generate interrupt " 1888219820Sjeff "(IRQ %d), aborting.\n", 1889219820Sjeff priv->eq_table.eq[dev->caps.num_comp_vectors].irq); 1890219820Sjeff mlx4_err(dev, "BIOS or ACPI interrupt routing problem?\n"); 1891219820Sjeff } 1892219820Sjeff 1893219820Sjeff goto err_cmd_poll; 1894219820Sjeff } 1895219820Sjeff 1896219820Sjeff mlx4_dbg(dev, "NOP command IRQ test passed\n"); 1897219820Sjeff 1898219820Sjeff err = mlx4_init_cq_table(dev); 1899219820Sjeff if (err) { 1900219820Sjeff mlx4_err(dev, "Failed to initialize " 1901255932Salfred "completion queue table (err=%d), aborting.\n", err); 1902219820Sjeff goto err_cmd_poll; 1903219820Sjeff } 1904219820Sjeff 1905219820Sjeff err = mlx4_init_srq_table(dev); 1906219820Sjeff if (err) { 1907219820Sjeff mlx4_err(dev, "Failed to initialize " 1908255932Salfred "shared receive queue table (err=%d), aborting.\n", 1909255932Salfred err); 1910219820Sjeff goto err_cq_table_free; 1911219820Sjeff } 1912219820Sjeff 1913219820Sjeff err = mlx4_init_qp_table(dev); 1914219820Sjeff if (err) { 1915219820Sjeff mlx4_err(dev, "Failed to initialize " 1916255932Salfred "queue pair table (err=%d), aborting.\n", err); 1917219820Sjeff goto err_srq_table_free; 1918219820Sjeff } 1919219820Sjeff 1920255932Salfred if (!mlx4_is_slave(dev)) { 1921255932Salfred err = mlx4_init_mcg_table(dev); 1922255932Salfred if (err) { 1923255932Salfred mlx4_err(dev, "Failed to initialize " 1924255932Salfred "multicast group table (err=%d), aborting.\n", 1925255932Salfred err); 1926255932Salfred goto err_qp_table_free; 1927255932Salfred } 1928219820Sjeff 1929255932Salfred err = mlx4_init_counters_table(dev); 1930255932Salfred if (err && err != -ENOENT) { 1931255932Salfred mlx4_err(dev, "Failed to initialize counters table (err=%d), " 1932255932Salfred "aborting.\n", err); 1933255932Salfred goto err_mcg_table_free; 1934255932Salfred } 1935219820Sjeff 1936255932Salfred for (port = 1; port <= dev->caps.num_ports; port++) { 1937255932Salfred ib_port_default_caps = 0; 1938255932Salfred err = mlx4_get_port_ib_caps(dev, port, 1939255932Salfred &ib_port_default_caps); 1940255932Salfred if (err) 1941255932Salfred mlx4_warn(dev, "failed to get port %d default " 1942255932Salfred "ib capabilities (%d). Continuing " 1943255932Salfred "with caps = 0\n", port, err); 1944255932Salfred dev->caps.ib_port_def_cap[port] = ib_port_default_caps; 1945255932Salfred 1946255932Salfred /* initialize per-slave default ib port capabilities */ 1947255932Salfred if (mlx4_is_master(dev)) { 1948255932Salfred int i; 1949255932Salfred for (i = 0; i < dev->num_slaves; i++) { 1950255932Salfred if (i == mlx4_master_func_num(dev)) 1951255932Salfred continue; 1952255932Salfred priv->mfunc.master.slave_state[i].ib_cap_mask[port] = 1953255932Salfred ib_port_default_caps; 1954255932Salfred } 1955255932Salfred } 1956255932Salfred 1957255932Salfred if (mlx4_is_mfunc(dev)) 1958255932Salfred dev->caps.port_ib_mtu[port] = IB_MTU_2048; 1959255932Salfred else 1960255932Salfred dev->caps.port_ib_mtu[port] = IB_MTU_4096; 1961255932Salfred 1962255932Salfred err = mlx4_SET_PORT(dev, port, mlx4_is_master(dev) ? 1963255932Salfred dev->caps.pkey_table_len[port] : -1); 1964255932Salfred if (err) { 1965255932Salfred mlx4_err(dev, "Failed to set port %d (err=%d), " 1966255932Salfred "aborting\n", port, err); 1967255932Salfred goto err_counters_table_free; 1968255932Salfred } 1969219820Sjeff } 1970219820Sjeff } 1971219820Sjeff 1972219820Sjeff return 0; 1973219820Sjeff 1974219820Sjefferr_counters_table_free: 1975219820Sjeff mlx4_cleanup_counters_table(dev); 1976219820Sjeff 1977219820Sjefferr_mcg_table_free: 1978219820Sjeff mlx4_cleanup_mcg_table(dev); 1979219820Sjeff 1980219820Sjefferr_qp_table_free: 1981219820Sjeff mlx4_cleanup_qp_table(dev); 1982219820Sjeff 1983219820Sjefferr_srq_table_free: 1984219820Sjeff mlx4_cleanup_srq_table(dev); 1985219820Sjeff 1986219820Sjefferr_cq_table_free: 1987219820Sjeff mlx4_cleanup_cq_table(dev); 1988219820Sjeff 1989219820Sjefferr_cmd_poll: 1990219820Sjeff mlx4_cmd_use_polling(dev); 1991219820Sjeff 1992219820Sjefferr_eq_table_free: 1993219820Sjeff mlx4_cleanup_eq_table(dev); 1994219820Sjeff 1995219820Sjefferr_mr_table_free: 1996219820Sjeff mlx4_cleanup_mr_table(dev); 1997219820Sjeff 1998219820Sjefferr_xrcd_table_free: 1999219820Sjeff mlx4_cleanup_xrcd_table(dev); 2000219820Sjeff 2001219820Sjefferr_pd_table_free: 2002219820Sjeff mlx4_cleanup_pd_table(dev); 2003219820Sjeff 2004219820Sjefferr_kar_unmap: 2005219820Sjeff iounmap(priv->kar); 2006219820Sjeff 2007219820Sjefferr_uar_free: 2008219820Sjeff mlx4_uar_free(dev, &priv->driver_uar); 2009219820Sjeff 2010219820Sjefferr_uar_table_free: 2011219820Sjeff mlx4_cleanup_uar_table(dev); 2012219820Sjeff return err; 2013219820Sjeff} 2014219820Sjeff 2015219820Sjeffstatic void mlx4_enable_msi_x(struct mlx4_dev *dev) 2016219820Sjeff{ 2017219820Sjeff struct mlx4_priv *priv = mlx4_priv(dev); 2018219820Sjeff struct msix_entry *entries; 2019255932Salfred int nreq = min_t(int, dev->caps.num_ports * 2020255932Salfred min_t(int, num_possible_cpus() + 1, MAX_MSIX_P_PORT) 2021255932Salfred + MSIX_LEGACY_SZ, MAX_MSIX); 2022219820Sjeff int err; 2023219820Sjeff int i; 2024219820Sjeff 2025219820Sjeff if (msi_x) { 2026219820Sjeff nreq = min_t(int, dev->caps.num_eqs - dev->caps.reserved_eqs, 2027255932Salfred nreq); 2028255932Salfred 2029219820Sjeff entries = kcalloc(nreq, sizeof *entries, GFP_KERNEL); 2030219820Sjeff if (!entries) 2031219820Sjeff goto no_msi; 2032219820Sjeff 2033219820Sjeff for (i = 0; i < nreq; ++i) 2034219820Sjeff entries[i].entry = i; 2035219820Sjeff 2036219820Sjeff retry: 2037219820Sjeff err = pci_enable_msix(dev->pdev, entries, nreq); 2038219820Sjeff if (err) { 2039219820Sjeff /* Try again if at least 2 vectors are available */ 2040219820Sjeff if (err > 1) { 2041219820Sjeff mlx4_info(dev, "Requested %d vectors, " 2042219820Sjeff "but only %d MSI-X vectors available, " 2043219820Sjeff "trying again\n", nreq, err); 2044219820Sjeff nreq = err; 2045219820Sjeff goto retry; 2046219820Sjeff } 2047219820Sjeff kfree(entries); 2048219820Sjeff goto no_msi; 2049219820Sjeff } 2050219820Sjeff 2051255932Salfred if (nreq < 2052255932Salfred MSIX_LEGACY_SZ + dev->caps.num_ports * MIN_MSIX_P_PORT) { 2053255932Salfred /*Working in legacy mode , all EQ's shared*/ 2054255932Salfred dev->caps.comp_pool = 0; 2055255932Salfred dev->caps.num_comp_vectors = nreq - 1; 2056255932Salfred } else { 2057255932Salfred dev->caps.comp_pool = nreq - MSIX_LEGACY_SZ; 2058255932Salfred dev->caps.num_comp_vectors = MSIX_LEGACY_SZ - 1; 2059255932Salfred } 2060219820Sjeff for (i = 0; i < nreq; ++i) 2061219820Sjeff priv->eq_table.eq[i].irq = entries[i].vector; 2062219820Sjeff 2063219820Sjeff dev->flags |= MLX4_FLAG_MSI_X; 2064219820Sjeff 2065219820Sjeff kfree(entries); 2066219820Sjeff return; 2067219820Sjeff } 2068219820Sjeff 2069219820Sjeffno_msi: 2070219820Sjeff dev->caps.num_comp_vectors = 1; 2071255932Salfred dev->caps.comp_pool = 0; 2072219820Sjeff 2073219820Sjeff for (i = 0; i < 2; ++i) 2074219820Sjeff priv->eq_table.eq[i].irq = dev->pdev->irq; 2075219820Sjeff} 2076219820Sjeff 2077219820Sjeffstatic int mlx4_init_port_info(struct mlx4_dev *dev, int port) 2078219820Sjeff{ 2079219820Sjeff struct mlx4_port_info *info = &mlx4_priv(dev)->port[port]; 2080219820Sjeff int err = 0; 2081219820Sjeff 2082219820Sjeff info->dev = dev; 2083219820Sjeff info->port = port; 2084255932Salfred if (!mlx4_is_slave(dev)) { 2085255932Salfred mlx4_init_mac_table(dev, &info->mac_table); 2086255932Salfred mlx4_init_vlan_table(dev, &info->vlan_table); 2087255932Salfred info->base_qpn = mlx4_get_base_qpn(dev, port); 2088255932Salfred } 2089219820Sjeff 2090219820Sjeff sprintf(info->dev_name, "mlx4_port%d", port); 2091219820Sjeff info->port_attr.attr.name = info->dev_name; 2092255932Salfred if (mlx4_is_mfunc(dev)) 2093255932Salfred info->port_attr.attr.mode = S_IRUGO; 2094255932Salfred else { 2095255932Salfred info->port_attr.attr.mode = S_IRUGO | S_IWUSR; 2096255932Salfred info->port_attr.store = set_port_type; 2097255932Salfred } 2098219820Sjeff info->port_attr.show = show_port_type; 2099255932Salfred sysfs_attr_init(&info->port_attr.attr); 2100219820Sjeff 2101219820Sjeff err = device_create_file(&dev->pdev->dev, &info->port_attr); 2102219820Sjeff if (err) { 2103219820Sjeff mlx4_err(dev, "Failed to create file for port %d\n", port); 2104219820Sjeff info->port = -1; 2105219820Sjeff } 2106219820Sjeff 2107255932Salfred sprintf(info->dev_mtu_name, "mlx4_port%d_mtu", port); 2108255932Salfred info->port_mtu_attr.attr.name = info->dev_mtu_name; 2109255932Salfred if (mlx4_is_mfunc(dev)) 2110255932Salfred info->port_mtu_attr.attr.mode = S_IRUGO; 2111255932Salfred else { 2112255932Salfred info->port_mtu_attr.attr.mode = S_IRUGO | S_IWUSR; 2113255932Salfred info->port_mtu_attr.store = set_port_ib_mtu; 2114255932Salfred } 2115255932Salfred info->port_mtu_attr.show = show_port_ib_mtu; 2116255932Salfred sysfs_attr_init(&info->port_mtu_attr.attr); 2117255932Salfred 2118255932Salfred err = device_create_file(&dev->pdev->dev, &info->port_mtu_attr); 2119255932Salfred if (err) { 2120255932Salfred mlx4_err(dev, "Failed to create mtu file for port %d\n", port); 2121255932Salfred device_remove_file(&info->dev->pdev->dev, &info->port_attr); 2122255932Salfred info->port = -1; 2123255932Salfred } 2124255932Salfred 2125219820Sjeff return err; 2126219820Sjeff} 2127219820Sjeff 2128219820Sjeffstatic void mlx4_cleanup_port_info(struct mlx4_port_info *info) 2129219820Sjeff{ 2130219820Sjeff if (info->port < 0) 2131219820Sjeff return; 2132219820Sjeff 2133219820Sjeff device_remove_file(&info->dev->pdev->dev, &info->port_attr); 2134255932Salfred device_remove_file(&info->dev->pdev->dev, &info->port_mtu_attr); 2135219820Sjeff} 2136219820Sjeff 2137255932Salfredstatic int mlx4_init_steering(struct mlx4_dev *dev) 2138219820Sjeff{ 2139255932Salfred struct mlx4_priv *priv = mlx4_priv(dev); 2140255932Salfred int num_entries = dev->caps.num_ports; 2141255932Salfred int i, j; 2142255932Salfred 2143255932Salfred priv->steer = kzalloc(sizeof(struct mlx4_steer) * num_entries, GFP_KERNEL); 2144255932Salfred if (!priv->steer) 2145255932Salfred return -ENOMEM; 2146255932Salfred 2147255932Salfred for (i = 0; i < num_entries; i++) 2148255932Salfred for (j = 0; j < MLX4_NUM_STEERS; j++) { 2149255932Salfred INIT_LIST_HEAD(&priv->steer[i].promisc_qps[j]); 2150255932Salfred INIT_LIST_HEAD(&priv->steer[i].steer_entries[j]); 2151255932Salfred } 2152255932Salfred return 0; 2153219820Sjeff} 2154219820Sjeff 2155255932Salfredstatic void mlx4_clear_steering(struct mlx4_dev *dev) 2156219820Sjeff{ 2157255932Salfred struct mlx4_priv *priv = mlx4_priv(dev); 2158255932Salfred struct mlx4_steer_index *entry, *tmp_entry; 2159255932Salfred struct mlx4_promisc_qp *pqp, *tmp_pqp; 2160255932Salfred int num_entries = dev->caps.num_ports; 2161255932Salfred int i, j; 2162255932Salfred 2163255932Salfred for (i = 0; i < num_entries; i++) { 2164255932Salfred for (j = 0; j < MLX4_NUM_STEERS; j++) { 2165255932Salfred list_for_each_entry_safe(pqp, tmp_pqp, 2166255932Salfred &priv->steer[i].promisc_qps[j], 2167255932Salfred list) { 2168255932Salfred list_del(&pqp->list); 2169255932Salfred kfree(pqp); 2170255932Salfred } 2171255932Salfred list_for_each_entry_safe(entry, tmp_entry, 2172255932Salfred &priv->steer[i].steer_entries[j], 2173255932Salfred list) { 2174255932Salfred list_del(&entry->list); 2175255932Salfred list_for_each_entry_safe(pqp, tmp_pqp, 2176255932Salfred &entry->duplicates, 2177255932Salfred list) { 2178255932Salfred list_del(&pqp->list); 2179255932Salfred kfree(pqp); 2180255932Salfred } 2181255932Salfred kfree(entry); 2182255932Salfred } 2183255932Salfred } 2184255932Salfred } 2185255932Salfred kfree(priv->steer); 2186255932Salfred} 2187255932Salfred 2188255932Salfredstatic int extended_func_num(struct pci_dev *pdev) 2189255932Salfred{ 2190255932Salfred return PCI_SLOT(pdev->devfn) * 8 + PCI_FUNC(pdev->devfn); 2191255932Salfred} 2192255932Salfred 2193255932Salfred#define MLX4_OWNER_BASE 0x8069c 2194255932Salfred#define MLX4_OWNER_SIZE 4 2195255932Salfred 2196255932Salfredstatic int mlx4_get_ownership(struct mlx4_dev *dev) 2197255932Salfred{ 2198255932Salfred void __iomem *owner; 2199255932Salfred u32 ret; 2200255932Salfred 2201255932Salfred if (pci_channel_offline(dev->pdev)) 2202255932Salfred return -EIO; 2203255932Salfred 2204255932Salfred owner = ioremap(pci_resource_start(dev->pdev, 0) + MLX4_OWNER_BASE, 2205255932Salfred MLX4_OWNER_SIZE); 2206255932Salfred if (!owner) { 2207255932Salfred mlx4_err(dev, "Failed to obtain ownership bit\n"); 2208255932Salfred return -ENOMEM; 2209255932Salfred } 2210255932Salfred 2211255932Salfred ret = readl(owner); 2212255932Salfred iounmap(owner); 2213255932Salfred return (int) !!ret; 2214255932Salfred} 2215255932Salfred 2216255932Salfredstatic void mlx4_free_ownership(struct mlx4_dev *dev) 2217255932Salfred{ 2218255932Salfred void __iomem *owner; 2219255932Salfred 2220255932Salfred if (pci_channel_offline(dev->pdev)) 2221255932Salfred return; 2222255932Salfred 2223255932Salfred owner = ioremap(pci_resource_start(dev->pdev, 0) + MLX4_OWNER_BASE, 2224255932Salfred MLX4_OWNER_SIZE); 2225255932Salfred if (!owner) { 2226255932Salfred mlx4_err(dev, "Failed to obtain ownership bit\n"); 2227255932Salfred return; 2228255932Salfred } 2229255932Salfred writel(0, owner); 2230255932Salfred msleep(1000); 2231255932Salfred iounmap(owner); 2232255932Salfred} 2233255932Salfred 2234255932Salfredstatic int __mlx4_init_one(struct pci_dev *pdev, int pci_dev_data) 2235255932Salfred{ 2236219820Sjeff struct mlx4_priv *priv; 2237219820Sjeff struct mlx4_dev *dev; 2238219820Sjeff int err; 2239219820Sjeff int port; 2240219820Sjeff 2241255932Salfred pr_info(DRV_NAME ": Initializing %s\n", pci_name(pdev)); 2242219820Sjeff 2243219820Sjeff err = pci_enable_device(pdev); 2244219820Sjeff if (err) { 2245219820Sjeff dev_err(&pdev->dev, "Cannot enable PCI device, " 2246219820Sjeff "aborting.\n"); 2247219820Sjeff return err; 2248219820Sjeff } 2249255932Salfred if (num_vfs > MLX4_MAX_NUM_VF) { 2250255932Salfred dev_err(&pdev->dev, "There are more VF's (%d) than allowed(%d)\n", 2251255932Salfred num_vfs, MLX4_MAX_NUM_VF); 2252255932Salfred return -EINVAL; 2253255932Salfred } 2254219820Sjeff 2255255932Salfred if (num_vfs < 0) { 2256255932Salfred dev_err(&pdev->dev, "num_vfs module parameter cannot be negative\n"); 2257255932Salfred return -EINVAL; 2258255932Salfred } 2259219820Sjeff /* 2260255932Salfred * Check for BARs. 2261219820Sjeff */ 2262255932Salfred if (!(pci_dev_data & MLX4_PCI_DEV_IS_VF) && 2263255932Salfred !(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) { 2264255932Salfred dev_err(&pdev->dev, "Missing DCS, aborting." 2265255932Salfred "(driver_data: 0x%x, pci_resource_flags(pdev, 0):0x%x)\n", 2266255932Salfred pci_dev_data, pci_resource_flags(pdev, 0)); 2267219820Sjeff err = -ENODEV; 2268219820Sjeff goto err_disable_pdev; 2269219820Sjeff } 2270219820Sjeff if (!(pci_resource_flags(pdev, 2) & IORESOURCE_MEM)) { 2271219820Sjeff dev_err(&pdev->dev, "Missing UAR, aborting.\n"); 2272219820Sjeff err = -ENODEV; 2273219820Sjeff goto err_disable_pdev; 2274219820Sjeff } 2275219820Sjeff 2276255932Salfred err = pci_request_regions(pdev, DRV_NAME); 2277219820Sjeff if (err) { 2278255932Salfred dev_err(&pdev->dev, "Couldn't get PCI resources, aborting\n"); 2279219820Sjeff goto err_disable_pdev; 2280219820Sjeff } 2281219820Sjeff 2282219820Sjeff pci_set_master(pdev); 2283219820Sjeff 2284219820Sjeff err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 2285219820Sjeff if (err) { 2286219820Sjeff dev_warn(&pdev->dev, "Warning: couldn't set 64-bit PCI DMA mask.\n"); 2287219820Sjeff err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 2288219820Sjeff if (err) { 2289219820Sjeff dev_err(&pdev->dev, "Can't set PCI DMA mask, aborting.\n"); 2290255932Salfred goto err_release_regions; 2291219820Sjeff } 2292219820Sjeff } 2293219820Sjeff err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)); 2294219820Sjeff if (err) { 2295219820Sjeff dev_warn(&pdev->dev, "Warning: couldn't set 64-bit " 2296219820Sjeff "consistent PCI DMA mask.\n"); 2297219820Sjeff err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 2298219820Sjeff if (err) { 2299219820Sjeff dev_err(&pdev->dev, "Can't set consistent PCI DMA mask, " 2300219820Sjeff "aborting.\n"); 2301255932Salfred goto err_release_regions; 2302219820Sjeff } 2303219820Sjeff } 2304219820Sjeff 2305255932Salfred /* Allow large DMA segments, up to the firmware limit of 1 GB */ 2306255932Salfred dma_set_max_seg_size(&pdev->dev, 1024 * 1024 * 1024); 2307255932Salfred 2308219820Sjeff priv = kzalloc(sizeof *priv, GFP_KERNEL); 2309219820Sjeff if (!priv) { 2310219820Sjeff dev_err(&pdev->dev, "Device struct alloc failed, " 2311219820Sjeff "aborting.\n"); 2312219820Sjeff err = -ENOMEM; 2313255932Salfred goto err_release_regions; 2314219820Sjeff } 2315219820Sjeff 2316219820Sjeff dev = &priv->dev; 2317219820Sjeff dev->pdev = pdev; 2318219820Sjeff INIT_LIST_HEAD(&priv->ctx_list); 2319219820Sjeff spin_lock_init(&priv->ctx_lock); 2320219820Sjeff 2321219820Sjeff mutex_init(&priv->port_mutex); 2322219820Sjeff 2323219820Sjeff INIT_LIST_HEAD(&priv->pgdir_list); 2324219820Sjeff mutex_init(&priv->pgdir_mutex); 2325219820Sjeff 2326219820Sjeff INIT_LIST_HEAD(&priv->bf_list); 2327219820Sjeff mutex_init(&priv->bf_mutex); 2328219820Sjeff 2329255932Salfred dev->rev_id = pdev->revision; 2330255932Salfred dev->numa_node = dev_to_node(&pdev->dev); 2331255932Salfred /* Detect if this device is a virtual function */ 2332255932Salfred if (pci_dev_data & MLX4_PCI_DEV_IS_VF) { 2333255932Salfred /* When acting as pf, we normally skip vfs unless explicitly 2334255932Salfred * requested to probe them. */ 2335255932Salfred if (num_vfs && extended_func_num(pdev) > probe_vf) { 2336255932Salfred mlx4_warn(dev, "Skipping virtual function:%d\n", 2337255932Salfred extended_func_num(pdev)); 2338255932Salfred err = -ENODEV; 2339255932Salfred goto err_free_dev; 2340255932Salfred } 2341255932Salfred mlx4_warn(dev, "Detected virtual function - running in slave mode\n"); 2342255932Salfred dev->flags |= MLX4_FLAG_SLAVE; 2343255932Salfred } else { 2344255932Salfred /* We reset the device and enable SRIOV only for physical 2345255932Salfred * devices. Try to claim ownership on the device; 2346255932Salfred * if already taken, skip -- do not allow multiple PFs */ 2347255932Salfred err = mlx4_get_ownership(dev); 2348255932Salfred if (err) { 2349255932Salfred if (err < 0) 2350255932Salfred goto err_free_dev; 2351255932Salfred else { 2352255932Salfred mlx4_warn(dev, "Multiple PFs not yet supported." 2353255932Salfred " Skipping PF.\n"); 2354255932Salfred err = -EINVAL; 2355255932Salfred goto err_free_dev; 2356255932Salfred } 2357255932Salfred } 2358255932Salfred 2359255932Salfred if (num_vfs) { 2360255932Salfred mlx4_warn(dev, "Enabling SR-IOV with %d VFs\n", num_vfs); 2361255932Salfred err = pci_enable_sriov(pdev, num_vfs); 2362255932Salfred if (err) { 2363255932Salfred mlx4_err(dev, "Failed to enable SR-IOV, continuing without SR-IOV (err = %d).\n", 2364255932Salfred err); 2365255932Salfred err = 0; 2366255932Salfred } else { 2367255932Salfred mlx4_warn(dev, "Running in master mode\n"); 2368255932Salfred dev->flags |= MLX4_FLAG_SRIOV | 2369255932Salfred MLX4_FLAG_MASTER; 2370255932Salfred dev->num_vfs = num_vfs; 2371255932Salfred } 2372255932Salfred } 2373255932Salfred 2374255932Salfred atomic_set(&priv->opreq_count, 0); 2375255932Salfred INIT_WORK(&priv->opreq_task, mlx4_opreq_action); 2376255932Salfred 2377255932Salfred /* 2378255932Salfred * Now reset the HCA before we touch the PCI capabilities or 2379255932Salfred * attempt a firmware command, since a boot ROM may have left 2380255932Salfred * the HCA in an undefined state. 2381255932Salfred */ 2382255932Salfred err = mlx4_reset(dev); 2383255932Salfred if (err) { 2384255932Salfred mlx4_err(dev, "Failed to reset HCA, aborting.\n"); 2385255932Salfred goto err_sriov; 2386255932Salfred } 2387219820Sjeff } 2388219820Sjeff 2389255932Salfredslave_start: 2390255932Salfred err = mlx4_cmd_init(dev); 2391255932Salfred if (err) { 2392219820Sjeff mlx4_err(dev, "Failed to init command interface, aborting.\n"); 2393255932Salfred goto err_sriov; 2394219820Sjeff } 2395219820Sjeff 2396255932Salfred /* In slave functions, the communication channel must be initialized 2397255932Salfred * before posting commands. Also, init num_slaves before calling 2398255932Salfred * mlx4_init_hca */ 2399255932Salfred if (mlx4_is_mfunc(dev)) { 2400255932Salfred if (mlx4_is_master(dev)) 2401255932Salfred dev->num_slaves = MLX4_MAX_NUM_SLAVES; 2402255932Salfred else { 2403255932Salfred dev->num_slaves = 0; 2404255932Salfred err = mlx4_multi_func_init(dev); 2405255932Salfred if (err) { 2406255932Salfred mlx4_err(dev, "Failed to init slave mfunc" 2407255932Salfred " interface, aborting.\n"); 2408255932Salfred goto err_cmd; 2409255932Salfred } 2410255932Salfred } 2411255932Salfred } 2412255932Salfred 2413219820Sjeff err = mlx4_init_hca(dev); 2414255932Salfred if (err) { 2415255932Salfred if (err == -EACCES) { 2416255932Salfred /* Not primary Physical function 2417255932Salfred * Running in slave mode */ 2418255932Salfred mlx4_cmd_cleanup(dev); 2419255932Salfred dev->flags |= MLX4_FLAG_SLAVE; 2420255932Salfred dev->flags &= ~MLX4_FLAG_MASTER; 2421255932Salfred goto slave_start; 2422255932Salfred } else 2423255932Salfred goto err_mfunc; 2424255932Salfred } 2425219820Sjeff 2426255932Salfred /* In master functions, the communication channel must be initialized 2427255932Salfred * after obtaining its address from fw */ 2428255932Salfred if (mlx4_is_master(dev)) { 2429255932Salfred err = mlx4_multi_func_init(dev); 2430255932Salfred if (err) { 2431255932Salfred mlx4_err(dev, "Failed to init master mfunc" 2432255932Salfred "interface, aborting.\n"); 2433255932Salfred goto err_close; 2434255932Salfred } 2435255932Salfred } 2436255932Salfred 2437219820Sjeff err = mlx4_alloc_eq_table(dev); 2438219820Sjeff if (err) 2439255932Salfred goto err_master_mfunc; 2440219820Sjeff 2441255932Salfred priv->msix_ctl.pool_bm = 0; 2442255932Salfred mutex_init(&priv->msix_ctl.pool_lock); 2443255932Salfred 2444219820Sjeff mlx4_enable_msi_x(dev); 2445255932Salfred if ((mlx4_is_mfunc(dev)) && 2446255932Salfred !(dev->flags & MLX4_FLAG_MSI_X)) { 2447255932Salfred err = -ENOSYS; 2448255932Salfred mlx4_err(dev, "INTx is not supported in multi-function mode." 2449255932Salfred " aborting.\n"); 2450255932Salfred goto err_free_eq; 2451255932Salfred } 2452219820Sjeff 2453255932Salfred if (!mlx4_is_slave(dev)) { 2454255932Salfred err = mlx4_init_steering(dev); 2455255932Salfred if (err) 2456255932Salfred goto err_free_eq; 2457255932Salfred } 2458255932Salfred 2459219820Sjeff err = mlx4_setup_hca(dev); 2460255932Salfred if (err == -EBUSY && (dev->flags & MLX4_FLAG_MSI_X) && 2461255932Salfred !mlx4_is_mfunc(dev)) { 2462219820Sjeff dev->flags &= ~MLX4_FLAG_MSI_X; 2463255932Salfred dev->caps.num_comp_vectors = 1; 2464255932Salfred dev->caps.comp_pool = 0; 2465219820Sjeff pci_disable_msix(pdev); 2466219820Sjeff err = mlx4_setup_hca(dev); 2467219820Sjeff } 2468219820Sjeff 2469219820Sjeff if (err) 2470255932Salfred goto err_steer; 2471219820Sjeff 2472255932Salfred mlx4_init_quotas(dev); 2473255932Salfred 2474219820Sjeff for (port = 1; port <= dev->caps.num_ports; port++) { 2475219820Sjeff err = mlx4_init_port_info(dev, port); 2476219820Sjeff if (err) 2477219820Sjeff goto err_port; 2478219820Sjeff } 2479219820Sjeff 2480219820Sjeff err = mlx4_register_device(dev); 2481219820Sjeff if (err) 2482219820Sjeff goto err_port; 2483219820Sjeff 2484219820Sjeff err = mlx4_sense_init(dev); 2485219820Sjeff if (err) 2486255932Salfred goto err_port; 2487219820Sjeff 2488219820Sjeff mlx4_start_sense(dev); 2489219820Sjeff 2490255932Salfred priv->pci_dev_data = pci_dev_data; 2491219820Sjeff pci_set_drvdata(pdev, dev); 2492219820Sjeff 2493219820Sjeff return 0; 2494219820Sjeff 2495219820Sjefferr_port: 2496219820Sjeff for (--port; port >= 1; --port) 2497219820Sjeff mlx4_cleanup_port_info(&priv->port[port]); 2498219820Sjeff 2499219820Sjeff mlx4_cleanup_counters_table(dev); 2500219820Sjeff mlx4_cleanup_mcg_table(dev); 2501219820Sjeff mlx4_cleanup_qp_table(dev); 2502219820Sjeff mlx4_cleanup_srq_table(dev); 2503219820Sjeff mlx4_cleanup_cq_table(dev); 2504219820Sjeff mlx4_cmd_use_polling(dev); 2505219820Sjeff mlx4_cleanup_eq_table(dev); 2506219820Sjeff mlx4_cleanup_mr_table(dev); 2507219820Sjeff mlx4_cleanup_xrcd_table(dev); 2508219820Sjeff mlx4_cleanup_pd_table(dev); 2509219820Sjeff mlx4_cleanup_uar_table(dev); 2510219820Sjeff 2511255932Salfrederr_steer: 2512255932Salfred if (!mlx4_is_slave(dev)) 2513255932Salfred mlx4_clear_steering(dev); 2514255932Salfred 2515219820Sjefferr_free_eq: 2516219820Sjeff mlx4_free_eq_table(dev); 2517219820Sjeff 2518255932Salfrederr_master_mfunc: 2519255932Salfred if (mlx4_is_master(dev)) 2520255932Salfred mlx4_multi_func_cleanup(dev); 2521255932Salfred 2522255932Salfred if (mlx4_is_slave(dev)) { 2523255932Salfred kfree(dev->caps.qp0_tunnel); 2524255932Salfred kfree(dev->caps.qp0_proxy); 2525255932Salfred kfree(dev->caps.qp1_tunnel); 2526255932Salfred kfree(dev->caps.qp1_proxy); 2527255932Salfred } 2528255932Salfred 2529219820Sjefferr_close: 2530219820Sjeff if (dev->flags & MLX4_FLAG_MSI_X) 2531219820Sjeff pci_disable_msix(pdev); 2532219820Sjeff 2533219820Sjeff mlx4_close_hca(dev); 2534219820Sjeff 2535255932Salfrederr_mfunc: 2536255932Salfred if (mlx4_is_slave(dev)) 2537255932Salfred mlx4_multi_func_cleanup(dev); 2538255932Salfred 2539219820Sjefferr_cmd: 2540219820Sjeff mlx4_cmd_cleanup(dev); 2541219820Sjeff 2542255932Salfrederr_sriov: 2543255932Salfred if (dev->flags & MLX4_FLAG_SRIOV) 2544255932Salfred pci_disable_sriov(pdev); 2545255932Salfred 2546255932Salfred if (!mlx4_is_slave(dev)) 2547255932Salfred mlx4_free_ownership(dev); 2548255932Salfred 2549219820Sjefferr_free_dev: 2550219820Sjeff kfree(priv); 2551219820Sjeff 2552255932Salfrederr_release_regions: 2553255932Salfred pci_release_regions(pdev); 2554219820Sjeff 2555219820Sjefferr_disable_pdev: 2556219820Sjeff pci_disable_device(pdev); 2557219820Sjeff pci_set_drvdata(pdev, NULL); 2558219820Sjeff return err; 2559219820Sjeff} 2560219820Sjeff 2561219820Sjeffstatic int __devinit mlx4_init_one(struct pci_dev *pdev, 2562219820Sjeff const struct pci_device_id *id) 2563219820Sjeff{ 2564255932Salfred printk_once(KERN_INFO "%s", mlx4_version); 2565219820Sjeff 2566255932Salfred return __mlx4_init_one(pdev, id->driver_data); 2567219820Sjeff} 2568219820Sjeff 2569219820Sjeffstatic void mlx4_remove_one(struct pci_dev *pdev) 2570219820Sjeff{ 2571219820Sjeff struct mlx4_dev *dev = pci_get_drvdata(pdev); 2572219820Sjeff struct mlx4_priv *priv = mlx4_priv(dev); 2573219820Sjeff int p; 2574219820Sjeff 2575219820Sjeff if (dev) { 2576255932Salfred /* in SRIOV it is not allowed to unload the pf's 2577255932Salfred * driver while there are alive vf's */ 2578255932Salfred if (mlx4_is_master(dev)) { 2579255932Salfred if (mlx4_how_many_lives_vf(dev)) 2580255932Salfred mlx4_err(dev, "Removing PF when there are assigned VF's !!!\n"); 2581255932Salfred } 2582219820Sjeff mlx4_sense_cleanup(dev); 2583219820Sjeff mlx4_unregister_device(dev); 2584219820Sjeff 2585219820Sjeff for (p = 1; p <= dev->caps.num_ports; p++) { 2586219820Sjeff mlx4_cleanup_port_info(&priv->port[p]); 2587219820Sjeff mlx4_CLOSE_PORT(dev, p); 2588219820Sjeff } 2589219820Sjeff 2590255932Salfred if (mlx4_is_master(dev)) 2591255932Salfred mlx4_free_resource_tracker(dev, 2592255932Salfred RES_TR_FREE_SLAVES_ONLY); 2593255932Salfred 2594255932Salfred mlx4_cleanup_counters_table(dev); 2595219820Sjeff mlx4_cleanup_mcg_table(dev); 2596219820Sjeff mlx4_cleanup_qp_table(dev); 2597219820Sjeff mlx4_cleanup_srq_table(dev); 2598219820Sjeff mlx4_cleanup_cq_table(dev); 2599219820Sjeff mlx4_cmd_use_polling(dev); 2600219820Sjeff mlx4_cleanup_eq_table(dev); 2601219820Sjeff mlx4_cleanup_mr_table(dev); 2602219820Sjeff mlx4_cleanup_xrcd_table(dev); 2603219820Sjeff mlx4_cleanup_pd_table(dev); 2604219820Sjeff 2605255932Salfred if (mlx4_is_master(dev)) 2606255932Salfred mlx4_free_resource_tracker(dev, 2607255932Salfred RES_TR_FREE_STRUCTS_ONLY); 2608255932Salfred 2609219820Sjeff iounmap(priv->kar); 2610219820Sjeff mlx4_uar_free(dev, &priv->driver_uar); 2611219820Sjeff mlx4_cleanup_uar_table(dev); 2612255932Salfred if (!mlx4_is_slave(dev)) 2613255932Salfred mlx4_clear_steering(dev); 2614219820Sjeff mlx4_free_eq_table(dev); 2615255932Salfred if (mlx4_is_master(dev)) 2616255932Salfred mlx4_multi_func_cleanup(dev); 2617219820Sjeff mlx4_close_hca(dev); 2618255932Salfred if (mlx4_is_slave(dev)) 2619255932Salfred mlx4_multi_func_cleanup(dev); 2620219820Sjeff mlx4_cmd_cleanup(dev); 2621219820Sjeff 2622219820Sjeff if (dev->flags & MLX4_FLAG_MSI_X) 2623219820Sjeff pci_disable_msix(pdev); 2624255932Salfred if (dev->flags & MLX4_FLAG_SRIOV) { 2625255932Salfred mlx4_warn(dev, "Disabling SR-IOV\n"); 2626255932Salfred pci_disable_sriov(pdev); 2627255932Salfred } 2628219820Sjeff 2629255932Salfred if (!mlx4_is_slave(dev)) 2630255932Salfred mlx4_free_ownership(dev); 2631255932Salfred 2632255932Salfred kfree(dev->caps.qp0_tunnel); 2633255932Salfred kfree(dev->caps.qp0_proxy); 2634255932Salfred kfree(dev->caps.qp1_tunnel); 2635255932Salfred kfree(dev->caps.qp1_proxy); 2636255932Salfred 2637219820Sjeff kfree(priv); 2638255932Salfred pci_release_regions(pdev); 2639219820Sjeff pci_disable_device(pdev); 2640219820Sjeff pci_set_drvdata(pdev, NULL); 2641219820Sjeff } 2642219820Sjeff} 2643219820Sjeff 2644219820Sjeffint mlx4_restart_one(struct pci_dev *pdev) 2645219820Sjeff{ 2646255932Salfred struct mlx4_dev *dev = pci_get_drvdata(pdev); 2647255932Salfred struct mlx4_priv *priv = mlx4_priv(dev); 2648255932Salfred int pci_dev_data; 2649255932Salfred 2650255932Salfred pci_dev_data = priv->pci_dev_data; 2651219820Sjeff mlx4_remove_one(pdev); 2652255932Salfred return __mlx4_init_one(pdev, pci_dev_data); 2653219820Sjeff} 2654219820Sjeff 2655255932Salfredstatic DEFINE_PCI_DEVICE_TABLE(mlx4_pci_table) = { 2656255932Salfred /* MT25408 "Hermon" SDR */ 2657255932Salfred { PCI_VDEVICE(MELLANOX, 0x6340), MLX4_PCI_DEV_FORCE_SENSE_PORT }, 2658255932Salfred /* MT25408 "Hermon" DDR */ 2659255932Salfred { PCI_VDEVICE(MELLANOX, 0x634a), MLX4_PCI_DEV_FORCE_SENSE_PORT }, 2660255932Salfred /* MT25408 "Hermon" QDR */ 2661255932Salfred { PCI_VDEVICE(MELLANOX, 0x6354), MLX4_PCI_DEV_FORCE_SENSE_PORT }, 2662255932Salfred /* MT25408 "Hermon" DDR PCIe gen2 */ 2663255932Salfred { PCI_VDEVICE(MELLANOX, 0x6732), MLX4_PCI_DEV_FORCE_SENSE_PORT }, 2664255932Salfred /* MT25408 "Hermon" QDR PCIe gen2 */ 2665255932Salfred { PCI_VDEVICE(MELLANOX, 0x673c), MLX4_PCI_DEV_FORCE_SENSE_PORT }, 2666255932Salfred /* MT25408 "Hermon" EN 10GigE */ 2667255932Salfred { PCI_VDEVICE(MELLANOX, 0x6368), MLX4_PCI_DEV_FORCE_SENSE_PORT }, 2668255932Salfred /* MT25408 "Hermon" EN 10GigE PCIe gen2 */ 2669255932Salfred { PCI_VDEVICE(MELLANOX, 0x6750), MLX4_PCI_DEV_FORCE_SENSE_PORT }, 2670255932Salfred /* MT25458 ConnectX EN 10GBASE-T 10GigE */ 2671255932Salfred { PCI_VDEVICE(MELLANOX, 0x6372), MLX4_PCI_DEV_FORCE_SENSE_PORT }, 2672255932Salfred /* MT25458 ConnectX EN 10GBASE-T+Gen2 10GigE */ 2673255932Salfred { PCI_VDEVICE(MELLANOX, 0x675a), MLX4_PCI_DEV_FORCE_SENSE_PORT }, 2674255932Salfred /* MT26468 ConnectX EN 10GigE PCIe gen2*/ 2675255932Salfred { PCI_VDEVICE(MELLANOX, 0x6764), MLX4_PCI_DEV_FORCE_SENSE_PORT }, 2676255932Salfred /* MT26438 ConnectX EN 40GigE PCIe gen2 5GT/s */ 2677255932Salfred { PCI_VDEVICE(MELLANOX, 0x6746), MLX4_PCI_DEV_FORCE_SENSE_PORT }, 2678255932Salfred /* MT26478 ConnectX2 40GigE PCIe gen2 */ 2679255932Salfred { PCI_VDEVICE(MELLANOX, 0x676e), MLX4_PCI_DEV_FORCE_SENSE_PORT }, 2680255932Salfred /* MT25400 Family [ConnectX-2 Virtual Function] */ 2681255932Salfred { PCI_VDEVICE(MELLANOX, 0x1002), MLX4_PCI_DEV_IS_VF }, 2682255932Salfred /* MT27500 Family [ConnectX-3] */ 2683255932Salfred { PCI_VDEVICE(MELLANOX, 0x1003), 0 }, 2684255932Salfred /* MT27500 Family [ConnectX-3 Virtual Function] */ 2685255932Salfred { PCI_VDEVICE(MELLANOX, 0x1004), MLX4_PCI_DEV_IS_VF }, 2686255932Salfred { PCI_VDEVICE(MELLANOX, 0x1005), 0 }, /* MT27510 Family */ 2687255932Salfred { PCI_VDEVICE(MELLANOX, 0x1006), 0 }, /* MT27511 Family */ 2688255932Salfred { PCI_VDEVICE(MELLANOX, 0x1007), 0 }, /* MT27520 Family */ 2689255932Salfred { PCI_VDEVICE(MELLANOX, 0x1008), 0 }, /* MT27521 Family */ 2690255932Salfred { PCI_VDEVICE(MELLANOX, 0x1009), 0 }, /* MT27530 Family */ 2691255932Salfred { PCI_VDEVICE(MELLANOX, 0x100a), 0 }, /* MT27531 Family */ 2692255932Salfred { PCI_VDEVICE(MELLANOX, 0x100b), 0 }, /* MT27540 Family */ 2693255932Salfred { PCI_VDEVICE(MELLANOX, 0x100c), 0 }, /* MT27541 Family */ 2694255932Salfred { PCI_VDEVICE(MELLANOX, 0x100d), 0 }, /* MT27550 Family */ 2695255932Salfred { PCI_VDEVICE(MELLANOX, 0x100e), 0 }, /* MT27551 Family */ 2696255932Salfred { PCI_VDEVICE(MELLANOX, 0x100f), 0 }, /* MT27560 Family */ 2697255932Salfred { PCI_VDEVICE(MELLANOX, 0x1010), 0 }, /* MT27561 Family */ 2698219820Sjeff { 0, } 2699219820Sjeff}; 2700219820Sjeff 2701219820SjeffMODULE_DEVICE_TABLE(pci, mlx4_pci_table); 2702219820Sjeff 2703255932Salfredstatic pci_ers_result_t mlx4_pci_err_detected(struct pci_dev *pdev, 2704255932Salfred pci_channel_state_t state) 2705255932Salfred{ 2706255932Salfred mlx4_remove_one(pdev); 2707255932Salfred 2708255932Salfred return state == pci_channel_io_perm_failure ? 2709255932Salfred PCI_ERS_RESULT_DISCONNECT : PCI_ERS_RESULT_NEED_RESET; 2710255932Salfred} 2711255932Salfred 2712255932Salfredstatic pci_ers_result_t mlx4_pci_slot_reset(struct pci_dev *pdev) 2713255932Salfred{ 2714255932Salfred int ret = __mlx4_init_one(pdev, 0); 2715255932Salfred 2716255932Salfred return ret ? PCI_ERS_RESULT_DISCONNECT : PCI_ERS_RESULT_RECOVERED; 2717255932Salfred} 2718255932Salfred 2719255932Salfredstatic const struct pci_error_handlers mlx4_err_handler = { 2720255932Salfred .error_detected = mlx4_pci_err_detected, 2721255932Salfred .slot_reset = mlx4_pci_slot_reset, 2722255932Salfred}; 2723255932Salfred 2724255932Salfredstatic int suspend(struct pci_dev *pdev, pm_message_t state) 2725255932Salfred{ 2726255932Salfred mlx4_remove_one(pdev); 2727255932Salfred 2728255932Salfred if (mlx4_log_num_mgm_entry_size != -1 && 2729255932Salfred (mlx4_log_num_mgm_entry_size < MLX4_MIN_MGM_LOG_ENTRY_SIZE || 2730255932Salfred mlx4_log_num_mgm_entry_size > MLX4_MAX_MGM_LOG_ENTRY_SIZE)) { 2731255932Salfred pr_warning("mlx4_core: mlx4_log_num_mgm_entry_size (%d) not " 2732255932Salfred "in legal range (-1 or %d..%d)\n", 2733255932Salfred mlx4_log_num_mgm_entry_size, 2734255932Salfred MLX4_MIN_MGM_LOG_ENTRY_SIZE, 2735255932Salfred MLX4_MAX_MGM_LOG_ENTRY_SIZE); 2736255932Salfred return -1; 2737255932Salfred } 2738255932Salfred return 0; 2739255932Salfred} 2740255932Salfred 2741255932Salfredstatic int resume(struct pci_dev *pdev) 2742255932Salfred{ 2743255932Salfred return __mlx4_init_one(pdev, 0); 2744255932Salfred} 2745255932Salfred 2746219820Sjeffstatic struct pci_driver mlx4_driver = { 2747219820Sjeff .name = DRV_NAME, 2748255932Salfred .id_table = (struct pci_device_id*)mlx4_pci_table, 2749219820Sjeff .probe = mlx4_init_one, 2750255932Salfred .remove = __devexit_p(mlx4_remove_one), 2751255932Salfred .suspend = suspend, 2752255932Salfred .resume = resume, 2753255932Salfred .err_handler = (struct pci_error_handlers*)&mlx4_err_handler, 2754219820Sjeff}; 2755219820Sjeff 2756219820Sjeffstatic int __init mlx4_verify_params(void) 2757219820Sjeff{ 2758219820Sjeff if ((log_num_mac < 0) || (log_num_mac > 7)) { 2759255932Salfred pr_warning("mlx4_core: bad num_mac: %d\n", log_num_mac); 2760219820Sjeff return -1; 2761219820Sjeff } 2762219820Sjeff 2763255932Salfred if (log_num_vlan != 0) 2764255932Salfred pr_warning("mlx4_core: log_num_vlan - obsolete module param, using %d\n", 2765255932Salfred MLX4_LOG_NUM_VLANS); 2766255932Salfred 2767255932Salfred if (mlx4_set_4k_mtu != -1) 2768255932Salfred pr_warning("mlx4_core: set_4k_mtu - obsolete module param\n"); 2769255932Salfred 2770255932Salfred if ((log_mtts_per_seg < 0) || (log_mtts_per_seg > 7)) { 2771255932Salfred pr_warning("mlx4_core: bad log_mtts_per_seg: %d\n", log_mtts_per_seg); 2772219820Sjeff return -1; 2773219820Sjeff } 2774219820Sjeff 2775255932Salfred /* Check if module param for ports type has legal combination */ 2776255932Salfred if (port_type_array[0] == false && port_type_array[1] == true) { 2777255932Salfred pr_warning("mlx4_core: module parameter configuration ETH/IB is not supported. Switching to default configuration IB/IB\n"); 2778255932Salfred port_type_array[0] = true; 2779255932Salfred } 2780255932Salfred 2781255932Salfred if (mlx4_log_num_mgm_entry_size != -1 && 2782255932Salfred (mlx4_log_num_mgm_entry_size < MLX4_MIN_MGM_LOG_ENTRY_SIZE || 2783255932Salfred mlx4_log_num_mgm_entry_size > MLX4_MAX_MGM_LOG_ENTRY_SIZE)) { 2784255932Salfred pr_warning("mlx4_core: mlx4_log_num_mgm_entry_size (%d) not " 2785255932Salfred "in legal range (-1 or %d..%d)\n", 2786255932Salfred mlx4_log_num_mgm_entry_size, 2787255932Salfred MLX4_MIN_MGM_LOG_ENTRY_SIZE, 2788255932Salfred MLX4_MAX_MGM_LOG_ENTRY_SIZE); 2789255932Salfred return -1; 2790255932Salfred } 2791255932Salfred 2792255932Salfred if (mod_param_profile.num_qp < 18 || mod_param_profile.num_qp > 23) { 2793255932Salfred pr_warning("mlx4_core: bad log_num_qp: %d\n", 2794255932Salfred mod_param_profile.num_qp); 2795255932Salfred return -1; 2796255932Salfred } 2797255932Salfred 2798255932Salfred if (mod_param_profile.num_srq < 10) { 2799255932Salfred pr_warning("mlx4_core: too low log_num_srq: %d\n", 2800255932Salfred mod_param_profile.num_srq); 2801255932Salfred return -1; 2802255932Salfred } 2803255932Salfred 2804255932Salfred if (mod_param_profile.num_cq < 10) { 2805255932Salfred pr_warning("mlx4_core: too low log_num_cq: %d\n", 2806255932Salfred mod_param_profile.num_cq); 2807255932Salfred return -1; 2808255932Salfred } 2809255932Salfred 2810255932Salfred if (mod_param_profile.num_mpt < 10) { 2811255932Salfred pr_warning("mlx4_core: too low log_num_mpt: %d\n", 2812255932Salfred mod_param_profile.num_mpt); 2813255932Salfred return -1; 2814255932Salfred } 2815255932Salfred 2816255932Salfred if (mod_param_profile.num_mtt && mod_param_profile.num_mtt < 15) { 2817255932Salfred pr_warning("mlx4_core: too low log_num_mtt: %d\n", 2818255932Salfred mod_param_profile.num_mtt); 2819255932Salfred return -1; 2820255932Salfred } 2821255932Salfred 2822255932Salfred if (mod_param_profile.num_mtt > MLX4_MAX_LOG_NUM_MTT) { 2823255932Salfred pr_warning("mlx4_core: too high log_num_mtt: %d\n", 2824255932Salfred mod_param_profile.num_mtt); 2825255932Salfred return -1; 2826255932Salfred } 2827219820Sjeff return 0; 2828219820Sjeff} 2829219820Sjeff 2830219820Sjeffstatic int __init mlx4_init(void) 2831219820Sjeff{ 2832219820Sjeff int ret; 2833219820Sjeff 2834219820Sjeff if (mlx4_verify_params()) 2835219820Sjeff return -EINVAL; 2836219820Sjeff 2837219820Sjeff mlx4_catas_init(); 2838219820Sjeff 2839219820Sjeff mlx4_wq = create_singlethread_workqueue("mlx4"); 2840219820Sjeff if (!mlx4_wq) 2841219820Sjeff return -ENOMEM; 2842219820Sjeff 2843255932Salfred if (enable_sys_tune) 2844255932Salfred sys_tune_init(); 2845255932Salfred 2846219820Sjeff ret = pci_register_driver(&mlx4_driver); 2847255932Salfred if (ret < 0 && enable_sys_tune) 2848255932Salfred sys_tune_fini(); 2849255932Salfred 2850219820Sjeff return ret < 0 ? ret : 0; 2851219820Sjeff} 2852219820Sjeff 2853219820Sjeffstatic void __exit mlx4_cleanup(void) 2854219820Sjeff{ 2855255932Salfred if (enable_sys_tune) 2856255932Salfred sys_tune_fini(); 2857255932Salfred 2858219820Sjeff pci_unregister_driver(&mlx4_driver); 2859219820Sjeff destroy_workqueue(mlx4_wq); 2860219820Sjeff} 2861219820Sjeff 2862255969Salfredmodule_init_order(mlx4_init, SI_ORDER_MIDDLE); 2863219820Sjeffmodule_exit(mlx4_cleanup); 2864219820Sjeff 2865219820Sjeff#undef MODULE_VERSION 2866219820Sjeff#include <sys/module.h> 2867219820Sjeffstatic int 2868219820Sjeffmlx4_evhand(module_t mod, int event, void *arg) 2869219820Sjeff{ 2870219820Sjeff return (0); 2871219820Sjeff} 2872219820Sjeff 2873219820Sjeffstatic moduledata_t mlx4_mod = { 2874219820Sjeff .name = "mlx4", 2875219820Sjeff .evhand = mlx4_evhand, 2876219820Sjeff}; 2877219820SjeffMODULE_VERSION(mlx4, 1); 2878219820SjeffDECLARE_MODULE(mlx4, mlx4_mod, SI_SUB_SMP, SI_ORDER_ANY); 2879