1233545Sjchandra/*-
2233545Sjchandra * Copyright (c) 2003-2012 Broadcom Corporation
3233545Sjchandra * All Rights Reserved
4233545Sjchandra *
5233545Sjchandra * Redistribution and use in source and binary forms, with or without
6233545Sjchandra * modification, are permitted provided that the following conditions
7233545Sjchandra * are met:
8233545Sjchandra *
9233545Sjchandra * 1. Redistributions of source code must retain the above copyright
10233545Sjchandra *    notice, this list of conditions and the following disclaimer.
11233545Sjchandra * 2. Redistributions in binary form must reproduce the above copyright
12233545Sjchandra *    notice, this list of conditions and the following disclaimer in
13233545Sjchandra *    the documentation and/or other materials provided with the
14233545Sjchandra *    distribution.
15233545Sjchandra *
16233545Sjchandra * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
17233545Sjchandra * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
18233545Sjchandra * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19233545Sjchandra * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE
20233545Sjchandra * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21233545Sjchandra * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22233545Sjchandra * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
23233545Sjchandra * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24233545Sjchandra * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
25233545Sjchandra * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
26233545Sjchandra * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27233545Sjchandra *
28233545Sjchandra * $FreeBSD$
29233545Sjchandra */
30233545Sjchandra
31233545Sjchandra#ifndef __XLPGE_H__
32233545Sjchandra#define __XLPGE_H__
33233545Sjchandra
34233545Sjchandra#define	NLM_XLPGE_TXQ_SIZE	1024
35233545Sjchandra#define	MAC_CRC_LEN		4
36233545Sjchandra
37233545Sjchandraenum xlpge_link_state {
38233545Sjchandra	NLM_LINK_DOWN,
39233545Sjchandra	NLM_LINK_UP
40233545Sjchandra};
41233545Sjchandra
42233545Sjchandraenum xlpge_floctrl_status {
43233545Sjchandra	NLM_FLOWCTRL_DISABLED,
44233545Sjchandra	NLM_FLOWCTRL_ENABLED
45233545Sjchandra};
46233545Sjchandra
47233545Sjchandrastruct nlm_xlp_portdata {
48233545Sjchandra	struct ifnet *xlpge_if;
49233545Sjchandra	struct nlm_xlpge_softc *xlpge_sc;
50233545Sjchandra};
51233545Sjchandra
52233545Sjchandrastruct nlm_xlpnae_softc {
53233545Sjchandra	device_t	xlpnae_dev;
54233545Sjchandra	int		node;		/* XLP Node id */
55233545Sjchandra	uint64_t	base;		/* NAE IO base */
56233545Sjchandra	uint64_t	poe_base;	/* POE IO base */
57233545Sjchandra	uint64_t	poedv_base;	/* POE distribution vec IO base */
58233545Sjchandra
59233545Sjchandra	int		freq;		/* frequency of nae block */
60233545Sjchandra	int		flow_crc_poly;	/* Flow CRC16 polynomial */
61233545Sjchandra	int		total_free_desc; /* total for node */
62233545Sjchandra	int		max_ports;
63233545Sjchandra	int		total_num_ports;
64233545Sjchandra	int		per_port_num_flows;
65233545Sjchandra
66233545Sjchandra	u_int		nucores;
67233545Sjchandra	u_int		nblocks;
68233545Sjchandra	u_int		num_complex;
69233545Sjchandra	u_int		ncontexts;
70233545Sjchandra
71233545Sjchandra	/*  Ingress side parameters */
72233545Sjchandra	u_int		num_desc;	/* no of descriptors in each packet */
73233545Sjchandra	u_int		parser_threshold;/* threshold of entries above which */
74233545Sjchandra					/* the parser sequencer is scheduled */
75233545Sjchandra	/* NetIOR configs */
76233545Sjchandra	u_int		cmplx_type[8];		/* XXXJC: redundant? */
77233545Sjchandra	struct nae_port_config *portcfg;
78255368Sjchandra	u_int		blockmask;
79255368Sjchandra	u_int		portmask[XLP_NAE_NBLOCKS];
80255368Sjchandra	u_int		ilmask;
81233545Sjchandra	u_int		xauimask;
82233545Sjchandra	u_int		sgmiimask;
83233545Sjchandra	u_int		hw_parser_en;
84233545Sjchandra	u_int		prepad_en;
85233545Sjchandra	u_int		prepad_size;
86233545Sjchandra	u_int		driver_mode;
87233545Sjchandra	u_int		ieee_1588_en;
88233545Sjchandra};
89233545Sjchandra
90233545Sjchandrastruct nlm_xlpge_softc {
91233545Sjchandra	struct ifnet	*xlpge_if;	/* should be first member */
92233545Sjchandra					/* see - mii.c:miibus_attach() */
93233545Sjchandra	device_t	xlpge_dev;
94233545Sjchandra	device_t	mii_bus;
95233545Sjchandra	struct nlm_xlpnae_softc *network_sc;
96233545Sjchandra	uint64_t	base_addr;	/* NAE IO base */
97233545Sjchandra	int		node;		/* node id (quickread) */
98233545Sjchandra	int		block;		/* network block id (quickread) */
99233545Sjchandra	int		port;		/* port id - among the 18 in XLP */
100233545Sjchandra	int		type;		/* port type - see xlp_gmac_port_types */
101233545Sjchandra	int		valid;		/* boolean: valid port or not */
102233545Sjchandra	struct mii_data	xlpge_mii;
103233545Sjchandra	int		nfree_desc;	/* No of free descriptors sent to port */
104233545Sjchandra	int		phy_addr;	/* PHY id for the interface */
105233545Sjchandra
106233545Sjchandra	int		speed;		/* Port speed */
107233545Sjchandra	int		duplexity;	/* Port duplexity */
108233545Sjchandra	int		link;		/* Port link status */
109233545Sjchandra	int		 flowctrl;	/* Port flow control setting */
110233545Sjchandra
111233545Sjchandra	unsigned char	dev_addr[ETHER_ADDR_LEN];
112233545Sjchandra	struct mtx	sc_lock;
113233545Sjchandra	int		if_flags;
114233545Sjchandra	struct nae_port_config *portcfg;
115233545Sjchandra	struct callout  xlpge_callout;
116233545Sjchandra	int		mdio_bus;
117233545Sjchandra	int		txq;
118233545Sjchandra	int		rxfreeq;
119233545Sjchandra	int		hw_parser_en;
120233545Sjchandra	int		prepad_en;
121233545Sjchandra	int		prepad_size;
122233545Sjchandra};
123233545Sjchandra
124233545Sjchandra#define	XLP_NTXFRAGS		16
125233545Sjchandra#define	NULL_VFBID		127
126233545Sjchandra
127233545Sjchandrastruct xlpge_tx_desc {
128233545Sjchandra        uint64_t        frag[XLP_NTXFRAGS];
129233545Sjchandra};
130233545Sjchandra
131233545Sjchandra#define	XLPGE_LOCK_INIT(_sc, _name)	\
132233545Sjchandra	mtx_init(&(_sc)->sc_lock, _name, MTX_NETWORK_LOCK, MTX_DEF)
133233545Sjchandra#define	XLPGE_LOCK_DESTROY(_sc)	mtx_destroy(&(_sc)->sc_lock)
134233545Sjchandra#define	XLPGE_LOCK(_sc)		mtx_lock(&(_sc)->sc_lock)
135233545Sjchandra#define	XLPGE_UNLOCK(_sc)	mtx_unlock(&(_sc)->sc_lock)
136233545Sjchandra#define	XLPGE_LOCK_ASSERT(_sc)	mtx_assert(&(_sc)->sc_lock, MA_OWNED)
137233545Sjchandra
138233545Sjchandra#endif
139