1235070Sjmallett/*-
2235070Sjmallett * Copyright (c) 2004-2012 Juli Mallett <jmallett@FreeBSD.org>
3235070Sjmallett * All rights reserved.
4235070Sjmallett *
5235070Sjmallett * Redistribution and use in source and binary forms, with or without
6235070Sjmallett * modification, are permitted provided that the following conditions
7235070Sjmallett * are met:
8235070Sjmallett * 1. Redistributions of source code must retain the above copyright
9235070Sjmallett *    notice, this list of conditions and the following disclaimer.
10235070Sjmallett * 2. Redistributions in binary form must reproduce the above copyright
11235070Sjmallett *    notice, this list of conditions and the following disclaimer in the
12235070Sjmallett *    documentation and/or other materials provided with the distribution.
13235070Sjmallett *
14235070Sjmallett * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15235070Sjmallett * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16235070Sjmallett * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17235070Sjmallett * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18235070Sjmallett * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19235070Sjmallett * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20235070Sjmallett * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21235070Sjmallett * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22235070Sjmallett * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23235070Sjmallett * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24235070Sjmallett * SUCH DAMAGE.
25235070Sjmallett *
26235070Sjmallett * $FreeBSD$
27235070Sjmallett */
28235070Sjmallett
29235070Sjmallett#ifndef	_MIPS_GXEMUL_MPREG_H_
30235070Sjmallett#define	_MIPS_GXEMUL_MPREG_H_
31235070Sjmallett
32235070Sjmallett#define	GXEMUL_MP_DEV_BASE	0x11000000
33235070Sjmallett
34235070Sjmallett#define	GXEMUL_MP_DEV_WHOAMI	0x0000
35235070Sjmallett#define	GXEMUL_MP_DEV_NCPUS	0x0010
36235070Sjmallett#define	GXEMUL_MP_DEV_START	0x0020
37235070Sjmallett#define	GXEMUL_MP_DEV_STARTADDR	0x0030
38235070Sjmallett#define	GXEMUL_MP_DEV_STACK	0x0070
39235118Sjmallett#define	GXEMUL_MP_DEV_RANDOM	0x0080
40235070Sjmallett#define	GXEMUL_MP_DEV_MEMORY	0x0090
41235070Sjmallett#define	GXEMUL_MP_DEV_IPI_ONE	0x00a0
42235070Sjmallett#define	GXEMUL_MP_DEV_IPI_MANY	0x00b0
43235070Sjmallett#define	GXEMUL_MP_DEV_IPI_READ	0x00c0
44235118Sjmallett#define	GXEMUL_MP_DEV_CYCLES	0x00d0
45235070Sjmallett
46255212Sgonzo#ifdef _LP64
47235070Sjmallett#define	GXEMUL_MP_DEV_FUNCTION(f)					\
48235070Sjmallett	(volatile uint64_t *)MIPS_PHYS_TO_DIRECT_UNCACHED(GXEMUL_MP_DEV_BASE + (f))
49235070Sjmallett#define	GXEMUL_MP_DEV_READ(f)						\
50235070Sjmallett	(volatile uint64_t)*GXEMUL_MP_DEV_FUNCTION(f)
51255212Sgonzo#else
52255212Sgonzo#define	GXEMUL_MP_DEV_FUNCTION(f)					\
53255212Sgonzo	(volatile uint32_t *)MIPS_PHYS_TO_DIRECT_UNCACHED(GXEMUL_MP_DEV_BASE + (f))
54255212Sgonzo#define	GXEMUL_MP_DEV_READ(f)						\
55255212Sgonzo	(volatile uint32_t)*GXEMUL_MP_DEV_FUNCTION(f)
56255212Sgonzo#endif
57235070Sjmallett#define	GXEMUL_MP_DEV_WRITE(f, v)					\
58235070Sjmallett	*GXEMUL_MP_DEV_FUNCTION(f) = (v)
59235070Sjmallett
60235070Sjmallett#define	GXEMUL_MP_DEV_IPI_INTERRUPT	(6)
61235070Sjmallett
62235070Sjmallett#endif /* !_MIPS_GXEMUL_MPREG_H */
63