1211440Sadrian/*- 2211440Sadrian * Copyright (c) 2010 Adrian Chadd 3211440Sadrian * All rights reserved. 4211440Sadrian * 5211440Sadrian * Redistribution and use in source and binary forms, with or without 6211440Sadrian * modification, are permitted provided that the following conditions 7211440Sadrian * are met: 8211440Sadrian * 1. Redistributions of source code must retain the above copyright 9211440Sadrian * notice, this list of conditions and the following disclaimer. 10211440Sadrian * 2. Redistributions in binary form must reproduce the above copyright 11211440Sadrian * notice, this list of conditions and the following disclaimer in the 12211440Sadrian * documentation and/or other materials provided with the distribution. 13211440Sadrian * 14211440Sadrian * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15211440Sadrian * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16211440Sadrian * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17211440Sadrian * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18211440Sadrian * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19211440Sadrian * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20211440Sadrian * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21211440Sadrian * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22211440Sadrian * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23211440Sadrian * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24211440Sadrian * SUCH DAMAGE. 25211440Sadrian */ 26211440Sadrian 27211440Sadrian/* $FreeBSD$ */ 28211440Sadrian 29211440Sadrian#ifndef __AR72XX_REG_H__ 30211440Sadrian#define __AR72XX_REG_H__ 31211440Sadrian 32211440Sadrian#define AR724X_PLL_REG_CPU_CONFIG AR71XX_PLL_CPU_BASE + 0x00 33211440Sadrian#define AR724X_PLL_REG_PCIE_CONFIG AR71XX_PLL_CPU_BASE + 0x18 34211440Sadrian 35211440Sadrian#define AR724X_PLL_DIV_SHIFT 0 36211440Sadrian#define AR724X_PLL_DIV_MASK 0x3ff 37211440Sadrian#define AR724X_PLL_REF_DIV_SHIFT 10 38211440Sadrian#define AR724X_PLL_REF_DIV_MASK 0xf 39211440Sadrian#define AR724X_AHB_DIV_SHIFT 19 40211440Sadrian#define AR724X_AHB_DIV_MASK 0x1 41211440Sadrian#define AR724X_DDR_DIV_SHIFT 22 42211440Sadrian#define AR724X_DDR_DIV_MASK 0x3 43211440Sadrian 44211440Sadrian#define AR724X_PLL_VAL_1000 0x00110000 45211440Sadrian#define AR724X_PLL_VAL_100 0x00001099 46211440Sadrian#define AR724X_PLL_VAL_10 0x00991099 47211440Sadrian 48211440Sadrian#define AR724X_BASE_FREQ 5000000 49211440Sadrian 50219591Sadrian#define AR724X_DDR_REG_FLUSH_GE0 (AR71XX_DDR_CONFIG + 0x7c) 51219591Sadrian#define AR724X_DDR_REG_FLUSH_GE1 (AR71XX_DDR_CONFIG + 0x80) 52221254Sadrian#define AR724X_DDR_REG_FLUSH_USB (AR71XX_DDR_CONFIG + 0x84) 53221254Sadrian#define AR724X_DDR_REG_FLUSH_PCIE (AR71XX_DDR_CONFIG + 0x88) 54219591Sadrian 55211503Sadrian#define AR724X_RESET_REG_RESET_MODULE AR71XX_RST_BLOCK_BASE + 0x1c 56220180Sadrian#define AR724X_RESET_USB_HOST (1 << 5) 57220180Sadrian#define AR724X_RESET_USB_PHY (1 << 4) 58211503Sadrian#define AR724X_RESET_MODULE_USB_OHCI_DLL (1 << 3) 59211503Sadrian 60221254Sadrian#define AR724X_RESET_GE1_MDIO (1 << 23) 61221254Sadrian#define AR724X_RESET_GE0_MDIO (1 << 22) 62221254Sadrian#define AR724X_RESET_PCIE_PHY_SERIAL (1 << 10) 63221254Sadrian#define AR724X_RESET_PCIE_PHY (1 << 7) 64221254Sadrian#define AR724X_RESET_PCIE (1 << 6) 65221254Sadrian#define AR724X_RESET_USB_HOST (1 << 5) 66221254Sadrian#define AR724X_RESET_USB_PHY (1 << 4) 67221254Sadrian#define AR724X_RESET_USBSUS_OVERRIDE (1 << 3) 68221254Sadrian 69211440Sadrian/* XXX so USB requires different init code? -adrian */ 70211440Sadrian#define AR7240_OHCI_BASE 0x1b000000 71211440Sadrian#define AR7240_OHCI_SIZE 0x01000000 72211440Sadrian 73211440Sadrian#define AR724X_PCI_CRP_BASE (AR71XX_APB_BASE + 0x000C0000) 74211440Sadrian#define AR724X_PCI_CRP_SIZE 0x100 75221254Sadrian#define AR724X_PCI_CFG_BASE 0x14000000 76221254Sadrian#define AR724X_PCI_CFG_SIZE 0x1000 77211440Sadrian 78211440Sadrian#define AR724X_PCI_CTRL_BASE (AR71XX_APB_BASE + 0x000F0000) 79211440Sadrian#define AR724X_PCI_CTRL_SIZE 0x100 80211440Sadrian 81221254Sadrian/* PCI config registers */ 82221254Sadrian#define AR724X_PCI_APP 0x180f0000 83221254Sadrian#define AR724X_PCI_APP_LTSSM_ENABLE (1 << 0) 84221254Sadrian#define AR724X_PCI_RESET 0x180f0018 85221254Sadrian#define AR724X_PCI_RESET_LINK_UP (1 << 0) 86221254Sadrian#define AR724X_PCI_INTR_STATUS 0x180f004c 87221254Sadrian#define AR724X_PCI_INTR_MASK 0x180f0050 88221254Sadrian#define AR724X_PCI_INTR_DEV0 (1 << 14) 89221254Sadrian 90211440Sadrian#define AR724X_GPIO_FUNC_GE0_MII_CLK_EN (1 >> 19) 91211440Sadrian#define AR724X_GPIO_FUNC_SPI_EN (1 >> 18) 92211440Sadrian#define AR724X_GPIO_FUNC_SPI_CS_EN2 (1 >> 14) 93211440Sadrian#define AR724X_GPIO_FUNC_SPI_CS_EN1 (1 >> 13) 94211440Sadrian#define AR724X_GPIO_FUNC_CLK_OBS5_EN (1 >> 12) 95211440Sadrian#define AR724X_GPIO_FUNC_CLK_OBS4_EN (1 >> 11) 96211440Sadrian#define AR724X_GPIO_FUNC_CLK_OBS3_EN (1 >> 10) 97211440Sadrian#define AR724X_GPIO_FUNC_CLK_OBS2_EN (1 >> 9) 98211440Sadrian#define AR724X_GPIO_FUNC_CLK_OBS1_EN (1 >> 8) 99211440Sadrian#define AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN (1 >> 7) 100211440Sadrian#define AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN (1 >> 6) 101211440Sadrian#define AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN (1 >> 5) 102211440Sadrian#define AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN (1 >> 4) 103211440Sadrian#define AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN (1 >> 3) 104211440Sadrian#define AR724X_GPIO_FUNC_UART_RTS_CTS_EN (1 >> 2) 105211440Sadrian#define AR724X_GPIO_FUNC_UART_EN (1 >> 1) 106211440Sadrian#define AR724X_GPIO_FUNC_JTAG_DISABLE (1 >> 0) 107211440Sadrian 108211440Sadrian#endif 109