rtc.h revision 178192
1210284Sjmallett/*-
2232812Sjmallett * Copyright (c) 1990 The Regents of the University of California.
3215990Sjmallett * All rights reserved.
4210284Sjmallett *
5210284Sjmallett * This code is derived from software contributed to Berkeley by
6215990Sjmallett * William Jolitz.
7215990Sjmallett *
8215990Sjmallett * Redistribution and use in source and binary forms, with or without
9210284Sjmallett * modification, are permitted provided that the following conditions
10215990Sjmallett * are met:
11215990Sjmallett * 1. Redistributions of source code must retain the above copyright
12210284Sjmallett *    notice, this list of conditions and the following disclaimer.
13215990Sjmallett * 2. Redistributions in binary form must reproduce the above copyright
14215990Sjmallett *    notice, this list of conditions and the following disclaimer in the
15215990Sjmallett *    documentation and/or other materials provided with the distribution.
16215990Sjmallett * 4. Neither the name of the University nor the names of its contributors
17215990Sjmallett *    may be used to endorse or promote products derived from this software
18232812Sjmallett *    without specific prior written permission.
19215990Sjmallett *
20215990Sjmallett * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
21215990Sjmallett * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22215990Sjmallett * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23215990Sjmallett * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
24215990Sjmallett * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25215990Sjmallett * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26215990Sjmallett * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27215990Sjmallett * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28215990Sjmallett * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29232812Sjmallett * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30215990Sjmallett * SUCH DAMAGE.
31215990Sjmallett *
32215990Sjmallett *	from: @(#)rtc.h	7.1 (Berkeley) 5/12/91
33215990Sjmallett * $FreeBSD: head/sys/isa/rtc.h 178192 2008-04-14 07:57:15Z phk $
34215990Sjmallett */
35215990Sjmallett
36215990Sjmallett#ifndef _I386_ISA_RTC_H_
37215990Sjmallett#define _I386_ISA_RTC_H_ 1
38210284Sjmallett
39210284Sjmallett/*
40210284Sjmallett * MC146818 RTC Register locations
41210284Sjmallett */
42210284Sjmallett
43210284Sjmallett#define RTC_SEC		0x00	/* seconds */
44210284Sjmallett#define RTC_SECALRM	0x01	/* seconds alarm */
45210284Sjmallett#define RTC_MIN		0x02	/* minutes */
46215990Sjmallett#define RTC_MINALRM	0x03	/* minutes alarm */
47210284Sjmallett#define RTC_HRS		0x04	/* hours */
48210284Sjmallett#define RTC_HRSALRM	0x05	/* hours alarm */
49210284Sjmallett#define RTC_WDAY	0x06	/* week day */
50215990Sjmallett#define RTC_DAY		0x07	/* day of month */
51210284Sjmallett#define RTC_MONTH	0x08	/* month of year */
52215990Sjmallett#define RTC_YEAR	0x09	/* month of year */
53210284Sjmallett
54210284Sjmallett#define RTC_STATUSA	0x0a	/* status register A */
55210284Sjmallett#define  RTCSA_TUP	 0x80	/* time update, don't look now */
56210284Sjmallett#define  RTCSA_RESET	 0x70	/* reset divider */
57210284Sjmallett#define  RTCSA_DIVIDER   0x20   /* divider correct for 32768 Hz */
58210284Sjmallett#define  RTCSA_8192      0x03	/* 8192 Hz interrupt */
59210284Sjmallett#define  RTCSA_4096      0x04
60210284Sjmallett#define  RTCSA_2048      0x05
61210284Sjmallett#define  RTCSA_1024      0x06	/* default for profiling */
62210284Sjmallett#define  RTCSA_PROF      RTCSA_1024
63210284Sjmallett#define  RTC_PROFRATE    1024
64210284Sjmallett#define  RTCSA_512       0x07
65210284Sjmallett#define  RTCSA_256       0x08
66210284Sjmallett#define  RTCSA_128       0x09
67210284Sjmallett#define  RTCSA_NOPROF	 RTCSA_128
68210284Sjmallett#define  RTC_NOPROFRATE  128
69210284Sjmallett#define  RTCSA_64        0x0a
70210284Sjmallett#define  RTCSA_32        0x0b	/* 32 Hz interrupt */
71210284Sjmallett
72210284Sjmallett#define RTC_STATUSB	0x0b	/* status register B */
73210284Sjmallett#define	 RTCSB_DST	 0x01	/* USA Daylight Savings Time enable */
74210284Sjmallett#define	 RTCSB_24HR	 0x02	/* 0 = 12 hours, 1 = 24	hours */
75210284Sjmallett#define	 RTCSB_BCD	 0x04	/* 0 = BCD, 1 =	Binary coded time */
76210284Sjmallett#define	 RTCSB_SQWE	 0x08	/* 1 = output sqare wave at SQW	pin */
77210284Sjmallett#define	 RTCSB_UINTR	 0x10	/* 1 = enable update-ended interrupt */
78210284Sjmallett#define	 RTCSB_AINTR	 0x20	/* 1 = enable alarm interrupt */
79210284Sjmallett#define	 RTCSB_PINTR	 0x40	/* 1 = enable periodic clock interrupt */
80210284Sjmallett#define  RTCSB_HALT      0x80	/* stop clock updates */
81210284Sjmallett
82210284Sjmallett#define RTC_INTR	0x0c	/* status register C (R) interrupt source */
83210284Sjmallett#define  RTCIR_UPDATE	 0x10	/* update intr */
84210284Sjmallett#define  RTCIR_ALARM	 0x20	/* alarm intr */
85210284Sjmallett#define  RTCIR_PERIOD	 0x40	/* periodic intr */
86210284Sjmallett#define  RTCIR_INT	 0x80	/* interrupt output signal */
87210284Sjmallett
88210284Sjmallett#define RTC_STATUSD	0x0d	/* status register D (R) Lost Power */
89210284Sjmallett#define  RTCSD_PWR	 0x80	/* clock power OK */
90210284Sjmallett
91210284Sjmallett#define RTC_DIAG	0x0e	/* status register E - bios diagnostic */
92210284Sjmallett#define RTCDG_BITS	"\020\010clock_battery\007ROM_cksum\006config_unit\005memory_size\004fixed_disk\003invalid_time"
93210284Sjmallett
94210284Sjmallett#define RTC_RESET	0x0f	/* status register F - reset code byte */
95210284Sjmallett#define	 RTCRS_RST	 0x00		/* normal reset */
96210284Sjmallett#define	 RTCRS_LOAD	 0x04		/* load system */
97210284Sjmallett
98210284Sjmallett#define RTC_FDISKETTE	0x10	/* diskette drive type in upper/lower nibble */
99210284Sjmallett#define	 RTCFDT_NONE	 0		/* none present */
100210284Sjmallett#define	 RTCFDT_360K	 0x10		/* 360K */
101210284Sjmallett#define	 RTCFDT_12M	 0x20		/* 1.2M */
102210284Sjmallett#define  RTCFDT_720K     0x30           /* 720K */
103210284Sjmallett#define	 RTCFDT_144M	 0x40		/* 1.44M */
104210284Sjmallett#define  RTCFDT_288M_1   0x50		/* 2.88M, some BIOSes */
105210284Sjmallett#define	 RTCFDT_288M	 0x60		/* 2.88M */
106210284Sjmallett
107210284Sjmallett#define RTC_BASELO	0x15	/* low byte of basemem size */
108210284Sjmallett#define RTC_BASEHI	0x16	/* high byte of basemem size */
109210284Sjmallett#define RTC_EXTLO	0x17	/* low byte of extended mem size */
110210284Sjmallett#define RTC_EXTHI	0x18	/* low byte of extended mem size */
111210284Sjmallett
112210284Sjmallett#define	RTC_CENTURY	0x32	/* current century */
113210284Sjmallett
114210284Sjmallett#ifdef _KERNEL
115210284Sjmallettextern  struct mtx clock_lock;
116210284Sjmallettint	rtcin(int reg);
117210284Sjmallettvoid	atrtc_start(void);
118210284Sjmallettvoid	atrtc_rate(unsigned rate);
119210284Sjmallettvoid	atrtc_enable_intr(void);
120210284Sjmallettvoid	atrtc_restore(void);
121210284Sjmallettvoid	writertc(int reg, u_char val);
122210284Sjmallett#endif
123210284Sjmallett
124210284Sjmallett#endif /* _I386_ISA_RTC_H_ */
125210284Sjmallett