machdep.c revision 219741
133965Sjdp/*- 233965Sjdp * Copyright (c) 2003,2004 Marcel Moolenaar 333965Sjdp * Copyright (c) 2000,2001 Doug Rabson 433965Sjdp * All rights reserved. 533965Sjdp * 633965Sjdp * Redistribution and use in source and binary forms, with or without 733965Sjdp * modification, are permitted provided that the following conditions 833965Sjdp * are met: 933965Sjdp * 1. Redistributions of source code must retain the above copyright 1033965Sjdp * notice, this list of conditions and the following disclaimer. 1133965Sjdp * 2. Redistributions in binary form must reproduce the above copyright 1233965Sjdp * notice, this list of conditions and the following disclaimer in the 1333965Sjdp * documentation and/or other materials provided with the distribution. 1433965Sjdp * 1533965Sjdp * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 1633965Sjdp * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 1733965Sjdp * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 1833965Sjdp * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 1933965Sjdp * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 2033965Sjdp * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2133965Sjdp * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2233965Sjdp * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2333965Sjdp * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2433965Sjdp * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 2533965Sjdp * SUCH DAMAGE. 2633965Sjdp */ 2733965Sjdp 2833965Sjdp#include <sys/cdefs.h> 2933965Sjdp__FBSDID("$FreeBSD: head/sys/ia64/ia64/machdep.c 219741 2011-03-18 15:36:28Z marcel $"); 3033965Sjdp 3133965Sjdp#include "opt_compat.h" 3233965Sjdp#include "opt_ddb.h" 3333965Sjdp#include "opt_kstack_pages.h" 3433965Sjdp#include "opt_sched.h" 3533965Sjdp 3633965Sjdp#include <sys/param.h> 3733965Sjdp#include <sys/proc.h> 3833965Sjdp#include <sys/systm.h> 3933965Sjdp#include <sys/bio.h> 4033965Sjdp#include <sys/buf.h> 4133965Sjdp#include <sys/bus.h> 4233965Sjdp#include <sys/cons.h> 4333965Sjdp#include <sys/cpu.h> 4433965Sjdp#include <sys/eventhandler.h> 4533965Sjdp#include <sys/exec.h> 4633965Sjdp#include <sys/imgact.h> 4733965Sjdp#include <sys/kdb.h> 4833965Sjdp#include <sys/kernel.h> 4933965Sjdp#include <sys/linker.h> 5033965Sjdp#include <sys/lock.h> 5133965Sjdp#include <sys/malloc.h> 5233965Sjdp#include <sys/mbuf.h> 5333965Sjdp#include <sys/msgbuf.h> 5433965Sjdp#include <sys/pcpu.h> 5533965Sjdp#include <sys/ptrace.h> 5633965Sjdp#include <sys/random.h> 5733965Sjdp#include <sys/reboot.h> 5833965Sjdp#include <sys/sched.h> 5933965Sjdp#include <sys/signalvar.h> 6033965Sjdp#include <sys/syscall.h> 6133965Sjdp#include <sys/syscallsubr.h> 6233965Sjdp#include <sys/sysctl.h> 6333965Sjdp#include <sys/sysproto.h> 6433965Sjdp#include <sys/ucontext.h> 6533965Sjdp#include <sys/uio.h> 6633965Sjdp#include <sys/uuid.h> 6733965Sjdp#include <sys/vmmeter.h> 6833965Sjdp#include <sys/vnode.h> 6933965Sjdp 7033965Sjdp#include <ddb/ddb.h> 7133965Sjdp 7233965Sjdp#include <net/netisr.h> 7333965Sjdp 7433965Sjdp#include <vm/vm.h> 7533965Sjdp#include <vm/vm_extern.h> 7633965Sjdp#include <vm/vm_kern.h> 7733965Sjdp#include <vm/vm_page.h> 7833965Sjdp#include <vm/vm_map.h> 7933965Sjdp#include <vm/vm_object.h> 8033965Sjdp#include <vm/vm_pager.h> 8133965Sjdp 8233965Sjdp#include <machine/bootinfo.h> 8333965Sjdp#include <machine/cpu.h> 8433965Sjdp#include <machine/efi.h> 8533965Sjdp#include <machine/elf.h> 8633965Sjdp#include <machine/fpu.h> 8733965Sjdp#include <machine/intr.h> 8833965Sjdp#include <machine/mca.h> 8933965Sjdp#include <machine/md_var.h> 9033965Sjdp#include <machine/pal.h> 9133965Sjdp#include <machine/pcb.h> 9233965Sjdp#include <machine/reg.h> 9333965Sjdp#include <machine/sal.h> 9433965Sjdp#include <machine/sigframe.h> 9533965Sjdp#ifdef SMP 9633965Sjdp#include <machine/smp.h> 9733965Sjdp#endif 9833965Sjdp#include <machine/unwind.h> 9933965Sjdp#include <machine/vmparam.h> 10033965Sjdp 10133965SjdpSYSCTL_NODE(_hw, OID_AUTO, freq, CTLFLAG_RD, 0, ""); 10233965SjdpSYSCTL_NODE(_machdep, OID_AUTO, cpu, CTLFLAG_RD, 0, ""); 10333965Sjdp 10433965Sjdpstatic u_int bus_freq; 10533965SjdpSYSCTL_UINT(_hw_freq, OID_AUTO, bus, CTLFLAG_RD, &bus_freq, 0, 10633965Sjdp "Bus clock frequency"); 10733965Sjdp 10833965Sjdpstatic u_int cpu_freq; 10933965SjdpSYSCTL_UINT(_hw_freq, OID_AUTO, cpu, CTLFLAG_RD, &cpu_freq, 0, 11033965Sjdp "CPU clock frequency"); 11133965Sjdp 11233965Sjdpstatic u_int itc_freq; 11333965SjdpSYSCTL_UINT(_hw_freq, OID_AUTO, itc, CTLFLAG_RD, &itc_freq, 0, 11433965Sjdp "ITC frequency"); 11533965Sjdp 11633965Sjdpint cold = 1; 11733965Sjdp 11833965Sjdpu_int64_t pa_bootinfo; 11933965Sjdpstruct bootinfo bootinfo; 12033965Sjdp 12133965Sjdpstruct pcpu pcpu0; 12233965Sjdp 12333965Sjdpextern u_int64_t kernel_text[], _end[]; 12433965Sjdp 12533965Sjdpextern u_int64_t ia64_gateway_page[]; 12633965Sjdpextern u_int64_t break_sigtramp[]; 12733965Sjdpextern u_int64_t epc_sigtramp[]; 12833965Sjdp 12933965Sjdpstruct fpswa_iface *fpswa_iface; 13033965Sjdp 13133965Sjdpu_int64_t ia64_pal_base; 13233965Sjdpu_int64_t ia64_port_base; 13333965Sjdp 13433965Sjdpu_int64_t ia64_lapic_addr = PAL_PIB_DEFAULT_ADDR; 13533965Sjdp 13633965Sjdpstruct ia64_pib *ia64_pib; 13733965Sjdp 13833965Sjdpstatic int ia64_sync_icache_needed; 13933965Sjdp 14033965Sjdpchar machine[] = MACHINE; 14133965SjdpSYSCTL_STRING(_hw, HW_MACHINE, machine, CTLFLAG_RD, machine, 0, ""); 14233965Sjdp 14333965Sjdpstatic char cpu_model[64]; 14433965SjdpSYSCTL_STRING(_hw, HW_MODEL, model, CTLFLAG_RD, cpu_model, 0, 14533965Sjdp "The CPU model name"); 14633965Sjdp 14733965Sjdpstatic char cpu_family[64]; 14833965SjdpSYSCTL_STRING(_hw, OID_AUTO, family, CTLFLAG_RD, cpu_family, 0, 14933965Sjdp "The CPU family name"); 15033965Sjdp 15133965Sjdp#ifdef DDB 15233965Sjdpextern vm_offset_t ksym_start, ksym_end; 15333965Sjdp#endif 15433965Sjdp 15533965Sjdp 15633965Sjdpstruct msgbuf *msgbufp = NULL; 15733965Sjdp 15833965Sjdp/* Other subsystems (e.g., ACPI) can hook this later. */ 15933965Sjdpvoid (*cpu_idle_hook)(void) = NULL; 16033965Sjdp 16133965Sjdplong Maxmem = 0; 16233965Sjdplong realmem = 0; 16333965Sjdp 16433965Sjdp#define PHYSMAP_SIZE (2 * VM_PHYSSEG_MAX) 16533965Sjdp 16633965Sjdpvm_paddr_t phys_avail[PHYSMAP_SIZE + 2]; 16733965Sjdp 16833965Sjdp/* must be 2 less so 0 0 can signal end of chunks */ 16933965Sjdp#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2) 17033965Sjdp 17133965Sjdpstruct kva_md_info kmi; 17233965Sjdp 17333965Sjdp#define Mhz 1000000L 17433965Sjdp#define Ghz (1000L*Mhz) 17533965Sjdp 17633965Sjdpstatic void 17733965Sjdpidentifycpu(void) 17833965Sjdp{ 17933965Sjdp char vendor[17]; 18033965Sjdp char *family_name, *model_name; 18133965Sjdp u_int64_t features, tmp; 18233965Sjdp int number, revision, model, family, archrev; 18333965Sjdp 18433965Sjdp /* 18533965Sjdp * Assumes little-endian. 18633965Sjdp */ 18733965Sjdp *(u_int64_t *) &vendor[0] = ia64_get_cpuid(0); 18833965Sjdp *(u_int64_t *) &vendor[8] = ia64_get_cpuid(1); 18933965Sjdp vendor[16] = '\0'; 19033965Sjdp 19133965Sjdp tmp = ia64_get_cpuid(3); 19233965Sjdp number = (tmp >> 0) & 0xff; 19333965Sjdp revision = (tmp >> 8) & 0xff; 19433965Sjdp model = (tmp >> 16) & 0xff; 19533965Sjdp family = (tmp >> 24) & 0xff; 19633965Sjdp archrev = (tmp >> 32) & 0xff; 19733965Sjdp 19833965Sjdp family_name = model_name = "unknown"; 19933965Sjdp switch (family) { 20033965Sjdp case 0x07: 20133965Sjdp family_name = "Itanium"; 20233965Sjdp model_name = "Merced"; 20333965Sjdp break; 20433965Sjdp case 0x1f: 20533965Sjdp family_name = "Itanium 2"; 20633965Sjdp switch (model) { 20733965Sjdp case 0x00: 20833965Sjdp model_name = "McKinley"; 20933965Sjdp break; 21033965Sjdp case 0x01: 21133965Sjdp /* 21233965Sjdp * Deerfield is a low-voltage variant based on the 21333965Sjdp * Madison core. We need circumstantial evidence 21433965Sjdp * (i.e. the clock frequency) to identify those. 21533965Sjdp * Allow for roughly 1% error margin. 21633965Sjdp */ 21733965Sjdp if (cpu_freq > 990 && cpu_freq < 1010) 21833965Sjdp model_name = "Deerfield"; 21933965Sjdp else 22033965Sjdp model_name = "Madison"; 22133965Sjdp break; 22233965Sjdp case 0x02: 22333965Sjdp model_name = "Madison II"; 22433965Sjdp break; 22533965Sjdp } 22633965Sjdp break; 22733965Sjdp case 0x20: 22833965Sjdp ia64_sync_icache_needed = 1; 22933965Sjdp 23033965Sjdp family_name = "Itanium 2"; 23133965Sjdp switch (model) { 23233965Sjdp case 0x00: 23333965Sjdp model_name = "Montecito"; 23433965Sjdp break; 23533965Sjdp } 23633965Sjdp break; 23733965Sjdp } 23833965Sjdp snprintf(cpu_family, sizeof(cpu_family), "%s", family_name); 23933965Sjdp snprintf(cpu_model, sizeof(cpu_model), "%s", model_name); 24033965Sjdp 24133965Sjdp features = ia64_get_cpuid(4); 24233965Sjdp 24333965Sjdp printf("CPU: %s (", model_name); 24433965Sjdp if (cpu_freq) 24533965Sjdp printf("%u Mhz ", cpu_freq); 24633965Sjdp printf("%s)\n", family_name); 24733965Sjdp printf(" Origin = \"%s\" Revision = %d\n", vendor, revision); 24833965Sjdp printf(" Features = 0x%b\n", (u_int32_t) features, 24933965Sjdp "\020" 25033965Sjdp "\001LB" /* long branch (brl) instruction. */ 25133965Sjdp "\002SD" /* Spontaneous deferral. */ 25233965Sjdp "\003AO" /* 16-byte atomic operations (ld, st, cmpxchg). */ ); 25333965Sjdp} 25433965Sjdp 25533965Sjdpstatic void 25633965Sjdpcpu_startup(void *dummy) 25733965Sjdp{ 25833965Sjdp char nodename[16]; 25933965Sjdp struct pcpu *pc; 26033965Sjdp struct pcpu_stats *pcs; 26133965Sjdp 26233965Sjdp /* 26333965Sjdp * Good {morning,afternoon,evening,night}. 26433965Sjdp */ 26533965Sjdp identifycpu(); 26633965Sjdp 26733965Sjdp#ifdef PERFMON 26833965Sjdp perfmon_init(); 26933965Sjdp#endif 27033965Sjdp printf("real memory = %ld (%ld MB)\n", ia64_ptob(Maxmem), 27133965Sjdp ia64_ptob(Maxmem) / 1048576); 27233965Sjdp realmem = Maxmem; 27333965Sjdp 27433965Sjdp /* 27533965Sjdp * Display any holes after the first chunk of extended memory. 27633965Sjdp */ 27733965Sjdp if (bootverbose) { 27833965Sjdp int indx; 27933965Sjdp 28033965Sjdp printf("Physical memory chunk(s):\n"); 28133965Sjdp for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) { 28233965Sjdp long size1 = phys_avail[indx + 1] - phys_avail[indx]; 28333965Sjdp 28433965Sjdp printf("0x%08lx - 0x%08lx, %ld bytes (%ld pages)\n", 28533965Sjdp phys_avail[indx], phys_avail[indx + 1] - 1, size1, 28633965Sjdp size1 >> PAGE_SHIFT); 28733965Sjdp } 28833965Sjdp } 28933965Sjdp 29033965Sjdp vm_ksubmap_init(&kmi); 29133965Sjdp 29233965Sjdp printf("avail memory = %ld (%ld MB)\n", ptoa(cnt.v_free_count), 29333965Sjdp ptoa(cnt.v_free_count) / 1048576); 29433965Sjdp 29533965Sjdp if (fpswa_iface == NULL) 29633965Sjdp printf("Warning: no FPSWA package supplied\n"); 29733965Sjdp else 29833965Sjdp printf("FPSWA Revision = 0x%lx, Entry = %p\n", 29933965Sjdp (long)fpswa_iface->if_rev, (void *)fpswa_iface->if_fpswa); 30033965Sjdp 30133965Sjdp /* 30233965Sjdp * Set up buffers, so they can be used to read disk labels. 30333965Sjdp */ 30433965Sjdp bufinit(); 30533965Sjdp vm_pager_bufferinit(); 30633965Sjdp 30733965Sjdp /* 30833965Sjdp * Traverse the MADT to discover IOSAPIC and Local SAPIC 30933965Sjdp * information. 31033965Sjdp */ 31133965Sjdp ia64_probe_sapics(); 31233965Sjdp ia64_pib = pmap_mapdev(ia64_lapic_addr, sizeof(*ia64_pib)); 31333965Sjdp 31433965Sjdp ia64_mca_init(); 31533965Sjdp 31633965Sjdp /* 31733965Sjdp * Create sysctl tree for per-CPU information. 31833965Sjdp */ 31933965Sjdp SLIST_FOREACH(pc, &cpuhead, pc_allcpu) { 32033965Sjdp snprintf(nodename, sizeof(nodename), "%u", pc->pc_cpuid); 32133965Sjdp sysctl_ctx_init(&pc->pc_md.sysctl_ctx); 32233965Sjdp pc->pc_md.sysctl_tree = SYSCTL_ADD_NODE(&pc->pc_md.sysctl_ctx, 32333965Sjdp SYSCTL_STATIC_CHILDREN(_machdep_cpu), OID_AUTO, nodename, 32433965Sjdp CTLFLAG_RD, NULL, ""); 32533965Sjdp if (pc->pc_md.sysctl_tree == NULL) 32633965Sjdp continue; 32733965Sjdp 32833965Sjdp pcs = &pc->pc_md.stats; 32933965Sjdp 33033965Sjdp SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx, 33133965Sjdp SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO, 33233965Sjdp "nasts", CTLFLAG_RD, &pcs->pcs_nasts, 33333965Sjdp "Number of IPI_AST interrupts"); 33433965Sjdp 33533965Sjdp SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx, 33633965Sjdp SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO, 33733965Sjdp "nclks", CTLFLAG_RD, &pcs->pcs_nclks, 33833965Sjdp "Number of clock interrupts"); 33933965Sjdp 34033965Sjdp SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx, 34133965Sjdp SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO, 34233965Sjdp "nextints", CTLFLAG_RD, &pcs->pcs_nextints, 34333965Sjdp "Number of ExtINT interrupts"); 34433965Sjdp 34533965Sjdp SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx, 34633965Sjdp SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO, 34733965Sjdp "nhighfps", CTLFLAG_RD, &pcs->pcs_nhighfps, 34833965Sjdp "Number of IPI_HIGH_FP interrupts"); 34933965Sjdp 35033965Sjdp SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx, 35133965Sjdp SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO, 35233965Sjdp "nhwints", CTLFLAG_RD, &pcs->pcs_nhwints, 35333965Sjdp "Number of hardware (device) interrupts"); 35433965Sjdp 35533965Sjdp SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx, 35633965Sjdp SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO, 35733965Sjdp "npreempts", CTLFLAG_RD, &pcs->pcs_npreempts, 35833965Sjdp "Number of IPI_PREEMPT interrupts"); 35933965Sjdp 36033965Sjdp SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx, 36133965Sjdp SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO, 36233965Sjdp "nrdvs", CTLFLAG_RD, &pcs->pcs_nrdvs, 36333965Sjdp "Number of IPI_RENDEZVOUS interrupts"); 36433965Sjdp 36533965Sjdp SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx, 36633965Sjdp SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO, 36733965Sjdp "nstops", CTLFLAG_RD, &pcs->pcs_nstops, 36833965Sjdp "Number of IPI_STOP interrupts"); 36933965Sjdp 37033965Sjdp SYSCTL_ADD_ULONG(&pc->pc_md.sysctl_ctx, 37133965Sjdp SYSCTL_CHILDREN(pc->pc_md.sysctl_tree), OID_AUTO, 37233965Sjdp "nstrays", CTLFLAG_RD, &pcs->pcs_nstrays, 37333965Sjdp "Number of stray interrupts"); 37433965Sjdp } 37533965Sjdp} 37633965SjdpSYSINIT(cpu_startup, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL); 37733965Sjdp 37833965Sjdpvoid 37933965Sjdpcpu_flush_dcache(void *ptr, size_t len) 38033965Sjdp{ 38133965Sjdp vm_offset_t lim, va; 38233965Sjdp 38333965Sjdp va = (uintptr_t)ptr & ~31; 38433965Sjdp lim = (uintptr_t)ptr + len; 38533965Sjdp while (va < lim) { 38633965Sjdp ia64_fc(va); 38733965Sjdp va += 32; 38833965Sjdp } 38933965Sjdp 39033965Sjdp ia64_srlz_d(); 39133965Sjdp} 39233965Sjdp 39333965Sjdp/* Get current clock frequency for the given cpu id. */ 39433965Sjdpint 39533965Sjdpcpu_est_clockrate(int cpu_id, uint64_t *rate) 39633965Sjdp{ 39733965Sjdp 39833965Sjdp if (pcpu_find(cpu_id) == NULL || rate == NULL) 39933965Sjdp return (EINVAL); 40033965Sjdp *rate = (u_long)cpu_freq * 1000000ul; 40133965Sjdp return (0); 40233965Sjdp} 40333965Sjdp 40433965Sjdpvoid 40533965Sjdpcpu_halt() 40633965Sjdp{ 40733965Sjdp 40833965Sjdp efi_reset_system(); 40933965Sjdp} 41033965Sjdp 41133965Sjdpvoid 41233965Sjdpcpu_idle(int busy) 41333965Sjdp{ 41433965Sjdp struct ia64_pal_result res; 41533965Sjdp 41633965Sjdp if (cpu_idle_hook != NULL) 41733965Sjdp (*cpu_idle_hook)(); 41833965Sjdp else 41933965Sjdp res = ia64_call_pal_static(PAL_HALT_LIGHT, 0, 0, 0); 42033965Sjdp} 42133965Sjdp 42233965Sjdpint 42333965Sjdpcpu_idle_wakeup(int cpu) 42433965Sjdp{ 42533965Sjdp 42633965Sjdp return (0); 42733965Sjdp} 42833965Sjdp 42933965Sjdpvoid 43033965Sjdpcpu_reset() 43133965Sjdp{ 43233965Sjdp 43333965Sjdp efi_reset_system(); 43433965Sjdp} 43533965Sjdp 43633965Sjdpvoid 43733965Sjdpcpu_switch(struct thread *old, struct thread *new, struct mtx *mtx) 43833965Sjdp{ 43933965Sjdp struct pcb *oldpcb, *newpcb; 44033965Sjdp 44133965Sjdp oldpcb = old->td_pcb; 44233965Sjdp#ifdef COMPAT_FREEBSD32 44333965Sjdp ia32_savectx(oldpcb); 44433965Sjdp#endif 44533965Sjdp if (PCPU_GET(fpcurthread) == old) 44633965Sjdp old->td_frame->tf_special.psr |= IA64_PSR_DFH; 44733965Sjdp if (!savectx(oldpcb)) { 44833965Sjdp atomic_store_rel_ptr(&old->td_lock, mtx); 44933965Sjdp 45033965Sjdp newpcb = new->td_pcb; 45133965Sjdp oldpcb->pcb_current_pmap = 45233965Sjdp pmap_switch(newpcb->pcb_current_pmap); 45333965Sjdp 45433965Sjdp#if defined(SCHED_ULE) && defined(SMP) 45533965Sjdp while (atomic_load_acq_ptr(&new->td_lock) == &blocked_lock) 45633965Sjdp cpu_spinwait(); 45733965Sjdp#endif 45833965Sjdp 45933965Sjdp PCPU_SET(curthread, new); 46033965Sjdp 46133965Sjdp#ifdef COMPAT_FREEBSD32 46233965Sjdp ia32_restorectx(newpcb); 46333965Sjdp#endif 46433965Sjdp 46533965Sjdp if (PCPU_GET(fpcurthread) == new) 46633965Sjdp new->td_frame->tf_special.psr &= ~IA64_PSR_DFH; 46733965Sjdp restorectx(newpcb); 46833965Sjdp /* We should not get here. */ 46933965Sjdp panic("cpu_switch: restorectx() returned"); 47033965Sjdp /* NOTREACHED */ 47133965Sjdp } 47233965Sjdp} 47333965Sjdp 47433965Sjdpvoid 47533965Sjdpcpu_throw(struct thread *old __unused, struct thread *new) 47633965Sjdp{ 47733965Sjdp struct pcb *newpcb; 47833965Sjdp 47933965Sjdp newpcb = new->td_pcb; 48033965Sjdp (void)pmap_switch(newpcb->pcb_current_pmap); 48133965Sjdp 48233965Sjdp#if defined(SCHED_ULE) && defined(SMP) 48333965Sjdp while (atomic_load_acq_ptr(&new->td_lock) == &blocked_lock) 48433965Sjdp cpu_spinwait(); 48533965Sjdp#endif 48633965Sjdp 48733965Sjdp PCPU_SET(curthread, new); 48833965Sjdp 48933965Sjdp#ifdef COMPAT_FREEBSD32 49033965Sjdp ia32_restorectx(newpcb); 49133965Sjdp#endif 49233965Sjdp 49333965Sjdp restorectx(newpcb); 49433965Sjdp /* We should not get here. */ 49533965Sjdp panic("cpu_throw: restorectx() returned"); 49633965Sjdp /* NOTREACHED */ 49733965Sjdp} 49833965Sjdp 49933965Sjdpvoid 50033965Sjdpcpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size) 50133965Sjdp{ 50233965Sjdp 50333965Sjdp /* 50433965Sjdp * Set pc_acpi_id to "uninitialized". 50533965Sjdp * See sys/dev/acpica/acpi_cpu.c 50633965Sjdp */ 50733965Sjdp pcpu->pc_acpi_id = 0xffffffff; 50833965Sjdp} 50933965Sjdp 51033965Sjdpvoid 51133965Sjdpspinlock_enter(void) 51233965Sjdp{ 51333965Sjdp struct thread *td; 51433965Sjdp int intr; 51533965Sjdp 51633965Sjdp td = curthread; 51733965Sjdp if (td->td_md.md_spinlock_count == 0) { 51833965Sjdp intr = intr_disable(); 51933965Sjdp td->td_md.md_spinlock_count = 1; 52033965Sjdp td->td_md.md_saved_intr = intr; 52133965Sjdp } else 52233965Sjdp td->td_md.md_spinlock_count++; 52333965Sjdp critical_enter(); 52433965Sjdp} 52533965Sjdp 52633965Sjdpvoid 52733965Sjdpspinlock_exit(void) 52833965Sjdp{ 52933965Sjdp struct thread *td; 53033965Sjdp int intr; 53133965Sjdp 53233965Sjdp td = curthread; 53333965Sjdp critical_exit(); 53433965Sjdp intr = td->td_md.md_saved_intr; 53533965Sjdp td->td_md.md_spinlock_count--; 53633965Sjdp if (td->td_md.md_spinlock_count == 0) 53733965Sjdp intr_restore(intr); 53833965Sjdp} 53933965Sjdp 54033965Sjdpvoid 54133965Sjdpmap_vhpt(uintptr_t vhpt) 54233965Sjdp{ 54333965Sjdp pt_entry_t pte; 54433965Sjdp uint64_t psr; 54533965Sjdp 54633965Sjdp pte = PTE_PRESENT | PTE_MA_WB | PTE_ACCESSED | PTE_DIRTY | 54733965Sjdp PTE_PL_KERN | PTE_AR_RW; 54833965Sjdp pte |= vhpt & PTE_PPN_MASK; 54933965Sjdp 55033965Sjdp __asm __volatile("ptr.d %0,%1" :: "r"(vhpt), 55133965Sjdp "r"(IA64_ID_PAGE_SHIFT<<2)); 55233965Sjdp 55333965Sjdp __asm __volatile("mov %0=psr" : "=r"(psr)); 55433965Sjdp __asm __volatile("rsm psr.ic|psr.i"); 55533965Sjdp ia64_srlz_i(); 55633965Sjdp ia64_set_ifa(vhpt); 55733965Sjdp ia64_set_itir(IA64_ID_PAGE_SHIFT << 2); 55833965Sjdp ia64_srlz_d(); 55933965Sjdp __asm __volatile("itr.d dtr[%0]=%1" :: "r"(2), "r"(pte)); 56033965Sjdp __asm __volatile("mov psr.l=%0" :: "r" (psr)); 56133965Sjdp ia64_srlz_i(); 56233965Sjdp} 56333965Sjdp 56433965Sjdpvoid 56533965Sjdpmap_pal_code(void) 56633965Sjdp{ 56733965Sjdp pt_entry_t pte; 56833965Sjdp uint64_t psr; 56933965Sjdp 57033965Sjdp if (ia64_pal_base == 0) 57133965Sjdp return; 57233965Sjdp 57333965Sjdp pte = PTE_PRESENT | PTE_MA_WB | PTE_ACCESSED | PTE_DIRTY | 57433965Sjdp PTE_PL_KERN | PTE_AR_RWX; 57533965Sjdp pte |= ia64_pal_base & PTE_PPN_MASK; 57633965Sjdp 57733965Sjdp __asm __volatile("ptr.d %0,%1; ptr.i %0,%1" :: 57833965Sjdp "r"(IA64_PHYS_TO_RR7(ia64_pal_base)), "r"(IA64_ID_PAGE_SHIFT<<2)); 57933965Sjdp 58033965Sjdp __asm __volatile("mov %0=psr" : "=r"(psr)); 58133965Sjdp __asm __volatile("rsm psr.ic|psr.i"); 58233965Sjdp ia64_srlz_i(); 58333965Sjdp ia64_set_ifa(IA64_PHYS_TO_RR7(ia64_pal_base)); 58433965Sjdp ia64_set_itir(IA64_ID_PAGE_SHIFT << 2); 58533965Sjdp ia64_srlz_d(); 58633965Sjdp __asm __volatile("itr.d dtr[%0]=%1" :: "r"(1), "r"(pte)); 58733965Sjdp ia64_srlz_d(); 58833965Sjdp __asm __volatile("itr.i itr[%0]=%1" :: "r"(1), "r"(pte)); 58933965Sjdp __asm __volatile("mov psr.l=%0" :: "r" (psr)); 59033965Sjdp ia64_srlz_i(); 59133965Sjdp} 59233965Sjdp 59333965Sjdpvoid 59433965Sjdpmap_gateway_page(void) 59533965Sjdp{ 59633965Sjdp pt_entry_t pte; 59733965Sjdp uint64_t psr; 59833965Sjdp 59933965Sjdp pte = PTE_PRESENT | PTE_MA_WB | PTE_ACCESSED | PTE_DIRTY | 60033965Sjdp PTE_PL_KERN | PTE_AR_X_RX; 60133965Sjdp pte |= (uint64_t)ia64_gateway_page & PTE_PPN_MASK; 60233965Sjdp 60333965Sjdp __asm __volatile("ptr.d %0,%1; ptr.i %0,%1" :: 60433965Sjdp "r"(VM_MAXUSER_ADDRESS), "r"(PAGE_SHIFT << 2)); 60533965Sjdp 60633965Sjdp __asm __volatile("mov %0=psr" : "=r"(psr)); 60733965Sjdp __asm __volatile("rsm psr.ic|psr.i"); 60833965Sjdp ia64_srlz_i(); 60933965Sjdp ia64_set_ifa(VM_MAXUSER_ADDRESS); 61033965Sjdp ia64_set_itir(PAGE_SHIFT << 2); 61133965Sjdp ia64_srlz_d(); 61233965Sjdp __asm __volatile("itr.d dtr[%0]=%1" :: "r"(3), "r"(pte)); 61333965Sjdp ia64_srlz_d(); 61433965Sjdp __asm __volatile("itr.i itr[%0]=%1" :: "r"(3), "r"(pte)); 61533965Sjdp __asm __volatile("mov psr.l=%0" :: "r" (psr)); 61633965Sjdp ia64_srlz_i(); 61733965Sjdp 61833965Sjdp /* Expose the mapping to userland in ar.k5 */ 61933965Sjdp ia64_set_k5(VM_MAXUSER_ADDRESS); 62033965Sjdp} 62133965Sjdp 62233965Sjdpstatic u_int 62333965Sjdpfreq_ratio(u_long base, u_long ratio) 62433965Sjdp{ 62533965Sjdp u_long f; 62633965Sjdp 62733965Sjdp f = (base * (ratio >> 32)) / (ratio & 0xfffffffful); 62833965Sjdp return ((f + 500000) / 1000000); 62933965Sjdp} 63033965Sjdp 63133965Sjdpstatic void 63233965Sjdpcalculate_frequencies(void) 63333965Sjdp{ 63433965Sjdp struct ia64_sal_result sal; 63533965Sjdp struct ia64_pal_result pal; 63633965Sjdp 63733965Sjdp sal = ia64_sal_entry(SAL_FREQ_BASE, 0, 0, 0, 0, 0, 0, 0); 63833965Sjdp pal = ia64_call_pal_static(PAL_FREQ_RATIOS, 0, 0, 0); 63933965Sjdp 64033965Sjdp if (sal.sal_status == 0 && pal.pal_status == 0) { 64133965Sjdp if (bootverbose) { 64233965Sjdp printf("Platform clock frequency %ld Hz\n", 64333965Sjdp sal.sal_result[0]); 64433965Sjdp printf("Processor ratio %ld/%ld, Bus ratio %ld/%ld, " 64533965Sjdp "ITC ratio %ld/%ld\n", 64633965Sjdp pal.pal_result[0] >> 32, 64733965Sjdp pal.pal_result[0] & ((1L << 32) - 1), 64833965Sjdp pal.pal_result[1] >> 32, 64933965Sjdp pal.pal_result[1] & ((1L << 32) - 1), 65033965Sjdp pal.pal_result[2] >> 32, 65133965Sjdp pal.pal_result[2] & ((1L << 32) - 1)); 65233965Sjdp } 65333965Sjdp cpu_freq = freq_ratio(sal.sal_result[0], pal.pal_result[0]); 65433965Sjdp bus_freq = freq_ratio(sal.sal_result[0], pal.pal_result[1]); 65533965Sjdp itc_freq = freq_ratio(sal.sal_result[0], pal.pal_result[2]); 65633965Sjdp } 65733965Sjdp} 65833965Sjdp 65933965Sjdpstruct ia64_init_return 66033965Sjdpia64_init(void) 66133965Sjdp{ 66233965Sjdp struct ia64_init_return ret; 66333965Sjdp int phys_avail_cnt; 66433965Sjdp vm_offset_t kernstart, kernend; 66533965Sjdp vm_offset_t kernstartpfn, kernendpfn, pfn0, pfn1; 66633965Sjdp char *p; 66733965Sjdp struct efi_md *md; 66833965Sjdp int metadata_missing; 66933965Sjdp 67033965Sjdp /* NO OUTPUT ALLOWED UNTIL FURTHER NOTICE */ 67133965Sjdp 67233965Sjdp /* 67333965Sjdp * TODO: Disable interrupts, floating point etc. 67433965Sjdp * Maybe flush cache and tlb 67533965Sjdp */ 67633965Sjdp ia64_set_fpsr(IA64_FPSR_DEFAULT); 67733965Sjdp 67833965Sjdp /* 67933965Sjdp * TODO: Get critical system information (if possible, from the 68033965Sjdp * information provided by the boot program). 68133965Sjdp */ 68233965Sjdp 68333965Sjdp /* 68433965Sjdp * pa_bootinfo is the physical address of the bootinfo block as 68533965Sjdp * passed to us by the loader and set in locore.s. 68633965Sjdp */ 68733965Sjdp bootinfo = *(struct bootinfo *)(IA64_PHYS_TO_RR7(pa_bootinfo)); 68833965Sjdp 68933965Sjdp if (bootinfo.bi_magic != BOOTINFO_MAGIC || bootinfo.bi_version != 1) { 69033965Sjdp bzero(&bootinfo, sizeof(bootinfo)); 69133965Sjdp bootinfo.bi_kernend = (vm_offset_t) round_page(_end); 69233965Sjdp } 69333965Sjdp 69433965Sjdp /* 69533965Sjdp * Look for the I/O ports first - we need them for console 69633965Sjdp * probing. 69733965Sjdp */ 69833965Sjdp for (md = efi_md_first(); md != NULL; md = efi_md_next(md)) { 69933965Sjdp switch (md->md_type) { 70033965Sjdp case EFI_MD_TYPE_IOPORT: 70133965Sjdp ia64_port_base = (uintptr_t)pmap_mapdev(md->md_phys, 70233965Sjdp md->md_pages * EFI_PAGE_SIZE); 70333965Sjdp break; 70433965Sjdp case EFI_MD_TYPE_PALCODE: 70533965Sjdp ia64_pal_base = md->md_phys; 70633965Sjdp break; 70733965Sjdp } 70833965Sjdp } 70933965Sjdp 71033965Sjdp metadata_missing = 0; 71133965Sjdp if (bootinfo.bi_modulep) 71233965Sjdp preload_metadata = (caddr_t)bootinfo.bi_modulep; 71333965Sjdp else 71433965Sjdp metadata_missing = 1; 71533965Sjdp 71633965Sjdp if (envmode == 0 && bootinfo.bi_envp) 71733965Sjdp kern_envp = (caddr_t)bootinfo.bi_envp; 71833965Sjdp else 71933965Sjdp kern_envp = static_env; 72033965Sjdp 72133965Sjdp /* 72233965Sjdp * Look at arguments passed to us and compute boothowto. 72333965Sjdp */ 72433965Sjdp boothowto = bootinfo.bi_boothowto; 72533965Sjdp 72633965Sjdp if (boothowto & RB_VERBOSE) 72733965Sjdp bootverbose = 1; 72833965Sjdp 72933965Sjdp /* 73033965Sjdp * Find the beginning and end of the kernel. 73133965Sjdp */ 73233965Sjdp kernstart = trunc_page(kernel_text); 73333965Sjdp#ifdef DDB 73433965Sjdp ksym_start = bootinfo.bi_symtab; 73533965Sjdp ksym_end = bootinfo.bi_esymtab; 73633965Sjdp kernend = (vm_offset_t)round_page(ksym_end); 73733965Sjdp#else 73833965Sjdp kernend = (vm_offset_t)round_page(_end); 73933965Sjdp#endif 74033965Sjdp /* But if the bootstrap tells us otherwise, believe it! */ 74133965Sjdp if (bootinfo.bi_kernend) 74233965Sjdp kernend = round_page(bootinfo.bi_kernend); 74333965Sjdp 74433965Sjdp /* 74533965Sjdp * Setup the PCPU data for the bootstrap processor. It is needed 74633965Sjdp * by printf(). Also, since printf() has critical sections, we 74733965Sjdp * need to initialize at least pc_curthread. 74833965Sjdp */ 74933965Sjdp pcpup = &pcpu0; 75033965Sjdp ia64_set_k4((u_int64_t)pcpup); 75133965Sjdp pcpu_init(pcpup, 0, sizeof(pcpu0)); 75233965Sjdp dpcpu_init((void *)kernend, 0); 75333965Sjdp kernend += DPCPU_SIZE; 75433965Sjdp PCPU_SET(curthread, &thread0); 75533965Sjdp 75633965Sjdp /* 75733965Sjdp * Initialize the console before we print anything out. 75833965Sjdp */ 75933965Sjdp cninit(); 76033965Sjdp 76133965Sjdp /* OUTPUT NOW ALLOWED */ 76233965Sjdp 76333965Sjdp if (ia64_pal_base != 0) { 76433965Sjdp ia64_pal_base &= ~IA64_ID_PAGE_MASK; 76533965Sjdp /* 76633965Sjdp * We use a TR to map the first 256M of memory - this might 76733965Sjdp * cover the palcode too. 76833965Sjdp */ 76933965Sjdp if (ia64_pal_base == 0) 77033965Sjdp printf("PAL code mapped by the kernel's TR\n"); 77133965Sjdp } else 77233965Sjdp printf("PAL code not found\n"); 77333965Sjdp 77433965Sjdp /* 77533965Sjdp * Wire things up so we can call the firmware. 77633965Sjdp */ 77733965Sjdp map_pal_code(); 77833965Sjdp efi_boot_minimal(bootinfo.bi_systab); 77933965Sjdp ia64_xiv_init(); 78033965Sjdp ia64_sal_init(); 78133965Sjdp calculate_frequencies(); 78233965Sjdp 78333965Sjdp if (metadata_missing) 78433965Sjdp printf("WARNING: loader(8) metadata is missing!\n"); 78533965Sjdp 78633965Sjdp /* Get FPSWA interface */ 78733965Sjdp fpswa_iface = (bootinfo.bi_fpswa == 0) ? NULL : 78833965Sjdp (struct fpswa_iface *)IA64_PHYS_TO_RR7(bootinfo.bi_fpswa); 78933965Sjdp 79033965Sjdp /* Init basic tunables, including hz */ 79133965Sjdp init_param1(); 79233965Sjdp 79333965Sjdp p = getenv("kernelname"); 79433965Sjdp if (p != NULL) { 79533965Sjdp strlcpy(kernelname, p, sizeof(kernelname)); 79633965Sjdp freeenv(p); 79733965Sjdp } 79833965Sjdp 79933965Sjdp kernstartpfn = atop(IA64_RR_MASK(kernstart)); 80033965Sjdp kernendpfn = atop(IA64_RR_MASK(kernend)); 80133965Sjdp 802 /* 803 * Size the memory regions and load phys_avail[] with the results. 804 */ 805 806 /* 807 * Find out how much memory is available, by looking at 808 * the memory descriptors. 809 */ 810 811#ifdef DEBUG_MD 812 printf("Memory descriptor count: %d\n", mdcount); 813#endif 814 815 phys_avail_cnt = 0; 816 for (md = efi_md_first(); md != NULL; md = efi_md_next(md)) { 817#ifdef DEBUG_MD 818 printf("MD %p: type %d pa 0x%lx cnt 0x%lx\n", md, 819 md->md_type, md->md_phys, md->md_pages); 820#endif 821 822 pfn0 = ia64_btop(round_page(md->md_phys)); 823 pfn1 = ia64_btop(trunc_page(md->md_phys + md->md_pages * 4096)); 824 if (pfn1 <= pfn0) 825 continue; 826 827 if (md->md_type != EFI_MD_TYPE_FREE) 828 continue; 829 830 /* 831 * We have a memory descriptor that describes conventional 832 * memory that is for general use. We must determine if the 833 * loader has put the kernel in this region. 834 */ 835 physmem += (pfn1 - pfn0); 836 if (pfn0 <= kernendpfn && kernstartpfn <= pfn1) { 837 /* 838 * Must compute the location of the kernel 839 * within the segment. 840 */ 841#ifdef DEBUG_MD 842 printf("Descriptor %p contains kernel\n", mp); 843#endif 844 if (pfn0 < kernstartpfn) { 845 /* 846 * There is a chunk before the kernel. 847 */ 848#ifdef DEBUG_MD 849 printf("Loading chunk before kernel: " 850 "0x%lx / 0x%lx\n", pfn0, kernstartpfn); 851#endif 852 phys_avail[phys_avail_cnt] = ia64_ptob(pfn0); 853 phys_avail[phys_avail_cnt+1] = ia64_ptob(kernstartpfn); 854 phys_avail_cnt += 2; 855 } 856 if (kernendpfn < pfn1) { 857 /* 858 * There is a chunk after the kernel. 859 */ 860#ifdef DEBUG_MD 861 printf("Loading chunk after kernel: " 862 "0x%lx / 0x%lx\n", kernendpfn, pfn1); 863#endif 864 phys_avail[phys_avail_cnt] = ia64_ptob(kernendpfn); 865 phys_avail[phys_avail_cnt+1] = ia64_ptob(pfn1); 866 phys_avail_cnt += 2; 867 } 868 } else { 869 /* 870 * Just load this cluster as one chunk. 871 */ 872#ifdef DEBUG_MD 873 printf("Loading descriptor %d: 0x%lx / 0x%lx\n", i, 874 pfn0, pfn1); 875#endif 876 phys_avail[phys_avail_cnt] = ia64_ptob(pfn0); 877 phys_avail[phys_avail_cnt+1] = ia64_ptob(pfn1); 878 phys_avail_cnt += 2; 879 880 } 881 } 882 phys_avail[phys_avail_cnt] = 0; 883 884 Maxmem = physmem; 885 init_param2(physmem); 886 887 /* 888 * Initialize error message buffer (at end of core). 889 */ 890 msgbufp = (struct msgbuf *)pmap_steal_memory(msgbufsize); 891 msgbufinit(msgbufp, msgbufsize); 892 893 proc_linkup0(&proc0, &thread0); 894 /* 895 * Init mapping for kernel stack for proc 0 896 */ 897 thread0.td_kstack = pmap_steal_memory(KSTACK_PAGES * PAGE_SIZE); 898 thread0.td_kstack_pages = KSTACK_PAGES; 899 900 mutex_init(); 901 902 /* 903 * Initialize the rest of proc 0's PCB. 904 * 905 * Set the kernel sp, reserving space for an (empty) trapframe, 906 * and make proc0's trapframe pointer point to it for sanity. 907 * Initialise proc0's backing store to start after u area. 908 */ 909 cpu_thread_alloc(&thread0); 910 thread0.td_frame->tf_flags = FRAME_SYSCALL; 911 thread0.td_pcb->pcb_special.sp = 912 (u_int64_t)thread0.td_frame - 16; 913 thread0.td_pcb->pcb_special.bspstore = thread0.td_kstack; 914 915 /* 916 * Initialize the virtual memory system. 917 */ 918 pmap_bootstrap(); 919 920 /* 921 * Initialize debuggers, and break into them if appropriate. 922 */ 923 kdb_init(); 924 925#ifdef KDB 926 if (boothowto & RB_KDB) 927 kdb_enter(KDB_WHY_BOOTFLAGS, 928 "Boot flags requested debugger\n"); 929#endif 930 931 ia64_set_tpr(0); 932 ia64_srlz_d(); 933 934 ret.bspstore = thread0.td_pcb->pcb_special.bspstore; 935 ret.sp = thread0.td_pcb->pcb_special.sp; 936 return (ret); 937} 938 939uint64_t 940ia64_get_hcdp(void) 941{ 942 943 return (bootinfo.bi_hcdp); 944} 945 946void 947bzero(void *buf, size_t len) 948{ 949 caddr_t p = buf; 950 951 while (((vm_offset_t) p & (sizeof(u_long) - 1)) && len) { 952 *p++ = 0; 953 len--; 954 } 955 while (len >= sizeof(u_long) * 8) { 956 *(u_long*) p = 0; 957 *((u_long*) p + 1) = 0; 958 *((u_long*) p + 2) = 0; 959 *((u_long*) p + 3) = 0; 960 len -= sizeof(u_long) * 8; 961 *((u_long*) p + 4) = 0; 962 *((u_long*) p + 5) = 0; 963 *((u_long*) p + 6) = 0; 964 *((u_long*) p + 7) = 0; 965 p += sizeof(u_long) * 8; 966 } 967 while (len >= sizeof(u_long)) { 968 *(u_long*) p = 0; 969 len -= sizeof(u_long); 970 p += sizeof(u_long); 971 } 972 while (len) { 973 *p++ = 0; 974 len--; 975 } 976} 977 978u_int 979ia64_itc_freq(void) 980{ 981 982 return (itc_freq); 983} 984 985void 986DELAY(int n) 987{ 988 u_int64_t start, end, now; 989 990 sched_pin(); 991 992 start = ia64_get_itc(); 993 end = start + itc_freq * n; 994 /* printf("DELAY from 0x%lx to 0x%lx\n", start, end); */ 995 do { 996 now = ia64_get_itc(); 997 } while (now < end || (now > start && end < start)); 998 999 sched_unpin(); 1000} 1001 1002/* 1003 * Send an interrupt (signal) to a process. 1004 */ 1005void 1006sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask) 1007{ 1008 struct proc *p; 1009 struct thread *td; 1010 struct trapframe *tf; 1011 struct sigacts *psp; 1012 struct sigframe sf, *sfp; 1013 u_int64_t sbs, sp; 1014 int oonstack; 1015 int sig; 1016 u_long code; 1017 1018 td = curthread; 1019 p = td->td_proc; 1020 PROC_LOCK_ASSERT(p, MA_OWNED); 1021 sig = ksi->ksi_signo; 1022 code = ksi->ksi_code; 1023 psp = p->p_sigacts; 1024 mtx_assert(&psp->ps_mtx, MA_OWNED); 1025 tf = td->td_frame; 1026 sp = tf->tf_special.sp; 1027 oonstack = sigonstack(sp); 1028 sbs = 0; 1029 1030 /* save user context */ 1031 bzero(&sf, sizeof(struct sigframe)); 1032 sf.sf_uc.uc_sigmask = *mask; 1033 sf.sf_uc.uc_stack = td->td_sigstk; 1034 sf.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK) 1035 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; 1036 1037 /* 1038 * Allocate and validate space for the signal handler 1039 * context. Note that if the stack is in P0 space, the 1040 * call to grow() is a nop, and the useracc() check 1041 * will fail if the process has not already allocated 1042 * the space with a `brk'. 1043 */ 1044 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack && 1045 SIGISMEMBER(psp->ps_sigonstack, sig)) { 1046 sbs = (u_int64_t)td->td_sigstk.ss_sp; 1047 sbs = (sbs + 15) & ~15; 1048 sfp = (struct sigframe *)(sbs + td->td_sigstk.ss_size); 1049#if defined(COMPAT_43) 1050 td->td_sigstk.ss_flags |= SS_ONSTACK; 1051#endif 1052 } else 1053 sfp = (struct sigframe *)sp; 1054 sfp = (struct sigframe *)((u_int64_t)(sfp - 1) & ~15); 1055 1056 /* Fill in the siginfo structure for POSIX handlers. */ 1057 if (SIGISMEMBER(psp->ps_siginfo, sig)) { 1058 sf.sf_si = ksi->ksi_info; 1059 sf.sf_si.si_signo = sig; 1060 /* 1061 * XXX this shouldn't be here after code in trap.c 1062 * is fixed 1063 */ 1064 sf.sf_si.si_addr = (void*)tf->tf_special.ifa; 1065 code = (u_int64_t)&sfp->sf_si; 1066 } 1067 1068 mtx_unlock(&psp->ps_mtx); 1069 PROC_UNLOCK(p); 1070 1071 get_mcontext(td, &sf.sf_uc.uc_mcontext, 0); 1072 1073 /* Copy the frame out to userland. */ 1074 if (copyout(&sf, sfp, sizeof(sf)) != 0) { 1075 /* 1076 * Process has trashed its stack; give it an illegal 1077 * instruction to halt it in its tracks. 1078 */ 1079 PROC_LOCK(p); 1080 sigexit(td, SIGILL); 1081 return; 1082 } 1083 1084 if ((tf->tf_flags & FRAME_SYSCALL) == 0) { 1085 tf->tf_special.psr &= ~IA64_PSR_RI; 1086 tf->tf_special.iip = ia64_get_k5() + 1087 ((uint64_t)break_sigtramp - (uint64_t)ia64_gateway_page); 1088 } else 1089 tf->tf_special.iip = ia64_get_k5() + 1090 ((uint64_t)epc_sigtramp - (uint64_t)ia64_gateway_page); 1091 1092 /* 1093 * Setup the trapframe to return to the signal trampoline. We pass 1094 * information to the trampoline in the following registers: 1095 * 1096 * gp new backing store or NULL 1097 * r8 signal number 1098 * r9 signal code or siginfo pointer 1099 * r10 signal handler (function descriptor) 1100 */ 1101 tf->tf_special.sp = (u_int64_t)sfp - 16; 1102 tf->tf_special.gp = sbs; 1103 tf->tf_special.bspstore = sf.sf_uc.uc_mcontext.mc_special.bspstore; 1104 tf->tf_special.ndirty = 0; 1105 tf->tf_special.rnat = sf.sf_uc.uc_mcontext.mc_special.rnat; 1106 tf->tf_scratch.gr8 = sig; 1107 tf->tf_scratch.gr9 = code; 1108 tf->tf_scratch.gr10 = (u_int64_t)catcher; 1109 1110 PROC_LOCK(p); 1111 mtx_lock(&psp->ps_mtx); 1112} 1113 1114/* 1115 * System call to cleanup state after a signal 1116 * has been taken. Reset signal mask and 1117 * stack state from context left by sendsig (above). 1118 * Return to previous pc and psl as specified by 1119 * context left by sendsig. Check carefully to 1120 * make sure that the user has not modified the 1121 * state to gain improper privileges. 1122 * 1123 * MPSAFE 1124 */ 1125int 1126sigreturn(struct thread *td, 1127 struct sigreturn_args /* { 1128 ucontext_t *sigcntxp; 1129 } */ *uap) 1130{ 1131 ucontext_t uc; 1132 struct trapframe *tf; 1133 struct pcb *pcb; 1134 1135 tf = td->td_frame; 1136 pcb = td->td_pcb; 1137 1138 /* 1139 * Fetch the entire context structure at once for speed. 1140 * We don't use a normal argument to simplify RSE handling. 1141 */ 1142 if (copyin(uap->sigcntxp, (caddr_t)&uc, sizeof(uc))) 1143 return (EFAULT); 1144 1145 set_mcontext(td, &uc.uc_mcontext); 1146 1147#if defined(COMPAT_43) 1148 if (sigonstack(tf->tf_special.sp)) 1149 td->td_sigstk.ss_flags |= SS_ONSTACK; 1150 else 1151 td->td_sigstk.ss_flags &= ~SS_ONSTACK; 1152#endif 1153 kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0); 1154 1155 return (EJUSTRETURN); 1156} 1157 1158#ifdef COMPAT_FREEBSD4 1159int 1160freebsd4_sigreturn(struct thread *td, struct freebsd4_sigreturn_args *uap) 1161{ 1162 1163 return sigreturn(td, (struct sigreturn_args *)uap); 1164} 1165#endif 1166 1167/* 1168 * Construct a PCB from a trapframe. This is called from kdb_trap() where 1169 * we want to start a backtrace from the function that caused us to enter 1170 * the debugger. We have the context in the trapframe, but base the trace 1171 * on the PCB. The PCB doesn't have to be perfect, as long as it contains 1172 * enough for a backtrace. 1173 */ 1174void 1175makectx(struct trapframe *tf, struct pcb *pcb) 1176{ 1177 1178 pcb->pcb_special = tf->tf_special; 1179 pcb->pcb_special.__spare = ~0UL; /* XXX see unwind.c */ 1180 save_callee_saved(&pcb->pcb_preserved); 1181 save_callee_saved_fp(&pcb->pcb_preserved_fp); 1182} 1183 1184int 1185ia64_flush_dirty(struct thread *td, struct _special *r) 1186{ 1187 struct iovec iov; 1188 struct uio uio; 1189 uint64_t bspst, kstk, rnat; 1190 int error, locked; 1191 1192 if (r->ndirty == 0) 1193 return (0); 1194 1195 kstk = td->td_kstack + (r->bspstore & 0x1ffUL); 1196 if (td == curthread) { 1197 __asm __volatile("mov ar.rsc=0;;"); 1198 __asm __volatile("mov %0=ar.bspstore" : "=r"(bspst)); 1199 /* Make sure we have all the user registers written out. */ 1200 if (bspst - kstk < r->ndirty) { 1201 __asm __volatile("flushrs;;"); 1202 __asm __volatile("mov %0=ar.bspstore" : "=r"(bspst)); 1203 } 1204 __asm __volatile("mov %0=ar.rnat;;" : "=r"(rnat)); 1205 __asm __volatile("mov ar.rsc=3"); 1206 error = copyout((void*)kstk, (void*)r->bspstore, r->ndirty); 1207 kstk += r->ndirty; 1208 r->rnat = (bspst > kstk && (bspst & 0x1ffL) < (kstk & 0x1ffL)) 1209 ? *(uint64_t*)(kstk | 0x1f8L) : rnat; 1210 } else { 1211 locked = PROC_LOCKED(td->td_proc); 1212 if (!locked) 1213 PHOLD(td->td_proc); 1214 iov.iov_base = (void*)(uintptr_t)kstk; 1215 iov.iov_len = r->ndirty; 1216 uio.uio_iov = &iov; 1217 uio.uio_iovcnt = 1; 1218 uio.uio_offset = r->bspstore; 1219 uio.uio_resid = r->ndirty; 1220 uio.uio_segflg = UIO_SYSSPACE; 1221 uio.uio_rw = UIO_WRITE; 1222 uio.uio_td = td; 1223 error = proc_rwmem(td->td_proc, &uio); 1224 /* 1225 * XXX proc_rwmem() doesn't currently return ENOSPC, 1226 * so I think it can bogusly return 0. Neither do 1227 * we allow short writes. 1228 */ 1229 if (uio.uio_resid != 0 && error == 0) 1230 error = ENOSPC; 1231 if (!locked) 1232 PRELE(td->td_proc); 1233 } 1234 1235 r->bspstore += r->ndirty; 1236 r->ndirty = 0; 1237 return (error); 1238} 1239 1240int 1241get_mcontext(struct thread *td, mcontext_t *mc, int flags) 1242{ 1243 struct trapframe *tf; 1244 int error; 1245 1246 tf = td->td_frame; 1247 bzero(mc, sizeof(*mc)); 1248 mc->mc_special = tf->tf_special; 1249 error = ia64_flush_dirty(td, &mc->mc_special); 1250 if (tf->tf_flags & FRAME_SYSCALL) { 1251 mc->mc_flags |= _MC_FLAGS_SYSCALL_CONTEXT; 1252 mc->mc_scratch = tf->tf_scratch; 1253 if (flags & GET_MC_CLEAR_RET) { 1254 mc->mc_scratch.gr8 = 0; 1255 mc->mc_scratch.gr9 = 0; 1256 mc->mc_scratch.gr10 = 0; 1257 mc->mc_scratch.gr11 = 0; 1258 } 1259 } else { 1260 mc->mc_flags |= _MC_FLAGS_ASYNC_CONTEXT; 1261 mc->mc_scratch = tf->tf_scratch; 1262 mc->mc_scratch_fp = tf->tf_scratch_fp; 1263 /* 1264 * XXX If the thread never used the high FP registers, we 1265 * probably shouldn't waste time saving them. 1266 */ 1267 ia64_highfp_save(td); 1268 mc->mc_flags |= _MC_FLAGS_HIGHFP_VALID; 1269 mc->mc_high_fp = td->td_pcb->pcb_high_fp; 1270 } 1271 save_callee_saved(&mc->mc_preserved); 1272 save_callee_saved_fp(&mc->mc_preserved_fp); 1273 return (error); 1274} 1275 1276int 1277set_mcontext(struct thread *td, const mcontext_t *mc) 1278{ 1279 struct _special s; 1280 struct trapframe *tf; 1281 uint64_t psrmask; 1282 1283 tf = td->td_frame; 1284 1285 KASSERT((tf->tf_special.ndirty & ~PAGE_MASK) == 0, 1286 ("Whoa there! We have more than 8KB of dirty registers!")); 1287 1288 s = mc->mc_special; 1289 /* 1290 * Only copy the user mask and the restart instruction bit from 1291 * the new context. 1292 */ 1293 psrmask = IA64_PSR_BE | IA64_PSR_UP | IA64_PSR_AC | IA64_PSR_MFL | 1294 IA64_PSR_MFH | IA64_PSR_RI; 1295 s.psr = (tf->tf_special.psr & ~psrmask) | (s.psr & psrmask); 1296 /* We don't have any dirty registers of the new context. */ 1297 s.ndirty = 0; 1298 if (mc->mc_flags & _MC_FLAGS_ASYNC_CONTEXT) { 1299 /* 1300 * We can get an async context passed to us while we 1301 * entered the kernel through a syscall: sigreturn(2) 1302 * takes contexts that could previously be the result of 1303 * a trap or interrupt. 1304 * Hence, we cannot assert that the trapframe is not 1305 * a syscall frame, but we can assert that it's at 1306 * least an expected syscall. 1307 */ 1308 if (tf->tf_flags & FRAME_SYSCALL) { 1309 KASSERT(tf->tf_scratch.gr15 == SYS_sigreturn, ("foo")); 1310 tf->tf_flags &= ~FRAME_SYSCALL; 1311 } 1312 tf->tf_scratch = mc->mc_scratch; 1313 tf->tf_scratch_fp = mc->mc_scratch_fp; 1314 if (mc->mc_flags & _MC_FLAGS_HIGHFP_VALID) 1315 td->td_pcb->pcb_high_fp = mc->mc_high_fp; 1316 } else { 1317 KASSERT((tf->tf_flags & FRAME_SYSCALL) != 0, ("foo")); 1318 if ((mc->mc_flags & _MC_FLAGS_SYSCALL_CONTEXT) == 0) { 1319 s.cfm = tf->tf_special.cfm; 1320 s.iip = tf->tf_special.iip; 1321 tf->tf_scratch.gr15 = 0; /* Clear syscall nr. */ 1322 } else 1323 tf->tf_scratch = mc->mc_scratch; 1324 } 1325 tf->tf_special = s; 1326 restore_callee_saved(&mc->mc_preserved); 1327 restore_callee_saved_fp(&mc->mc_preserved_fp); 1328 1329 return (0); 1330} 1331 1332/* 1333 * Clear registers on exec. 1334 */ 1335void 1336exec_setregs(struct thread *td, struct image_params *imgp, u_long stack) 1337{ 1338 struct trapframe *tf; 1339 uint64_t *ksttop, *kst; 1340 1341 tf = td->td_frame; 1342 ksttop = (uint64_t*)(td->td_kstack + tf->tf_special.ndirty + 1343 (tf->tf_special.bspstore & 0x1ffUL)); 1344 1345 /* 1346 * We can ignore up to 8KB of dirty registers by masking off the 1347 * lower 13 bits in exception_restore() or epc_syscall(). This 1348 * should be enough for a couple of years, but if there are more 1349 * than 8KB of dirty registers, we lose track of the bottom of 1350 * the kernel stack. The solution is to copy the active part of 1351 * the kernel stack down 1 page (or 2, but not more than that) 1352 * so that we always have less than 8KB of dirty registers. 1353 */ 1354 KASSERT((tf->tf_special.ndirty & ~PAGE_MASK) == 0, 1355 ("Whoa there! We have more than 8KB of dirty registers!")); 1356 1357 bzero(&tf->tf_special, sizeof(tf->tf_special)); 1358 if ((tf->tf_flags & FRAME_SYSCALL) == 0) { /* break syscalls. */ 1359 bzero(&tf->tf_scratch, sizeof(tf->tf_scratch)); 1360 bzero(&tf->tf_scratch_fp, sizeof(tf->tf_scratch_fp)); 1361 tf->tf_special.cfm = (1UL<<63) | (3UL<<7) | 3UL; 1362 tf->tf_special.bspstore = IA64_BACKINGSTORE; 1363 /* 1364 * Copy the arguments onto the kernel register stack so that 1365 * they get loaded by the loadrs instruction. Skip over the 1366 * NaT collection points. 1367 */ 1368 kst = ksttop - 1; 1369 if (((uintptr_t)kst & 0x1ff) == 0x1f8) 1370 *kst-- = 0; 1371 *kst-- = 0; 1372 if (((uintptr_t)kst & 0x1ff) == 0x1f8) 1373 *kst-- = 0; 1374 *kst-- = imgp->ps_strings; 1375 if (((uintptr_t)kst & 0x1ff) == 0x1f8) 1376 *kst-- = 0; 1377 *kst = stack; 1378 tf->tf_special.ndirty = (ksttop - kst) << 3; 1379 } else { /* epc syscalls (default). */ 1380 tf->tf_special.cfm = (3UL<<62) | (3UL<<7) | 3UL; 1381 tf->tf_special.bspstore = IA64_BACKINGSTORE + 24; 1382 /* 1383 * Write values for out0, out1 and out2 to the user's backing 1384 * store and arrange for them to be restored into the user's 1385 * initial register frame. 1386 * Assumes that (bspstore & 0x1f8) < 0x1e0. 1387 */ 1388 suword((caddr_t)tf->tf_special.bspstore - 24, stack); 1389 suword((caddr_t)tf->tf_special.bspstore - 16, imgp->ps_strings); 1390 suword((caddr_t)tf->tf_special.bspstore - 8, 0); 1391 } 1392 1393 tf->tf_special.iip = imgp->entry_addr; 1394 tf->tf_special.sp = (stack & ~15) - 16; 1395 tf->tf_special.rsc = 0xf; 1396 tf->tf_special.fpsr = IA64_FPSR_DEFAULT; 1397 tf->tf_special.psr = IA64_PSR_IC | IA64_PSR_I | IA64_PSR_IT | 1398 IA64_PSR_DT | IA64_PSR_RT | IA64_PSR_DFH | IA64_PSR_BN | 1399 IA64_PSR_CPL_USER; 1400} 1401 1402int 1403ptrace_set_pc(struct thread *td, unsigned long addr) 1404{ 1405 uint64_t slot; 1406 1407 switch (addr & 0xFUL) { 1408 case 0: 1409 slot = IA64_PSR_RI_0; 1410 break; 1411 case 1: 1412 /* XXX we need to deal with MLX bundles here */ 1413 slot = IA64_PSR_RI_1; 1414 break; 1415 case 2: 1416 slot = IA64_PSR_RI_2; 1417 break; 1418 default: 1419 return (EINVAL); 1420 } 1421 1422 td->td_frame->tf_special.iip = addr & ~0x0FULL; 1423 td->td_frame->tf_special.psr = 1424 (td->td_frame->tf_special.psr & ~IA64_PSR_RI) | slot; 1425 return (0); 1426} 1427 1428int 1429ptrace_single_step(struct thread *td) 1430{ 1431 struct trapframe *tf; 1432 1433 /* 1434 * There's no way to set single stepping when we're leaving the 1435 * kernel through the EPC syscall path. The way we solve this is 1436 * by enabling the lower-privilege trap so that we re-enter the 1437 * kernel as soon as the privilege level changes. See trap.c for 1438 * how we proceed from there. 1439 */ 1440 tf = td->td_frame; 1441 if (tf->tf_flags & FRAME_SYSCALL) 1442 tf->tf_special.psr |= IA64_PSR_LP; 1443 else 1444 tf->tf_special.psr |= IA64_PSR_SS; 1445 return (0); 1446} 1447 1448int 1449ptrace_clear_single_step(struct thread *td) 1450{ 1451 struct trapframe *tf; 1452 1453 /* 1454 * Clear any and all status bits we may use to implement single 1455 * stepping. 1456 */ 1457 tf = td->td_frame; 1458 tf->tf_special.psr &= ~IA64_PSR_SS; 1459 tf->tf_special.psr &= ~IA64_PSR_LP; 1460 tf->tf_special.psr &= ~IA64_PSR_TB; 1461 return (0); 1462} 1463 1464int 1465fill_regs(struct thread *td, struct reg *regs) 1466{ 1467 struct trapframe *tf; 1468 1469 tf = td->td_frame; 1470 regs->r_special = tf->tf_special; 1471 regs->r_scratch = tf->tf_scratch; 1472 save_callee_saved(®s->r_preserved); 1473 return (0); 1474} 1475 1476int 1477set_regs(struct thread *td, struct reg *regs) 1478{ 1479 struct trapframe *tf; 1480 int error; 1481 1482 tf = td->td_frame; 1483 error = ia64_flush_dirty(td, &tf->tf_special); 1484 if (!error) { 1485 tf->tf_special = regs->r_special; 1486 tf->tf_special.bspstore += tf->tf_special.ndirty; 1487 tf->tf_special.ndirty = 0; 1488 tf->tf_scratch = regs->r_scratch; 1489 restore_callee_saved(®s->r_preserved); 1490 } 1491 return (error); 1492} 1493 1494int 1495fill_dbregs(struct thread *td, struct dbreg *dbregs) 1496{ 1497 1498 return (ENOSYS); 1499} 1500 1501int 1502set_dbregs(struct thread *td, struct dbreg *dbregs) 1503{ 1504 1505 return (ENOSYS); 1506} 1507 1508int 1509fill_fpregs(struct thread *td, struct fpreg *fpregs) 1510{ 1511 struct trapframe *frame = td->td_frame; 1512 struct pcb *pcb = td->td_pcb; 1513 1514 /* Save the high FP registers. */ 1515 ia64_highfp_save(td); 1516 1517 fpregs->fpr_scratch = frame->tf_scratch_fp; 1518 save_callee_saved_fp(&fpregs->fpr_preserved); 1519 fpregs->fpr_high = pcb->pcb_high_fp; 1520 return (0); 1521} 1522 1523int 1524set_fpregs(struct thread *td, struct fpreg *fpregs) 1525{ 1526 struct trapframe *frame = td->td_frame; 1527 struct pcb *pcb = td->td_pcb; 1528 1529 /* Throw away the high FP registers (should be redundant). */ 1530 ia64_highfp_drop(td); 1531 1532 frame->tf_scratch_fp = fpregs->fpr_scratch; 1533 restore_callee_saved_fp(&fpregs->fpr_preserved); 1534 pcb->pcb_high_fp = fpregs->fpr_high; 1535 return (0); 1536} 1537 1538void 1539ia64_sync_icache(vm_offset_t va, vm_offset_t sz) 1540{ 1541 vm_offset_t lim; 1542 1543 if (!ia64_sync_icache_needed) 1544 return; 1545 1546 lim = va + sz; 1547 while (va < lim) { 1548 ia64_fc_i(va); 1549 va += 32; /* XXX */ 1550 } 1551 1552 ia64_sync_i(); 1553 ia64_srlz_i(); 1554} 1555