1146019Snyan/*-
2146019Snyan * Mach Operating System
3146019Snyan * Copyright (c) 1991,1990,1989 Carnegie Mellon University
4146019Snyan * All Rights Reserved.
5146019Snyan *
6146019Snyan * Permission to use, copy, modify and distribute this software and its
7146019Snyan * documentation is hereby granted, provided that both the copyright
8146019Snyan * notice and this permission notice appear in all copies of the
9146019Snyan * software, derivative works or modified versions, and any portions
10146019Snyan * thereof, and that both notices appear in supporting documentation.
11146019Snyan *
12146019Snyan * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
13146019Snyan * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
14146019Snyan * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
15146019Snyan *
16146019Snyan * Carnegie Mellon requests users of this software to return to
17146019Snyan *
18146019Snyan *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
19146019Snyan *  School of Computer Science
20146019Snyan *  Carnegie Mellon University
21146019Snyan *  Pittsburgh PA 15213-3890
22146019Snyan *
23146019Snyan * any improvements or extensions that they make and grant Carnegie Mellon
24146019Snyan * the rights to redistribute these changes.
25146019Snyan *
26146019Snyan * $FreeBSD$
27146019Snyan */
28146019Snyan/*
29146019Snyan  Copyright 1988, 1989 by Olivetti Advanced Technology Center, Inc.,
30146019SnyanCupertino, California.
31146019Snyan
32146019Snyan		All Rights Reserved
33146019Snyan
34146019Snyan  Permission to use, copy, modify, and distribute this software and
35146019Snyanits documentation for any purpose and without fee is hereby
36146019Snyangranted, provided that the above copyright notice appears in all
37146019Snyancopies and that both the copyright notice and this permission notice
38146019Snyanappear in supporting documentation, and that the name of Olivetti
39146019Snyannot be used in advertising or publicity pertaining to distribution
40146019Snyanof the software without specific, written prior permission.
41146019Snyan
42146019Snyan  OLIVETTI DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
43146019SnyanINCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS,
44146019SnyanIN NO EVENT SHALL OLIVETTI BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
45146019SnyanCONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
46146019SnyanLOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
47146019SnyanNEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUR OF OR IN CONNECTION
48146019SnyanWITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
49146019Snyan*/
50146019Snyan
51146019Snyan/*
52146019Snyan * Defines for managing the status word of the 82586 cpu.  For details see
53146019Snyan * the Intel LAN Component User's Manual starting at p. 2-14.
54146019Snyan *
55146019Snyan */
56146019Snyan
57146019Snyan#define SCB_SW_INT	0xf000
58146019Snyan#define SCB_SW_CX	0x8000		/* CU finished w/ int. bit set */
59146019Snyan#define SCB_SW_FR	0x4000		/* RU finished receiving a frame */
60146019Snyan#define SCB_SW_CNA	0x2000		/* CU left active state */
61146019Snyan#define SCB_SW_RNR	0x1000		/* RU left ready state */
62146019Snyan
63146019Snyan/*
64146019Snyan * Defines for managing the Command Unit Status portion of the 82586
65146019Snyan * System Control Block.
66146019Snyan *
67146019Snyan */
68146019Snyan
69146019Snyan#define SCB_CUS_IDLE	0x0000
70146019Snyan#define SCB_CUS_SUSPND	0x0100
71146019Snyan#define SCB_CUS_ACTV	0x0200
72146019Snyan
73146019Snyan/*
74146019Snyan * Defines for managing the Receive Unit Status portion of the System
75146019Snyan * Control Block.
76146019Snyan *
77146019Snyan */
78146019Snyan
79146019Snyan#define SCB_RUS_IDLE	0x0000
80146019Snyan#define SCB_RUS_SUSPND	0x0010
81146019Snyan#define SCB_RUS_NORESRC 0x0020
82146019Snyan#define SCB_RUS_READY	0x0040
83146019Snyan
84146019Snyan/*
85146019Snyan * Defines that manage portions of the Command Word in the System Control
86146019Snyan * Block of the 82586.  Below are the Interrupt Acknowledge Bits and their
87146019Snyan * appropriate masks.
88146019Snyan *
89146019Snyan */
90146019Snyan
91146019Snyan#define SCB_ACK_CX	0x8000
92146019Snyan#define SCB_ACK_FR	0x4000
93146019Snyan#define SCB_ACK_CNA	0x2000
94146019Snyan#define SCB_ACK_RNR	0x1000
95146019Snyan
96146019Snyan/*
97146019Snyan * Defines for managing the Command Unit Control word, and the Receive
98146019Snyan * Unit Control word.  The software RESET bit is also defined.
99146019Snyan *
100146019Snyan */
101146019Snyan
102146019Snyan#define SCB_CU_STRT	0x0100
103146019Snyan#define SCB_CU_RSUM	0x0200
104146019Snyan#define SCB_CU_SUSPND	0x0300
105146019Snyan#define SCB_CU_ABRT	0x0400
106146019Snyan
107146019Snyan#define SCB_RESET	0x0080
108146019Snyan
109146019Snyan#define SCB_RU_STRT	0x0010
110146019Snyan#define SCB_RU_RSUM	0x0020
111146019Snyan#define SCB_RU_SUSPND	0x0030
112146019Snyan#define SCB_RU_ABRT	0x0040
113146019Snyan
114146019Snyan
115146019Snyan/*
116146019Snyan * The following define Action Commands for the 82586 chip.
117146019Snyan *
118146019Snyan */
119146019Snyan
120146019Snyan#define	AC_NOP		0x00
121146019Snyan#define AC_IASETUP	0x01
122146019Snyan#define AC_CONFIGURE	0x02
123146019Snyan#define AC_MCSETUP	0x03
124146019Snyan#define AC_TRANSMIT	0x04
125146019Snyan#define AC_TDR		0x05
126146019Snyan#define AC_DUMP		0x06
127146019Snyan#define AC_DIAGNOSE	0x07
128146019Snyan
129146019Snyan
130146019Snyan/*
131146019Snyan * Defines for General Format for Action Commands, both Status Words, and
132146019Snyan * Command Words.
133146019Snyan *
134146019Snyan */
135146019Snyan
136146019Snyan#define AC_SW_C		0x8000
137146019Snyan#define AC_SW_B		0x4000
138146019Snyan#define AC_SW_OK	0x2000
139146019Snyan#define AC_SW_A		0x1000
140146019Snyan#define TC_CARRIER	0x0400
141146019Snyan#define TC_CLS		0x0200
142146019Snyan#define TC_DMA		0x0100
143146019Snyan#define TC_DEFER	0x0080
144146019Snyan#define TC_SQE		0x0040
145146019Snyan#define TC_COLLISION	0x0020
146146019Snyan#define	AC_CW_EL	0x8000
147146019Snyan#define AC_CW_S		0x4000
148146019Snyan#define AC_CW_I		0x2000
149146019Snyan
150146019Snyan/*
151146019Snyan * Specific defines for the transmit action command.
152146019Snyan *
153146019Snyan */
154146019Snyan
155146019Snyan#define TBD_SW_EOF	0x8000
156146019Snyan#define TBD_SW_COUNT	0x3fff
157146019Snyan
158146019Snyan/*
159146019Snyan * Specific defines for the receive frame actions.
160146019Snyan *
161146019Snyan */
162146019Snyan
163146019Snyan#define RBD_SW_EOF	0x8000
164146019Snyan#define RBD_SW_COUNT	0x3fff
165146019Snyan
166146019Snyan#define RFD_DONE	0x8000
167146019Snyan#define RFD_BUSY	0x4000
168146019Snyan#define RFD_OK		0x2000
169146019Snyan#define RFD_CRC		0x0800
170146019Snyan#define RFD_ALN		0x0400
171146019Snyan#define RFD_RSC		0x0200
172146019Snyan#define RFD_DMA		0x0100
173146019Snyan#define RFD_SHORT	0x0080
174146019Snyan#define RFD_EOF		0x0040
175146019Snyan#define RFD_EL		0x8000
176146019Snyan#define RFD_SUSP	0x4000
177146019Snyan/*
178146019Snyan * 82586 chip specific structure definitions.  For details, see the Intel
179146019Snyan * LAN Components manual.
180146019Snyan *
181146019Snyan */
182146019Snyan
183146019Snyan
184146019Snyantypedef	struct	{
185146019Snyan	u_short	scp_sysbus;
186146019Snyan	u_short	scp_unused[2];
187146019Snyan	u_short	scp_iscp;
188146019Snyan	u_short	scp_iscp_base;
189146019Snyan} scp_t;
190146019Snyan
191146019Snyan
192146019Snyantypedef	struct	{
193146019Snyan	u_short	iscp_busy;
194146019Snyan	u_short	iscp_scb_offset;
195146019Snyan	u_short	iscp_scb;
196146019Snyan	u_short	iscp_scb_base;
197146019Snyan} iscp_t;
198146019Snyan
199146019Snyan
200146019Snyantypedef struct	{
201146019Snyan	u_short	scb_status;
202146019Snyan	u_short	scb_command;
203146019Snyan	u_short	scb_cbl_offset;
204146019Snyan	u_short	scb_rfa_offset;
205146019Snyan	u_short	scb_crcerrs;
206146019Snyan	u_short	scb_alnerrs;
207146019Snyan	u_short	scb_rscerrs;
208146019Snyan	u_short	scb_ovrnerrs;
209146019Snyan} scb_t;
210146019Snyan
211146019Snyan
212146019Snyantypedef	struct	{
213146019Snyan	u_short	tbd_offset;
214146019Snyan	u_char	dest_addr[6];
215146019Snyan	u_short	length;
216146019Snyan} transmit_t;
217146019Snyan
218146019Snyan
219146019Snyantypedef	struct	{
220146019Snyan	u_short	fifolim_bytecnt;
221146019Snyan	u_short	addrlen_mode;
222146019Snyan	u_short	linprio_interframe;
223146019Snyan	u_short	slot_time;
224146019Snyan	u_short	hardware;
225146019Snyan	u_short	min_frame_len;
226146019Snyan} configure_t;
227146019Snyan
228146019Snyan
229146019Snyantypedef	struct	{
230146019Snyan	u_short	ac_status;
231146019Snyan	u_short	ac_command;
232146019Snyan	u_short	ac_link_offset;
233146019Snyan	union	{
234146019Snyan		transmit_t	transmit;
235146019Snyan		configure_t	configure;
236146019Snyan		u_char		iasetup[6];
237146019Snyan	} cmd;
238146019Snyan} ac_t;
239146019Snyan
240146019Snyan
241146019Snyantypedef	struct	{
242146019Snyan	u_short	act_count;
243146019Snyan	u_short	next_tbd_offset;
244146019Snyan	u_short	buffer_addr;
245146019Snyan	u_short	buffer_base;
246146019Snyan} tbd_t;
247146019Snyan
248146019Snyan
249146019Snyantypedef	struct	{
250146019Snyan	u_short	status;
251146019Snyan	u_short	command;
252146019Snyan	u_short	link_offset;
253146019Snyan	u_short	rbd_offset;
254146019Snyan	u_char	destination[6];
255146019Snyan	u_char	source[6];
256146019Snyan	u_short	length;
257146019Snyan} fd_t;
258146019Snyan
259146019Snyan
260146019Snyantypedef	struct	{
261146019Snyan	u_short	status;
262146019Snyan	u_short	next_rbd_offset;
263146019Snyan	u_short	buffer_addr;
264146019Snyan	u_short	buffer_base;
265146019Snyan	u_short	size;
266146019Snyan} rbd_t;
267