via8233.c revision 111269
1/*
2 * Copyright (c) 2002 Orion Hodson <orion@freebsd.org>
3 * Portions of this code derived from via82c686.c:
4 * 	Copyright (c) 2000 David Jones <dej@ox.org>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29/*
30 * Credits due to:
31 *
32 * Grzybowski Rafal, Russell Davies, Mark Handley, Daniel O'Connor for
33 * comments, machine time, testing patches, and patience.  VIA for
34 * providing specs.  ALSA for helpful comments and some register poke
35 * ordering.
36 */
37
38#include <dev/sound/pcm/sound.h>
39#include <dev/sound/pcm/ac97.h>
40
41#include <pci/pcireg.h>
42#include <pci/pcivar.h>
43#include <sys/sysctl.h>
44
45#include <dev/sound/pci/via8233.h>
46
47SND_DECLARE_FILE("$FreeBSD: head/sys/dev/sound/pci/via8233.c 111269 2003-02-22 23:28:15Z orion $");
48
49#define VIA8233_PCI_ID 0x30591106
50
51#define VIA8233_REV_ID_8233PRE	0x10
52#define VIA8233_REV_ID_8233C	0x20
53#define VIA8233_REV_ID_8233	0x30
54#define VIA8233_REV_ID_8233A	0x40
55#define VIA8233_REV_ID_8235	0x50
56
57#define SEGS_PER_CHAN	2			/* Segments per channel */
58#define NDXSCHANS	4			/* No of DXS channels */
59#define NMSGDCHANS	1			/* No of multichannel SGD */
60#define NWRCHANS	1			/* No of write channels */
61#define NCHANS		(NWRCHANS + NDXSCHANS + NMSGDCHANS)
62#define	NSEGS		NCHANS * SEGS_PER_CHAN	/* Segments in SGD table */
63
64#define	VIA_DEFAULT_BUFSZ	0x1000
65
66/* we rely on this struct being packed to 64 bits */
67struct via_dma_op {
68        volatile u_int32_t ptr;
69        volatile u_int32_t flags;
70#define VIA_DMAOP_EOL         0x80000000
71#define VIA_DMAOP_FLAG        0x40000000
72#define VIA_DMAOP_STOP        0x20000000
73#define VIA_DMAOP_COUNT(x)    ((x)&0x00FFFFFF)
74};
75
76struct via_info;
77
78struct via_chinfo {
79	struct via_info *parent;
80	struct pcm_channel *channel;
81	struct snd_dbuf *buffer;
82	struct via_dma_op *sgd_table;
83	bus_addr_t sgd_addr;
84	int dir, blksz;
85	int rbase;
86};
87
88struct via_info {
89	bus_space_tag_t st;
90	bus_space_handle_t sh;
91	bus_dma_tag_t parent_dmat;
92	bus_dma_tag_t sgd_dmat;
93	bus_dmamap_t sgd_dmamap;
94	bus_addr_t sgd_addr;
95
96	struct resource *reg, *irq;
97	int regid, irqid;
98	void *ih;
99	struct ac97_info *codec;
100
101	unsigned int bufsz;
102
103	struct via_chinfo pch[NDXSCHANS + NMSGDCHANS];
104	struct via_chinfo rch[NWRCHANS];
105	struct via_dma_op *sgd_table;
106	u_int16_t codec_caps;
107	u_int16_t n_dxs_registered;
108};
109
110static u_int32_t via_fmt[] = {
111	AFMT_U8,
112	AFMT_STEREO | AFMT_U8,
113	AFMT_S16_LE,
114	AFMT_STEREO | AFMT_S16_LE,
115	0
116};
117
118static struct pcmchan_caps via_vracaps = { 4000, 48000, via_fmt, 0 };
119static struct pcmchan_caps via_caps = { 48000, 48000, via_fmt, 0 };
120
121static u_int32_t
122via_rd(struct via_info *via, int regno, int size)
123{
124	switch (size) {
125	case 1:
126		return bus_space_read_1(via->st, via->sh, regno);
127	case 2:
128		return bus_space_read_2(via->st, via->sh, regno);
129	case 4:
130		return bus_space_read_4(via->st, via->sh, regno);
131	default:
132		return 0xFFFFFFFF;
133	}
134}
135
136static void
137via_wr(struct via_info *via, int regno, u_int32_t data, int size)
138{
139
140	switch (size) {
141	case 1:
142		bus_space_write_1(via->st, via->sh, regno, data);
143		break;
144	case 2:
145		bus_space_write_2(via->st, via->sh, regno, data);
146		break;
147	case 4:
148		bus_space_write_4(via->st, via->sh, regno, data);
149		break;
150	}
151}
152
153/* -------------------------------------------------------------------- */
154/* Codec interface */
155
156static int
157via_waitready_codec(struct via_info *via)
158{
159	int i;
160
161	/* poll until codec not busy */
162	for (i = 0; i < 1000; i++) {
163		if ((via_rd(via, VIA_AC97_CONTROL, 4) & VIA_AC97_BUSY) == 0)
164			return 0;
165		DELAY(1);
166	}
167	printf("via: codec busy\n");
168	return 1;
169}
170
171static int
172via_waitvalid_codec(struct via_info *via)
173{
174	int i;
175
176	/* poll until codec valid */
177	for (i = 0; i < 1000; i++) {
178		if (via_rd(via, VIA_AC97_CONTROL, 4) & VIA_AC97_CODEC00_VALID)
179			return 0;
180		DELAY(1);
181	}
182	printf("via: codec invalid\n");
183	return 1;
184}
185
186static int
187via_write_codec(kobj_t obj, void *addr, int reg, u_int32_t val)
188{
189	struct via_info *via = addr;
190
191	if (via_waitready_codec(via)) return -1;
192
193	via_wr(via, VIA_AC97_CONTROL,
194	       VIA_AC97_CODEC00_VALID | VIA_AC97_INDEX(reg) |
195	       VIA_AC97_DATA(val), 4);
196
197	return 0;
198}
199
200static int
201via_read_codec(kobj_t obj, void *addr, int reg)
202{
203	struct via_info *via = addr;
204
205	if (via_waitready_codec(via))
206		return -1;
207
208	via_wr(via, VIA_AC97_CONTROL, VIA_AC97_CODEC00_VALID |
209	       VIA_AC97_READ | VIA_AC97_INDEX(reg), 4);
210
211	if (via_waitready_codec(via))
212		return -1;
213
214	if (via_waitvalid_codec(via))
215		return -1;
216
217	return via_rd(via, VIA_AC97_CONTROL, 2);
218}
219
220static kobj_method_t via_ac97_methods[] = {
221    	KOBJMETHOD(ac97_read,		via_read_codec),
222    	KOBJMETHOD(ac97_write,		via_write_codec),
223	{ 0, 0 }
224};
225AC97_DECLARE(via_ac97);
226
227/* -------------------------------------------------------------------- */
228
229static int
230via_buildsgdt(struct via_chinfo *ch)
231{
232	u_int32_t phys_addr, flag;
233	int i, seg_size;
234
235	seg_size = sndbuf_getsize(ch->buffer) / SEGS_PER_CHAN;
236	phys_addr = sndbuf_getbufaddr(ch->buffer);
237
238	for (i = 0; i < SEGS_PER_CHAN; i++) {
239		flag = (i == SEGS_PER_CHAN - 1) ? VIA_DMAOP_EOL : VIA_DMAOP_FLAG;
240		ch->sgd_table[i].ptr = phys_addr + (i * seg_size);
241		ch->sgd_table[i].flags = flag | seg_size;
242	}
243
244	return 0;
245}
246
247/* -------------------------------------------------------------------- */
248/* Format setting functions */
249
250static int
251via8233wr_setformat(kobj_t obj, void *data, u_int32_t format)
252{
253	struct via_chinfo *ch = data;
254	struct via_info *via = ch->parent;
255
256	u_int32_t f = WR_FORMAT_STOP_INDEX;
257
258	if (format & AFMT_STEREO)
259		f |= WR_FORMAT_STEREO;
260	if (format & AFMT_S16_LE)
261		f |= WR_FORMAT_16BIT;
262	via_wr(via, VIA_WR0_FORMAT, f, 4);
263
264	return 0;
265}
266
267static int
268via8233dxs_setformat(kobj_t obj, void *data, u_int32_t format)
269{
270	struct via_chinfo *ch = data;
271	struct via_info *via = ch->parent;
272
273	u_int32_t r = ch->rbase + VIA8233_RP_DXS_RATEFMT;
274	u_int32_t v = via_rd(via, r, 4);
275
276	v &= ~(VIA8233_DXS_RATEFMT_STEREO | VIA8233_DXS_RATEFMT_16BIT);
277	if (format & AFMT_STEREO)
278		v |= VIA8233_DXS_RATEFMT_STEREO;
279	if (format & AFMT_16BIT)
280		v |= VIA8233_DXS_RATEFMT_16BIT;
281	via_wr(via, r, v, 4);
282
283	return 0;
284}
285
286static int
287via8233msgd_setformat(kobj_t obj, void *data, u_int32_t format)
288{
289	struct via_chinfo *ch = data;
290	struct via_info *via = ch->parent;
291
292	u_int32_t s = 0xff000000;
293	u_int8_t  v = (format & AFMT_S16_LE) ? MC_SGD_16BIT : MC_SGD_8BIT;
294
295	if (format & AFMT_STEREO) {
296		v |= MC_SGD_CHANNELS(2);
297		s |= SLOT3(1) | SLOT4(2);
298	} else {
299		v |= MC_SGD_CHANNELS(1);
300		s |= SLOT3(1) | SLOT4(1);
301	}
302
303	via_wr(via, VIA_MC_SLOT_SELECT, s, 4);
304	via_wr(via, VIA_MC_SGD_FORMAT, v, 1);
305
306	return 0;
307}
308
309/* -------------------------------------------------------------------- */
310/* Speed setting functions */
311
312static int
313via8233wr_setspeed(kobj_t obj, void *data, u_int32_t speed)
314{
315	struct via_chinfo *ch = data;
316	struct via_info *via = ch->parent;
317
318	u_int32_t spd = 48000;
319	if (via->codec_caps & AC97_EXTCAP_VRA) {
320		spd = ac97_setrate(via->codec, AC97_REGEXT_LADCRATE, speed);
321	}
322	return spd;
323}
324
325static int
326via8233dxs_setspeed(kobj_t obj, void *data, u_int32_t speed)
327{
328	struct via_chinfo *ch = data;
329	struct via_info *via = ch->parent;
330
331	u_int32_t r = ch->rbase + VIA8233_RP_DXS_RATEFMT;
332	u_int32_t v = via_rd(via, r, 4) & ~VIA8233_DXS_RATEFMT_48K;
333
334	/* Careful to avoid overflow (divide by 48 per vt8233c docs) */
335
336	v |= VIA8233_DXS_RATEFMT_48K * (speed / 48) / (48000 / 48);
337	via_wr(via, r, v, 4);
338
339	return speed;
340}
341
342static int
343via8233msgd_setspeed(kobj_t obj, void *data, u_int32_t speed)
344{
345	struct via_chinfo *ch = data;
346	struct via_info *via = ch->parent;
347
348	if (via->codec_caps & AC97_EXTCAP_VRA)
349		return ac97_setrate(via->codec, AC97_REGEXT_FDACRATE, speed);
350
351	return 48000;
352}
353
354/* -------------------------------------------------------------------- */
355/* Common functions */
356
357static int
358via8233chan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize)
359{
360	struct via_chinfo *ch = data;
361	sndbuf_resize(ch->buffer, SEGS_PER_CHAN, blocksize);
362	ch->blksz = sndbuf_getblksz(ch->buffer);
363	return ch->blksz;
364}
365
366static int
367via8233chan_getptr(kobj_t obj, void *data)
368{
369	struct via_chinfo *ch = data;
370	struct via_info *via = ch->parent;
371
372	u_int32_t v = via_rd(via, ch->rbase + VIA_RP_CURRENT_COUNT, 4);
373	u_int32_t index = v >> 24;		/* Last completed buffer */
374	u_int32_t count = v & 0x00ffffff;	/* Bytes remaining */
375	int ptr = (index + 1) * ch->blksz - count;
376	ptr %= SEGS_PER_CHAN * ch->blksz;	/* Wrap to available space */
377
378	return ptr;
379}
380
381static struct pcmchan_caps *
382via8233chan_getcaps(kobj_t obj, void *data)
383{
384	struct via_chinfo *ch = data;
385	struct via_info *via = ch->parent;
386	if (via->codec_caps & AC97_EXTCAP_VRA)
387		return &via_vracaps;
388	return &via_caps;
389}
390
391static void
392via8233chan_reset(struct via_info *via, struct via_chinfo *ch)
393{
394	via_wr(via, ch->rbase + VIA_RP_CONTROL, SGD_CONTROL_STOP, 1);
395	via_wr(via, ch->rbase + VIA_RP_CONTROL, 0x00, 1);
396	via_wr(via, ch->rbase + VIA_RP_STATUS,
397	       SGD_STATUS_EOL | SGD_STATUS_FLAG, 1);
398}
399
400/* -------------------------------------------------------------------- */
401/* Channel initialization functions */
402
403static void
404via8233chan_sgdinit(struct via_info *via, struct via_chinfo *ch, int chnum)
405{
406	ch->sgd_table = &via->sgd_table[chnum * SEGS_PER_CHAN];
407	ch->sgd_addr = via->sgd_addr + chnum * SEGS_PER_CHAN * sizeof(struct via_dma_op);
408}
409
410static void*
411via8233wr_init(kobj_t obj, void *devinfo, struct snd_dbuf *b,
412	       struct pcm_channel *c, int dir)
413{
414	struct via_info *via = devinfo;
415	struct via_chinfo *ch = &via->rch[c->num];
416
417	ch->parent = via;
418	ch->channel = c;
419	ch->buffer = b;
420	ch->dir = dir;
421
422	ch->rbase = VIA_WR_BASE(c->num);
423	via_wr(via, ch->rbase + VIA_WR_RP_SGD_FORMAT, WR_FIFO_ENABLE, 1);
424
425	if (sndbuf_alloc(ch->buffer, via->parent_dmat, via->bufsz) == -1)
426		return NULL;
427	via8233chan_sgdinit(via, ch, c->num);
428	via8233chan_reset(via, ch);
429
430	return ch;
431}
432
433static void*
434via8233dxs_init(kobj_t obj, void *devinfo, struct snd_dbuf *b,
435		struct pcm_channel *c, int dir)
436{
437	struct via_info *via = devinfo;
438	struct via_chinfo *ch = &via->pch[c->num];
439
440	ch->parent = via;
441	ch->channel = c;
442	ch->buffer = b;
443	ch->dir = dir;
444
445	/*
446	 * All cards apparently support DXS3, but not other DXS
447	 * channels.  We therefore want to align first DXS channel to
448	 * DXS3.
449	 */
450	ch->rbase = VIA_DXS_BASE(NDXSCHANS - 1 - via->n_dxs_registered);
451	via->n_dxs_registered++;
452
453	if (sndbuf_alloc(ch->buffer, via->parent_dmat, via->bufsz) == -1)
454		return NULL;
455	via8233chan_sgdinit(via, ch, NWRCHANS + c->num);
456	via8233chan_reset(via, ch);
457
458	return ch;
459}
460
461static void*
462via8233msgd_init(kobj_t obj, void *devinfo, struct snd_dbuf *b,
463		 struct pcm_channel *c, int dir)
464{
465	struct via_info *via = devinfo;
466	struct via_chinfo *ch = &via->pch[c->num];
467
468	ch->parent = via;
469	ch->channel = c;
470	ch->buffer = b;
471	ch->dir = dir;
472	ch->rbase = VIA_MC_SGD_STATUS;
473
474	if (sndbuf_alloc(ch->buffer, via->parent_dmat, via->bufsz) == -1)
475		return NULL;
476	via8233chan_sgdinit(via, ch, NWRCHANS + c->num);
477	via8233chan_reset(via, ch);
478
479	return ch;
480}
481
482static void
483via8233chan_mute(struct via_info *via, struct via_chinfo *ch, int muted)
484{
485	if (BASE_IS_VIA_DXS_REG(ch->rbase)) {
486		int r;
487		muted = (muted) ? VIA8233_DXS_MUTE : 0;
488		via_wr(via, ch->rbase + VIA8233_RP_DXS_LVOL, muted, 1);
489		via_wr(via, ch->rbase + VIA8233_RP_DXS_RVOL, muted, 1);
490		r = via_rd(via, ch->rbase + VIA8233_RP_DXS_LVOL, 1) & VIA8233_DXS_MUTE;
491		if (r != muted) {
492			printf("via: failed to set dxs volume "
493			       "(dxs base 0x%02x).\n", ch->rbase);
494		}
495	}
496}
497
498static int
499via8233chan_trigger(kobj_t obj, void* data, int go)
500{
501	struct via_chinfo *ch = data;
502	struct via_info *via = ch->parent;
503
504	switch(go) {
505	case PCMTRIG_START:
506		via_buildsgdt(ch);
507		via8233chan_mute(via, ch, 0);
508		via_wr(via, ch->rbase + VIA_RP_TABLE_PTR, ch->sgd_addr, 4);
509		via_wr(via, ch->rbase + VIA_RP_CONTROL,
510		       SGD_CONTROL_START | SGD_CONTROL_AUTOSTART |
511		       SGD_CONTROL_I_EOL | SGD_CONTROL_I_FLAG, 1);
512		break;
513	case PCMTRIG_STOP:
514	case PCMTRIG_ABORT:
515		via_wr(via, ch->rbase + VIA_RP_CONTROL, SGD_CONTROL_STOP, 1);
516		via8233chan_mute(via, ch, 1);
517		via8233chan_reset(via, ch);
518		break;
519	}
520	return 0;
521}
522
523static kobj_method_t via8233wr_methods[] = {
524    	KOBJMETHOD(channel_init,		via8233wr_init),
525    	KOBJMETHOD(channel_setformat,		via8233wr_setformat),
526    	KOBJMETHOD(channel_setspeed,		via8233wr_setspeed),
527    	KOBJMETHOD(channel_setblocksize,	via8233chan_setblocksize),
528    	KOBJMETHOD(channel_trigger,		via8233chan_trigger),
529    	KOBJMETHOD(channel_getptr,		via8233chan_getptr),
530    	KOBJMETHOD(channel_getcaps,		via8233chan_getcaps),
531	{ 0, 0 }
532};
533CHANNEL_DECLARE(via8233wr);
534
535static kobj_method_t via8233dxs_methods[] = {
536    	KOBJMETHOD(channel_init,		via8233dxs_init),
537    	KOBJMETHOD(channel_setformat,		via8233dxs_setformat),
538    	KOBJMETHOD(channel_setspeed,		via8233dxs_setspeed),
539    	KOBJMETHOD(channel_setblocksize,	via8233chan_setblocksize),
540    	KOBJMETHOD(channel_trigger,		via8233chan_trigger),
541    	KOBJMETHOD(channel_getptr,		via8233chan_getptr),
542    	KOBJMETHOD(channel_getcaps,		via8233chan_getcaps),
543	{ 0, 0 }
544};
545CHANNEL_DECLARE(via8233dxs);
546
547static kobj_method_t via8233msgd_methods[] = {
548    	KOBJMETHOD(channel_init,		via8233msgd_init),
549    	KOBJMETHOD(channel_setformat,		via8233msgd_setformat),
550    	KOBJMETHOD(channel_setspeed,		via8233msgd_setspeed),
551    	KOBJMETHOD(channel_setblocksize,	via8233chan_setblocksize),
552    	KOBJMETHOD(channel_trigger,		via8233chan_trigger),
553    	KOBJMETHOD(channel_getptr,		via8233chan_getptr),
554    	KOBJMETHOD(channel_getcaps,		via8233chan_getcaps),
555	{ 0, 0 }
556};
557CHANNEL_DECLARE(via8233msgd);
558
559/* -------------------------------------------------------------------- */
560
561static void
562via_intr(void *p)
563{
564	struct via_info *via = p;
565	int i, stat;
566
567	/* Poll playback channels */
568	for (i = 0; i < NDXSCHANS + NMSGDCHANS; i++) {
569		if (via->pch[i].rbase == 0)
570			continue;
571		stat = via->pch[i].rbase + VIA_RP_STATUS;
572		if (via_rd(via, stat, 1) & SGD_STATUS_INTR) {
573			via_wr(via, stat, SGD_STATUS_INTR, 1);
574			chn_intr(via->pch[i].channel);
575		}
576	}
577
578	/* Poll record channels */
579	for (i = 0; i < NWRCHANS; i++) {
580		if (via->rch[i].rbase == 0)
581			continue;
582		stat = via->rch[i].rbase + VIA_RP_STATUS;
583		if (via_rd(via, stat, 1) & SGD_STATUS_INTR) {
584			via_wr(via, stat, SGD_STATUS_INTR, 1);
585			chn_intr(via->rch[i].channel);
586		}
587	}
588}
589
590/*
591 *  Probe and attach the card
592 */
593static int
594via_probe(device_t dev)
595{
596	switch(pci_get_devid(dev)) {
597	case VIA8233_PCI_ID:
598		switch(pci_get_revid(dev)) {
599		case VIA8233_REV_ID_8233PRE:
600			device_set_desc(dev, "VIA VT8233 (pre)");
601			return 0;
602		case VIA8233_REV_ID_8233C:
603			device_set_desc(dev, "VIA VT8233C");
604			return 0;
605		case VIA8233_REV_ID_8233:
606			device_set_desc(dev, "VIA VT8233");
607			return 0;
608		case VIA8233_REV_ID_8233A:
609			device_set_desc(dev, "VIA VT8233A");
610			return 0;
611		case VIA8233_REV_ID_8235:
612			device_set_desc(dev, "VIA VT8235");
613			return 0;
614		default:
615			device_set_desc(dev, "VIA VT8233X");	/* Unknown */
616			return 0;
617		}
618	}
619	return ENXIO;
620}
621
622static void
623dma_cb(void *p, bus_dma_segment_t *bds, int a, int b)
624{
625	struct via_info *via = (struct via_info *)p;
626	via->sgd_addr = bds->ds_addr;
627}
628
629static int
630via_chip_init(device_t dev)
631{
632	int i, s;
633
634	pci_write_config(dev, VIA_PCI_ACLINK_CTRL, 0, 1);
635	DELAY(100);
636
637	/* assert ACLink reset */
638	pci_write_config(dev, VIA_PCI_ACLINK_CTRL, VIA_PCI_ACLINK_NRST, 1);
639	DELAY(2);
640
641	/* deassert ACLink reset, force SYNC (warm AC'97 reset) */
642	pci_write_config(dev, VIA_PCI_ACLINK_CTRL,
643			 VIA_PCI_ACLINK_NRST | VIA_PCI_ACLINK_SYNC, 1);
644
645	/* ACLink on, deassert ACLink reset, VSR, SGD data out */
646	pci_write_config(dev, VIA_PCI_ACLINK_CTRL,
647			 VIA_PCI_ACLINK_EN | VIA_PCI_ACLINK_NRST
648			 | VIA_PCI_ACLINK_VRATE | VIA_PCI_ACLINK_SGD, 1);
649
650	for (i = 0; i < 100; i++) {
651		s = pci_read_config(dev, VIA_PCI_ACLINK_STAT, 1);
652		if (s & VIA_PCI_ACLINK_C00_READY) {
653			s = pci_read_config(dev, VIA_PCI_ACLINK_CTRL, 1);
654			return 0;
655		}
656		DELAY(10);
657	}
658	device_printf(dev, "primary codec not ready (s = 0x%02x)\n", s);
659	return ENXIO;
660}
661
662#ifdef SND_DYNSYSCTL
663static int via8233_spdif_en;
664
665static int
666sysctl_via8233_spdif_enable(SYSCTL_HANDLER_ARGS)
667{
668	device_t dev;
669	int err, new_en, r;
670
671	dev = oidp->oid_arg1;
672
673
674	new_en = via8233_spdif_en;
675
676	err = sysctl_handle_int(oidp, &new_en, sizeof(new_en), req);
677	if (err || req->newptr == NULL)
678		return err;
679
680	if (new_en < 0 || new_en > 1)
681		return EINVAL;
682	via8233_spdif_en = new_en;
683
684	r = pci_read_config(dev, VIA_PCI_SPDIF, 1) & ~VIA_SPDIF_EN;
685	if (new_en)
686		r |= VIA_SPDIF_EN;
687	pci_write_config(dev, VIA_PCI_SPDIF, r, 1);
688	return 0;
689}
690#endif /* SND_DYNSYSCTL */
691
692static void
693via_init_sysctls(device_t dev)
694{
695#ifdef SND_DYNSYSCTL
696	int r;
697
698	r = pci_read_config(dev, VIA_PCI_SPDIF, 1);
699	via8233_spdif_en = (r & VIA_SPDIF_EN) ? 1 : 0;
700
701	SYSCTL_ADD_PROC(snd_sysctl_tree(dev),
702			SYSCTL_CHILDREN(snd_sysctl_tree_top(dev)),
703			OID_AUTO, "spdif_enabled",
704			CTLTYPE_INT | CTLFLAG_RW, dev, sizeof(dev),
705			sysctl_via8233_spdif_enable, "I",
706			"Enable S/PDIF output on primary playback channel");
707#endif
708}
709
710static int
711via_attach(device_t dev)
712{
713	struct via_info *via = 0;
714	char status[SND_STATUSLEN];
715
716	if ((via = malloc(sizeof *via, M_DEVBUF, M_NOWAIT | M_ZERO)) == NULL) {
717		device_printf(dev, "cannot allocate softc\n");
718		return ENXIO;
719	}
720
721	pci_enable_io(dev, SYS_RES_IOPORT);
722	pci_set_powerstate(dev, PCI_POWERSTATE_D0);
723	pci_enable_busmaster(dev);
724
725	via->regid = PCIR_MAPS;
726	via->reg = bus_alloc_resource(dev, SYS_RES_IOPORT, &via->regid, 0, ~0,
727				      1, RF_ACTIVE);
728	if (!via->reg) {
729		device_printf(dev, "cannot allocate bus resource.");
730		goto bad;
731	}
732	via->st = rman_get_bustag(via->reg);
733	via->sh = rman_get_bushandle(via->reg);
734
735	via->bufsz = pcm_getbuffersize(dev, 4096, VIA_DEFAULT_BUFSZ, 65536);
736
737	via->irqid = 0;
738	via->irq = bus_alloc_resource(dev, SYS_RES_IRQ, &via->irqid, 0, ~0, 1,
739				      RF_ACTIVE | RF_SHAREABLE);
740	if (!via->irq ||
741	    snd_setup_intr(dev, via->irq, 0, via_intr, via, &via->ih)) {
742		device_printf(dev, "unable to map interrupt\n");
743		goto bad;
744	}
745
746	/* DMA tag for buffers */
747	if (bus_dma_tag_create(/*parent*/NULL, /*alignment*/2, /*boundary*/0,
748		/*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
749		/*highaddr*/BUS_SPACE_MAXADDR,
750		/*filter*/NULL, /*filterarg*/NULL,
751		/*maxsize*/via->bufsz, /*nsegments*/1, /*maxsegz*/0x3ffff,
752		/*flags*/0, &via->parent_dmat) != 0) {
753		device_printf(dev, "unable to create dma tag\n");
754		goto bad;
755	}
756
757	/*
758	 *  DMA tag for SGD table.  The 686 uses scatter/gather DMA and
759	 *  requires a list in memory of work to do.  We need only 16 bytes
760	 *  for this list, and it is wasteful to allocate 16K.
761	 */
762	if (bus_dma_tag_create(/*parent*/NULL, /*alignment*/2, /*boundary*/0,
763		/*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
764		/*highaddr*/BUS_SPACE_MAXADDR,
765		/*filter*/NULL, /*filterarg*/NULL,
766		/*maxsize*/NSEGS * sizeof(struct via_dma_op),
767		/*nsegments*/1, /*maxsegz*/0x3ffff,
768		/*flags*/0, &via->sgd_dmat) != 0) {
769		device_printf(dev, "unable to create dma tag\n");
770		goto bad;
771	}
772
773	if (bus_dmamem_alloc(via->sgd_dmat, (void **)&via->sgd_table,
774			     BUS_DMA_NOWAIT, &via->sgd_dmamap) == -1)
775		goto bad;
776	if (bus_dmamap_load(via->sgd_dmat, via->sgd_dmamap, via->sgd_table,
777			    NSEGS * sizeof(struct via_dma_op), dma_cb, via, 0))
778		goto bad;
779
780	if (via_chip_init(dev))
781		goto bad;
782
783	via->codec = AC97_CREATE(dev, via, via_ac97);
784	if (!via->codec)
785		goto bad;
786
787	mixer_init(dev, ac97_getmixerclass(), via->codec);
788
789	via->codec_caps = ac97_getextcaps(via->codec);
790
791	/* Try to set VRA without generating an error, VRM not reqrd yet */
792	if (via->codec_caps &
793	    (AC97_EXTCAP_VRA | AC97_EXTCAP_VRM | AC97_EXTCAP_DRA)) {
794		u_int16_t ext = ac97_getextmode(via->codec);
795		ext |= (via->codec_caps &
796			(AC97_EXTCAP_VRA | AC97_EXTCAP_VRM));
797		ext &= ~AC97_EXTCAP_DRA;
798		ac97_setextmode(via->codec, ext);
799	}
800
801	snprintf(status, SND_STATUSLEN, "at io 0x%lx irq %ld",
802		 rman_get_start(via->reg), rman_get_start(via->irq));
803
804	/* Register */
805	if (pci_get_revid(dev) == VIA8233_REV_ID_8233A) {
806		if (pcm_register(dev, via, NMSGDCHANS + 1, 1)) goto bad;
807		pcm_addchan(dev, PCMDIR_PLAY, &via8233dxs_class, via);
808		pcm_addchan(dev, PCMDIR_PLAY, &via8233msgd_class, via);
809		pcm_addchan(dev, PCMDIR_REC, &via8233wr_class, via);
810	} else {
811		int i;
812		if (pcm_register(dev, via, NMSGDCHANS + NDXSCHANS, NWRCHANS)) goto bad;
813		for (i = 0; i < NDXSCHANS; i++)
814			pcm_addchan(dev, PCMDIR_PLAY, &via8233dxs_class, via);
815		pcm_addchan(dev, PCMDIR_PLAY, &via8233msgd_class, via);
816		for (i = 0; i < NWRCHANS; i++)
817			pcm_addchan(dev, PCMDIR_REC, &via8233wr_class, via);
818	}
819
820	pcm_setstatus(dev, status);
821	via_init_sysctls(dev);
822
823	return 0;
824bad:
825	if (via->codec) ac97_destroy(via->codec);
826	if (via->reg) bus_release_resource(dev, SYS_RES_IOPORT, via->regid, via->reg);
827	if (via->ih) bus_teardown_intr(dev, via->irq, via->ih);
828	if (via->irq) bus_release_resource(dev, SYS_RES_IRQ, via->irqid, via->irq);
829	if (via->parent_dmat) bus_dma_tag_destroy(via->parent_dmat);
830	if (via->sgd_dmamap) bus_dmamap_unload(via->sgd_dmat, via->sgd_dmamap);
831	if (via->sgd_dmat) bus_dma_tag_destroy(via->sgd_dmat);
832	if (via) free(via, M_DEVBUF);
833	return ENXIO;
834}
835
836static int
837via_detach(device_t dev)
838{
839	int r;
840	struct via_info *via = 0;
841
842	r = pcm_unregister(dev);
843	if (r) return r;
844
845	via = pcm_getdevinfo(dev);
846	bus_release_resource(dev, SYS_RES_IOPORT, via->regid, via->reg);
847	bus_teardown_intr(dev, via->irq, via->ih);
848	bus_release_resource(dev, SYS_RES_IRQ, via->irqid, via->irq);
849	bus_dma_tag_destroy(via->parent_dmat);
850	bus_dmamap_unload(via->sgd_dmat, via->sgd_dmamap);
851	bus_dma_tag_destroy(via->sgd_dmat);
852	free(via, M_DEVBUF);
853	return 0;
854}
855
856
857static device_method_t via_methods[] = {
858	DEVMETHOD(device_probe,		via_probe),
859	DEVMETHOD(device_attach,	via_attach),
860	DEVMETHOD(device_detach,	via_detach),
861	{ 0, 0}
862};
863
864static driver_t via_driver = {
865	"pcm",
866	via_methods,
867	PCM_SOFTC_SIZE,
868};
869
870DRIVER_MODULE(snd_via8233, pci, via_driver, pcm_devclass, 0, 0);
871MODULE_DEPEND(snd_via8233, snd_pcm, PCM_MINVER, PCM_PREFVER, PCM_MAXVER);
872MODULE_VERSION(snd_via8233, 1);
873