if_sncreg.h revision 66550
1/* $FreeBSD: head/sys/dev/snc/if_sncreg.h 66550 2000-10-02 14:27:20Z nyan $ */ 2/* $NecBSD: if_snreg.h,v 1.3 1999/01/24 01:39:52 kmatsuda Exp $ */ 3/* $NetBSD$ */ 4 5/* 6 * Copyright (c) 1997, 1998, 1999 7 * Kouichi Matsuda. All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by Kouichi Matsuda for 20 * NetBSD/pc98. 21 * 4. The name of the author may not be used to endorse or promote products 22 * derived from this software without specific prior written permission 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 25 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 26 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 27 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 28 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 29 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 30 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 31 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 32 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 33 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 */ 35/* 36 * Modified for NetBSD/pc98 1.2.1 from NetBSD/mac68k 1.2D by Kouichi Matsuda. 37 * Make adapted for NEC PC-9801-83, 84, PC-9801-103, 104, PC-9801N-25 and 38 * PC-9801N-J02R, which uses National Semiconductor DP83934AVQB as 39 * Ethernet Controller and National Semiconductor NS46C46 as (64 * 16 bits) 40 * Microwire Serial EEPROM. 41 */ 42 43/* 44 * XXX: Should not be HERE. (Should be shared with...) 45 */ 46 47/* 48 * NEC/SONIC port mappings, offset from iobase. 49 */ 50#define SNEC_CTRL 0 /* SONIC control port (word) */ 51#define SNEC_CTRLB 1 /* NEC/SONIC control port (byte) */ 52#define SNEC_RSVD0 2 /* not used */ 53#define SNEC_ADDR 3 /* SONIC, NEC/SONIC register address set port */ 54#define SNEC_RSVD1 4 /* not used */ 55#define SNEC_RSVD2 5 /* not used */ 56 57#define SNEC_NREGS 6 58 59/* bank memory size */ 60#define SNEC_NMEMS (NBPG * 2) 61/* how many bank */ 62#define SNEC_NBANK 0x10 63/* internal buffer size */ 64#define SNEC_NBUF (SNEC_NMEMS * SNEC_NBANK) 65 66 67/* 68 * NEC/SONIC specific internal registers. 69 */ 70 71/* 72 * Memory Bank Select Register (MEMBS) 73 */ 74#define SNECR_MEMBS 0x80 75#define SNECR_MEMBS_BSEN 0x01 /* enable memory bank select */ 76#define SNECR_MEMBS_EBNMSK 0x1c /* encoded bank select number */ 77/* Translate bank number to encoded bank select number. */ 78#define SNECR_MEMBS_B2EB(bank) (bank << 2) 79#define SNECR_MEMBS_PCMCIABUS 0x80 /* bus type identification */ 80 81/* 82 * Memory Base Address Select Register (MEMSEL) 83 */ 84#define SNECR_MEMSEL 0x82 85/* Translate base phys address to encoded select number. */ 86#define SNECR_MEMSEL_PHYS2EN(maddr) ((maddr >> 13) & 0x0f) 87 88/* 89 * Encoded Irq Select Register (IRQSEL) 90 */ 91#define SNECR_IRQSEL 0x84 92 93/* 94 * EEPROM Access Register (EEP) 95 */ 96#define SNECR_EEP 0x86 97#define SNECR_EEP_DI 0x10 /* EEPROM Serial Data Input (high) */ 98#define SNECR_EEP_CS 0x20 /* EEPROM Chip Select (high) */ 99#define SNECR_EEP_SK 0x40 /* EEPROM Serial Data Clock (high) */ 100#define SNECR_EEP_DO 0x80 /* EEPROM Serial Data Output (high) */ 101 102/* EEPROM data locations */ 103#define SNEC_EEPROM_KEY0 6 /* Station Address Check Sum Key #1 */ 104#define SNEC_EEPROM_KEY1 7 /* Station Address Check Sum Key #2 */ 105#define SNEC_EEPROM_SA0 8 /* Station Address #1 */ 106#define SNEC_EEPROM_SA1 9 /* Station Address #2 */ 107#define SNEC_EEPROM_SA2 10 /* Station Address #3 */ 108#define SNEC_EEPROM_SA3 11 /* Station Address #4 */ 109#define SNEC_EEPROM_SA4 12 /* Station Address #5 */ 110#define SNEC_EEPROM_SA5 13 /* Station Address #6 */ 111#define SNEC_EEPROM_CKSUM 14 /* Station Address Check Sum */ 112 113#define SNEC_EEPROM_SIZE 32 /* valid EEPROM data (max 128 bytes) */ 114 115/* 116 * Bus and Mode Identification Register (IDENT) 117 */ 118#define SNECR_IDENT 0x88 119 /* Bit 0: Bus Identification. */ 120#define SNECR_IDENT_CBUS 0x01 /* on PC-98 C-Bus */ 121#define SNECR_IDENT_PCMCIABUS 0x00 /* on PCMCIA Bus */ 122 /* Bit 2: always 1 */ 123#define SNECR_IDENT_MAGIC 0x04 124 /* Bit 4: Bus Configuration Mode Identification. */ 125#define SNECR_IDENT_PNP 0x10 /* Plug and Play (C-Bus and PCMCIA) */ 126#define SNECR_IDENT_LEGACY 0x00 /* Legacy C-Bus */ 127 128#define SNECR_IDENT_LEGACY_CBUS \ 129 (SNECR_IDENT_LEGACY | SNECR_IDENT_MAGIC | SNECR_IDENT_CBUS) 130#define SNECR_IDENT_PNP_CBUS \ 131 (SNECR_IDENT_PNP | SNECR_IDENT_MAGIC | SNECR_IDENT_CBUS) 132#define SNECR_IDENT_PNP_PCMCIABUS \ 133 (SNECR_IDENT_PNP | SNECR_IDENT_MAGIC | SNECR_IDENT_PCMCIABUS) 134 135/* 136 * XXX: parent bus type aliases 137 */ 138#define SNEC_TYPE_LEGACY 0 139#define SNEC_TYPE_PNP 1 140 141