1262445Serwin/*- 2262445Serwin * Copyright (c) 2011 Advanced Computing Technologies LLC 3262445Serwin * Written by: John H. Baldwin <jhb@FreeBSD.org> 4262445Serwin * All rights reserved. 5262445Serwin * 6262445Serwin * Redistribution and use in source and binary forms, with or without 7262445Serwin * modification, are permitted provided that the following conditions 8262445Serwin * are met: 9262445Serwin * 1. Redistributions of source code must retain the above copyright 10262445Serwin * notice, this list of conditions and the following disclaimer. 11262445Serwin * 2. Redistributions in binary form must reproduce the above copyright 12262445Serwin * notice, this list of conditions and the following disclaimer in the 13262445Serwin * documentation and/or other materials provided with the distribution. 14262445Serwin * 15262445Serwin * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16262445Serwin * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17262445Serwin * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18262445Serwin * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19262445Serwin * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20262445Serwin * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21262445Serwin * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22262445Serwin * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23262445Serwin * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24262445Serwin * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25262445Serwin * SUCH DAMAGE. 26262445Serwin */ 27262445Serwin 28262445Serwin#include <sys/cdefs.h> 29262445Serwin__FBSDID("$FreeBSD$"); 30262445Serwin 31262445Serwin/* 32262445Serwin * Support APIs for Host to PCI bridge drivers and drivers that 33262445Serwin * provide PCI domains. 34262445Serwin */ 35262445Serwin 36262445Serwin#include <sys/param.h> 37262445Serwin#include <sys/bus.h> 38262445Serwin#include <sys/rman.h> 39262445Serwin#include <sys/systm.h> 40262445Serwin 41262445Serwin#include <dev/pci/pcireg.h> 42262445Serwin#include <dev/pci/pcivar.h> 43262445Serwin#include <dev/pci/pcib_private.h> 44262445Serwin 45262445Serwin/* 46262445Serwin * Try to read the bus number of a host-PCI bridge using appropriate config 47262445Serwin * registers. 48262445Serwin */ 49262445Serwinint 50262445Serwinhost_pcib_get_busno(pci_read_config_fn read_config, int bus, int slot, int func, 51262445Serwin uint8_t *busnum) 52262445Serwin{ 53262445Serwin uint32_t id; 54262445Serwin 55262445Serwin id = read_config(bus, slot, func, PCIR_DEVVENDOR, 4); 56262445Serwin if (id == 0xffffffff) 57262445Serwin return (0); 58262445Serwin 59262445Serwin switch (id) { 60262445Serwin case 0x12258086: 61262445Serwin /* Intel 824?? */ 62262445Serwin /* XXX This is a guess */ 63262445Serwin /* *busnum = read_config(bus, slot, func, 0x41, 1); */ 64262445Serwin *busnum = bus; 65262445Serwin break; 66262445Serwin case 0x84c48086: 67262445Serwin /* Intel 82454KX/GX (Orion) */ 68262445Serwin *busnum = read_config(bus, slot, func, 0x4a, 1); 69262445Serwin break; 70262445Serwin case 0x84ca8086: 71262445Serwin /* 72262445Serwin * For the 450nx chipset, there is a whole bundle of 73262445Serwin * things pretending to be host bridges. The MIOC will 74262445Serwin * be seen first and isn't really a pci bridge (the 75262445Serwin * actual busses are attached to the PXB's). We need to 76262445Serwin * read the registers of the MIOC to figure out the 77262445Serwin * bus numbers for the PXB channels. 78262445Serwin * 79262445Serwin * Since the MIOC doesn't have a pci bus attached, we 80262445Serwin * pretend it wasn't there. 81262445Serwin */ 82262445Serwin return (0); 83262445Serwin case 0x84cb8086: 84262445Serwin switch (slot) { 85262445Serwin case 0x12: 86262445Serwin /* Intel 82454NX PXB#0, Bus#A */ 87262445Serwin *busnum = read_config(bus, 0x10, func, 0xd0, 1); 88262445Serwin break; 89262445Serwin case 0x13: 90262445Serwin /* Intel 82454NX PXB#0, Bus#B */ 91262445Serwin *busnum = read_config(bus, 0x10, func, 0xd1, 1) + 1; 92262445Serwin break; 93262445Serwin case 0x14: 94262445Serwin /* Intel 82454NX PXB#1, Bus#A */ 95262445Serwin *busnum = read_config(bus, 0x10, func, 0xd3, 1); 96262445Serwin break; 97262445Serwin case 0x15: 98262445Serwin /* Intel 82454NX PXB#1, Bus#B */ 99262445Serwin *busnum = read_config(bus, 0x10, func, 0xd4, 1) + 1; 100262445Serwin break; 101262445Serwin } 102262445Serwin break; 103262445Serwin 104262445Serwin /* ServerWorks -- vendor 0x1166 */ 105262445Serwin case 0x00051166: 106262445Serwin case 0x00061166: 107262445Serwin case 0x00081166: 108262445Serwin case 0x00091166: 109262445Serwin case 0x00101166: 110262445Serwin case 0x00111166: 111262445Serwin case 0x00171166: 112262445Serwin case 0x01011166: 113262445Serwin case 0x010f1014: 114 case 0x01101166: 115 case 0x02011166: 116 case 0x02251166: 117 case 0x03021014: 118 *busnum = read_config(bus, slot, func, 0x44, 1); 119 break; 120 121 /* Compaq/HP -- vendor 0x0e11 */ 122 case 0x60100e11: 123 *busnum = read_config(bus, slot, func, 0xc8, 1); 124 break; 125 default: 126 /* Don't know how to read bus number. */ 127 return 0; 128 } 129 130 return 1; 131} 132 133#ifdef NEW_PCIB 134/* 135 * Return a pointer to a pretty name for a PCI device. If the device 136 * has a driver attached, the device's name is used, otherwise a name 137 * is generated from the device's PCI address. 138 */ 139const char * 140pcib_child_name(device_t child) 141{ 142 static char buf[64]; 143 144 if (device_get_nameunit(child) != NULL) 145 return (device_get_nameunit(child)); 146 snprintf(buf, sizeof(buf), "pci%d:%d:%d:%d", pci_get_domain(child), 147 pci_get_bus(child), pci_get_slot(child), pci_get_function(child)); 148 return (buf); 149} 150 151/* 152 * Some Host-PCI bridge drivers know which resource ranges they can 153 * decode and should only allocate subranges to child PCI devices. 154 * This API provides a way to manage this. The bridge drive should 155 * initialize this structure during attach and call 156 * pcib_host_res_decodes() on each resource range it decodes. It can 157 * then use pcib_host_res_alloc() and pcib_host_res_adjust() as helper 158 * routines for BUS_ALLOC_RESOURCE() and BUS_ADJUST_RESOURCE(). This 159 * API assumes that resources for any decoded ranges can be safely 160 * allocated from the parent via bus_generic_alloc_resource(). 161 */ 162int 163pcib_host_res_init(device_t pcib, struct pcib_host_resources *hr) 164{ 165 166 hr->hr_pcib = pcib; 167 resource_list_init(&hr->hr_rl); 168 return (0); 169} 170 171int 172pcib_host_res_free(device_t pcib, struct pcib_host_resources *hr) 173{ 174 175 resource_list_free(&hr->hr_rl); 176 return (0); 177} 178 179int 180pcib_host_res_decodes(struct pcib_host_resources *hr, int type, u_long start, 181 u_long end, u_int flags) 182{ 183 struct resource_list_entry *rle; 184 int rid; 185 186 if (bootverbose) 187 device_printf(hr->hr_pcib, "decoding %d %srange %#lx-%#lx\n", 188 type, flags & RF_PREFETCHABLE ? "prefetchable ": "", start, 189 end); 190 rid = resource_list_add_next(&hr->hr_rl, type, start, end, 191 end - start + 1); 192 if (flags & RF_PREFETCHABLE) { 193 KASSERT(type == SYS_RES_MEMORY, 194 ("only memory is prefetchable")); 195 rle = resource_list_find(&hr->hr_rl, type, rid); 196 rle->flags = RLE_PREFETCH; 197 } 198 return (0); 199} 200 201struct resource * 202pcib_host_res_alloc(struct pcib_host_resources *hr, device_t dev, int type, 203 int *rid, u_long start, u_long end, u_long count, u_int flags) 204{ 205 struct resource_list_entry *rle; 206 struct resource *r; 207 u_long new_start, new_end; 208 209 if (flags & RF_PREFETCHABLE) 210 KASSERT(type == SYS_RES_MEMORY, 211 ("only memory is prefetchable")); 212 213 rle = resource_list_find(&hr->hr_rl, type, 0); 214 if (rle == NULL) { 215 /* 216 * No decoding ranges for this resource type, just pass 217 * the request up to the parent. 218 */ 219 return (bus_generic_alloc_resource(hr->hr_pcib, dev, type, rid, 220 start, end, count, flags)); 221 } 222 223restart: 224 /* Try to allocate from each decoded range. */ 225 for (; rle != NULL; rle = STAILQ_NEXT(rle, link)) { 226 if (rle->type != type) 227 continue; 228 if (((flags & RF_PREFETCHABLE) != 0) != 229 ((rle->flags & RLE_PREFETCH) != 0)) 230 continue; 231 new_start = ulmax(start, rle->start); 232 new_end = ulmin(end, rle->end); 233 if (new_start > new_end || 234 new_start + count - 1 > new_end || 235 new_start + count < new_start) 236 continue; 237 r = bus_generic_alloc_resource(hr->hr_pcib, dev, type, rid, 238 new_start, new_end, count, flags); 239 if (r != NULL) { 240 if (bootverbose) 241 device_printf(hr->hr_pcib, 242 "allocated type %d (%#lx-%#lx) for rid %x of %s\n", 243 type, rman_get_start(r), rman_get_end(r), 244 *rid, pcib_child_name(dev)); 245 return (r); 246 } 247 } 248 249 /* 250 * If we failed to find a prefetch range for a memory 251 * resource, try again without prefetch. 252 */ 253 if (flags & RF_PREFETCHABLE) { 254 flags &= ~RF_PREFETCHABLE; 255 rle = resource_list_find(&hr->hr_rl, type, 0); 256 goto restart; 257 } 258 return (NULL); 259} 260 261int 262pcib_host_res_adjust(struct pcib_host_resources *hr, device_t dev, int type, 263 struct resource *r, u_long start, u_long end) 264{ 265 struct resource_list_entry *rle; 266 267 rle = resource_list_find(&hr->hr_rl, type, 0); 268 if (rle == NULL) { 269 /* 270 * No decoding ranges for this resource type, just pass 271 * the request up to the parent. 272 */ 273 return (bus_generic_adjust_resource(hr->hr_pcib, dev, type, r, 274 start, end)); 275 } 276 277 /* Only allow adjustments that stay within a decoded range. */ 278 for (; rle != NULL; rle = STAILQ_NEXT(rle, link)) { 279 if (rle->start <= start && rle->end >= end) 280 return (bus_generic_adjust_resource(hr->hr_pcib, dev, 281 type, r, start, end)); 282 } 283 return (ERANGE); 284} 285#endif /* NEW_PCIB */ 286