mvs_soc.c revision 214099
1/*- 2 * Copyright (c) 2010 Alexander Motin <mav@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> 28__FBSDID("$FreeBSD: head/sys/dev/mvs/mvs_soc.c 214099 2010-10-20 07:22:34Z mav $"); 29 30#include <sys/param.h> 31#include <sys/module.h> 32#include <sys/systm.h> 33#include <sys/kernel.h> 34#include <sys/bus.h> 35#include <sys/endian.h> 36#include <sys/malloc.h> 37#include <sys/lock.h> 38#include <sys/mutex.h> 39#include <vm/uma.h> 40#include <machine/stdarg.h> 41#include <machine/resource.h> 42#include <machine/bus.h> 43#include <sys/rman.h> 44#include <arm/mv/mvreg.h> 45#include <arm/mv/mvvar.h> 46#include "mvs.h" 47 48/* local prototypes */ 49static int mvs_setup_interrupt(device_t dev); 50static void mvs_intr(void *data); 51static int mvs_suspend(device_t dev); 52static int mvs_resume(device_t dev); 53static int mvs_ctlr_setup(device_t dev); 54 55static struct { 56 uint32_t id; 57 uint8_t rev; 58 const char *name; 59 int ports; 60 int quirks; 61} mvs_ids[] = { 62 {MV_DEV_88F5182, 0x00, "Marvell 88F5182", 2, MVS_Q_GENIIE|MVS_Q_SOC}, 63 {MV_DEV_88F6281, 0x00, "Marvell 88F6281", 2, MVS_Q_GENIIE|MVS_Q_SOC}, 64 {MV_DEV_MV78100, 0x00, "Marvell MV78100", 2, MVS_Q_GENIIE|MVS_Q_SOC}, 65 {MV_DEV_MV78100_Z0, 0x00,"Marvell MV78100", 2, MVS_Q_GENIIE|MVS_Q_SOC}, 66 {0, 0x00, NULL, 0, 0} 67}; 68 69static int 70mvs_probe(device_t dev) 71{ 72 char buf[64]; 73 int i; 74 uint32_t devid, revid; 75 76 soc_id(&devid, &revid); 77 for (i = 0; mvs_ids[i].id != 0; i++) { 78 if (mvs_ids[i].id == devid && 79 mvs_ids[i].rev <= revid) { 80 snprintf(buf, sizeof(buf), "%s SATA controller", 81 mvs_ids[i].name); 82 device_set_desc_copy(dev, buf); 83 return (BUS_PROBE_VENDOR); 84 } 85 } 86 return (ENXIO); 87} 88 89static int 90mvs_attach(device_t dev) 91{ 92 struct mvs_controller *ctlr = device_get_softc(dev); 93 device_t child; 94 int error, unit, i; 95 uint32_t devid, revid; 96 97 soc_id(&devid, &revid); 98 ctlr->dev = dev; 99 i = 0; 100 while (mvs_ids[i].id != 0 && 101 (mvs_ids[i].id != devid || 102 mvs_ids[i].rev > revid)) 103 i++; 104 ctlr->channels = mvs_ids[i].ports; 105 ctlr->quirks = mvs_ids[i].quirks; 106 resource_int_value(device_get_name(dev), 107 device_get_unit(dev), "ccc", &ctlr->ccc); 108 ctlr->cccc = 8; 109 resource_int_value(device_get_name(dev), 110 device_get_unit(dev), "cccc", &ctlr->cccc); 111 if (ctlr->ccc == 0 || ctlr->cccc == 0) { 112 ctlr->ccc = 0; 113 ctlr->cccc = 0; 114 } 115 if (ctlr->ccc > 100000) 116 ctlr->ccc = 100000; 117 device_printf(dev, 118 "Gen-%s, %d %sGbps ports, Port Multiplier %s%s\n", 119 ((ctlr->quirks & MVS_Q_GENI) ? "I" : 120 ((ctlr->quirks & MVS_Q_GENII) ? "II" : "IIe")), 121 ctlr->channels, 122 ((ctlr->quirks & MVS_Q_GENI) ? "1.5" : "3"), 123 ((ctlr->quirks & MVS_Q_GENI) ? 124 "not supported" : "supported"), 125 ((ctlr->quirks & MVS_Q_GENIIE) ? 126 " with FBS" : "")); 127 mtx_init(&ctlr->mtx, "MVS controller lock", NULL, MTX_DEF); 128 /* We should have a memory BAR(0). */ 129 ctlr->r_rid = 0; 130 if (!(ctlr->r_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 131 &ctlr->r_rid, RF_ACTIVE))) 132 return ENXIO; 133 /* Setup our own memory management for channels. */ 134 ctlr->sc_iomem.rm_start = rman_get_start(ctlr->r_mem); 135 ctlr->sc_iomem.rm_end = rman_get_end(ctlr->r_mem); 136 ctlr->sc_iomem.rm_type = RMAN_ARRAY; 137 ctlr->sc_iomem.rm_descr = "I/O memory addresses"; 138 if ((error = rman_init(&ctlr->sc_iomem)) != 0) { 139 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 140 return (error); 141 } 142 if ((error = rman_manage_region(&ctlr->sc_iomem, 143 rman_get_start(ctlr->r_mem), rman_get_end(ctlr->r_mem))) != 0) { 144 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 145 rman_fini(&ctlr->sc_iomem); 146 return (error); 147 } 148 mvs_ctlr_setup(dev); 149 /* Setup interrupts. */ 150 if (mvs_setup_interrupt(dev)) { 151 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 152 rman_fini(&ctlr->sc_iomem); 153 return ENXIO; 154 } 155 /* Attach all channels on this controller */ 156 for (unit = 0; unit < ctlr->channels; unit++) { 157 child = device_add_child(dev, "mvsch", -1); 158 if (child == NULL) 159 device_printf(dev, "failed to add channel device\n"); 160 else 161 device_set_ivars(child, (void *)(intptr_t)unit); 162 } 163 bus_generic_attach(dev); 164 return 0; 165} 166 167static int 168mvs_detach(device_t dev) 169{ 170 struct mvs_controller *ctlr = device_get_softc(dev); 171 device_t *children; 172 int nchildren, i; 173 174 /* Detach & delete all children */ 175 if (!device_get_children(dev, &children, &nchildren)) { 176 for (i = 0; i < nchildren; i++) 177 device_delete_child(dev, children[i]); 178 free(children, M_TEMP); 179 } 180 /* Free interrupt. */ 181 if (ctlr->irq.r_irq) { 182 bus_teardown_intr(dev, ctlr->irq.r_irq, 183 ctlr->irq.handle); 184 bus_release_resource(dev, SYS_RES_IRQ, 185 ctlr->irq.r_irq_rid, ctlr->irq.r_irq); 186 } 187 /* Free memory. */ 188 rman_fini(&ctlr->sc_iomem); 189 if (ctlr->r_mem) 190 bus_release_resource(dev, SYS_RES_MEMORY, ctlr->r_rid, ctlr->r_mem); 191 mtx_destroy(&ctlr->mtx); 192 return (0); 193} 194 195static int 196mvs_ctlr_setup(device_t dev) 197{ 198 struct mvs_controller *ctlr = device_get_softc(dev); 199 int ccc = ctlr->ccc, cccc = ctlr->cccc, ccim = 0; 200 201 /* Mask chip interrupts */ 202 ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIM, 0x00000000); 203 /* Clear HC interrupts */ 204 ATA_OUTL(ctlr->r_mem, HC_IC, 0x00000000); 205 /* Clear chip interrupts */ 206 ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIC, 0); 207 /* Configure per-HC CCC */ 208 if (ccc && bootverbose) { 209 device_printf(dev, 210 "CCC with %dus/%dcmd enabled\n", 211 ctlr->ccc, ctlr->cccc); 212 } 213 ccc *= 150; 214 ATA_OUTL(ctlr->r_mem, HC_ICT, cccc); 215 ATA_OUTL(ctlr->r_mem, HC_ITT, ccc); 216 if (ccc) 217 ccim |= IC_HC0_COAL_DONE; 218 /* Enable chip interrupts */ 219 ctlr->gmim = (ccc ? IC_HC0_COAL_DONE : IC_DONE_HC0) | IC_ERR_HC0; 220 ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIM, ctlr->gmim | ctlr->pmim); 221 return (0); 222} 223 224static void 225mvs_edma(device_t dev, device_t child, int mode) 226{ 227 struct mvs_controller *ctlr = device_get_softc(dev); 228 int unit = ((struct mvs_channel *)device_get_softc(child))->unit; 229 int bit = IC_DONE_IRQ << (unit * 2); 230 231 if (ctlr->ccc == 0) 232 return; 233 /* CCC is not working for non-EDMA mode. Unmask device interrupts. */ 234 mtx_lock(&ctlr->mtx); 235 if (mode == MVS_EDMA_OFF) 236 ctlr->pmim |= bit; 237 else 238 ctlr->pmim &= ~bit; 239 ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIM, ctlr->gmim | ctlr->pmim); 240 mtx_unlock(&ctlr->mtx); 241} 242 243static int 244mvs_suspend(device_t dev) 245{ 246 struct mvs_controller *ctlr = device_get_softc(dev); 247 248 bus_generic_suspend(dev); 249 /* Mask chip interrupts */ 250 ATA_OUTL(ctlr->r_mem, CHIP_SOC_MIM, 0x00000000); 251 return 0; 252} 253 254static int 255mvs_resume(device_t dev) 256{ 257 258 mvs_ctlr_setup(dev); 259 return (bus_generic_resume(dev)); 260} 261 262static int 263mvs_setup_interrupt(device_t dev) 264{ 265 struct mvs_controller *ctlr = device_get_softc(dev); 266 267 /* Allocate all IRQs. */ 268 ctlr->irq.r_irq_rid = 0; 269 if (!(ctlr->irq.r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, 270 &ctlr->irq.r_irq_rid, RF_SHAREABLE | RF_ACTIVE))) { 271 device_printf(dev, "unable to map interrupt\n"); 272 return (ENXIO); 273 } 274 if ((bus_setup_intr(dev, ctlr->irq.r_irq, ATA_INTR_FLAGS, NULL, 275 mvs_intr, ctlr, &ctlr->irq.handle))) { 276 device_printf(dev, "unable to setup interrupt\n"); 277 bus_release_resource(dev, SYS_RES_IRQ, 278 ctlr->irq.r_irq_rid, ctlr->irq.r_irq); 279 ctlr->irq.r_irq = 0; 280 return (ENXIO); 281 } 282 return (0); 283} 284 285/* 286 * Common case interrupt handler. 287 */ 288static void 289mvs_intr(void *data) 290{ 291 struct mvs_controller *ctlr = data; 292 struct mvs_intr_arg arg; 293 void (*function)(void *); 294 int p; 295 u_int32_t ic, aic; 296 297 ic = ATA_INL(ctlr->r_mem, CHIP_SOC_MIC); 298 if ((ic & IC_HC0) == 0) 299 return; 300 /* Acknowledge interrupts of this HC. */ 301 aic = 0; 302 if (ic & (IC_DONE_IRQ << 0)) 303 aic |= HC_IC_DONE(0) | HC_IC_DEV(0); 304 if (ic & (IC_DONE_IRQ << 2)) 305 aic |= HC_IC_DONE(1) | HC_IC_DEV(1); 306 if (ic & (IC_DONE_IRQ << 4)) 307 aic |= HC_IC_DONE(2) | HC_IC_DEV(2); 308 if (ic & (IC_DONE_IRQ << 6)) 309 aic |= HC_IC_DONE(3) | HC_IC_DEV(3); 310 if (ic & IC_HC0_COAL_DONE) 311 aic |= HC_IC_COAL; 312 ATA_OUTL(ctlr->r_mem, HC_IC, ~aic); 313 /* Call per-port interrupt handler. */ 314 for (p = 0; p < ctlr->channels; p++) { 315 arg.cause = ic & (IC_ERR_IRQ|IC_DONE_IRQ); 316 if ((arg.cause != 0) && 317 (function = ctlr->interrupt[p].function)) { 318 arg.arg = ctlr->interrupt[p].argument; 319 function(&arg); 320 } 321 ic >>= 2; 322 } 323} 324 325static struct resource * 326mvs_alloc_resource(device_t dev, device_t child, int type, int *rid, 327 u_long start, u_long end, u_long count, u_int flags) 328{ 329 struct mvs_controller *ctlr = device_get_softc(dev); 330 int unit = ((struct mvs_channel *)device_get_softc(child))->unit; 331 struct resource *res = NULL; 332 int offset = PORT_BASE(unit & 0x03); 333 long st; 334 335 switch (type) { 336 case SYS_RES_MEMORY: 337 st = rman_get_start(ctlr->r_mem); 338 res = rman_reserve_resource(&ctlr->sc_iomem, st + offset, 339 st + offset + PORT_SIZE - 1, PORT_SIZE, RF_ACTIVE, child); 340 if (res) { 341 bus_space_handle_t bsh; 342 bus_space_tag_t bst; 343 bsh = rman_get_bushandle(ctlr->r_mem); 344 bst = rman_get_bustag(ctlr->r_mem); 345 bus_space_subregion(bst, bsh, offset, PORT_SIZE, &bsh); 346 rman_set_bushandle(res, bsh); 347 rman_set_bustag(res, bst); 348 } 349 break; 350 case SYS_RES_IRQ: 351 if (*rid == ATA_IRQ_RID) 352 res = ctlr->irq.r_irq; 353 break; 354 } 355 return (res); 356} 357 358static int 359mvs_release_resource(device_t dev, device_t child, int type, int rid, 360 struct resource *r) 361{ 362 363 switch (type) { 364 case SYS_RES_MEMORY: 365 rman_release_resource(r); 366 return (0); 367 case SYS_RES_IRQ: 368 if (rid != ATA_IRQ_RID) 369 return ENOENT; 370 return (0); 371 } 372 return (EINVAL); 373} 374 375static int 376mvs_setup_intr(device_t dev, device_t child, struct resource *irq, 377 int flags, driver_filter_t *filter, driver_intr_t *function, 378 void *argument, void **cookiep) 379{ 380 struct mvs_controller *ctlr = device_get_softc(dev); 381 int unit = (intptr_t)device_get_ivars(child); 382 383 if (filter != NULL) { 384 printf("mvs.c: we cannot use a filter here\n"); 385 return (EINVAL); 386 } 387 ctlr->interrupt[unit].function = function; 388 ctlr->interrupt[unit].argument = argument; 389 return (0); 390} 391 392static int 393mvs_teardown_intr(device_t dev, device_t child, struct resource *irq, 394 void *cookie) 395{ 396 struct mvs_controller *ctlr = device_get_softc(dev); 397 int unit = (intptr_t)device_get_ivars(child); 398 399 ctlr->interrupt[unit].function = NULL; 400 ctlr->interrupt[unit].argument = NULL; 401 return (0); 402} 403 404static int 405mvs_print_child(device_t dev, device_t child) 406{ 407 int retval; 408 409 retval = bus_print_child_header(dev, child); 410 retval += printf(" at channel %d", 411 (int)(intptr_t)device_get_ivars(child)); 412 retval += bus_print_child_footer(dev, child); 413 414 return (retval); 415} 416 417static int 418mvs_child_location_str(device_t dev, device_t child, char *buf, 419 size_t buflen) 420{ 421 422 snprintf(buf, buflen, "channel=%d", 423 (int)(intptr_t)device_get_ivars(child)); 424 return (0); 425} 426 427static device_method_t mvs_methods[] = { 428 DEVMETHOD(device_probe, mvs_probe), 429 DEVMETHOD(device_attach, mvs_attach), 430 DEVMETHOD(device_detach, mvs_detach), 431 DEVMETHOD(device_suspend, mvs_suspend), 432 DEVMETHOD(device_resume, mvs_resume), 433 DEVMETHOD(bus_print_child, mvs_print_child), 434 DEVMETHOD(bus_alloc_resource, mvs_alloc_resource), 435 DEVMETHOD(bus_release_resource, mvs_release_resource), 436 DEVMETHOD(bus_setup_intr, mvs_setup_intr), 437 DEVMETHOD(bus_teardown_intr,mvs_teardown_intr), 438 DEVMETHOD(mvs_edma, mvs_edma), 439 DEVMETHOD(bus_child_location_str, mvs_child_location_str), 440 { 0, 0 } 441}; 442static driver_t mvs_driver = { 443 "sata", 444 mvs_methods, 445 sizeof(struct mvs_controller) 446}; 447DRIVER_MODULE(sata, mbus, mvs_driver, mvs_devclass, 0, 0); 448MODULE_VERSION(sata, 1); 449 450