mps_pci.c revision 230592
1/*- 2 * Copyright (c) 2009 Yahoo! Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> 28__FBSDID("$FreeBSD: head/sys/dev/mps/mps_pci.c 230592 2012-01-26 18:17:21Z ken $"); 29 30/* PCI/PCI-X/PCIe bus interface for the LSI MPT2 controllers */ 31 32/* TODO Move headers to mpsvar */ 33#include <sys/types.h> 34#include <sys/param.h> 35#include <sys/systm.h> 36#include <sys/kernel.h> 37#include <sys/module.h> 38#include <sys/bus.h> 39#include <sys/conf.h> 40#include <sys/malloc.h> 41#include <sys/sysctl.h> 42#include <sys/uio.h> 43 44#include <machine/bus.h> 45#include <machine/resource.h> 46#include <sys/rman.h> 47 48#include <dev/pci/pcireg.h> 49#include <dev/pci/pcivar.h> 50#include <dev/pci/pci_private.h> 51 52#include <dev/mps/mpi/mpi2_type.h> 53#include <dev/mps/mpi/mpi2.h> 54#include <dev/mps/mpi/mpi2_ioc.h> 55#include <dev/mps/mpi/mpi2_cnfg.h> 56#include <dev/mps/mpi/mpi2_tool.h> 57 58#include <sys/queue.h> 59#include <sys/kthread.h> 60#include <dev/mps/mps_ioctl.h> 61#include <dev/mps/mpsvar.h> 62 63static int mps_pci_probe(device_t); 64static int mps_pci_attach(device_t); 65static int mps_pci_detach(device_t); 66static int mps_pci_suspend(device_t); 67static int mps_pci_resume(device_t); 68static void mps_pci_free(struct mps_softc *); 69static int mps_alloc_msix(struct mps_softc *sc, int msgs); 70static int mps_alloc_msi(struct mps_softc *sc, int msgs); 71 72static device_method_t mps_methods[] = { 73 DEVMETHOD(device_probe, mps_pci_probe), 74 DEVMETHOD(device_attach, mps_pci_attach), 75 DEVMETHOD(device_detach, mps_pci_detach), 76 DEVMETHOD(device_suspend, mps_pci_suspend), 77 DEVMETHOD(device_resume, mps_pci_resume), 78 79 DEVMETHOD_END 80}; 81 82static driver_t mps_pci_driver = { 83 "mps", 84 mps_methods, 85 sizeof(struct mps_softc) 86}; 87 88static devclass_t mps_devclass; 89DRIVER_MODULE(mps, pci, mps_pci_driver, mps_devclass, 0, 0); 90 91struct mps_ident { 92 uint16_t vendor; 93 uint16_t device; 94 uint16_t subvendor; 95 uint16_t subdevice; 96 u_int flags; 97 const char *desc; 98} mps_identifiers[] = { 99 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2004, 100 0xffff, 0xffff, 0, "LSI SAS2004" }, 101 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2008, 102 0xffff, 0xffff, 0, "LSI SAS2008" }, 103 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2108_1, 104 0xffff, 0xffff, 0, "LSI SAS2108" }, 105 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2108_2, 106 0xffff, 0xffff, 0, "LSI SAS2108" }, 107 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2108_3, 108 0xffff, 0xffff, 0, "LSI SAS2108" }, 109 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2116_1, 110 0xffff, 0xffff, 0, "LSI SAS2116" }, 111 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2116_2, 112 0xffff, 0xffff, 0, "LSI SAS2116" }, 113 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_1, 114 0xffff, 0xffff, 0, "LSI SAS2208" }, 115 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_2, 116 0xffff, 0xffff, 0, "LSI SAS2208" }, 117 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_3, 118 0xffff, 0xffff, 0, "LSI SAS2208" }, 119 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_4, 120 0xffff, 0xffff, 0, "LSI SAS2208" }, 121 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_5, 122 0xffff, 0xffff, 0, "LSI SAS2208" }, 123 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_6, 124 0xffff, 0xffff, 0, "LSI SAS2208" }, 125 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_1, 126 0xffff, 0xffff, 0, "LSI SAS2308" }, 127 // Add Customer specific vender/subdevice id before generic 128 // (0xffff) vender/subdevice id. 129 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2, 130 0x8086, 0x3516, 0, "Intel(R) Integrated RAID Module RMS25JB080" }, 131 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2, 132 0x8086, 0x3517, 0, "Intel(R) Integrated RAID Module RMS25JB040" }, 133 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2, 134 0x8086, 0x3518, 0, "Intel(R) Integrated RAID Module RMS25KB080" }, 135 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2, 136 0x8086, 0x3519, 0, "Intel(R) Integrated RAID Module RMS25KB040" }, 137 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2, 138 0xffff, 0xffff, 0, "LSI SAS2308" }, 139 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_3, 140 0xffff, 0xffff, 0, "LSI SAS2308" }, 141 { MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SSS6200, 142 0xffff, 0xffff, MPS_FLAGS_WD_AVAILABLE, "LSI SSS6200" }, 143 { 0, 0, 0, 0, 0, NULL } 144}; 145 146static struct mps_ident * 147mps_find_ident(device_t dev) 148{ 149 struct mps_ident *m; 150 151 for (m = mps_identifiers; m->vendor != 0; m++) { 152 if (m->vendor != pci_get_vendor(dev)) 153 continue; 154 if (m->device != pci_get_device(dev)) 155 continue; 156 if ((m->subvendor != 0xffff) && 157 (m->subvendor != pci_get_subvendor(dev))) 158 continue; 159 if ((m->subdevice != 0xffff) && 160 (m->subdevice != pci_get_subdevice(dev))) 161 continue; 162 return (m); 163 } 164 165 return (NULL); 166} 167 168static int 169mps_pci_probe(device_t dev) 170{ 171 struct mps_ident *id; 172 173 if ((id = mps_find_ident(dev)) != NULL) { 174 device_set_desc(dev, id->desc); 175 return (BUS_PROBE_VENDOR); 176 } 177 return (ENXIO); 178} 179 180static int 181mps_pci_attach(device_t dev) 182{ 183 struct mps_softc *sc; 184 struct mps_ident *m; 185 uint16_t command; 186 int error; 187 188 sc = device_get_softc(dev); 189 bzero(sc, sizeof(*sc)); 190 sc->mps_dev = dev; 191 m = mps_find_ident(dev); 192 sc->mps_flags = m->flags; 193 194 /* Twiddle basic PCI config bits for a sanity check */ 195 command = pci_read_config(dev, PCIR_COMMAND, 2); 196 command |= PCIM_CMD_BUSMASTEREN; 197 pci_write_config(dev, PCIR_COMMAND, command, 2); 198 command = pci_read_config(dev, PCIR_COMMAND, 2); 199 if ((command & PCIM_CMD_BUSMASTEREN) == 0) { 200 device_printf(dev, "Cannot enable PCI busmaster\n"); 201 return (ENXIO); 202 } 203 if ((command & PCIM_CMD_MEMEN) == 0) { 204 device_printf(dev, "PCI memory window not available\n"); 205 return (ENXIO); 206 } 207 208 /* Allocate the System Interface Register Set */ 209 sc->mps_regs_rid = PCIR_BAR(1); 210 if ((sc->mps_regs_resource = bus_alloc_resource_any(dev, 211 SYS_RES_MEMORY, &sc->mps_regs_rid, RF_ACTIVE)) == NULL) { 212 device_printf(dev, "Cannot allocate PCI registers\n"); 213 return (ENXIO); 214 } 215 sc->mps_btag = rman_get_bustag(sc->mps_regs_resource); 216 sc->mps_bhandle = rman_get_bushandle(sc->mps_regs_resource); 217 218 /* Allocate the parent DMA tag */ 219 if (bus_dma_tag_create( bus_get_dma_tag(dev), /* parent */ 220 1, 0, /* algnmnt, boundary */ 221 BUS_SPACE_MAXADDR, /* lowaddr */ 222 BUS_SPACE_MAXADDR, /* highaddr */ 223 NULL, NULL, /* filter, filterarg */ 224 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */ 225 BUS_SPACE_UNRESTRICTED, /* nsegments */ 226 BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */ 227 0, /* flags */ 228 NULL, NULL, /* lockfunc, lockarg */ 229 &sc->mps_parent_dmat)) { 230 device_printf(dev, "Cannot allocate parent DMA tag\n"); 231 mps_pci_free(sc); 232 return (ENOMEM); 233 } 234 235 if ((error = mps_attach(sc)) != 0) 236 mps_pci_free(sc); 237 238 return (error); 239} 240 241int 242mps_pci_setup_interrupts(struct mps_softc *sc) 243{ 244 device_t dev; 245 int i, error, msgs; 246 247 dev = sc->mps_dev; 248 error = ENXIO; 249 if ((sc->disable_msix == 0) && 250 ((msgs = pci_msix_count(dev)) >= MPS_MSI_COUNT)) 251 error = mps_alloc_msix(sc, MPS_MSI_COUNT); 252 if ((error != 0) && (sc->disable_msi == 0) && 253 ((msgs = pci_msi_count(dev)) >= MPS_MSI_COUNT)) 254 error = mps_alloc_msi(sc, MPS_MSI_COUNT); 255 256 if (error != 0) { 257 sc->mps_flags |= MPS_FLAGS_INTX; 258 sc->mps_irq_rid[0] = 0; 259 sc->mps_irq[0] = bus_alloc_resource_any(dev, SYS_RES_IRQ, 260 &sc->mps_irq_rid[0], RF_SHAREABLE | RF_ACTIVE); 261 if (sc->mps_irq[0] == NULL) { 262 device_printf(dev, "Cannot allocate INTx interrupt\n"); 263 return (ENXIO); 264 } 265 error = bus_setup_intr(dev, sc->mps_irq[0], 266 INTR_TYPE_BIO | INTR_MPSAFE, NULL, mps_intr, sc, 267 &sc->mps_intrhand[0]); 268 if (error) 269 device_printf(dev, "Cannot setup INTx interrupt\n"); 270 } else { 271 sc->mps_flags |= MPS_FLAGS_MSI; 272 for (i = 0; i < MPS_MSI_COUNT; i++) { 273 sc->mps_irq_rid[i] = i + 1; 274 sc->mps_irq[i] = bus_alloc_resource_any(dev, 275 SYS_RES_IRQ, &sc->mps_irq_rid[i], RF_ACTIVE); 276 if (sc->mps_irq[i] == NULL) { 277 device_printf(dev, 278 "Cannot allocate MSI interrupt\n"); 279 return (ENXIO); 280 } 281 error = bus_setup_intr(dev, sc->mps_irq[i], 282 INTR_TYPE_BIO | INTR_MPSAFE, NULL, mps_intr_msi, 283 sc, &sc->mps_intrhand[i]); 284 if (error) { 285 device_printf(dev, 286 "Cannot setup MSI interrupt %d\n", i); 287 break; 288 } 289 } 290 } 291 292 return (error); 293} 294 295static int 296mps_pci_detach(device_t dev) 297{ 298 struct mps_softc *sc; 299 int error; 300 301 sc = device_get_softc(dev); 302 303 if ((error = mps_free(sc)) != 0) 304 return (error); 305 306 mps_pci_free(sc); 307 return (0); 308} 309 310static void 311mps_pci_free(struct mps_softc *sc) 312{ 313 int i; 314 315 if (sc->mps_parent_dmat != NULL) { 316 bus_dma_tag_destroy(sc->mps_parent_dmat); 317 } 318 319 if (sc->mps_flags & MPS_FLAGS_MSI) { 320 for (i = 0; i < MPS_MSI_COUNT; i++) { 321 if (sc->mps_irq[i] != NULL) { 322 bus_teardown_intr(sc->mps_dev, sc->mps_irq[i], 323 sc->mps_intrhand[i]); 324 bus_release_resource(sc->mps_dev, SYS_RES_IRQ, 325 sc->mps_irq_rid[i], sc->mps_irq[i]); 326 } 327 } 328 pci_release_msi(sc->mps_dev); 329 } 330 331 if (sc->mps_flags & MPS_FLAGS_INTX) { 332 bus_teardown_intr(sc->mps_dev, sc->mps_irq[0], 333 sc->mps_intrhand[0]); 334 bus_release_resource(sc->mps_dev, SYS_RES_IRQ, 335 sc->mps_irq_rid[0], sc->mps_irq[0]); 336 } 337 338 if (sc->mps_regs_resource != NULL) { 339 bus_release_resource(sc->mps_dev, SYS_RES_MEMORY, 340 sc->mps_regs_rid, sc->mps_regs_resource); 341 } 342 343 return; 344} 345 346static int 347mps_pci_suspend(device_t dev) 348{ 349 return (EINVAL); 350} 351 352static int 353mps_pci_resume(device_t dev) 354{ 355 return (EINVAL); 356} 357 358static int 359mps_alloc_msix(struct mps_softc *sc, int msgs) 360{ 361 int error; 362 363 error = pci_alloc_msix(sc->mps_dev, &msgs); 364 return (error); 365} 366 367static int 368mps_alloc_msi(struct mps_softc *sc, int msgs) 369{ 370 int error; 371 372 error = pci_alloc_msi(sc->mps_dev, &msgs); 373 return (error); 374} 375 376int 377mps_pci_restore(struct mps_softc *sc) 378{ 379 struct pci_devinfo *dinfo; 380 381 mps_dprint(sc, MPS_TRACE, "%s\n", __func__); 382 383 dinfo = device_get_ivars(sc->mps_dev); 384 if (dinfo == NULL) { 385 mps_dprint(sc, MPS_FAULT, "%s: NULL dinfo\n", __func__); 386 return (EINVAL); 387 } 388 389 pci_cfg_restore(sc->mps_dev, dinfo); 390 return (0); 391} 392 393