rlswitch.c revision 213893
1176428Srpaulo/*- 2176428Srpaulo * Copyright (c) 1997, 1998, 1999 3176428Srpaulo * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 4176428Srpaulo * Copyright (c) 2006 Bernd Walter. All rights reserved. 5176428Srpaulo * 6176428Srpaulo * Redistribution and use in source and binary forms, with or without 7176428Srpaulo * modification, are permitted provided that the following conditions 8176428Srpaulo * are met: 9176428Srpaulo * 1. Redistributions of source code must retain the above copyright 10176428Srpaulo * notice, this list of conditions and the following disclaimer. 11176428Srpaulo * 2. Redistributions in binary form must reproduce the above copyright 12176428Srpaulo * notice, this list of conditions and the following disclaimer in the 13176428Srpaulo * documentation and/or other materials provided with the distribution. 14176428Srpaulo * 3. All advertising materials mentioning features or use of this software 15176428Srpaulo * must display the following acknowledgement: 16176428Srpaulo * This product includes software developed by Bill Paul. 17176428Srpaulo * 4. Neither the name of the author nor the names of any co-contributors 18176428Srpaulo * may be used to endorse or promote products derived from this software 19176428Srpaulo * without specific prior written permission. 20176428Srpaulo * 21176428Srpaulo * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 22176428Srpaulo * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23176428Srpaulo * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24176428Srpaulo * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 25176428Srpaulo * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26176428Srpaulo * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27176428Srpaulo * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28176428Srpaulo * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29176428Srpaulo * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30176428Srpaulo * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 31176428Srpaulo * THE POSSIBILITY OF SUCH DAMAGE. 32176428Srpaulo */ 33176428Srpaulo 34176428Srpaulo#include <sys/cdefs.h> 35176428Srpaulo__FBSDID("$FreeBSD: head/sys/dev/mii/rlswitch.c 213893 2010-10-15 14:52:11Z marius $"); 36176428Srpaulo 37176428Srpaulo/* 38176428Srpaulo * driver for RealTek 8305 pseudo PHYs 39176428Srpaulo */ 40176428Srpaulo 41176428Srpaulo#include <sys/param.h> 42176428Srpaulo#include <sys/systm.h> 43176428Srpaulo#include <sys/kernel.h> 44176428Srpaulo#include <sys/module.h> 45176428Srpaulo#include <sys/socket.h> 46176428Srpaulo#include <sys/bus.h> 47176428Srpaulo 48176428Srpaulo#include <net/if.h> 49176428Srpaulo#include <net/if_arp.h> 50176428Srpaulo#include <net/if_media.h> 51176428Srpaulo 52176428Srpaulo#include <dev/mii/mii.h> 53176428Srpaulo#include <dev/mii/miivar.h> 54176428Srpaulo#include "miidevs.h" 55176428Srpaulo 56176428Srpaulo#include <machine/bus.h> 57176428Srpaulo#include <pci/if_rlreg.h> 58176428Srpaulo 59176428Srpaulo#include "miibus_if.h" 60176428Srpaulo 61176428Srpaulo//#define RL_DEBUG 62176428Srpaulo#define RL_VLAN 63176428Srpaulo 64176428Srpaulostatic int rlswitch_probe(device_t); 65176428Srpaulostatic int rlswitch_attach(device_t); 66196475Sume 67176428Srpaulostatic device_method_t rlswitch_methods[] = { 68176428Srpaulo /* device interface */ 69196475Sume DEVMETHOD(device_probe, rlswitch_probe), 70176428Srpaulo DEVMETHOD(device_attach, rlswitch_attach), 71196475Sume DEVMETHOD(device_detach, mii_phy_detach), 72176428Srpaulo DEVMETHOD(device_shutdown, bus_generic_shutdown), 73176428Srpaulo { 0, 0 } 74196475Sume}; 75196475Sume 76176428Srpaulostatic devclass_t rlswitch_devclass; 77176428Srpaulo 78196475Sumestatic driver_t rlswitch_driver = { 79196475Sume "rlswitch", 80196475Sume rlswitch_methods, 81196475Sume sizeof(struct mii_softc) 82196475Sume}; 83176428Srpaulo 84196475SumeDRIVER_MODULE(rlswitch, miibus, rlswitch_driver, rlswitch_devclass, 0, 0); 85176428Srpaulo 86196475Sumestatic int rlswitch_service(struct mii_softc *, struct mii_data *, int); 87196475Sumestatic void rlswitch_status(struct mii_softc *); 88176428Srpaulo 89176428Srpaulo#ifdef RL_DEBUG 90176428Srpaulostatic void rlswitch_phydump(device_t dev); 91196475Sume#endif 92196475Sume 93196475Sumestatic const struct mii_phydesc rlswitches[] = { 94196475Sume MII_PHY_DESC(xxREALTEK, RTL8305SC), 95196475Sume MII_PHY_END 96176428Srpaulo}; 97196475Sume 98196475Sumestatic int 99196475Sumerlswitch_probe(device_t dev) 100196475Sume{ 101196475Sume int rv; 102176428Srpaulo 103176428Srpaulo rv = mii_phy_dev_probe(dev, rlswitches, BUS_PROBE_DEFAULT); 104176428Srpaulo if (rv <= 0) 105176428Srpaulo return (rv); 106176428Srpaulo 107176428Srpaulo return (ENXIO); 108176428Srpaulo} 109176428Srpaulo 110176428Srpaulostatic int 111176428Srpaulorlswitch_attach(device_t dev) 112176428Srpaulo{ 113176428Srpaulo struct mii_softc *sc; 114176428Srpaulo struct mii_attach_args *ma; 115176428Srpaulo struct mii_data *mii; 116176428Srpaulo 117176428Srpaulo sc = device_get_softc(dev); 118176428Srpaulo ma = device_get_ivars(dev); 119176428Srpaulo sc->mii_dev = device_get_parent(dev); 120176428Srpaulo mii = ma->mii_data; 121176428Srpaulo LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list); 122176428Srpaulo 123176428Srpaulo sc->mii_flags = miibus_get_flags(dev); 124176428Srpaulo sc->mii_inst = mii->mii_instance++; 125176428Srpaulo sc->mii_phy = ma->mii_phyno; 126176428Srpaulo sc->mii_service = rlswitch_service; 127196475Sume sc->mii_pdata = mii; 128196475Sume 129176428Srpaulo /* 130176428Srpaulo * We handle all pseudo PHYs in a single instance. 131176428Srpaulo */ 132196475Sume sc->mii_flags |= MIIF_NOISOLATE; 133196475Sume 134176428Srpaulo#define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL) 135196475Sume 136196475Sume#if 0 137196475Sume ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP, sc->mii_inst), 138196475Sume MII_MEDIA_100_TX); 139176428Srpaulo#endif 140176428Srpaulo 141176428Srpaulo sc->mii_capabilities = BMSR_100TXFDX & ma->mii_capmask; 142176428Srpaulo device_printf(dev, " "); 143196475Sume mii_phy_add_media(sc); 144176428Srpaulo printf("\n"); 145176428Srpaulo#undef ADD 146176428Srpaulo#ifdef RL_DEBUG 147176428Srpaulo rlswitch_phydump(dev); 148176428Srpaulo#endif 149176428Srpaulo 150176428Srpaulo#ifdef RL_VLAN 151176428Srpaulo int val; 152176428Srpaulo 153176428Srpaulo /* Global Control 0 */ 154176428Srpaulo val = 0; 155176428Srpaulo val |= 0 << 10; /* enable 802.1q VLAN Tag support */ 156176428Srpaulo val |= 0 << 9; /* enable VLAN ingress filtering */ 157176428Srpaulo val |= 1 << 8; /* disable VLAN tag admit control */ 158176428Srpaulo val |= 1 << 6; /* internal use */ 159176428Srpaulo val |= 1 << 5; /* internal use */ 160176428Srpaulo val |= 1 << 4; /* internal use */ 161176428Srpaulo val |= 1 << 3; /* internal use */ 162176428Srpaulo val |= 1 << 1; /* reserved */ 163176428Srpaulo MIIBUS_WRITEREG(sc->mii_dev, 0, 16, val); 164176428Srpaulo 165176428Srpaulo /* Global Control 2 */ 166176428Srpaulo val = 0; 167176428Srpaulo val |= 1 << 15; /* reserved */ 168176428Srpaulo val |= 0 << 14; /* enable 1552 Bytes support */ 169176428Srpaulo val |= 1 << 13; /* enable broadcast input drop */ 170176428Srpaulo val |= 1 << 12; /* forward reserved control frames */ 171176428Srpaulo val |= 1 << 11; /* disable forwarding unicast frames to other VLAN's */ 172196475Sume val |= 1 << 10; /* disable forwarding ARP broadcasts to other VLAN's */ 173176428Srpaulo val |= 1 << 9; /* enable 48 pass 1 */ 174176428Srpaulo val |= 0 << 8; /* enable VLAN */ 175176428Srpaulo val |= 1 << 7; /* reserved */ 176176428Srpaulo val |= 1 << 6; /* enable defer */ 177176428Srpaulo val |= 1 << 5; /* 43ms LED blink time */ 178176428Srpaulo val |= 3 << 3; /* 16:1 queue weight */ 179176428Srpaulo val |= 1 << 2; /* disable broadcast storm control */ 180176428Srpaulo val |= 1 << 1; /* enable power-on LED blinking */ 181176428Srpaulo val |= 1 << 0; /* reserved */ 182176428Srpaulo MIIBUS_WRITEREG(sc->mii_dev, 0, 18, val); 183176428Srpaulo 184176428Srpaulo /* Port 0 Control Register 0 */ 185176428Srpaulo val = 0; 186176428Srpaulo val |= 1 << 15; /* reserved */ 187176428Srpaulo val |= 1 << 11; /* drop received packets with wrong VLAN tag */ 188176428Srpaulo val |= 1 << 10; /* disable 802.1p priority classification */ 189176428Srpaulo val |= 1 << 9; /* disable diffserv priority classification */ 190176428Srpaulo val |= 1 << 6; /* internal use */ 191176428Srpaulo val |= 3 << 4; /* internal use */ 192176428Srpaulo val |= 1 << 3; /* internal use */ 193176428Srpaulo val |= 1 << 2; /* internal use */ 194176428Srpaulo val |= 1 << 0; /* remove VLAN tags on output */ 195176428Srpaulo MIIBUS_WRITEREG(sc->mii_dev, 0, 22, val); 196176428Srpaulo 197176428Srpaulo /* Port 1 Control Register 0 */ 198176428Srpaulo val = 0; 199196475Sume val |= 1 << 15; /* reserved */ 200176428Srpaulo val |= 1 << 11; /* drop received packets with wrong VLAN tag */ 201176428Srpaulo val |= 1 << 10; /* disable 802.1p priority classification */ 202176428Srpaulo val |= 1 << 9; /* disable diffserv priority classification */ 203176428Srpaulo val |= 1 << 6; /* internal use */ 204176428Srpaulo val |= 3 << 4; /* internal use */ 205176428Srpaulo val |= 1 << 3; /* internal use */ 206176428Srpaulo val |= 1 << 2; /* internal use */ 207176428Srpaulo val |= 1 << 0; /* remove VLAN tags on output */ 208176428Srpaulo MIIBUS_WRITEREG(sc->mii_dev, 1, 22, val); 209176428Srpaulo 210176428Srpaulo /* Port 2 Control Register 0 */ 211176428Srpaulo val = 0; 212176428Srpaulo val |= 1 << 15; /* reserved */ 213196475Sume val |= 1 << 11; /* drop received packets with wrong VLAN tag */ 214176428Srpaulo val |= 1 << 10; /* disable 802.1p priority classification */ 215176428Srpaulo val |= 1 << 9; /* disable diffserv priority classification */ 216176428Srpaulo val |= 1 << 6; /* internal use */ 217176428Srpaulo val |= 3 << 4; /* internal use */ 218176428Srpaulo val |= 1 << 3; /* internal use */ 219176428Srpaulo val |= 1 << 2; /* internal use */ 220176428Srpaulo val |= 1 << 0; /* remove VLAN tags on output */ 221176428Srpaulo MIIBUS_WRITEREG(sc->mii_dev, 2, 22, val); 222176428Srpaulo 223176428Srpaulo /* Port 3 Control Register 0 */ 224176428Srpaulo val = 0; 225176428Srpaulo val |= 1 << 15; /* reserved */ 226176428Srpaulo val |= 1 << 11; /* drop received packets with wrong VLAN tag */ 227176428Srpaulo val |= 1 << 10; /* disable 802.1p priority classification */ 228176428Srpaulo val |= 1 << 9; /* disable diffserv priority classification */ 229 val |= 1 << 6; /* internal use */ 230 val |= 3 << 4; /* internal use */ 231 val |= 1 << 3; /* internal use */ 232 val |= 1 << 2; /* internal use */ 233 val |= 1 << 0; /* remove VLAN tags on output */ 234 MIIBUS_WRITEREG(sc->mii_dev, 3, 22, val); 235 236 /* Port 4 (system port) Control Register 0 */ 237 val = 0; 238 val |= 1 << 15; /* reserved */ 239 val |= 0 << 11; /* don't drop received packets with wrong VLAN tag */ 240 val |= 1 << 10; /* disable 802.1p priority classification */ 241 val |= 1 << 9; /* disable diffserv priority classification */ 242 val |= 1 << 6; /* internal use */ 243 val |= 3 << 4; /* internal use */ 244 val |= 1 << 3; /* internal use */ 245 val |= 1 << 2; /* internal use */ 246 val |= 2 << 0; /* add VLAN tags for untagged packets on output */ 247 MIIBUS_WRITEREG(sc->mii_dev, 4, 22, val); 248 249 /* Port 0 Control Register 1 and VLAN A */ 250 val = 0; 251 val |= 0x0 << 12; /* Port 0 VLAN Index */ 252 val |= 1 << 11; /* internal use */ 253 val |= 1 << 10; /* internal use */ 254 val |= 1 << 9; /* internal use */ 255 val |= 1 << 7; /* internal use */ 256 val |= 1 << 6; /* internal use */ 257 val |= 0x11 << 0; /* VLAN A membership */ 258 MIIBUS_WRITEREG(sc->mii_dev, 0, 24, val); 259 260 /* Port 0 Control Register 2 and VLAN A */ 261 val = 0; 262 val |= 1 << 15; /* internal use */ 263 val |= 1 << 14; /* internal use */ 264 val |= 1 << 13; /* internal use */ 265 val |= 1 << 12; /* internal use */ 266 val |= 0x100 << 0; /* VLAN A ID */ 267 MIIBUS_WRITEREG(sc->mii_dev, 0, 25, val); 268 269 /* Port 1 Control Register 1 and VLAN B */ 270 val = 0; 271 val |= 0x1 << 12; /* Port 1 VLAN Index */ 272 val |= 1 << 11; /* internal use */ 273 val |= 1 << 10; /* internal use */ 274 val |= 1 << 9; /* internal use */ 275 val |= 1 << 7; /* internal use */ 276 val |= 1 << 6; /* internal use */ 277 val |= 0x12 << 0; /* VLAN B membership */ 278 MIIBUS_WRITEREG(sc->mii_dev, 1, 24, val); 279 280 /* Port 1 Control Register 2 and VLAN B */ 281 val = 0; 282 val |= 1 << 15; /* internal use */ 283 val |= 1 << 14; /* internal use */ 284 val |= 1 << 13; /* internal use */ 285 val |= 1 << 12; /* internal use */ 286 val |= 0x101 << 0; /* VLAN B ID */ 287 MIIBUS_WRITEREG(sc->mii_dev, 1, 25, val); 288 289 /* Port 2 Control Register 1 and VLAN C */ 290 val = 0; 291 val |= 0x2 << 12; /* Port 2 VLAN Index */ 292 val |= 1 << 11; /* internal use */ 293 val |= 1 << 10; /* internal use */ 294 val |= 1 << 9; /* internal use */ 295 val |= 1 << 7; /* internal use */ 296 val |= 1 << 6; /* internal use */ 297 val |= 0x14 << 0; /* VLAN C membership */ 298 MIIBUS_WRITEREG(sc->mii_dev, 2, 24, val); 299 300 /* Port 2 Control Register 2 and VLAN C */ 301 val = 0; 302 val |= 1 << 15; /* internal use */ 303 val |= 1 << 14; /* internal use */ 304 val |= 1 << 13; /* internal use */ 305 val |= 1 << 12; /* internal use */ 306 val |= 0x102 << 0; /* VLAN C ID */ 307 MIIBUS_WRITEREG(sc->mii_dev, 2, 25, val); 308 309 /* Port 3 Control Register 1 and VLAN D */ 310 val = 0; 311 val |= 0x3 << 12; /* Port 3 VLAN Index */ 312 val |= 1 << 11; /* internal use */ 313 val |= 1 << 10; /* internal use */ 314 val |= 1 << 9; /* internal use */ 315 val |= 1 << 7; /* internal use */ 316 val |= 1 << 6; /* internal use */ 317 val |= 0x18 << 0; /* VLAN D membership */ 318 MIIBUS_WRITEREG(sc->mii_dev, 3, 24, val); 319 320 /* Port 3 Control Register 2 and VLAN D */ 321 val = 0; 322 val |= 1 << 15; /* internal use */ 323 val |= 1 << 14; /* internal use */ 324 val |= 1 << 13; /* internal use */ 325 val |= 1 << 12; /* internal use */ 326 val |= 0x103 << 0; /* VLAN D ID */ 327 MIIBUS_WRITEREG(sc->mii_dev, 3, 25, val); 328 329 /* Port 4 Control Register 1 and VLAN E */ 330 val = 0; 331 val |= 0x0 << 12; /* Port 4 VLAN Index */ 332 val |= 1 << 11; /* internal use */ 333 val |= 1 << 10; /* internal use */ 334 val |= 1 << 9; /* internal use */ 335 val |= 1 << 7; /* internal use */ 336 val |= 1 << 6; /* internal use */ 337 val |= 0 << 0; /* VLAN E membership */ 338 MIIBUS_WRITEREG(sc->mii_dev, 4, 24, val); 339 340 /* Port 4 Control Register 2 and VLAN E */ 341 val = 0; 342 val |= 1 << 15; /* internal use */ 343 val |= 1 << 14; /* internal use */ 344 val |= 1 << 13; /* internal use */ 345 val |= 1 << 12; /* internal use */ 346 val |= 0x104 << 0; /* VLAN E ID */ 347 MIIBUS_WRITEREG(sc->mii_dev, 4, 25, val); 348#endif 349 350#ifdef RL_DEBUG 351 rlswitch_phydump(dev); 352#endif 353 MIIBUS_MEDIAINIT(sc->mii_dev); 354 return (0); 355} 356 357static int 358rlswitch_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 359{ 360 361 switch (cmd) { 362 case MII_POLLSTAT: 363 break; 364 365 case MII_MEDIACHG: 366 break; 367 368 case MII_TICK: 369 /* 370 * Is the interface even up? 371 */ 372 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 373 return (0); 374 break; 375 } 376 377 /* Update the media status. */ 378 rlswitch_status(sc); 379 380 /* Callback if something changed. */ 381 // mii_phy_update(sc, cmd); 382 return (0); 383} 384 385static void 386rlswitch_status(struct mii_softc *phy) 387{ 388 struct mii_data *mii = phy->mii_pdata; 389 390 mii->mii_media_status = IFM_AVALID; 391 mii->mii_media_active = IFM_ETHER; 392 mii->mii_media_status |= IFM_ACTIVE; 393 mii->mii_media_active |= IFM_100_TX|IFM_FDX; 394} 395 396#ifdef RL_DEBUG 397static void 398rlswitch_phydump(device_t dev) { 399 int phy, reg, val; 400 struct mii_softc *sc; 401 402 sc = device_get_softc(dev); 403 device_printf(dev, "rlswitchphydump\n"); 404 for (phy = 0; phy <= 5; phy++) { 405 printf("PHY%i:", phy); 406 for (reg = 0; reg <= 31; reg++) { 407 val = MIIBUS_READREG(sc->mii_dev, phy, reg); 408 printf(" 0x%x", val); 409 } 410 printf("\n"); 411 } 412} 413#endif 414