ip1000phyreg.h revision 160638
1251607Sdim/*- 2251607Sdim * Copyright (c) 2006, Pyun YongHyeon 3251607Sdim * All rights reserved. 4251607Sdim * 5251607Sdim * Redistribution and use in source and binary forms, with or without 6251607Sdim * modification, are permitted provided that the following conditions 7251607Sdim * are met: 8251607Sdim * 1. Redistributions of source code must retain the above copyright 9251607Sdim * notice unmodified, this list of conditions, and the following 10251607Sdim * disclaimer. 11251607Sdim * 2. Redistributions in binary form must reproduce the above copyright 12251607Sdim * notice, this list of conditions and the following disclaimer in the 13251607Sdim * documentation and/or other materials provided with the distribution. 14251607Sdim * 15251607Sdim * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16251607Sdim * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17251607Sdim * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18251607Sdim * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19251607Sdim * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20251607Sdim * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21251607Sdim * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22251607Sdim * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23251607Sdim * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24251607Sdim * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25251607Sdim * SUCH DAMAGE. 26251607Sdim * 27251607Sdim * $FreeBSD: head/sys/dev/mii/ip1000phyreg.h 160638 2006-07-25 00:16:09Z yongari $ 28251607Sdim */ 29251607Sdim 30251607Sdim#ifndef _DEV_MII_IP1000PHYREG_H_ 31251607Sdim#define _DEV_MII_IP1000PHYREG_H_ 32251607Sdim 33251607Sdim/* 34251607Sdim * Registers for the IC Plus IP1000A internal PHY. 35251607Sdim */ 36251607Sdim 37251607Sdim/* Control register */ 38251607Sdim#define IP1000PHY_MII_BMCR 0x00 39251607Sdim#define IP1000PHY_BMCR_FDX 0x0100 40251607Sdim#define IP1000PHY_BMCR_STARTNEG 0x0200 41251607Sdim#define IP1000PHY_BMCR_ISO 0x0400 42251607Sdim#define IP1000PHY_BMCR_PDOWN 0x0800 43251607Sdim#define IP1000PHY_BMCR_AUTOEN 0x1000 44251607Sdim#define IP1000PHY_BMCR_LOOP 0x4000 45251607Sdim#define IP1000PHY_BMCR_RESET 0x8000 46251607Sdim 47251607Sdim#define IP1000PHY_BMCR_10 0x0000 48251607Sdim#define IP1000PHY_BMCR_100 0x2000 49251607Sdim#define IP1000PHY_BMCR_1000 0x0040 50251607Sdim 51251607Sdim/* Status register */ 52251607Sdim#define IP1000PHY_MII_BMSR 0x01 53251607Sdim#define IP1000PHY_BMSR_EXT 0x0001 54251607Sdim#define IP1000PHY_BMSR_LINK 0x0004 55251607Sdim#define IP1000PHY_BMSR_ANEG 0x0008 56251607Sdim#define IP1000PHY_BMSR_RFAULT 0x0010 57251607Sdim#define IP1000PHY_BMSR_ANEGCOMP 0x0020 58251607Sdim#define IP1000PHY_BMSR_EXTSTS 0x0100 59251607Sdim 60251607Sdim#define IP1000PHY_MII_ID1 0x02 61251607Sdim 62251607Sdim/* Autonegotiation advertisement register */ 63251607Sdim#define IP1000PHY_MII_ANAR 0x04 64251607Sdim#define IP1000PHY_ANAR_10T 0x0020 65251607Sdim#define IP1000PHY_ANAR_10T_FDX 0x0040 66251607Sdim#define IP1000PHY_ANAR_100TX 0x0080 67251607Sdim#define IP1000PHY_ANAR_100TX_FDX 0x0100 68251607Sdim#define IP1000PHY_ANAR_100T4 0x0200 69251607Sdim#define IP1000PHY_ANAR_PAUSE 0x0400 70251607Sdim#define IP1000PHY_ANAR_APAUSE 0x0800 71251607Sdim#define IP1000PHY_ANAR_RFAULT 0x2000 72251607Sdim#define IP1000PHY_ANAR_NP 0x8000 73251607Sdim 74251607Sdim/* Autonegotiation link parnet ability register */ 75251607Sdim#define IP1000PHY_MII_ANLPAR 0x05 76251607Sdim#define IP1000PHY_ANLPAR_10T 0x0020 77251607Sdim#define IP1000PHY_ANLPAR_10T_FDX 0x0040 78251607Sdim#define IP1000PHY_ANLPAR_100TX 0x0080 79251607Sdim#define IP1000PHY_ANLPAR_100TX_FDX 0x0100 80251607Sdim#define IP1000PHY_ANLPAR_100T4 0x0200 81251607Sdim#define IP1000PHY_ANLPAR_PAUSE 0x0400 82251607Sdim#define IP1000PHY_ANLPAR_APAUSE 0x0800 83251607Sdim#define IP1000PHY_ANLPAR_RFAULT 0x2000 84251607Sdim#define IP1000PHY_ANLPAR_ACK 0x4000 85251607Sdim#define IP1000PHY_ANLPAR_NP 0x8000 86251607Sdim 87251607Sdim/* Autonegotiation expansion register */ 88251607Sdim#define IP1000PHY_MII_ANER 0x06 89251607Sdim#define IP1000PHY_ANER_LPNWAY 0x0001 90251607Sdim#define IP1000PHY_ANER_PRCVD 0x0002 91251607Sdim#define IP1000PHY_ANER_NEXTP 0x0004 92251607Sdim#define IP1000PHY_ANER_LPNEXTP 0x0008 93251607Sdim#define IP1000PHY_ANER_PDF 0x0100 94251607Sdim 95251607Sdim/* Autonegotiation next page transmit register */ 96251607Sdim#define IP1000PHY_MII_NEXTP 0x07 97251607Sdim#define IP1000PHY_NEXTP_MSGC 0x0001 98251607Sdim#define IP1000PHY_NEXTP_TOGGLE 0x0800 99251607Sdim#define IP1000PHY_NEXTP_ACK2 0x1000 100251607Sdim#define IP1000PHY_NEXTP_MSGP 0x2000 101251607Sdim#define IP1000PHY_NEXTP_NEXTP 0x8000 102251607Sdim 103251607Sdim/* Autonegotiation link partner next page register */ 104251607Sdim#define IP1000PHY_MII_NEXTPLP 0x08 105251607Sdim#define IP1000PHY_NEXTPLP_MSGC 0x0001 106251607Sdim#define IP1000PHY_NEXTPLP_TOGGLE 0x0800 107251607Sdim#define IP1000PHY_NEXTPLP_ACK2 0x1000 108251607Sdim#define IP1000PHY_NEXTPLP_MSGP 0x2000 109251607Sdim#define IP1000PHY_NEXTPLP_ACK 0x4000 110251607Sdim#define IP1000PHY_NEXTPLP_NEXTP 0x8000 111251607Sdim 112251607Sdim/* 1000baseT control register */ 113251607Sdim#define IP1000PHY_MII_1000CR 0x09 114251607Sdim#define IP1000PHY_1000CR_1000T 0x0100 115251607Sdim#define IP1000PHY_1000CR_1000T_FDX 0x0200 116251607Sdim#define IP1000PHY_1000CR_MASTER 0x0400 117251607Sdim#define IP1000PHY_1000CR_MMASTER 0x0800 118251607Sdim#define IP1000PHY_1000CR_MANUAL 0x1000 119251607Sdim#define IP1000PHY_1000CR_TMNORMAL 0x0000 120251607Sdim#define IP1000PHY_1000CR_TM1 0x2000 121251607Sdim#define IP1000PHY_1000CR_TM2 0x4000 122251607Sdim#define IP1000PHY_1000CR_TM3 0x6000 123251607Sdim#define IP1000PHY_1000CR_TM4 0x8000 124251607Sdim 125251607Sdim/* 1000baseT status register */ 126251607Sdim#define IP1000PHY_MII_1000SR 0x0A 127251607Sdim#define IP1000PHY_1000SR_LP 0x0400 128251607Sdim#define IP1000PHY_1000SR_LP_FDX 0x0800 129251607Sdim#define IP1000PHY_1000SR_RXSTAT 0x1000 130251607Sdim#define IP1000PHY_1000SR_LRXSTAT 0x2000 131251607Sdim#define IP1000PHY_1000SR_MASTER 0x4000 132251607Sdim#define IP1000PHY_1000SR_MASTERF 0x8000 133251607Sdim 134251607Sdim/* Extended status register */ 135251607Sdim#define IP1000PHY_MII_EXTSTS 0x0F 136251607Sdim#define IP1000PHY_EXTSTS_1000T 0x1000 137251607Sdim#define IP1000PHY_EXTSTS_1000T_FDX 0x2000 138251607Sdim#define IP1000PHY_EXTSTS_1000X 0x4000 139251607Sdim#define IP1000PHY_EXTSTS_1000X_FDX 0x8000 140251607Sdim 141251607Sdim#endif /* _DEV_MII_IP1000PHYREG_H_ */ 142251607Sdim