brgphy.c revision 166666
1/*- 2 * Copyright (c) 2000 3 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by Bill Paul. 16 * 4. Neither the name of the author nor the names of any co-contributors 17 * may be used to endorse or promote products derived from this software 18 * without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33#include <sys/cdefs.h> 34__FBSDID("$FreeBSD: head/sys/dev/mii/brgphy.c 166666 2007-02-12 20:26:56Z jkim $"); 35 36/* 37 * Driver for the Broadcom BCR5400 1000baseTX PHY. 38 */ 39 40#include <sys/param.h> 41#include <sys/systm.h> 42#include <sys/kernel.h> 43#include <sys/module.h> 44#include <sys/socket.h> 45#include <sys/bus.h> 46 47#include <net/if.h> 48#include <net/ethernet.h> 49#include <net/if_media.h> 50 51#include <dev/mii/mii.h> 52#include <dev/mii/miivar.h> 53#include "miidevs.h" 54 55#include <dev/mii/brgphyreg.h> 56#include <net/if_arp.h> 57#include <machine/bus.h> 58#include <dev/bge/if_bgereg.h> 59#include <dev/bce/if_bcereg.h> 60 61#include <dev/pci/pcireg.h> 62#include <dev/pci/pcivar.h> 63 64#include "miibus_if.h" 65 66static int brgphy_probe(device_t); 67static int brgphy_attach(device_t); 68 69struct brgphy_softc { 70 struct mii_softc mii_sc; 71 int mii_model; 72 int mii_rev; 73}; 74 75static device_method_t brgphy_methods[] = { 76 /* device interface */ 77 DEVMETHOD(device_probe, brgphy_probe), 78 DEVMETHOD(device_attach, brgphy_attach), 79 DEVMETHOD(device_detach, mii_phy_detach), 80 DEVMETHOD(device_shutdown, bus_generic_shutdown), 81 { 0, 0 } 82}; 83 84static devclass_t brgphy_devclass; 85 86static driver_t brgphy_driver = { 87 "brgphy", 88 brgphy_methods, 89 sizeof(struct brgphy_softc) 90}; 91 92DRIVER_MODULE(brgphy, miibus, brgphy_driver, brgphy_devclass, 0, 0); 93 94static int brgphy_service(struct mii_softc *, struct mii_data *, int); 95static void brgphy_setmedia(struct mii_softc *, int, int); 96static void brgphy_status(struct mii_softc *); 97static int brgphy_mii_phy_auto(struct mii_softc *); 98static void brgphy_reset(struct mii_softc *); 99static void brgphy_loop(struct mii_softc *); 100static void bcm5401_load_dspcode(struct mii_softc *); 101static void bcm5411_load_dspcode(struct mii_softc *); 102static void brgphy_fixup_adc_bug(struct mii_softc *); 103static void brgphy_fixup_5704_a0_bug(struct mii_softc *); 104static void brgphy_fixup_ber_bug(struct mii_softc *); 105static void brgphy_fixup_jitter_bug(struct mii_softc *); 106static void brgphy_ethernet_wirespeed(struct mii_softc *); 107static void brgphy_jumbo_settings(struct mii_softc *, u_long); 108 109static const struct mii_phydesc brgphys[] = { 110 MII_PHY_DESC(xxBROADCOM, BCM5400), 111 MII_PHY_DESC(xxBROADCOM, BCM5401), 112 MII_PHY_DESC(xxBROADCOM, BCM5411), 113 MII_PHY_DESC(xxBROADCOM, BCM5701), 114 MII_PHY_DESC(xxBROADCOM, BCM5703), 115 MII_PHY_DESC(xxBROADCOM, BCM5704), 116 MII_PHY_DESC(xxBROADCOM, BCM5705), 117 MII_PHY_DESC(xxBROADCOM, BCM5706C), 118 MII_PHY_DESC(xxBROADCOM, BCM5714), 119 MII_PHY_DESC(xxBROADCOM, BCM5750), 120 MII_PHY_DESC(xxBROADCOM, BCM5752), 121 MII_PHY_DESC(xxBROADCOM, BCM5754), 122 MII_PHY_DESC(xxBROADCOM, BCM5780), 123 MII_PHY_DESC(xxBROADCOM_ALT1, BCM5787), 124 MII_PHY_END 125}; 126 127static int 128brgphy_probe(device_t dev) 129{ 130 131 return (mii_phy_dev_probe(dev, brgphys, BUS_PROBE_DEFAULT)); 132} 133 134static int 135brgphy_attach(device_t dev) 136{ 137 struct brgphy_softc *bsc; 138 struct mii_softc *sc; 139 struct mii_attach_args *ma; 140 struct mii_data *mii; 141 const char *sep = ""; 142 struct bge_softc *bge_sc = NULL; 143 struct bce_softc *bce_sc = NULL; 144 int fast_ether_only = FALSE; 145 146 bsc = device_get_softc(dev); 147 sc = &bsc->mii_sc; 148 ma = device_get_ivars(dev); 149 sc->mii_dev = device_get_parent(dev); 150 mii = device_get_softc(sc->mii_dev); 151 LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list); 152 153 sc->mii_inst = mii->mii_instance; 154 sc->mii_phy = ma->mii_phyno; 155 sc->mii_service = brgphy_service; 156 sc->mii_pdata = mii; 157 158 sc->mii_flags |= MIIF_NOISOLATE; 159 mii->mii_instance++; 160 161#define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL) 162#define PRINT(s) printf("%s%s", sep, s); sep = ", " 163 164 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst), 165 BMCR_ISO); 166#if 0 167 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP, sc->mii_inst), 168 BMCR_LOOP | BMCR_S100); 169#endif 170 171 bsc->mii_model = MII_MODEL(ma->mii_id2); 172 bsc->mii_rev = MII_REV(ma->mii_id2); 173 brgphy_reset(sc); 174 175 sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask; 176 sc->mii_capabilities &= ~BMSR_ANEG; 177 device_printf(dev, " "); 178 mii_add_media(sc); 179 180 /* Find the driver associated with this PHY. */ 181 if (strcmp(mii->mii_ifp->if_dname, "bge") == 0) { 182 bge_sc = mii->mii_ifp->if_softc; 183 } else if (strcmp(mii->mii_ifp->if_dname, "bce") == 0) { 184 bce_sc = mii->mii_ifp->if_softc; 185 } 186 187 /* The 590x chips are 10/100 only. */ 188 if (strcmp(mii->mii_ifp->if_dname, "bge") == 0 && 189 pci_get_vendor(bge_sc->bge_dev) == BCOM_VENDORID && 190 (pci_get_device(bge_sc->bge_dev) == BCOM_DEVICEID_BCM5901 || 191 pci_get_device(bge_sc->bge_dev) == BCOM_DEVICEID_BCM5901A2)) 192 fast_ether_only = TRUE; 193 194 if (fast_ether_only == FALSE) { 195 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 0, 196 sc->mii_inst), BRGPHY_BMCR_FDX); 197 PRINT(", 1000baseTX"); 198 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_T, 199 IFM_FDX, sc->mii_inst), 0); 200 PRINT("1000baseTX-FDX"); 201 sc->mii_anegticks = MII_ANEGTICKS_GIGE; 202 } else 203 sc->mii_anegticks = MII_ANEGTICKS; 204 205 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, sc->mii_inst), 0); 206 PRINT("auto"); 207 208 printf("\n"); 209#undef ADD 210#undef PRINT 211 212 MIIBUS_MEDIAINIT(sc->mii_dev); 213 return (0); 214} 215 216static int 217brgphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) 218{ 219 struct brgphy_softc *bsc = (struct brgphy_softc *)sc; 220 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 221 222 switch (cmd) { 223 case MII_POLLSTAT: 224 /* If we're not polling our PHY instance, just return. */ 225 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 226 return (0); 227 break; 228 case MII_MEDIACHG: 229 /* 230 * If the media indicates a different PHY instance, 231 * isolate ourselves. 232 */ 233 if (IFM_INST(ife->ifm_media) != sc->mii_inst) { 234 PHY_WRITE(sc, MII_BMCR, 235 PHY_READ(sc, MII_BMCR) | BMCR_ISO); 236 return (0); 237 } 238 239 /* If the interface is not up, don't do anything. */ 240 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 241 break; 242 243 brgphy_reset(sc); /* XXX hardware bug work-around */ 244 245 switch (IFM_SUBTYPE(ife->ifm_media)) { 246 case IFM_AUTO: 247#ifdef foo 248 /* If we're already in auto mode, just return. */ 249 if (PHY_READ(sc, BRGPHY_MII_BMCR) & BRGPHY_BMCR_AUTOEN) 250 return (0); 251#endif 252 (void)brgphy_mii_phy_auto(sc); 253 break; 254 case IFM_1000_T: 255 case IFM_100_TX: 256 case IFM_10_T: 257 brgphy_setmedia(sc, ife->ifm_media, 258 mii->mii_ifp->if_flags & IFF_LINK0); 259 break; 260#ifdef foo 261 case IFM_NONE: 262 PHY_WRITE(sc, MII_BMCR, BMCR_ISO | BMCR_PDOWN); 263 break; 264#endif 265 case IFM_100_T4: 266 default: 267 return (EINVAL); 268 } 269 break; 270 case MII_TICK: 271 /* If we're not currently selected, just return. */ 272 if (IFM_INST(ife->ifm_media) != sc->mii_inst) 273 return (0); 274 275 /* Is the interface even up? */ 276 if ((mii->mii_ifp->if_flags & IFF_UP) == 0) 277 return (0); 278 279 /* Only used for autonegotiation. */ 280 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) { 281 sc->mii_ticks = 0; /* Reset autoneg timer. */ 282 break; 283 } 284 285 /* 286 * Check to see if we have link. If we do, we don't 287 * need to restart the autonegotiation process. 288 */ 289 if (PHY_READ(sc, BRGPHY_MII_BMSR) & BRGPHY_BMSR_LINK) { 290 sc->mii_ticks = 0; /* Reset autoneg timer. */ 291 break; 292 } 293 294 /* Announce link loss right after it happens. */ 295 if (sc->mii_ticks++ == 0) 296 break; 297 298 /* Only retry autonegotiation every mii_anegticks seconds. */ 299 if (sc->mii_ticks <= sc->mii_anegticks) 300 return (0); 301 302 sc->mii_ticks = 0; 303 (void)brgphy_mii_phy_auto(sc); 304 break; 305 } 306 307 /* Update the media status. */ 308 brgphy_status(sc); 309 310 /* 311 * Callback if something changed. Note that we need to poke 312 * the DSP on the Broadcom PHYs if the media changes. 313 */ 314 if (sc->mii_media_active != mii->mii_media_active || 315 sc->mii_media_status != mii->mii_media_status || 316 cmd == MII_MEDIACHG) { 317 switch (bsc->mii_model) { 318 case MII_MODEL_xxBROADCOM_BCM5400: 319 bcm5401_load_dspcode(sc); 320 break; 321 case MII_MODEL_xxBROADCOM_BCM5401: 322 if (bsc->mii_rev == 1 || bsc->mii_rev == 3) 323 bcm5401_load_dspcode(sc); 324 break; 325 case MII_MODEL_xxBROADCOM_BCM5411: 326 bcm5411_load_dspcode(sc); 327 break; 328 } 329 } 330 mii_phy_update(sc, cmd); 331 return (0); 332} 333 334static void 335brgphy_setmedia(struct mii_softc *sc, int media, int master) 336{ 337 struct brgphy_softc *bsc = (struct brgphy_softc *)sc; 338 int bmcr, gig; 339 340 switch (IFM_SUBTYPE(media)) { 341 case IFM_1000_T: 342 bmcr = BRGPHY_S1000; 343 break; 344 case IFM_100_TX: 345 bmcr = BRGPHY_S100; 346 break; 347 case IFM_10_T: 348 default: 349 bmcr = BRGPHY_S10; 350 break; 351 } 352 if ((media & IFM_GMASK) == IFM_FDX) { 353 bmcr |= BRGPHY_BMCR_FDX; 354 gig = BRGPHY_1000CTL_AFD; 355 } else { 356 gig = BRGPHY_1000CTL_AHD; 357 } 358 359 brgphy_loop(sc); 360 PHY_WRITE(sc, BRGPHY_MII_1000CTL, 0); 361 PHY_WRITE(sc, BRGPHY_MII_BMCR, bmcr); 362 PHY_WRITE(sc, BRGPHY_MII_ANAR, BRGPHY_SEL_TYPE); 363 364 if (IFM_SUBTYPE(media) != IFM_1000_T) 365 return; 366 367 PHY_WRITE(sc, BRGPHY_MII_1000CTL, gig); 368 PHY_WRITE(sc, BRGPHY_MII_BMCR, 369 bmcr | BRGPHY_BMCR_AUTOEN | BRGPHY_BMCR_STARTNEG); 370 371 if (bsc->mii_model != MII_MODEL_xxBROADCOM_BCM5701) 372 return; 373 374 /* 375 * When setting the link manually, one side must be the master and 376 * the other the slave. However ifmedia doesn't give us a good way 377 * to specify this, so we fake it by using one of the LINK flags. 378 * If LINK0 is set, we program the PHY to be a master, otherwise 379 * it's a slave. 380 */ 381 if (master) { 382 PHY_WRITE(sc, BRGPHY_MII_1000CTL, 383 gig | BRGPHY_1000CTL_MSE | BRGPHY_1000CTL_MSC); 384 } else { 385 PHY_WRITE(sc, BRGPHY_MII_1000CTL, 386 gig | BRGPHY_1000CTL_MSE); 387 } 388} 389 390static void 391brgphy_status(struct mii_softc *sc) 392{ 393 struct mii_data *mii = sc->mii_pdata; 394 struct ifmedia_entry *ife = mii->mii_media.ifm_cur; 395 int bmcr, bmsr; 396 397 mii->mii_media_status = IFM_AVALID; 398 mii->mii_media_active = IFM_ETHER; 399 400 bmcr = PHY_READ(sc, BRGPHY_MII_BMCR); 401 bmsr = PHY_READ(sc, BRGPHY_MII_BMSR); 402 403 if (bmsr & BRGPHY_BMSR_LINK) 404 mii->mii_media_status |= IFM_ACTIVE; 405 406 if (bmcr & BRGPHY_BMCR_LOOP) 407 mii->mii_media_active |= IFM_LOOP; 408 409 if (bmcr & BRGPHY_BMCR_AUTOEN) { 410 if ((bmsr & BRGPHY_BMSR_ACOMP) == 0) { 411 /* Erg, still trying, I guess... */ 412 mii->mii_media_active |= IFM_NONE; 413 return; 414 } 415 } 416 417 if (bmsr & BRGPHY_BMSR_LINK) { 418 switch (PHY_READ(sc, BRGPHY_MII_AUXSTS) & 419 BRGPHY_AUXSTS_AN_RES) { 420 case BRGPHY_RES_1000FD: 421 mii->mii_media_active |= IFM_1000_T | IFM_FDX; 422 break; 423 case BRGPHY_RES_1000HD: 424 mii->mii_media_active |= IFM_1000_T | IFM_HDX; 425 break; 426 case BRGPHY_RES_100FD: 427 mii->mii_media_active |= IFM_100_TX | IFM_FDX; 428 break; 429 case BRGPHY_RES_100T4: 430 mii->mii_media_active |= IFM_100_T4; 431 break; 432 case BRGPHY_RES_100HD: 433 mii->mii_media_active |= IFM_100_TX | IFM_HDX; 434 break; 435 case BRGPHY_RES_10FD: 436 mii->mii_media_active |= IFM_10_T | IFM_FDX; 437 break; 438 case BRGPHY_RES_10HD: 439 mii->mii_media_active |= IFM_10_T | IFM_HDX; 440 break; 441 default: 442 mii->mii_media_active |= IFM_NONE; 443 break; 444 } 445 } else 446 mii->mii_media_active = ife->ifm_media; 447} 448 449static int 450brgphy_mii_phy_auto(struct mii_softc *sc) 451{ 452 struct brgphy_softc *bsc = (struct brgphy_softc *)sc; 453 int ktcr = 0; 454 455 brgphy_loop(sc); 456 brgphy_reset(sc); 457 ktcr = BRGPHY_1000CTL_AFD | BRGPHY_1000CTL_AHD; 458 if (bsc->mii_model == MII_MODEL_xxBROADCOM_BCM5701) 459 ktcr |= BRGPHY_1000CTL_MSE | BRGPHY_1000CTL_MSC; 460 PHY_WRITE(sc, BRGPHY_MII_1000CTL, ktcr); 461 ktcr = PHY_READ(sc, BRGPHY_MII_1000CTL); 462 DELAY(1000); 463 PHY_WRITE(sc, BRGPHY_MII_ANAR, 464 BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) | ANAR_CSMA); 465 DELAY(1000); 466 PHY_WRITE(sc, BRGPHY_MII_BMCR, 467 BRGPHY_BMCR_AUTOEN | BRGPHY_BMCR_STARTNEG); 468 PHY_WRITE(sc, BRGPHY_MII_IMR, 0xFF00); 469 return (EJUSTRETURN); 470} 471 472static void 473brgphy_loop(struct mii_softc *sc) 474{ 475 int i; 476 477 PHY_WRITE(sc, BRGPHY_MII_BMCR, BRGPHY_BMCR_LOOP); 478 for (i = 0; i < 15000; i++) { 479 if (!(PHY_READ(sc, BRGPHY_MII_BMSR) & BRGPHY_BMSR_LINK)) { 480#if 0 481 device_printf(sc->mii_dev, "looped %d\n", i); 482#endif 483 break; 484 } 485 DELAY(10); 486 } 487} 488 489/* Turn off tap power management on 5401. */ 490static void 491bcm5401_load_dspcode(struct mii_softc *sc) 492{ 493 static const struct { 494 int reg; 495 uint16_t val; 496 } dspcode[] = { 497 { BRGPHY_MII_AUXCTL, 0x0c20 }, 498 { BRGPHY_MII_DSP_ADDR_REG, 0x0012 }, 499 { BRGPHY_MII_DSP_RW_PORT, 0x1804 }, 500 { BRGPHY_MII_DSP_ADDR_REG, 0x0013 }, 501 { BRGPHY_MII_DSP_RW_PORT, 0x1204 }, 502 { BRGPHY_MII_DSP_ADDR_REG, 0x8006 }, 503 { BRGPHY_MII_DSP_RW_PORT, 0x0132 }, 504 { BRGPHY_MII_DSP_ADDR_REG, 0x8006 }, 505 { BRGPHY_MII_DSP_RW_PORT, 0x0232 }, 506 { BRGPHY_MII_DSP_ADDR_REG, 0x201f }, 507 { BRGPHY_MII_DSP_RW_PORT, 0x0a20 }, 508 { 0, 0 }, 509 }; 510 int i; 511 512 for (i = 0; dspcode[i].reg != 0; i++) 513 PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val); 514 DELAY(40); 515} 516 517static void 518bcm5411_load_dspcode(struct mii_softc *sc) 519{ 520 static const struct { 521 int reg; 522 uint16_t val; 523 } dspcode[] = { 524 { 0x1c, 0x8c23 }, 525 { 0x1c, 0x8ca3 }, 526 { 0x1c, 0x8c23 }, 527 { 0, 0 }, 528 }; 529 int i; 530 531 for (i = 0; dspcode[i].reg != 0; i++) 532 PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val); 533} 534 535static void 536brgphy_fixup_adc_bug(struct mii_softc *sc) 537{ 538 static const struct { 539 int reg; 540 uint16_t val; 541 } dspcode[] = { 542 { BRGPHY_MII_AUXCTL, 0x0c00 }, 543 { BRGPHY_MII_DSP_ADDR_REG, 0x201f }, 544 { BRGPHY_MII_DSP_RW_PORT, 0x2aaa }, 545 { 0, 0 }, 546 }; 547 int i; 548 549 for (i = 0; dspcode[i].reg != 0; i++) 550 PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val); 551} 552 553static void 554brgphy_fixup_5704_a0_bug(struct mii_softc *sc) 555{ 556 static const struct { 557 int reg; 558 u_int16_t val; 559 } dspcode[] = { 560 { 0x1c, 0x8d68 }, 561 { 0x1c, 0x8d68 }, 562 { 0, 0 }, 563 }; 564 int i; 565 566 for (i = 0; dspcode[i].reg != 0; i++) 567 PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val); 568} 569 570static void 571brgphy_fixup_ber_bug(struct mii_softc *sc) 572{ 573 static const struct { 574 int reg; 575 u_int16_t val; 576 } dspcode[] = { 577 { BRGPHY_MII_AUXCTL, 0x0c00 }, 578 { BRGPHY_MII_DSP_ADDR_REG, 0x000a }, 579 { BRGPHY_MII_DSP_RW_PORT, 0x310b }, 580 { BRGPHY_MII_DSP_ADDR_REG, 0x201f }, 581 { BRGPHY_MII_DSP_RW_PORT, 0x9506 }, 582 { BRGPHY_MII_DSP_ADDR_REG, 0x401f }, 583 { BRGPHY_MII_DSP_RW_PORT, 0x14e2 }, 584 { BRGPHY_MII_AUXCTL, 0x0400 }, 585 { 0, 0 }, 586 }; 587 int i; 588 589 for (i = 0; dspcode[i].reg != 0; i++) 590 PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val); 591} 592 593static void 594brgphy_fixup_jitter_bug(struct mii_softc *sc) 595{ 596 static const struct { 597 int reg; 598 uint16_t val; 599 } dspcode[] = { 600 { BRGPHY_MII_AUXCTL, 0x0c00 }, 601 { BRGPHY_MII_DSP_ADDR_REG, 0x000a }, 602 { BRGPHY_MII_DSP_RW_PORT, 0x010b }, 603 { BRGPHY_MII_AUXCTL, 0x0400 }, 604 { 0, 0 }, 605 }; 606 int i; 607 608 for (i = 0; dspcode[i].reg != 0; i++) 609 PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val); 610} 611 612static void 613brgphy_ethernet_wirespeed(struct mii_softc *sc) 614{ 615 u_int32_t val; 616 617 /* Enable Ethernet@WireSpeed. */ 618 PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x7007); 619 val = PHY_READ(sc, BRGPHY_MII_AUXCTL); 620 PHY_WRITE(sc, BRGPHY_MII_AUXCTL, val | (1 << 15) | (1 << 4)); 621} 622 623static void 624brgphy_jumbo_settings(struct mii_softc *sc, u_long mtu) 625{ 626 struct brgphy_softc *bsc = (struct brgphy_softc *)sc; 627 u_int32_t val; 628 629 /* Set or clear jumbo frame settings in the PHY. */ 630 if (mtu > ETHER_MAX_LEN) { 631 if (bsc->mii_model == MII_MODEL_xxBROADCOM_BCM5401) 632 PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x4c20); 633 else { 634 PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x7); 635 val = PHY_READ(sc, BRGPHY_MII_AUXCTL); 636 PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 637 val | BRGPHY_AUXCTL_LONG_PKT); 638 } 639 640 val = PHY_READ(sc, BRGPHY_MII_PHY_EXTCTL); 641 PHY_WRITE(sc, BRGPHY_MII_PHY_EXTCTL, 642 val | BRGPHY_PHY_EXTCTL_HIGH_LA); 643 } else { 644 PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 0x7); 645 val = PHY_READ(sc, BRGPHY_MII_AUXCTL); 646 PHY_WRITE(sc, BRGPHY_MII_AUXCTL, 647 val & ~(BRGPHY_AUXCTL_LONG_PKT | 0x7)); 648 649 val = PHY_READ(sc, BRGPHY_MII_PHY_EXTCTL); 650 PHY_WRITE(sc, BRGPHY_MII_PHY_EXTCTL, 651 val & ~BRGPHY_PHY_EXTCTL_HIGH_LA); 652 } 653} 654 655static void 656brgphy_reset(struct mii_softc *sc) 657{ 658 struct brgphy_softc *bsc = (struct brgphy_softc *)sc; 659 struct bge_softc *bge_sc = NULL; 660 struct bce_softc *bce_sc = NULL; 661 struct ifnet *ifp; 662 663 mii_phy_reset(sc); 664 665 switch (bsc->mii_model) { 666 case MII_MODEL_xxBROADCOM_BCM5400: 667 bcm5401_load_dspcode(sc); 668 break; 669 case MII_MODEL_xxBROADCOM_BCM5401: 670 if (bsc->mii_rev == 1 || bsc->mii_rev == 3) 671 bcm5401_load_dspcode(sc); 672 break; 673 case MII_MODEL_xxBROADCOM_BCM5411: 674 bcm5411_load_dspcode(sc); 675 break; 676 } 677 678 ifp = sc->mii_pdata->mii_ifp; 679 680 /* Find the driver associated with this PHY. */ 681 if (strcmp(ifp->if_dname, "bge") == 0) { 682 bge_sc = ifp->if_softc; 683 } else if (strcmp(ifp->if_dname, "bce") == 0) { 684 bce_sc = ifp->if_softc; 685 } 686 687 /* Handle any NetXtreme/bge workarounds. */ 688 if (bge_sc) { 689 /* Fix up various bugs */ 690 if (bge_sc->bge_flags & BGE_FLAG_ADC_BUG) 691 brgphy_fixup_adc_bug(sc); 692 if (bge_sc->bge_flags & BGE_FLAG_5704_A0_BUG) 693 brgphy_fixup_5704_a0_bug(sc); 694 if (bge_sc->bge_flags & BGE_FLAG_BER_BUG) 695 brgphy_fixup_ber_bug(sc); 696 if (bge_sc->bge_flags & BGE_FLAG_JITTER_BUG) 697 brgphy_fixup_jitter_bug(sc); 698 699 brgphy_jumbo_settings(sc, ifp->if_mtu); 700 701 /* 702 * Don't enable Ethernet@WireSpeed for the 5700 or the 703 * 5705 A1 and A2 chips. 704 */ 705 if (bge_sc->bge_asicrev != BGE_ASICREV_BCM5700 && 706 bge_sc->bge_chipid != BGE_CHIPID_BCM5705_A1 && 707 bge_sc->bge_chipid != BGE_CHIPID_BCM5705_A2) 708 brgphy_ethernet_wirespeed(sc); 709 710 /* Enable Link LED on Dell boxes */ 711 if (bge_sc->bge_flags & BGE_FLAG_NO_3LED) { 712 PHY_WRITE(sc, BRGPHY_MII_PHY_EXTCTL, 713 PHY_READ(sc, BRGPHY_MII_PHY_EXTCTL) & 714 ~BRGPHY_PHY_EXTCTL_3_LED); 715 } 716 } else if (bce_sc) { 717 brgphy_fixup_ber_bug(sc); 718 brgphy_jumbo_settings(sc, ifp->if_mtu); 719 brgphy_ethernet_wirespeed(sc); 720 } 721} 722