atphy.c revision 183567 
1/*-
2 * Copyright (c) 2008, Pyun YongHyeon <yongari@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice unmodified, this list of conditions, and the following
10 *    disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27
28#include <sys/cdefs.h>
29__FBSDID("$FreeBSD: head/sys/dev/mii/atphy.c 183567 2008-10-03 10:31:31Z stas $");
30
31/*
32 * Driver for the Attansic/Atheros F1 10/100/1000 PHY.
33 */
34
35#include <sys/param.h>
36#include <sys/systm.h>
37#include <sys/kernel.h>
38#include <sys/module.h>
39#include <sys/socket.h>
40#include <sys/bus.h>
41
42#include <net/if.h>
43#include <net/if_media.h>
44
45#include <dev/mii/mii.h>
46#include <dev/mii/miivar.h>
47#include "miidevs.h"
48
49#include <dev/mii/atphyreg.h>
50
51#include "miibus_if.h"
52
53static int atphy_probe(device_t);
54static int atphy_attach(device_t);
55
56struct atphy_softc {
57	struct mii_softc mii_sc;
58	int mii_oui;
59	int mii_model;
60	int mii_rev;
61};
62
63static device_method_t atphy_methods[] = {
64	/* Device interface. */
65	DEVMETHOD(device_probe,		atphy_probe),
66	DEVMETHOD(device_attach,	atphy_attach),
67	DEVMETHOD(device_detach,	mii_phy_detach),
68	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
69	{ NULL, NULL }
70};
71
72static devclass_t atphy_devclass;
73static driver_t atphy_driver = {
74	"atphy",
75	atphy_methods,
76	sizeof(struct atphy_softc)
77};
78
79DRIVER_MODULE(atphy, miibus, atphy_driver, atphy_devclass, 0, 0);
80
81static int	atphy_service(struct mii_softc *, struct mii_data *, int);
82static void	atphy_status(struct mii_softc *);
83static void	atphy_reset(struct mii_softc *);
84static uint16_t	atphy_anar(struct ifmedia_entry *);
85static int	atphy_auto(struct mii_softc *);
86
87static const struct mii_phydesc atphys[] = {
88	MII_PHY_DESC(ATHEROS, F1),
89	MII_PHY_DESC(ATHEROS, F2),
90	MII_PHY_END
91};
92
93static int
94atphy_probe(device_t dev)
95{
96
97	return (mii_phy_dev_probe(dev, atphys, BUS_PROBE_DEFAULT));
98}
99
100static int
101atphy_attach(device_t dev)
102{
103	struct atphy_softc *asc;
104	struct mii_softc *sc;
105	struct mii_attach_args *ma;
106	struct mii_data *mii;
107
108	asc = device_get_softc(dev);
109	sc = &asc->mii_sc;
110	ma = device_get_ivars(dev);
111	sc->mii_dev = device_get_parent(dev);
112	mii = device_get_softc(sc->mii_dev);
113	LIST_INSERT_HEAD(&mii->mii_phys, sc, mii_list);
114
115	sc->mii_inst = mii->mii_instance;
116	sc->mii_phy = ma->mii_phyno;
117	sc->mii_service = atphy_service;
118	sc->mii_pdata = mii;
119	sc->mii_anegticks = MII_ANEGTICKS_GIGE;
120
121	mii->mii_instance++;
122
123	asc->mii_oui = MII_OUI(ma->mii_id1, ma->mii_id2);
124	asc->mii_model = MII_MODEL(ma->mii_id2);
125	asc->mii_rev = MII_REV(ma->mii_id2);
126	if (bootverbose)
127		device_printf(dev, "OUI 0x%06x, model 0x%04x, rev. %d\n",
128		    asc->mii_oui, asc->mii_model, asc->mii_rev);
129
130	atphy_reset(sc);
131
132	sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
133	if (sc->mii_capabilities & BMSR_EXTSTAT)
134		sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR);
135	device_printf(dev, " ");
136	mii_phy_add_media(sc);
137	printf("\n");
138
139	MIIBUS_MEDIAINIT(sc->mii_dev);
140	return(0);
141}
142
143static int
144atphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
145{
146	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
147	uint16_t anar, bmcr, bmsr;
148
149	switch (cmd) {
150	case MII_POLLSTAT:
151		/*
152		 * If we're not polling our PHY instance, just return.
153		 */
154		if (IFM_INST(ife->ifm_media) != sc->mii_inst)
155			return (0);
156		break;
157
158	case MII_MEDIACHG:
159		/*
160		 * If the media indicates a different PHY instance,
161		 * isolate ourselves.
162		 */
163		if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
164			bmcr = PHY_READ(sc, MII_BMCR);
165			PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_ISO);
166			return (0);
167		}
168
169		/*
170		 * If the interface is not up, don't do anything.
171		 */
172		if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
173			break;
174
175		if (IFM_SUBTYPE(ife->ifm_media) == IFM_AUTO ||
176		    IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T) {
177			atphy_auto(sc);
178			break;
179		}
180
181		bmcr = 0;
182		switch (IFM_SUBTYPE(ife->ifm_media)) {
183		case IFM_100_TX:
184			bmcr = BMCR_S100;
185			break;
186		case IFM_10_T:
187			bmcr = BMCR_S10;
188			break;
189		case IFM_NONE:
190			bmcr = PHY_READ(sc, MII_BMCR);
191			/*
192			 * XXX
193			 * Due to an unknown reason powering down PHY resulted
194			 * in unexpected results such as inaccessbility of
195			 * hardware of freshly rebooted system. Disable
196			 * powering down PHY until I got more information for
197			 * Attansic/Atheros PHY hardwares.
198			 */
199			PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_ISO);
200			goto done;
201		default:
202			return (EINVAL);
203		}
204
205		anar = atphy_anar(ife);
206		if (((ife->ifm_media & IFM_GMASK) & IFM_FDX) != 0) {
207			bmcr |= BMCR_FDX;
208			/* Enable pause. */
209			anar |= (3 << 10);
210		}
211
212		if ((sc->mii_extcapabilities & (EXTSR_1000TFDX |
213		    EXTSR_1000THDX)) != 0)
214			PHY_WRITE(sc, MII_100T2CR, 0);
215		PHY_WRITE(sc, MII_ANAR, anar | ANAR_CSMA);
216
217		/*
218		 * Reset the PHY so all changes take effect.
219		 */
220		PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_RESET);
221done:
222		break;
223
224	case MII_TICK:
225		/*
226		 * If we're not currently selected, just return.
227		 */
228		if (IFM_INST(ife->ifm_media) != sc->mii_inst)
229			return (0);
230
231		/*
232		 * Is the interface even up?
233		 */
234		if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
235			return (0);
236
237		/*
238		 * Only used for autonegotiation.
239		 */
240		if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) {
241			sc->mii_ticks = 0;
242			break;
243		}
244
245		/*
246		 * check for link.
247		 * Read the status register twice; BMSR_LINK is latch-low.
248		 */
249		bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
250		if (bmsr & BMSR_LINK) {
251			sc->mii_ticks = 0;
252			break;
253		}
254
255		/* Announce link loss right after it happens. */
256		if (sc->mii_ticks++ == 0)
257			break;
258		if (sc->mii_ticks <= sc->mii_anegticks)
259			return (0);
260
261		sc->mii_ticks = 0;
262		atphy_auto(sc);
263		break;
264	}
265
266	/* Update the media status. */
267	atphy_status(sc);
268
269	/* Callback if something changed. */
270	mii_phy_update(sc, cmd);
271	return (0);
272}
273
274static void
275atphy_status(struct mii_softc *sc)
276{
277	struct mii_data *mii = sc->mii_pdata;
278	uint32_t bmsr, bmcr, ssr;
279
280	mii->mii_media_status = IFM_AVALID;
281	mii->mii_media_active = IFM_ETHER;
282
283	bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
284	if ((bmsr & BMSR_LINK) != 0)
285		mii->mii_media_status |= IFM_ACTIVE;
286
287	bmcr = PHY_READ(sc, MII_BMCR);
288	if ((bmcr & BMCR_ISO) != 0) {
289		mii->mii_media_active |= IFM_NONE;
290		mii->mii_media_status = 0;
291		return;
292	}
293
294	if ((bmcr & BMCR_LOOP) != 0)
295		mii->mii_media_active |= IFM_LOOP;
296
297	ssr = PHY_READ(sc, ATPHY_SSR);
298	if ((ssr & ATPHY_SSR_SPD_DPLX_RESOLVED) == 0) {
299		/* Erg, still trying, I guess... */
300		mii->mii_media_active |= IFM_NONE;
301		return;
302	}
303
304	switch (ssr & ATPHY_SSR_SPEED_MASK) {
305	case ATPHY_SSR_1000MBS:
306		mii->mii_media_active |= IFM_1000_T;
307		/*
308		 * atphy(4) got a valid link so reset mii_ticks.
309		 * Resetting mii_ticks is needed in order to
310		 * detect link loss after auto-negotiation.
311		 */
312		sc->mii_ticks = 0;
313		break;
314	case ATPHY_SSR_100MBS:
315		mii->mii_media_active |= IFM_100_TX;
316		sc->mii_ticks = 0;
317		break;
318	case ATPHY_SSR_10MBS:
319		mii->mii_media_active |= IFM_10_T;
320		sc->mii_ticks = 0;
321		break;
322	default:
323		mii->mii_media_active |= IFM_NONE;
324		return;
325	}
326
327	if ((ssr & ATPHY_SSR_DUPLEX) != 0)
328		mii->mii_media_active |= IFM_FDX;
329	else
330		mii->mii_media_active |= IFM_HDX;
331
332	/* XXX Master/Slave, Flow-control */
333}
334
335static void
336atphy_reset(struct mii_softc *sc)
337{
338	struct atphy_softc *asc;
339	uint32_t reg;
340	int i;
341
342	asc = (struct atphy_softc *)sc;
343
344	/* Take PHY out of power down mode. */
345	PHY_WRITE(sc, 29, 0x29);
346	PHY_WRITE(sc, 30, 0);
347
348	reg = PHY_READ(sc, ATPHY_SCR);
349	/* Enable automatic crossover. */
350	reg |= ATPHY_SCR_AUTO_X_MODE;
351	/* Disable power down. */
352	reg &= ~ATPHY_SCR_MAC_PDOWN;
353	/* Enable CRS on Tx. */
354	reg |= ATPHY_SCR_ASSERT_CRS_ON_TX;
355	/* Auto correction for reversed cable polarity. */
356	reg |= ATPHY_SCR_POLARITY_REVERSAL;
357	PHY_WRITE(sc, ATPHY_SCR, reg);
358
359	/* Workaround F1 bug to reset phy. */
360	atphy_auto(sc);
361
362	for (i = 0; i < 1000; i++) {
363		DELAY(1);
364		if ((PHY_READ(sc, MII_BMCR) & BMCR_RESET) == 0)
365			break;
366	}
367}
368
369static uint16_t
370atphy_anar(struct ifmedia_entry *ife)
371{
372	uint16_t anar;
373
374	anar = 0;
375	switch (IFM_SUBTYPE(ife->ifm_media)) {
376	case IFM_AUTO:
377		anar |= ANAR_TX_FD | ANAR_TX | ANAR_10_FD | ANAR_10;
378		return (anar);
379	case IFM_1000_T:
380		return (anar);
381	case IFM_100_TX:
382		anar |= ANAR_TX;
383		break;
384	case IFM_10_T:
385		anar |= ANAR_10;
386		break;
387	default:
388		return (0);
389	}
390
391	if (((ife->ifm_media & IFM_GMASK) & IFM_FDX) != 0) {
392		if (IFM_SUBTYPE(ife->ifm_media) == IFM_100_TX)
393			anar |= ANAR_TX_FD;
394		else
395			anar |= ANAR_10_FD;
396	}
397
398	return (anar);
399}
400
401static int
402atphy_auto(struct mii_softc *sc)
403{
404	uint16_t anar;
405
406	anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities);
407	PHY_WRITE(sc, MII_ANAR, anar | (3 << 10) | ANAR_CSMA);
408	if ((sc->mii_extcapabilities & (EXTSR_1000TFDX | EXTSR_1000THDX)) != 0)
409		PHY_WRITE(sc, MII_100T2CR, GTCR_ADV_1000TFDX |
410		    GTCR_ADV_1000THDX);
411	PHY_WRITE(sc, MII_BMCR, BMCR_RESET | BMCR_AUTOEN | BMCR_STARTNEG);
412
413	return (EJUSTRETURN);
414}
415