1230557Sjimharris/*- 2230557Sjimharris * This file is provided under a dual BSD/GPLv2 license. When using or 3230557Sjimharris * redistributing this file, you may do so under either license. 4230557Sjimharris * 5230557Sjimharris * GPL LICENSE SUMMARY 6230557Sjimharris * 7230557Sjimharris * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. 8230557Sjimharris * 9230557Sjimharris * This program is free software; you can redistribute it and/or modify 10230557Sjimharris * it under the terms of version 2 of the GNU General Public License as 11230557Sjimharris * published by the Free Software Foundation. 12230557Sjimharris * 13230557Sjimharris * This program is distributed in the hope that it will be useful, but 14230557Sjimharris * WITHOUT ANY WARRANTY; without even the implied warranty of 15230557Sjimharris * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 16230557Sjimharris * General Public License for more details. 17230557Sjimharris * 18230557Sjimharris * You should have received a copy of the GNU General Public License 19230557Sjimharris * along with this program; if not, write to the Free Software 20230557Sjimharris * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 21230557Sjimharris * The full GNU General Public License is included in this distribution 22230557Sjimharris * in the file called LICENSE.GPL. 23230557Sjimharris * 24230557Sjimharris * BSD LICENSE 25230557Sjimharris * 26230557Sjimharris * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. 27230557Sjimharris * All rights reserved. 28230557Sjimharris * 29230557Sjimharris * Redistribution and use in source and binary forms, with or without 30230557Sjimharris * modification, are permitted provided that the following conditions 31230557Sjimharris * are met: 32230557Sjimharris * 33230557Sjimharris * * Redistributions of source code must retain the above copyright 34230557Sjimharris * notice, this list of conditions and the following disclaimer. 35230557Sjimharris * * Redistributions in binary form must reproduce the above copyright 36230557Sjimharris * notice, this list of conditions and the following disclaimer in 37230557Sjimharris * the documentation and/or other materials provided with the 38230557Sjimharris * distribution. 39230557Sjimharris * 40230557Sjimharris * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 41230557Sjimharris * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 42230557Sjimharris * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 43230557Sjimharris * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 44230557Sjimharris * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 45230557Sjimharris * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 46230557Sjimharris * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 47230557Sjimharris * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 48230557Sjimharris * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 49230557Sjimharris * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 50230557Sjimharris * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 51230557Sjimharris * 52230557Sjimharris * $FreeBSD$ 53230557Sjimharris */ 54230557Sjimharris#ifndef _SCIC_OVERVIEW_H_ 55230557Sjimharris#define _SCIC_OVERVIEW_H_ 56230557Sjimharris 57230557Sjimharris/** 58230557Sjimharris 59230557Sjimharris@page core_section SCI Core 60230557Sjimharris 61230557Sjimharris@section scic_introduction_section Introduction 62230557Sjimharris 63230557SjimharrisThe Storage Controller Interface Core (SCIC) provides the underlying fundamental 64230557Sjimharrishardware abstractions required to implement a standard SAS/SATA storage driver. 65230557Sjimharris 66230557SjimharrisThe following is a list of features that may be found in a core implementation: 67230557Sjimharris-# hardware interrupt handling 68230557Sjimharris-# hardware event handling 69230557Sjimharris-# hardware state machine handling 70230557Sjimharris-# IO and task management state machine handling 71230557Sjimharris-# Phy staggered spin up 72230557Sjimharris 73230557Sjimharris@image latex sci_core.eps "SCI Core Class Diagram" width=16cm 74230557Sjimharris 75230557Sjimharris@note 76230557SjimharrisFor the SCU Driver Standard implementation of the SCI Core interface the 77230557Sjimharrisfollowing definitions should be used to augment the cardinalities described 78230557Sjimharrisin the previous diagram: 79230557Sjimharris-# There are exactly 4 scic_phy objects in the scic_controller. 80230557Sjimharris-# There are exactly 4 scic_port objects in the scic_controller. 81230557Sjimharris-# There can be a maximum of 4 scic_phy objects managed in a single scic_port. 82230557Sjimharris-# The maximum number of supported controllers in a library is a truly flexible 83230557Sjimharris value, but the likely maximum number is 4. 84230557Sjimharris 85230557Sjimharris*/ 86230557Sjimharris 87230557Sjimharris#endif // _SCIC_OVERVIEW_H_ 88230557Sjimharris 89