1139749Simp#- 238774Snsouch# Copyright (c) 1998 Nicolas Souchu 338774Snsouch# All rights reserved. 438774Snsouch# 538774Snsouch# Redistribution and use in source and binary forms, with or without 638774Snsouch# modification, are permitted provided that the following conditions 738774Snsouch# are met: 838774Snsouch# 1. Redistributions of source code must retain the above copyright 938774Snsouch# notice, this list of conditions and the following disclaimer. 1038774Snsouch# 2. Redistributions in binary form must reproduce the above copyright 1138774Snsouch# notice, this list of conditions and the following disclaimer in the 1238774Snsouch# documentation and/or other materials provided with the distribution. 1338774Snsouch# 1438774Snsouch# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 1538774Snsouch# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 1638774Snsouch# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 1738774Snsouch# ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 1838774Snsouch# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 1938774Snsouch# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2038774Snsouch# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2138774Snsouch# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2238774Snsouch# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2338774Snsouch# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 2438774Snsouch# SUCH DAMAGE. 2538774Snsouch# 2650477Speter# $FreeBSD$ 2738774Snsouch# 2838774Snsouch 2959093Sdfr#include <sys/bus.h> 30160372Simp#include <dev/iicbus/iic.h> 3159093Sdfr 3241012SnsouchINTERFACE iicbus; 3338774Snsouch 3438774Snsouch# 3540782Snsouch# Interpret interrupt 3638774Snsouch# 3738774SnsouchMETHOD int intr { 3838774Snsouch device_t dev; 3938774Snsouch int event; 4038774Snsouch char *buf; 4138774Snsouch}; 4238774Snsouch 4338774Snsouch# 4440782Snsouch# iicbus callback 4540782Snsouch# 4640782SnsouchMETHOD int callback { 4740782Snsouch device_t dev; 4840782Snsouch int index; 4940782Snsouch caddr_t data; 5040782Snsouch}; 5140782Snsouch 5240782Snsouch# 5338774Snsouch# Send REPEATED_START condition 5438774Snsouch# 5538774SnsouchMETHOD int repeated_start { 5638774Snsouch device_t dev; 5738774Snsouch u_char slave; 5840782Snsouch int timeout; 5938774Snsouch}; 6038774Snsouch 6138774Snsouch# 6238774Snsouch# Send START condition 6338774Snsouch# 6438774SnsouchMETHOD int start { 6538774Snsouch device_t dev; 6638774Snsouch u_char slave; 6740782Snsouch int timeout; 6838774Snsouch}; 6938774Snsouch 7038774Snsouch# 7138774Snsouch# Send STOP condition 7238774Snsouch# 7338774SnsouchMETHOD int stop { 7438774Snsouch device_t dev; 7538774Snsouch}; 7638774Snsouch 7738774Snsouch# 7838774Snsouch# Read from I2C bus 7938774Snsouch# 8038774SnsouchMETHOD int read { 8138774Snsouch device_t dev; 8238774Snsouch char *buf; 8338774Snsouch int len; 8438774Snsouch int *bytes; 8540782Snsouch int last; 8640782Snsouch int delay; 8738774Snsouch}; 8838774Snsouch 8938774Snsouch# 9038774Snsouch# Write to the I2C bus 9138774Snsouch# 9238774SnsouchMETHOD int write { 9338774Snsouch device_t dev; 94164901Simp const char *buf; 9538774Snsouch int len; 9638774Snsouch int *bytes; 9740782Snsouch int timeout; 9838774Snsouch}; 9938774Snsouch 10038774Snsouch# 10138774Snsouch# Reset I2C bus 10238774Snsouch# 10338774SnsouchMETHOD int reset { 10438774Snsouch device_t dev; 10538774Snsouch u_char speed; 10640782Snsouch u_char addr; 10740782Snsouch u_char *oldaddr; 10838774Snsouch}; 109160372Simp 110160372Simp# 111160372Simp# Generalized Read/Write interface 112160372Simp# 113160372SimpMETHOD int transfer { 114160372Simp device_t dev; 115160372Simp struct iic_msg *msgs; 116160372Simp uint32_t nmsgs; 117160372Simp}; 118