if_fe_cbus.c revision 67442
175592Sru/* 275592Sru * All Rights Reserved, Copyright (C) Fujitsu Limited 1995 375592Sru * 475592Sru * This software may be used, modified, copied, distributed, and sold, in 575592Sru * both source and binary form provided that the above copyright, these 675592Sru * terms and the following disclaimer are retained. The name of the author 7 * and/or the contributor may not be used to endorse or promote products 8 * derived from this software without specific prior written permission. 9 * 10 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND THE CONTRIBUTOR ``AS IS'' AND 11 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 12 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 13 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR THE CONTRIBUTOR BE LIABLE 14 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 15 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 16 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION. 17 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 18 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 19 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 20 * SUCH DAMAGE. 21 * 22 * $FreeBSD: head/sys/dev/fe/if_fe_cbus.c 67442 2000-10-22 16:48:08Z nyan $ 23 */ 24 25#include "opt_fe.h" 26#include "opt_inet.h" 27#include "opt_ipx.h" 28 29#include <sys/param.h> 30#include <sys/systm.h> 31#include <sys/kernel.h> 32#include <sys/socket.h> 33#include <sys/module.h> 34 35#include <sys/bus.h> 36#include <machine/bus.h> 37#include <sys/rman.h> 38#include <machine/resource.h> 39 40#include <net/ethernet.h> 41#include <net/if.h> 42#include <net/if_mib.h> 43#include <net/if_media.h> 44 45#include <netinet/in.h> 46#include <netinet/if_ether.h> 47 48#include <i386/isa/ic/mb86960.h> 49#include <dev/fe/if_fereg.h> 50#include <dev/fe/if_fevar.h> 51 52#include <isa/isavar.h> 53 54/* 55 * Cbus specific code. 56 */ 57static int fe_isa_probe(device_t); 58static int fe_isa_attach(device_t); 59 60static device_method_t fe_isa_methods[] = { 61 /* Device interface */ 62 DEVMETHOD(device_probe, fe_isa_probe), 63 DEVMETHOD(device_attach, fe_isa_attach), 64 65 { 0, 0 } 66}; 67 68static driver_t fe_isa_driver = { 69 "fe", 70 fe_isa_methods, 71 sizeof (struct fe_softc) 72}; 73 74DRIVER_MODULE(fe, isa, fe_isa_driver, fe_devclass, 0, 0); 75 76 77static int fe98_alloc_port(device_t, int); 78 79static int fe_probe_re1000(device_t); 80static int fe_probe_cnet9ne(device_t); 81static int fe_probe_rex(device_t); 82static int fe_probe_ssi(device_t); 83static int fe_probe_jli(device_t); 84static int fe_probe_lnx(device_t); 85static int fe_probe_gwy(device_t); 86static int fe_probe_ubn(device_t); 87 88/* 89 * Determine if the device is present at a specified I/O address. The 90 * main entry to the driver. 91 */ 92 93static int 94fe_isa_probe(device_t dev) 95{ 96 struct fe_softc * sc; 97 int error; 98 99 /* Prepare for the softc struct. */ 100 sc = device_get_softc(dev); 101 sc->sc_unit = device_get_unit(dev); 102 103 /* Probe for supported boards. */ 104#ifdef PC98 105 if ((error = fe_probe_re1000(dev)) == 0) 106 goto end; 107 fe_release_resource(dev); 108 109 if ((error = fe_probe_cnet9ne(dev)) == 0) 110 goto end; 111 fe_release_resource(dev); 112 113 if ((error = fe_probe_rex(dev)) == 0) 114 goto end; 115 fe_release_resource(dev); 116#endif 117 118 if ((error = fe_probe_ssi(dev)) == 0) 119 goto end; 120 fe_release_resource(dev); 121 122 if ((error = fe_probe_jli(dev)) == 0) 123 goto end; 124 fe_release_resource(dev); 125 126 if ((error = fe_probe_lnx(dev)) == 0) 127 goto end; 128 fe_release_resource(dev); 129 130 if ((error = fe_probe_ubn(dev)) == 0) 131 goto end; 132 fe_release_resource(dev); 133 134 if ((error = fe_probe_gwy(dev)) == 0) 135 goto end; 136 fe_release_resource(dev); 137 138end: 139 if (error == 0) 140 error = fe_alloc_irq(dev, 0); 141 142 fe_release_resource(dev); 143 return (error); 144} 145 146static int 147fe_isa_attach(device_t dev) 148{ 149 struct fe_softc *sc = device_get_softc(dev); 150 151 if (sc->port_used) 152 fe98_alloc_port(dev, sc->type); 153 fe_alloc_irq(dev, 0); 154 155 return fe_attach(dev); 156} 157 158 159/* Generic I/O address table */ 160static bus_addr_t ioaddr_generic[MAXREGISTERS] = { 161 0x000, 0x001, 0x002, 0x003, 0x004, 0x005, 0x006, 0x007, 162 0x008, 0x009, 0x00a, 0x00b, 0x00c, 0x00d, 0x00e, 0x00f, 163 0x010, 0x011, 0x012, 0x013, 0x014, 0x015, 0x016, 0x017, 164 0x018, 0x019, 0x01a, 0x01b, 0x01c, 0x01d, 0x01e, 0x01f, 165}; 166 167/* I/O address table for RE1000/1000Plus */ 168static bus_addr_t ioaddr_re1000[MAXREGISTERS] = { 169 0x0000, 0x0001, 0x0200, 0x0201, 0x0400, 0x0401, 0x0600, 0x0601, 170 0x0800, 0x0801, 0x0a00, 0x0a01, 0x0c00, 0x0c01, 0x0e00, 0x0e01, 171 0x1000, 0x1200, 0x1400, 0x1600, 0x1800, 0x1a00, 0x1c00, 0x1e00, 172 0x1001, 0x1201, 0x1401, 0x1601, 0x1801, 0x1a01, 0x1c01, 0x1e01, 173}; 174 175/* I/O address table for CNET9NE */ 176static bus_addr_t ioaddr_cnet9ne[MAXREGISTERS] = { 177 0x000, 0x001, 0x002, 0x003, 0x004, 0x005, 0x006, 0x007, 178 0x008, 0x009, 0x00a, 0x00b, 0x00c, 0x00d, 0x00e, 0x00f, 179 0x400, 0x402, 0x404, 0x406, 0x408, 0x40a, 0x40c, 0x40e, 180 0x401, 0x403, 0x405, 0x407, 0x409, 0x40b, 0x40d, 0x40f, 181}; 182 183/* I/O address table for LAC-98 */ 184static bus_addr_t ioaddr_lnx[MAXREGISTERS] = { 185 0x000, 0x002, 0x004, 0x006, 0x008, 0x00a, 0x00c, 0x00e, 186 0x100, 0x102, 0x104, 0x106, 0x108, 0x10a, 0x10c, 0x10e, 187 0x200, 0x202, 0x204, 0x206, 0x208, 0x20a, 0x20c, 0x20e, 188 0x300, 0x302, 0x304, 0x306, 0x308, 0x30a, 0x30c, 0x30e, 189}; 190 191/* I/O address table for Access/PC N98C+ */ 192static bus_addr_t ioaddr_ubn[MAXREGISTERS] = { 193 0x000, 0x001, 0x002, 0x003, 0x004, 0x005, 0x006, 0x007, 194 0x008, 0x009, 0x00a, 0x00b, 0x00c, 0x00d, 0x00e, 0x00f, 195 0x200, 0x201, 0x202, 0x203, 0x204, 0x205, 0x206, 0x207, 196 0x208, 0x209, 0x20a, 0x20b, 0x20c, 0x20d, 0x20e, 0x20f, 197}; 198 199/* I/O address table for REX-9880 */ 200static bus_addr_t ioaddr_rex[MAXREGISTERS] = { 201 0x000, 0x001, 0x002, 0x003, 0x004, 0x005, 0x006, 0x007, 202 0x008, 0x009, 0x00a, 0x00b, 0x00c, 0x00d, 0x00e, 0x00f, 203 0x100, 0x101, 0x102, 0x103, 0x104, 0x105, 0x106, 0x107, 204 0x108, 0x109, 0x10a, 0x10b, 0x10c, 0x10d, 0x10e, 0x10f, 205}; 206 207static int 208fe98_alloc_port(device_t dev, int type) 209{ 210 struct fe_softc *sc = device_get_softc(dev); 211 struct resource *res; 212 bus_addr_t *iat; 213 int size, rid; 214 215 switch (type) { 216 case FE_TYPE_RE1000: 217 iat = ioaddr_re1000; 218 size = MAXREGISTERS; 219 break; 220 case FE_TYPE_CNET9NE: 221 iat = &ioaddr_cnet9ne[16]; 222 size = 16; 223 break; 224 case FE_TYPE_SSI: 225 iat = ioaddr_generic; 226 size = MAXREGISTERS; 227 break; 228 case FE_TYPE_LNX: 229 iat = ioaddr_lnx; 230 size = MAXREGISTERS; 231 break; 232 case FE_TYPE_GWY: 233 iat = ioaddr_generic; 234 size = MAXREGISTERS; 235 break; 236 case FE_TYPE_UBN: 237 iat = ioaddr_ubn; 238 size = MAXREGISTERS; 239 break; 240 case FE_TYPE_REX: 241 iat = ioaddr_rex; 242 size = MAXREGISTERS; 243 break; 244 default: 245 iat = ioaddr_generic; 246 size = MAXREGISTERS; 247 break; 248 } 249 250 rid = 0; 251 res = isa_alloc_resourcev(dev, SYS_RES_IOPORT, &rid, 252 iat, size, RF_ACTIVE); 253 if (res == NULL) 254 return ENOENT; 255 256 switch (type) { 257 case FE_TYPE_CNET9NE: 258 iat = ioaddr_cnet9ne; 259 size = MAXREGISTERS; 260 break; 261 } 262 263 isa_load_resourcev(res, iat, size); 264 265 sc->type = type; 266 sc->port_used = size; 267 sc->port_res = res; 268 sc->iot = rman_get_bustag(res); 269 sc->ioh = rman_get_bushandle(res); 270 return (0); 271} 272 273 274/* 275 * Probe and initialization for Allied-Telesis RE1000 series. 276 */ 277static void 278fe_init_re1000(struct fe_softc *sc) 279{ 280 /* Setup IRQ control register on the ASIC. */ 281 fe_outb(sc, FE_RE1000_IRQCONF, sc->priv_info); 282} 283 284static int 285fe_probe_re1000(device_t dev) 286{ 287 struct fe_softc *sc = device_get_softc(dev); 288 int i, n; 289 u_long iobase, irq; 290 u_char sum; 291 292 static struct fe_simple_probe_struct probe_table [] = { 293 { FE_DLCR2, 0x58, 0x00 }, 294 { FE_DLCR4, 0x08, 0x00 }, 295 { 0 } 296 }; 297 298 /* See if the specified I/O address is possible for RE1000. */ 299 /* [01]D[02468ACE] are allowed. */ 300 if (bus_get_resource(dev, SYS_RES_IOPORT, 0, &iobase, NULL) != 0) 301 return ENXIO; 302 if ((iobase & ~0x10E) != 0xD0) 303 return ENXIO; 304 305 if (fe98_alloc_port(dev, FE_TYPE_RE1000)) 306 return ENXIO; 307 308 /* Fill the softc struct with default values. */ 309 fe_softc_defaults(sc); 310 311 /* See if the card is on its address. */ 312 if (!fe_simple_probe(sc, probe_table)) 313 return ENXIO; 314 315 /* Get our station address from EEPROM. */ 316 fe_inblk(sc, 0x18, sc->sc_enaddr, ETHER_ADDR_LEN); 317 318 /* Make sure it is Allied-Telesis's. */ 319 if (!valid_Ether_p(sc->sc_enaddr, 0x0000F4)) 320 return ENXIO; 321#if 1 322 /* Calculate checksum. */ 323 sum = fe_inb(sc, 0x1e); 324 for (i = 0; i < ETHER_ADDR_LEN; i++) 325 sum ^= sc->sc_enaddr[i]; 326 if (sum != 0) 327 return ENXIO; 328#endif 329 /* Setup the board type. */ 330 sc->typestr = "RE1000"; 331 332 /* This looks like an RE1000 board. It requires an 333 explicit IRQ setting in config. Make sure we have one, 334 determining an appropriate value for the IRQ control 335 register. */ 336 irq = 0; 337 bus_get_resource(dev, SYS_RES_IRQ, 0, &irq, NULL); 338 switch (irq) { 339 case 3: n = 0x10; break; 340 case 5: n = 0x20; break; 341 case 6: n = 0x40; break; 342 case 12: n = 0x80; break; 343 default: 344 fe_irq_failure(sc->typestr, sc->sc_unit, irq, "3/5/6/12"); 345 return ENXIO; 346 } 347 sc->priv_info = (fe_inb(sc, FE_RE1000_IRQCONF) & 0x0f) | n; 348 349 /* Setup hooks. We need a special initialization procedure. */ 350 sc->init = fe_init_re1000; 351 352 return 0; 353} 354 355/* JLI sub-probe for Allied-Telesis RE1000Plus/ME1500 series. */ 356static u_short const * 357fe_probe_jli_re1000p(struct fe_softc * sc, u_char const * eeprom) 358{ 359 int i; 360 static u_short const irqmaps_re1000p [4] = { 3, 5, 6, 12 }; 361 362 /* Make sure the EEPROM contains Allied-Telesis bit pattern. */ 363 if (eeprom[1] != 0xFF) return NULL; 364 for (i = 2; i < 8; i++) if (eeprom[i] != 0xFF) return NULL; 365 for (i = 14; i < 24; i++) if (eeprom[i] != 0xFF) return NULL; 366 367 /* Get our station address from EEPROM, and make sure the 368 EEPROM contains Allied-Telesis's address. */ 369 bcopy(eeprom + 8, sc->sc_enaddr, ETHER_ADDR_LEN); 370 if (!valid_Ether_p(sc->sc_enaddr, 0x0000F4)) 371 return NULL; 372 373 /* I don't know any sub-model identification. */ 374 sc->typestr = "RE1000Plus/ME1500"; 375 376 /* Returns the IRQ table for the RE1000Plus. */ 377 return irqmaps_re1000p; 378} 379 380 381/* 382 * Probe for Allied-Telesis RE1000Plus/ME1500 series. 383 */ 384static int 385fe_probe_jli(device_t dev) 386{ 387 struct fe_softc *sc = device_get_softc(dev); 388 int i, n, xirq, error; 389 u_long iobase, irq; 390 u_char eeprom [JLI_EEPROM_SIZE]; 391 u_short const * irqmap; 392 393 static u_short const baseaddr [8] = 394 { 0x1D6, 0x1D8, 0x1DA, 0x1D4, 0x0D4, 0x0D2, 0x0D8, 0x0D0 }; 395 static struct fe_simple_probe_struct const probe_table [] = { 396 /* { FE_DLCR1, 0x20, 0x00 }, Doesn't work. */ 397 { FE_DLCR2, 0x50, 0x00 }, 398 { FE_DLCR4, 0x08, 0x00 }, 399 /* { FE_DLCR5, 0x80, 0x00 }, Doesn't work. */ 400#if 0 401 { FE_BMPR16, 0x1B, 0x00 }, 402 { FE_BMPR17, 0x7F, 0x00 }, 403#endif 404 { 0 } 405 }; 406 407 /* 408 * See if the specified address is possible for MB86965A JLI mode. 409 */ 410 if (bus_get_resource(dev, SYS_RES_IOPORT, 0, &iobase, NULL) != 0) 411 return ENXIO; 412 for (i = 0; i < 8; i++) { 413 if (baseaddr[i] == iobase) 414 break; 415 } 416 if (i == 8) 417 return ENXIO; 418 419 if (fe98_alloc_port(dev, FE_TYPE_RE1000)) 420 return ENXIO; 421 422 /* Fill the softc struct with default values. */ 423 fe_softc_defaults(sc); 424 425 /* 426 * We should test if MB86965A is on the base address now. 427 * Unfortunately, it is very hard to probe it reliably, since 428 * we have no way to reset the chip under software control. 429 * On cold boot, we could check the "signature" bit patterns 430 * described in the Fujitsu document. On warm boot, however, 431 * we can predict almost nothing about register values. 432 */ 433 if (!fe_simple_probe(sc, probe_table)) 434 return ENXIO; 435 436 /* Check if our I/O address matches config info on 86965. */ 437 n = (fe_inb(sc, FE_BMPR19) & FE_B19_ADDR) >> FE_B19_ADDR_SHIFT; 438 if (baseaddr[n] != iobase) 439 return ENXIO; 440 441 /* 442 * We are now almost sure we have an MB86965 at the given 443 * address. So, read EEPROM through it. We have to write 444 * into LSI registers to read from EEPROM. I want to avoid it 445 * at this stage, but I cannot test the presence of the chip 446 * any further without reading EEPROM. FIXME. 447 */ 448 fe_read_eeprom_jli(sc, eeprom); 449 450 /* Make sure that config info in EEPROM and 86965 agree. */ 451 if (eeprom[FE_EEPROM_CONF] != fe_inb(sc, FE_BMPR19)) 452 return ENXIO; 453 454 /* Use 86965 media selection scheme, unless othewise 455 specified. It is "AUTO always" and "select with BMPR13". 456 This behaviour covers most of the 86965 based board (as 457 minimum requirements.) It is backward compatible with 458 previous versions, also. */ 459 sc->mbitmap = MB_HA; 460 sc->defmedia = MB_HA; 461 sc->msel = fe_msel_965; 462 463 /* Perform board-specific probe. */ 464 if ((irqmap = fe_probe_jli_re1000p(sc, eeprom)) == NULL) 465 return ENXIO; 466 467 /* Find the IRQ read from EEPROM. */ 468 n = (fe_inb(sc, FE_BMPR19) & FE_B19_IRQ) >> FE_B19_IRQ_SHIFT; 469 xirq = irqmap[n]; 470 471 /* Try to determine IRQ setting. */ 472 error = bus_get_resource(dev, SYS_RES_IRQ, 0, &irq, NULL); 473 if (error && xirq == NO_IRQ) { 474 /* The device must be configured with an explicit IRQ. */ 475 device_printf(dev, "IRQ auto-detection does not work\n"); 476 return ENXIO; 477 } else if (error && xirq != NO_IRQ) { 478 /* Just use the probed IRQ value. */ 479 bus_set_resource(dev, SYS_RES_IRQ, 0, xirq, 1); 480 } else if (!error && xirq == NO_IRQ) { 481 /* No problem. Go ahead. */ 482 } else if (irq == xirq) { 483 /* Good. Go ahead. */ 484 } else { 485 /* User must be warned in this case. */ 486 sc->stability |= UNSTABLE_IRQ; 487 } 488 489 /* Setup a hook, which resets te 86965 when the driver is being 490 initialized. This may solve a nasty bug. FIXME. */ 491 sc->init = fe_init_jli; 492 493 return 0; 494} 495 496 497/* 498 * Probe and initialization for Contec C-NET(9N)E series. 499 */ 500 501/* TODO: Should be in "if_fereg.h" */ 502#define FE_CNET9NE_INTR 0x10 /* Interrupt Mask? */ 503 504static void 505fe_init_cnet9ne(struct fe_softc *sc) 506{ 507 /* Enable interrupt? FIXME. */ 508 fe_outb(sc, FE_CNET9NE_INTR, 0x10); 509} 510 511static int 512fe_probe_cnet9ne (device_t dev) 513{ 514 struct fe_softc *sc = device_get_softc(dev); 515 u_long iobase, irq; 516 517 static struct fe_simple_probe_struct probe_table [] = { 518 { FE_DLCR2, 0x58, 0x00 }, 519 { FE_DLCR4, 0x08, 0x00 }, 520 { 0 } 521 }; 522 523 /* See if the specified I/O address is possible for C-NET(9N)E. */ 524 if (bus_get_resource(dev, SYS_RES_IOPORT, 0, &iobase, NULL) != 0) 525 return ENXIO; 526 if (iobase != 0x73D0) 527 return ENXIO; 528 529 if (fe98_alloc_port(dev, FE_TYPE_CNET9NE)) 530 return ENXIO; 531 532 /* Fill the softc struct with default values. */ 533 fe_softc_defaults(sc); 534 535 /* See if the card is on its address. */ 536 if (!fe_simple_probe(sc, probe_table)) 537 return ENXIO; 538 539 /* Get our station address from EEPROM. */ 540 fe_inblk(sc, 0x18, sc->sc_enaddr, ETHER_ADDR_LEN); 541 542 /* Make sure it is Contec's. */ 543 if (!valid_Ether_p(sc->sc_enaddr, 0x00804C)) 544 return ENXIO; 545 546 /* Determine the card type. */ 547 if (sc->sc_enaddr[3] == 0x06) { 548 sc->typestr = "C-NET(9N)C"; 549 550 /* We seems to need our own IDENT bits... FIXME. */ 551 sc->proto_dlcr7 = FE_D7_BYTSWP_LH | FE_D7_IDENT_NICE; 552 553 /* C-NET(9N)C requires an explicit IRQ to work. */ 554 if (bus_get_resource(dev, SYS_RES_IRQ, 0, &irq, NULL) != 0) { 555 fe_irq_failure(sc->typestr, sc->sc_unit, NO_IRQ, NULL); 556 return ENXIO; 557 } 558 } else { 559 sc->typestr = "C-NET(9N)E"; 560 561 /* C-NET(9N)E works only IRQ5. */ 562 if (bus_get_resource(dev, SYS_RES_IRQ, 0, &irq, NULL) != 0) 563 return ENXIO; 564 if (irq != 5) { 565 fe_irq_failure(sc->typestr, sc->sc_unit, irq, "5"); 566 return ENXIO; 567 } 568 569 /* We need an init hook to initialize ASIC before we start. */ 570 sc->init = fe_init_cnet9ne; 571 } 572 573 /* C-NET(9N)E has 64KB SRAM. */ 574 sc->proto_dlcr6 = FE_D6_BUFSIZ_64KB | FE_D6_TXBSIZ_2x4KB 575 | FE_D6_BBW_WORD | FE_D6_SBW_WORD | FE_D6_SRAM; 576 577 return 0; 578} 579 580 581/* 582 * Probe for Contec C-NET(98)P2 series. 583 * (Logitec LAN-98TP/LAN-98T25P - parhaps) 584 */ 585static int 586fe_probe_ssi(device_t dev) 587{ 588 struct fe_softc *sc = device_get_softc(dev); 589 u_long iobase, irq; 590 591 u_char eeprom [SSI_EEPROM_SIZE]; 592 static struct fe_simple_probe_struct probe_table [] = { 593 { FE_DLCR2, 0x08, 0x00 }, 594 { FE_DLCR4, 0x08, 0x00 }, 595 { 0 } 596 }; 597 static u_short const irqmap[] = { 598 /* INT0 INT1 INT2 */ 599 NO_IRQ, NO_IRQ, NO_IRQ, 3, NO_IRQ, 5, 6, NO_IRQ, 600 NO_IRQ, 9, 10, NO_IRQ, 12, 13, NO_IRQ, NO_IRQ, 601 /* INT3 INT41 INT5 INT6 */ 602 }; 603 604 /* See if the specified I/O address is possible for 78Q8377A. */ 605 /* [0-D]3D0 are allowed. */ 606 if (bus_get_resource(dev, SYS_RES_IOPORT, 0, &iobase, NULL) != 0) 607 return ENXIO; 608 if ((iobase & 0xFFF) != 0x3D0) 609 return ENXIO; 610 611 if (fe98_alloc_port(dev, FE_TYPE_SSI)) 612 return ENXIO; 613 614 /* Fill the softc struct with default values. */ 615 fe_softc_defaults(sc); 616 617 /* See if the card is on its address. */ 618 if (!fe_simple_probe(sc, probe_table)) 619 return ENXIO; 620 621 /* We now have to read the config EEPROM. We should be very 622 careful, since doing so destroys a register. (Remember, we 623 are not yet sure we have a C-NET(98)P2 board here.) Don't 624 remember to select BMPRs bofore reading EEPROM, since other 625 register bank may be selected before the probe() is called. */ 626 fe_read_eeprom_ssi(sc, eeprom); 627 628 /* Make sure the Ethernet (MAC) station address is of Contec's. */ 629 if (!valid_Ether_p(eeprom + FE_SSI_EEP_ADDR, 0x00804C)) 630 return ENXIO; 631 bcopy(eeprom + FE_SSI_EEP_ADDR, sc->sc_enaddr, ETHER_ADDR_LEN); 632 633 /* Setup the board type. */ 634 sc->typestr = "C-NET(98)P2"; 635 636 /* Get IRQ configuration from EEPROM. */ 637 irq = irqmap[eeprom[FE_SSI_EEP_IRQ]]; 638 if (irq == NO_IRQ) { 639 fe_irq_failure(sc->typestr, sc->sc_unit, irq, 640 "3/5/6/9/10/12/13"); 641 return ENXIO; 642 } 643 bus_set_resource(dev, SYS_RES_IRQ, 0, irq, 1); 644 645 /* Get Duplex-mode configuration from EEPROM. */ 646 sc->proto_dlcr4 |= (eeprom[FE_SSI_EEP_DUPLEX] & FE_D4_DSC); 647 648 /* Fill softc struct accordingly. */ 649 sc->mbitmap = MB_HT; 650 sc->defmedia = MB_HT; 651 652 return 0; 653} 654 655 656/* 657 * Probe for TDK LAC-98012/013/025/9N011 - parhaps. 658 */ 659static int 660fe_probe_lnx(device_t dev) 661{ 662#ifndef FE_8BIT_SUPPORT 663 device_printf(dev, 664 "skip LAC-98012/013(only 16-bit cards are supported)\n"); 665 return ENXIO; 666#else 667 struct fe_softc *sc = device_get_softc(dev); 668 669 u_long iobase, irq; 670 u_char eeprom [LNX_EEPROM_SIZE]; 671 672 static struct fe_simple_probe_struct probe_table [] = { 673 { FE_DLCR2, 0x58, 0x00 }, 674 { FE_DLCR4, 0x08, 0x00 }, 675 { 0 } 676 }; 677 678 /* See if the specified I/O address is possible for TDK/LANX boards. */ 679 /* 0D0, 4D0, 8D0, and CD0 are allowed. */ 680 if (bus_get_resource(dev, SYS_RES_IOPORT, 0, &iobase, NULL) != 0) 681 return ENXIO; 682 if ((iobase & ~0xC00) != 0xD0) 683 return ENXIO; 684 685 if (fe98_alloc_port(dev, FE_TYPE_LNX)) 686 return ENXIO; 687 688 /* Fill the softc struct with default values. */ 689 fe_softc_defaults(sc); 690 691 /* See if the card is on its address. */ 692 if (!fe_simple_probe(sc, probe_table)) 693 return ENXIO; 694 695 /* We now have to read the config EEPROM. We should be very 696 careful, since doing so destroys a register. (Remember, we 697 are not yet sure we have a LAC-98012/98013 board here.) */ 698 fe_read_eeprom_lnx(sc, eeprom); 699 700 /* Make sure the Ethernet (MAC) station address is of TDK/LANX's. */ 701 if (!valid_Ether_p(eeprom, 0x008098)) 702 return ENXIO; 703 bcopy(eeprom, sc->sc_enaddr, ETHER_ADDR_LEN); 704 705 /* Setup the board type. */ 706 sc->typestr = "LAC-98012/98013"; 707 708 /* This looks like a TDK/LANX board. It requires an 709 explicit IRQ setting in config. Make sure we have one, 710 determining an appropriate value for the IRQ control 711 register. */ 712 irq = 0; 713 if (bus_get_resource(dev, SYS_RES_IRQ, 0, &irq, NULL) != 0) 714 return ENXIO; 715 switch (irq) { 716 case 3 : sc->priv_info = 0x10 | LNX_CLK_LO | LNX_SDA_HI; break; 717 case 5 : sc->priv_info = 0x20 | LNX_CLK_LO | LNX_SDA_HI; break; 718 case 6 : sc->priv_info = 0x40 | LNX_CLK_LO | LNX_SDA_HI; break; 719 case 12: sc->priv_info = 0x80 | LNX_CLK_LO | LNX_SDA_HI; break; 720 default: 721 fe_irq_failure(sc->typestr, sc->sc_unit, irq, "3/5/6/12"); 722 return ENXIO; 723 } 724 725 /* LAC-98's system bus width is 8-bit. */ 726 sc->proto_dlcr6 = FE_D6_BUFSIZ_32KB | FE_D6_TXBSIZ_2x2KB 727 | FE_D6_BBW_BYTE | FE_D6_SBW_BYTE | FE_D6_SRAM_150ns; 728 729 /* Setup hooks. We need a special initialization procedure. */ 730 sc->init = fe_init_lnx; 731 732 return 0; 733#endif /* FE_8BIT_SUPPORT */ 734} 735 736 737/* 738 * Probe for Gateway Communications' old cards. 739 * (both as Generic MB86960 probe routine) 740 */ 741static int 742fe_probe_gwy(device_t dev) 743{ 744 struct fe_softc *sc = device_get_softc(dev); 745 746 static struct fe_simple_probe_struct probe_table [] = { 747 /* { FE_DLCR2, 0x70, 0x00 }, */ 748 { FE_DLCR2, 0x58, 0x00 }, 749 { FE_DLCR4, 0x08, 0x00 }, 750 { 0 } 751 }; 752 753 /* 754 * XXX 755 * I'm not sure which address is possible, so accepts any. 756 */ 757 758 if (fe98_alloc_port(dev, FE_TYPE_GWY)) 759 return ENXIO; 760 761 /* Fill the softc struct with default values. */ 762 fe_softc_defaults(sc); 763 764 /* See if the card is on its address. */ 765 if (!fe_simple_probe(sc, probe_table)) 766 return ENXIO; 767 768 /* Get our station address from EEPROM. */ 769 fe_inblk(sc, 0x18, sc->sc_enaddr, ETHER_ADDR_LEN); 770 if (!valid_Ether_p(sc->sc_enaddr, 0x000000)) 771 return ENXIO; 772 773 /* Determine the card type. */ 774 sc->typestr = "Generic MB86960 Ethernet"; 775 if (valid_Ether_p(sc->sc_enaddr, 0x000061)) 776 sc->typestr = "Gateway Ethernet (Fujitsu chipset)"; 777 778 /* Gateway's board requires an explicit IRQ to work, since it 779 is not possible to probe the setting of jumpers. */ 780 if (bus_get_resource(dev, SYS_RES_IRQ, 0, NULL, NULL) != 0) { 781 fe_irq_failure(sc->typestr, sc->sc_unit, NO_IRQ, NULL); 782 return ENXIO; 783 } 784 785 return 0; 786} 787 788 789/* 790 * Probe for Ungermann-Bass Access/PC N98C+(Model 85152). 791 */ 792static int 793fe_probe_ubn(device_t dev) 794{ 795 struct fe_softc *sc = device_get_softc(dev); 796 797 u_char sum, save7; 798 u_long iobase, irq; 799 int i; 800 static struct fe_simple_probe_struct const probe_table [] = { 801 { FE_DLCR2, 0x58, 0x00 }, 802 { FE_DLCR4, 0x08, 0x00 }, 803 { 0 } 804 }; 805 806 /* See if the specified I/O address is possible for Access/PC. */ 807 /* [01][048C]D0 are allowed. */ 808 if (bus_get_resource(dev, SYS_RES_IOPORT, 0, &iobase, NULL) != 0) 809 return ENXIO; 810 if ((iobase & ~0x1C00) != 0xD0) 811 return ENXIO; 812 813 if (fe98_alloc_port(dev, FE_TYPE_UBN)) 814 return ENXIO; 815 816 /* Fill the softc struct with default values. */ 817 fe_softc_defaults(sc); 818 819 /* Simple probe. */ 820 if (!fe_simple_probe(sc, probe_table)) 821 return ENXIO; 822 823 /* NOTE: Access/NOTE N98 sometimes freeze when reading station 824 address. In case of using it togather with C-NET(9N)C, 825 this problem usually happens. 826 Writing DLCR7 prevents freezing, but I don't know why. FIXME. */ 827 828 /* Save the current value for the DLCR7 register we are about 829 to destroy. */ 830 save7 = fe_inb(sc, FE_DLCR7); 831 fe_outb(sc, FE_DLCR7, 832 sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP); 833 834 /* Get our station address form ID ROM and make sure it is UBN's. */ 835 fe_inblk(sc, 0x18, sc->sc_enaddr, ETHER_ADDR_LEN); 836 if (!valid_Ether_p(sc->sc_enaddr, 0x00DD01)) 837 goto fail_ubn; 838#if 1 839 /* Calculate checksum. */ 840 sum = fe_inb(sc, 0x1e); 841 for (i = 0; i < ETHER_ADDR_LEN; i++) 842 sum ^= sc->sc_enaddr[i]; 843 if (sum != 0) 844 goto fail_ubn; 845#endif 846 847 /* Setup the board type. */ 848 sc->typestr = "Access/PC"; 849 850 /* This looks like an AccessPC/N98C+ board. It requires an 851 explicit IRQ setting in config. Make sure we have one, 852 determining an appropriate value for the IRQ control 853 register. */ 854 irq = 0; 855 bus_get_resource(dev, SYS_RES_IRQ, 0, &irq, NULL); 856 switch (irq) { 857 case 3: sc->priv_info = 0x01; break; 858 case 5: sc->priv_info = 0x02; break; 859 case 6: sc->priv_info = 0x04; break; 860 case 12: sc->priv_info = 0x08; break; 861 default: 862 fe_irq_failure(sc->typestr, sc->sc_unit, irq, "3/5/6/12"); 863 goto fail_ubn; 864 } 865 866 /* Setup hooks. We need a special initialization procedure. */ 867 sc->init = fe_init_ubn; 868 869 return 0; 870 871fail_ubn: 872 fe_outb(sc, FE_DLCR7, save7); 873 return ENXIO; 874} 875 876 877/* 878 * REX boards(non-JLI type) support routine. 879 */ 880 881#define REX_EEPROM_SIZE 32 882#define REX_DAT 0x01 883 884static void 885fe_read_eeprom_rex(struct fe_softc *sc, u_char *data) 886{ 887 int i; 888 u_char bit, val; 889 u_char save16; 890 891 save16 = fe_inb(sc, 0x10); 892 893 /* Issue a start condition. */ 894 val = fe_inb(sc, 0x10) & 0xf0; 895 fe_outb(sc, 0x10, val); 896 897 (void) fe_inb(sc, 0x10); 898 (void) fe_inb(sc, 0x10); 899 (void) fe_inb(sc, 0x10); 900 (void) fe_inb(sc, 0x10); 901 902 /* Read bytes from EEPROM. */ 903 for (i = 0; i < REX_EEPROM_SIZE; i++) { 904 /* Read a byte and store it into the buffer. */ 905 val = 0x00; 906 for (bit = 0x01; bit != 0x00; bit <<= 1) 907 if (fe_inb(sc, 0x10) & REX_DAT) 908 val |= bit; 909 *data++ = val; 910 } 911 912 fe_outb(sc, 0x10, save16); 913 914#if 1 915 /* Report what we got. */ 916 if (bootverbose) { 917 data -= REX_EEPROM_SIZE; 918 for (i = 0; i < REX_EEPROM_SIZE; i += 16) { 919 printf("fe%d: EEPROM(REX):%3x: %16D\n", 920 sc->sc_unit, i, data + i, " "); 921 } 922 } 923#endif 924} 925 926 927static void 928fe_init_rex(struct fe_softc *sc) 929{ 930 /* Setup IRQ control register on the ASIC. */ 931 fe_outb(sc, 0x10, sc->priv_info); 932} 933 934/* 935 * Probe for RATOC REX-9880/81/82/83 series. 936 */ 937static int 938fe_probe_rex(device_t dev) 939{ 940 struct fe_softc *sc = device_get_softc(dev); 941 942 int i; 943 u_long iobase, irq; 944 u_char eeprom [REX_EEPROM_SIZE]; 945 946 static struct fe_simple_probe_struct probe_table [] = { 947 { FE_DLCR2, 0x58, 0x00 }, 948 { FE_DLCR4, 0x08, 0x00 }, 949 { 0 } 950 }; 951 952 /* See if the specified I/O address is possible for REX-9880. */ 953 /* 6[46CE]D0 are allowed. */ 954 if (bus_get_resource(dev, SYS_RES_IOPORT, 0, &iobase, NULL) != 0) 955 return ENXIO; 956 if ((iobase & ~0xA00) != 0x64D0) 957 return ENXIO; 958 959 if (fe98_alloc_port(dev, FE_TYPE_REX)) 960 return ENXIO; 961 962 /* Fill the softc struct with default values. */ 963 fe_softc_defaults(sc); 964 965 /* See if the card is on its address. */ 966 if (!fe_simple_probe(sc, probe_table)) 967 return ENXIO; 968 969 /* We now have to read the config EEPROM. We should be very 970 careful, since doing so destroys a register. (Remember, we 971 are not yet sure we have a REX-9880 board here.) */ 972 fe_read_eeprom_rex(sc, eeprom); 973 for (i = 0; i < ETHER_ADDR_LEN; i++) 974 sc->sc_enaddr[i] = eeprom[7 - i]; 975 976 /* Make sure it is RATOC's. */ 977 if (!valid_Ether_p(sc->sc_enaddr, 0x00C0D0) && 978 !valid_Ether_p(sc->sc_enaddr, 0x00803D)) 979 return 0; 980 981 /* Setup the board type. */ 982 sc->typestr = "REX-9880/9883"; 983 984 /* This looks like a REX-9880 board. It requires an 985 explicit IRQ setting in config. Make sure we have one, 986 determining an appropriate value for the IRQ control 987 register. */ 988 irq = 0; 989 bus_get_resource(dev, SYS_RES_IRQ, 0, &irq, NULL); 990 switch (irq) { 991 case 3: sc->priv_info = 0x10; break; 992 case 5: sc->priv_info = 0x20; break; 993 case 6: sc->priv_info = 0x40; break; 994 case 12: sc->priv_info = 0x80; break; 995 default: 996 fe_irq_failure(sc->typestr, sc->sc_unit, irq, "3/5/6/12"); 997 return ENXIO; 998 } 999 1000 /* Setup hooks. We need a special initialization procedure. */ 1001 sc->init = fe_init_rex; 1002 1003 /* REX-9880 has 64KB SRAM. */ 1004 sc->proto_dlcr6 = FE_D6_BUFSIZ_64KB | FE_D6_TXBSIZ_2x4KB 1005 | FE_D6_BBW_WORD | FE_D6_SBW_WORD | FE_D6_SRAM; 1006#if 1 1007 sc->proto_dlcr7 |= FE_D7_EOPPOL; /* XXX */ 1008#endif 1009 1010 return 0; 1011} 1012