1254885Sdumbbell/* 2254885Sdumbbell * Copyright 2008 Advanced Micro Devices, Inc. 3254885Sdumbbell * Copyright 2008 Red Hat Inc. 4254885Sdumbbell * Copyright 2009 Jerome Glisse. 5254885Sdumbbell * 6254885Sdumbbell * Permission is hereby granted, free of charge, to any person obtaining a 7254885Sdumbbell * copy of this software and associated documentation files (the "Software"), 8254885Sdumbbell * to deal in the Software without restriction, including without limitation 9254885Sdumbbell * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10254885Sdumbbell * and/or sell copies of the Software, and to permit persons to whom the 11254885Sdumbbell * Software is furnished to do so, subject to the following conditions: 12254885Sdumbbell * 13254885Sdumbbell * The above copyright notice and this permission notice shall be included in 14254885Sdumbbell * all copies or substantial portions of the Software. 15254885Sdumbbell * 16254885Sdumbbell * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17254885Sdumbbell * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18254885Sdumbbell * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19254885Sdumbbell * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20254885Sdumbbell * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21254885Sdumbbell * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22254885Sdumbbell * OTHER DEALINGS IN THE SOFTWARE. 23254885Sdumbbell * 24254885Sdumbbell * Authors: Dave Airlie 25254885Sdumbbell * Alex Deucher 26254885Sdumbbell * Jerome Glisse 27254885Sdumbbell */ 28254885Sdumbbell#ifndef __RS400D_H__ 29254885Sdumbbell#define __RS400D_H__ 30254885Sdumbbell 31254885Sdumbbell#include <sys/cdefs.h> 32254885Sdumbbell__FBSDID("$FreeBSD$"); 33254885Sdumbbell 34254885Sdumbbell/* Registers */ 35254885Sdumbbell#define R_000148_MC_FB_LOCATION 0x000148 36254885Sdumbbell#define S_000148_MC_FB_START(x) (((x) & 0xFFFF) << 0) 37254885Sdumbbell#define G_000148_MC_FB_START(x) (((x) >> 0) & 0xFFFF) 38254885Sdumbbell#define C_000148_MC_FB_START 0xFFFF0000 39254885Sdumbbell#define S_000148_MC_FB_TOP(x) (((x) & 0xFFFF) << 16) 40254885Sdumbbell#define G_000148_MC_FB_TOP(x) (((x) >> 16) & 0xFFFF) 41254885Sdumbbell#define C_000148_MC_FB_TOP 0x0000FFFF 42254885Sdumbbell#define R_00015C_NB_TOM 0x00015C 43254885Sdumbbell#define S_00015C_MC_FB_START(x) (((x) & 0xFFFF) << 0) 44254885Sdumbbell#define G_00015C_MC_FB_START(x) (((x) >> 0) & 0xFFFF) 45254885Sdumbbell#define C_00015C_MC_FB_START 0xFFFF0000 46254885Sdumbbell#define S_00015C_MC_FB_TOP(x) (((x) & 0xFFFF) << 16) 47254885Sdumbbell#define G_00015C_MC_FB_TOP(x) (((x) >> 16) & 0xFFFF) 48254885Sdumbbell#define C_00015C_MC_FB_TOP 0x0000FFFF 49254885Sdumbbell#define R_0007C0_CP_STAT 0x0007C0 50254885Sdumbbell#define S_0007C0_MRU_BUSY(x) (((x) & 0x1) << 0) 51254885Sdumbbell#define G_0007C0_MRU_BUSY(x) (((x) >> 0) & 0x1) 52254885Sdumbbell#define C_0007C0_MRU_BUSY 0xFFFFFFFE 53254885Sdumbbell#define S_0007C0_MWU_BUSY(x) (((x) & 0x1) << 1) 54254885Sdumbbell#define G_0007C0_MWU_BUSY(x) (((x) >> 1) & 0x1) 55254885Sdumbbell#define C_0007C0_MWU_BUSY 0xFFFFFFFD 56254885Sdumbbell#define S_0007C0_RSIU_BUSY(x) (((x) & 0x1) << 2) 57254885Sdumbbell#define G_0007C0_RSIU_BUSY(x) (((x) >> 2) & 0x1) 58254885Sdumbbell#define C_0007C0_RSIU_BUSY 0xFFFFFFFB 59254885Sdumbbell#define S_0007C0_RCIU_BUSY(x) (((x) & 0x1) << 3) 60254885Sdumbbell#define G_0007C0_RCIU_BUSY(x) (((x) >> 3) & 0x1) 61254885Sdumbbell#define C_0007C0_RCIU_BUSY 0xFFFFFFF7 62254885Sdumbbell#define S_0007C0_CSF_PRIMARY_BUSY(x) (((x) & 0x1) << 9) 63254885Sdumbbell#define G_0007C0_CSF_PRIMARY_BUSY(x) (((x) >> 9) & 0x1) 64254885Sdumbbell#define C_0007C0_CSF_PRIMARY_BUSY 0xFFFFFDFF 65254885Sdumbbell#define S_0007C0_CSF_INDIRECT_BUSY(x) (((x) & 0x1) << 10) 66254885Sdumbbell#define G_0007C0_CSF_INDIRECT_BUSY(x) (((x) >> 10) & 0x1) 67254885Sdumbbell#define C_0007C0_CSF_INDIRECT_BUSY 0xFFFFFBFF 68254885Sdumbbell#define S_0007C0_CSQ_PRIMARY_BUSY(x) (((x) & 0x1) << 11) 69254885Sdumbbell#define G_0007C0_CSQ_PRIMARY_BUSY(x) (((x) >> 11) & 0x1) 70254885Sdumbbell#define C_0007C0_CSQ_PRIMARY_BUSY 0xFFFFF7FF 71254885Sdumbbell#define S_0007C0_CSQ_INDIRECT_BUSY(x) (((x) & 0x1) << 12) 72254885Sdumbbell#define G_0007C0_CSQ_INDIRECT_BUSY(x) (((x) >> 12) & 0x1) 73254885Sdumbbell#define C_0007C0_CSQ_INDIRECT_BUSY 0xFFFFEFFF 74254885Sdumbbell#define S_0007C0_CSI_BUSY(x) (((x) & 0x1) << 13) 75254885Sdumbbell#define G_0007C0_CSI_BUSY(x) (((x) >> 13) & 0x1) 76254885Sdumbbell#define C_0007C0_CSI_BUSY 0xFFFFDFFF 77254885Sdumbbell#define S_0007C0_CSF_INDIRECT2_BUSY(x) (((x) & 0x1) << 14) 78254885Sdumbbell#define G_0007C0_CSF_INDIRECT2_BUSY(x) (((x) >> 14) & 0x1) 79254885Sdumbbell#define C_0007C0_CSF_INDIRECT2_BUSY 0xFFFFBFFF 80254885Sdumbbell#define S_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) & 0x1) << 15) 81254885Sdumbbell#define G_0007C0_CSQ_INDIRECT2_BUSY(x) (((x) >> 15) & 0x1) 82254885Sdumbbell#define C_0007C0_CSQ_INDIRECT2_BUSY 0xFFFF7FFF 83254885Sdumbbell#define S_0007C0_GUIDMA_BUSY(x) (((x) & 0x1) << 28) 84254885Sdumbbell#define G_0007C0_GUIDMA_BUSY(x) (((x) >> 28) & 0x1) 85254885Sdumbbell#define C_0007C0_GUIDMA_BUSY 0xEFFFFFFF 86254885Sdumbbell#define S_0007C0_VIDDMA_BUSY(x) (((x) & 0x1) << 29) 87254885Sdumbbell#define G_0007C0_VIDDMA_BUSY(x) (((x) >> 29) & 0x1) 88254885Sdumbbell#define C_0007C0_VIDDMA_BUSY 0xDFFFFFFF 89254885Sdumbbell#define S_0007C0_CMDSTRM_BUSY(x) (((x) & 0x1) << 30) 90254885Sdumbbell#define G_0007C0_CMDSTRM_BUSY(x) (((x) >> 30) & 0x1) 91254885Sdumbbell#define C_0007C0_CMDSTRM_BUSY 0xBFFFFFFF 92254885Sdumbbell#define S_0007C0_CP_BUSY(x) (((x) & 0x1) << 31) 93254885Sdumbbell#define G_0007C0_CP_BUSY(x) (((x) >> 31) & 0x1) 94254885Sdumbbell#define C_0007C0_CP_BUSY 0x7FFFFFFF 95254885Sdumbbell#define R_000E40_RBBM_STATUS 0x000E40 96254885Sdumbbell#define S_000E40_CMDFIFO_AVAIL(x) (((x) & 0x7F) << 0) 97254885Sdumbbell#define G_000E40_CMDFIFO_AVAIL(x) (((x) >> 0) & 0x7F) 98254885Sdumbbell#define C_000E40_CMDFIFO_AVAIL 0xFFFFFF80 99254885Sdumbbell#define S_000E40_HIRQ_ON_RBB(x) (((x) & 0x1) << 8) 100254885Sdumbbell#define G_000E40_HIRQ_ON_RBB(x) (((x) >> 8) & 0x1) 101254885Sdumbbell#define C_000E40_HIRQ_ON_RBB 0xFFFFFEFF 102254885Sdumbbell#define S_000E40_CPRQ_ON_RBB(x) (((x) & 0x1) << 9) 103254885Sdumbbell#define G_000E40_CPRQ_ON_RBB(x) (((x) >> 9) & 0x1) 104254885Sdumbbell#define C_000E40_CPRQ_ON_RBB 0xFFFFFDFF 105254885Sdumbbell#define S_000E40_CFRQ_ON_RBB(x) (((x) & 0x1) << 10) 106254885Sdumbbell#define G_000E40_CFRQ_ON_RBB(x) (((x) >> 10) & 0x1) 107254885Sdumbbell#define C_000E40_CFRQ_ON_RBB 0xFFFFFBFF 108254885Sdumbbell#define S_000E40_HIRQ_IN_RTBUF(x) (((x) & 0x1) << 11) 109254885Sdumbbell#define G_000E40_HIRQ_IN_RTBUF(x) (((x) >> 11) & 0x1) 110254885Sdumbbell#define C_000E40_HIRQ_IN_RTBUF 0xFFFFF7FF 111254885Sdumbbell#define S_000E40_CPRQ_IN_RTBUF(x) (((x) & 0x1) << 12) 112254885Sdumbbell#define G_000E40_CPRQ_IN_RTBUF(x) (((x) >> 12) & 0x1) 113254885Sdumbbell#define C_000E40_CPRQ_IN_RTBUF 0xFFFFEFFF 114254885Sdumbbell#define S_000E40_CFRQ_IN_RTBUF(x) (((x) & 0x1) << 13) 115254885Sdumbbell#define G_000E40_CFRQ_IN_RTBUF(x) (((x) >> 13) & 0x1) 116254885Sdumbbell#define C_000E40_CFRQ_IN_RTBUF 0xFFFFDFFF 117254885Sdumbbell#define S_000E40_CF_PIPE_BUSY(x) (((x) & 0x1) << 14) 118254885Sdumbbell#define G_000E40_CF_PIPE_BUSY(x) (((x) >> 14) & 0x1) 119254885Sdumbbell#define C_000E40_CF_PIPE_BUSY 0xFFFFBFFF 120254885Sdumbbell#define S_000E40_ENG_EV_BUSY(x) (((x) & 0x1) << 15) 121254885Sdumbbell#define G_000E40_ENG_EV_BUSY(x) (((x) >> 15) & 0x1) 122254885Sdumbbell#define C_000E40_ENG_EV_BUSY 0xFFFF7FFF 123254885Sdumbbell#define S_000E40_CP_CMDSTRM_BUSY(x) (((x) & 0x1) << 16) 124254885Sdumbbell#define G_000E40_CP_CMDSTRM_BUSY(x) (((x) >> 16) & 0x1) 125254885Sdumbbell#define C_000E40_CP_CMDSTRM_BUSY 0xFFFEFFFF 126254885Sdumbbell#define S_000E40_E2_BUSY(x) (((x) & 0x1) << 17) 127254885Sdumbbell#define G_000E40_E2_BUSY(x) (((x) >> 17) & 0x1) 128254885Sdumbbell#define C_000E40_E2_BUSY 0xFFFDFFFF 129254885Sdumbbell#define S_000E40_RB2D_BUSY(x) (((x) & 0x1) << 18) 130254885Sdumbbell#define G_000E40_RB2D_BUSY(x) (((x) >> 18) & 0x1) 131254885Sdumbbell#define C_000E40_RB2D_BUSY 0xFFFBFFFF 132254885Sdumbbell#define S_000E40_RB3D_BUSY(x) (((x) & 0x1) << 19) 133254885Sdumbbell#define G_000E40_RB3D_BUSY(x) (((x) >> 19) & 0x1) 134254885Sdumbbell#define C_000E40_RB3D_BUSY 0xFFF7FFFF 135254885Sdumbbell#define S_000E40_VAP_BUSY(x) (((x) & 0x1) << 20) 136254885Sdumbbell#define G_000E40_VAP_BUSY(x) (((x) >> 20) & 0x1) 137254885Sdumbbell#define C_000E40_VAP_BUSY 0xFFEFFFFF 138254885Sdumbbell#define S_000E40_RE_BUSY(x) (((x) & 0x1) << 21) 139254885Sdumbbell#define G_000E40_RE_BUSY(x) (((x) >> 21) & 0x1) 140254885Sdumbbell#define C_000E40_RE_BUSY 0xFFDFFFFF 141254885Sdumbbell#define S_000E40_TAM_BUSY(x) (((x) & 0x1) << 22) 142254885Sdumbbell#define G_000E40_TAM_BUSY(x) (((x) >> 22) & 0x1) 143254885Sdumbbell#define C_000E40_TAM_BUSY 0xFFBFFFFF 144254885Sdumbbell#define S_000E40_TDM_BUSY(x) (((x) & 0x1) << 23) 145254885Sdumbbell#define G_000E40_TDM_BUSY(x) (((x) >> 23) & 0x1) 146254885Sdumbbell#define C_000E40_TDM_BUSY 0xFF7FFFFF 147254885Sdumbbell#define S_000E40_PB_BUSY(x) (((x) & 0x1) << 24) 148254885Sdumbbell#define G_000E40_PB_BUSY(x) (((x) >> 24) & 0x1) 149254885Sdumbbell#define C_000E40_PB_BUSY 0xFEFFFFFF 150254885Sdumbbell#define S_000E40_TIM_BUSY(x) (((x) & 0x1) << 25) 151254885Sdumbbell#define G_000E40_TIM_BUSY(x) (((x) >> 25) & 0x1) 152254885Sdumbbell#define C_000E40_TIM_BUSY 0xFDFFFFFF 153254885Sdumbbell#define S_000E40_GA_BUSY(x) (((x) & 0x1) << 26) 154254885Sdumbbell#define G_000E40_GA_BUSY(x) (((x) >> 26) & 0x1) 155254885Sdumbbell#define C_000E40_GA_BUSY 0xFBFFFFFF 156254885Sdumbbell#define S_000E40_CBA2D_BUSY(x) (((x) & 0x1) << 27) 157254885Sdumbbell#define G_000E40_CBA2D_BUSY(x) (((x) >> 27) & 0x1) 158254885Sdumbbell#define C_000E40_CBA2D_BUSY 0xF7FFFFFF 159254885Sdumbbell#define S_000E40_GUI_ACTIVE(x) (((x) & 0x1) << 31) 160254885Sdumbbell#define G_000E40_GUI_ACTIVE(x) (((x) >> 31) & 0x1) 161254885Sdumbbell#define C_000E40_GUI_ACTIVE 0x7FFFFFFF 162254885Sdumbbell 163254885Sdumbbell#endif 164