cxgb_osdep.h revision 183063
177957Sbenno/**************************************************************************
277957Sbenno
377957SbennoCopyright (c) 2007, Chelsio Inc.
477957SbennoAll rights reserved.
577957Sbenno
677957SbennoRedistribution and use in source and binary forms, with or without
777957Sbennomodification, are permitted provided that the following conditions are met:
877957Sbenno
977957Sbenno 1. Redistributions of source code must retain the above copyright notice,
1077957Sbenno    this list of conditions and the following disclaimer.
1177957Sbenno
1277957Sbenno 2. Neither the name of the Chelsio Corporation nor the names of its
1377957Sbenno    contributors may be used to endorse or promote products derived from
1477957Sbenno    this software without specific prior written permission.
1577957Sbenno
1677957SbennoTHIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
1777957SbennoAND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
1877957SbennoIMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
1977957SbennoARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
2077957SbennoLIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
2177957SbennoCONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
2277957SbennoSUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
2377957SbennoINTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
2477957SbennoCONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
2577957SbennoARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
2677957SbennoPOSSIBILITY OF SUCH DAMAGE.
2777957Sbenno
2877957Sbenno
2977957Sbenno$FreeBSD: head/sys/dev/cxgb/cxgb_osdep.h 183063 2008-09-16 02:28:08Z kmacy $
3077957Sbenno
3177957Sbenno***************************************************************************/
3277957Sbenno
3377957Sbenno#include <sys/param.h>
3477957Sbenno#include <sys/systm.h>
3577957Sbenno#include <sys/ctype.h>
3677957Sbenno#include <sys/endian.h>
3777957Sbenno#include <sys/bus.h>
3877957Sbenno
3977957Sbenno#include <sys/lock.h>
4077957Sbenno#include <sys/mutex.h>
4177957Sbenno
4277957Sbenno#include <dev/mii/mii.h>
4377957Sbenno
4477957Sbenno#ifdef CONFIG_DEFINED
4577957Sbenno#include <common/cxgb_version.h>
4677957Sbenno#include <cxgb_config.h>
4779036Sbenno#else
4879036Sbenno#include <dev/cxgb/common/cxgb_version.h>
4979036Sbenno#include <dev/cxgb/cxgb_config.h>
5077957Sbenno#endif
5177957Sbenno
5277957Sbenno#ifndef _CXGB_OSDEP_H_
5377957Sbenno#define _CXGB_OSDEP_H_
5477957Sbenno
5577957Sbennotypedef struct adapter adapter_t;
5677957Sbennostruct sge_rspq;
5777957Sbenno
5877957Sbennoenum {
5977957Sbenno	TP_TMR_RES = 200,	/* TP timer resolution in usec */
6077957Sbenno	MAX_NPORTS = 4,		/* max # of ports */
6177957Sbenno	TP_SRAM_OFFSET = 4096,	/* TP SRAM content offset in eeprom */
6277957Sbenno	TP_SRAM_LEN = 2112,	/* TP SRAM content offset in eeprom */
6377957Sbenno};
6477957Sbenno
6577957Sbennostruct t3_mbuf_hdr {
6677957Sbenno	struct mbuf *mh_head;
6777957Sbenno	struct mbuf *mh_tail;
6877957Sbenno};
6977957Sbenno
7077957Sbenno#ifndef PANIC_IF
7177957Sbenno#define PANIC_IF(exp) do {                  \
7277957Sbenno	if (exp)                            \
7377957Sbenno		panic("BUG: %s", #exp);      \
7477957Sbenno} while (0)
7577957Sbenno#endif
7677957Sbenno
7777957Sbenno#define m_get_priority(m) ((uintptr_t)(m)->m_pkthdr.rcvif)
7877957Sbenno#define m_set_priority(m, pri) ((m)->m_pkthdr.rcvif = (struct ifnet *)((uintptr_t)pri))
7977957Sbenno#define m_set_sgl(m, sgl) ((m)->m_pkthdr.header = (sgl))
8077957Sbenno#define m_get_sgl(m) ((bus_dma_segment_t *)(m)->m_pkthdr.header)
8177957Sbenno#define m_set_sgllen(m, len) ((m)->m_pkthdr.ether_vtag = len)
8277957Sbenno#define m_get_sgllen(m) ((m)->m_pkthdr.ether_vtag)
8377957Sbenno
8477957Sbenno/*
8577957Sbenno * XXX FIXME
8677957Sbenno */
8777957Sbenno#define m_set_toep(m, a) ((m)->m_pkthdr.header = (a))
8877957Sbenno#define m_get_toep(m) ((m)->m_pkthdr.header)
8977957Sbenno#define m_set_handler(m, handler) ((m)->m_pkthdr.header = (handler))
9077957Sbenno
9177957Sbenno#define m_set_socket(m, a) ((m)->m_pkthdr.header = (a))
9277957Sbenno#define m_get_socket(m) ((m)->m_pkthdr.header)
9377957Sbenno
9477957Sbenno#define	KTR_CXGB	KTR_SPARE2
9577957Sbennovoid cxgb_log_tcb(struct adapter *sc, unsigned int tid);
9677957Sbenno
9778962Sjhb#define MT_DONTFREE  128
9877957Sbenno
9977957Sbenno#if __FreeBSD_version > 700030
10077957Sbenno#define INTR_FILTERS
10177957Sbenno#define FIRMWARE_LATEST
102#endif
103
104#if ((__FreeBSD_version > 602103) && (__FreeBSD_version < 700000))
105#define FIRMWARE_LATEST
106#endif
107
108#if __FreeBSD_version > 700000
109#define MSI_SUPPORTED
110#define TSO_SUPPORTED
111#define VLAN_SUPPORTED
112#define TASKQUEUE_CURRENT
113#else
114#define if_name(ifp) (ifp)->if_xname
115#define M_SANITY(m, n)
116#endif
117
118#define __read_mostly __attribute__((__section__(".data.read_mostly")))
119
120/*
121 * Workaround for weird Chelsio issue
122 */
123#if __FreeBSD_version > 700029
124#define PRIV_SUPPORTED
125#endif
126
127#define CXGB_TX_CLEANUP_THRESHOLD        32
128
129
130#ifdef DEBUG_PRINT
131#define DPRINTF printf
132#else
133#define DPRINTF(...)
134#endif
135
136#define TX_MAX_SIZE                (1 << 16)    /* 64KB                          */
137#define TX_MAX_SEGS                      36     /* maximum supported by card     */
138
139#define TX_MAX_DESC                       4     /* max descriptors per packet    */
140
141
142#define TX_START_MIN_DESC  (TX_MAX_DESC << 2)
143#define TX_START_MAX_DESC (TX_MAX_DESC << 3)    /* maximum number of descriptors
144						 * call to start used per 	 */
145
146#define TX_CLEAN_MAX_DESC (TX_MAX_DESC << 4)    /* maximum tx descriptors
147						 * to clean per iteration        */
148#define TX_WR_SIZE_MAX    11*1024              /* the maximum total size of packets aggregated into a single
149						* TX WR
150						*/
151#define TX_WR_COUNT_MAX         7              /* the maximum total number of packets that can be
152						* aggregated into a single TX WR
153						*/
154
155
156#if defined(__i386__) || defined(__amd64__)
157#define mb()    __asm volatile("mfence":::"memory")
158#define rmb()   __asm volatile("lfence":::"memory")
159#define wmb()   __asm volatile("sfence" ::: "memory")
160#define smp_mb() mb()
161
162#define L1_CACHE_BYTES 128
163static __inline
164void prefetch(void *x)
165{
166        __asm volatile("prefetcht0 %0" :: "m" (*(unsigned long *)x));
167}
168
169extern void kdb_backtrace(void);
170
171#define WARN_ON(condition) do { \
172       if (__predict_false((condition)!=0)) {  \
173                log(LOG_WARNING, "BUG: warning at %s:%d/%s()\n", __FILE__, __LINE__, __FUNCTION__); \
174                kdb_backtrace(); \
175        } \
176} while (0)
177
178
179#else /* !i386 && !amd64 */
180#define mb()
181#define rmb()
182#define wmb()
183#define smp_mb()
184#define prefetch(x)
185#define L1_CACHE_BYTES 32
186#endif
187
188struct buf_ring {
189	caddr_t          *br_ring;
190	volatile uint32_t br_cons;
191	volatile uint32_t br_prod;
192	int               br_size;
193	struct mtx        br_lock;
194};
195
196struct buf_ring *buf_ring_alloc(int count, int flags);
197void buf_ring_free(struct buf_ring *);
198
199static __inline int
200buf_ring_count(struct buf_ring *mr)
201{
202	int size = mr->br_size;
203	uint32_t mask = size - 1;
204
205	return ((size + mr->br_prod - mr->br_cons) & mask);
206}
207
208static __inline int
209buf_ring_empty(struct buf_ring *mr)
210{
211	return (mr->br_cons == mr->br_prod);
212}
213
214static __inline int
215buf_ring_full(struct buf_ring *mr)
216{
217	uint32_t mask;
218
219	mask = mr->br_size - 1;
220	return (mr->br_cons == ((mr->br_prod + 1) & mask));
221}
222
223/*
224 * The producer and consumer are independently locked
225 * this relies on the consumer providing his own serialization
226 *
227 */
228static __inline void *
229buf_ring_dequeue(struct buf_ring *mr)
230{
231	uint32_t prod, cons, mask;
232	caddr_t *ring, m;
233
234	ring = (caddr_t *)mr->br_ring;
235	mask = mr->br_size - 1;
236	cons = mr->br_cons;
237	mb();
238	prod = mr->br_prod;
239	m = NULL;
240	if (cons != prod) {
241		m = ring[cons];
242		ring[cons] = NULL;
243		mr->br_cons = (cons + 1) & mask;
244		mb();
245	}
246	return (m);
247}
248
249#ifdef DEBUG_BUFRING
250static __inline void
251__buf_ring_scan(struct buf_ring *mr, void *m, char *file, int line)
252{
253	int i;
254
255	for (i = 0; i < mr->br_size; i++)
256		if (m == mr->br_ring[i])
257			panic("%s:%d m=%p present prod=%d cons=%d idx=%d", file,
258			    line, m, mr->br_prod, mr->br_cons, i);
259}
260
261static __inline void
262buf_ring_scan(struct buf_ring *mr, void *m, char *file, int line)
263{
264	mtx_lock(&mr->br_lock);
265	__buf_ring_scan(mr, m, file, line);
266	mtx_unlock(&mr->br_lock);
267}
268
269#else
270static __inline void
271__buf_ring_scan(struct buf_ring *mr, void *m, char *file, int line)
272{
273}
274
275static __inline void
276buf_ring_scan(struct buf_ring *mr, void *m, char *file, int line)
277{
278}
279#endif
280
281static __inline int
282__buf_ring_enqueue(struct buf_ring *mr, void *m, char *file, int line)
283{
284
285	uint32_t prod, cons, mask;
286	int err;
287
288	mask = mr->br_size - 1;
289	prod = mr->br_prod;
290	mb();
291	cons = mr->br_cons;
292	__buf_ring_scan(mr, m, file, line);
293	if (((prod + 1) & mask) != cons) {
294		KASSERT(mr->br_ring[prod] == NULL, ("overwriting entry"));
295		mr->br_ring[prod] = m;
296		mb();
297		mr->br_prod = (prod + 1) & mask;
298		err = 0;
299	} else
300		err = ENOBUFS;
301
302	return (err);
303}
304
305static __inline int
306buf_ring_enqueue_(struct buf_ring *mr, void *m, char *file, int line)
307{
308	int err;
309
310	mtx_lock(&mr->br_lock);
311	err = __buf_ring_enqueue(mr, m, file, line);
312	mtx_unlock(&mr->br_lock);
313
314	return (err);
315}
316
317#define buf_ring_enqueue(mr, m) buf_ring_enqueue_((mr), (m), __FILE__, __LINE__)
318
319
320static __inline void *
321buf_ring_peek(struct buf_ring *mr)
322{
323	int prod, cons, mask;
324	caddr_t *ring, m;
325
326	ring = (caddr_t *)mr->br_ring;
327	mask = mr->br_size - 1;
328	cons = mr->br_cons;
329	prod = mr->br_prod;
330	m = NULL;
331	if (cons != prod)
332		m = ring[cons];
333
334	return (m);
335}
336
337#define DBG_RX          (1 << 0)
338static const int debug_flags = DBG_RX;
339
340#ifdef DEBUG_PRINT
341#define DBG(flag, msg) do {	\
342	if ((flag & debug_flags))	\
343		printf msg; \
344} while (0)
345#else
346#define DBG(...)
347#endif
348
349#include <sys/syslog.h>
350
351#define promisc_rx_mode(rm)  ((rm)->port->ifp->if_flags & IFF_PROMISC)
352#define allmulti_rx_mode(rm) ((rm)->port->ifp->if_flags & IFF_ALLMULTI)
353
354#define CH_ERR(adap, fmt, ...) log(LOG_ERR, fmt, ##__VA_ARGS__)
355#define CH_WARN(adap, fmt, ...)	log(LOG_WARNING, fmt, ##__VA_ARGS__)
356#define CH_ALERT(adap, fmt, ...) log(LOG_ALERT, fmt, ##__VA_ARGS__)
357
358#define t3_os_sleep(x) DELAY((x) * 1000)
359
360#define test_and_clear_bit(bit, p) atomic_cmpset_int((p), ((*(p)) | (1<<bit)), ((*(p)) & ~(1<<bit)))
361
362#define max_t(type, a, b) (type)max((a), (b))
363#define net_device ifnet
364#define cpu_to_be32            htobe32
365
366/* Standard PHY definitions */
367#define BMCR_LOOPBACK		BMCR_LOOP
368#define BMCR_ISOLATE		BMCR_ISO
369#define BMCR_ANENABLE		BMCR_AUTOEN
370#define BMCR_SPEED1000		BMCR_SPEED1
371#define BMCR_SPEED100		BMCR_SPEED0
372#define BMCR_ANRESTART		BMCR_STARTNEG
373#define BMCR_FULLDPLX		BMCR_FDX
374#define BMSR_LSTATUS		BMSR_LINK
375#define BMSR_ANEGCOMPLETE	BMSR_ACOMP
376
377#define MII_LPA			MII_ANLPAR
378#define MII_ADVERTISE		MII_ANAR
379#define MII_CTRL1000		MII_100T2CR
380
381#define ADVERTISE_PAUSE_CAP	ANAR_FC
382#define ADVERTISE_PAUSE_ASYM	ANAR_X_PAUSE_ASYM
383#define ADVERTISE_PAUSE		ANAR_X_PAUSE_SYM
384#define ADVERTISE_1000HALF	ANAR_X_HD
385#define ADVERTISE_1000FULL	ANAR_X_FD
386#define ADVERTISE_10FULL	ANAR_10_FD
387#define ADVERTISE_10HALF	ANAR_10
388#define ADVERTISE_100FULL	ANAR_TX_FD
389#define ADVERTISE_100HALF	ANAR_TX
390
391
392#define ADVERTISE_1000XHALF	ANAR_X_HD
393#define ADVERTISE_1000XFULL	ANAR_X_FD
394#define ADVERTISE_1000XPSE_ASYM	ANAR_X_PAUSE_ASYM
395#define ADVERTISE_1000XPAUSE	ANAR_X_PAUSE_SYM
396
397#define ADVERTISE_CSMA		ANAR_CSMA
398#define ADVERTISE_NPAGE		ANAR_NP
399
400
401/* Standard PCI Extended Capaibilities definitions */
402#define PCI_CAP_ID_VPD	0x03
403#define PCI_VPD_ADDR	2
404#define PCI_VPD_ADDR_F	0x8000
405#define PCI_VPD_DATA	4
406
407#define PCI_CAP_ID_EXP	0x10
408#define PCI_EXP_DEVCTL	8
409#define PCI_EXP_DEVCTL_PAYLOAD 0x00e0
410#define PCI_EXP_LNKCTL	16
411#define PCI_EXP_LNKSTA	18
412
413/*
414 * Linux compatibility macros
415 */
416
417/* Some simple translations */
418#define __devinit
419#define udelay(x) DELAY(x)
420#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
421#define le32_to_cpu(x) le32toh(x)
422#define le16_to_cpu(x) le16toh(x)
423#define cpu_to_le32(x) htole32(x)
424#define swab32(x) bswap32(x)
425#define simple_strtoul strtoul
426
427
428#ifndef LINUX_TYPES_DEFINED
429typedef uint8_t 	u8;
430typedef uint16_t 	u16;
431typedef uint32_t 	u32;
432typedef uint64_t 	u64;
433
434typedef uint8_t		__u8;
435typedef uint16_t	__u16;
436typedef uint32_t	__u32;
437typedef uint8_t		__be8;
438typedef uint16_t	__be16;
439typedef uint32_t	__be32;
440typedef uint64_t	__be64;
441#endif
442
443
444#if BYTE_ORDER == BIG_ENDIAN
445#define __BIG_ENDIAN_BITFIELD
446#elif BYTE_ORDER == LITTLE_ENDIAN
447#define __LITTLE_ENDIAN_BITFIELD
448#else
449#error "Must set BYTE_ORDER"
450#endif
451
452/* Indicates what features are supported by the interface. */
453#define SUPPORTED_10baseT_Half          (1 << 0)
454#define SUPPORTED_10baseT_Full          (1 << 1)
455#define SUPPORTED_100baseT_Half         (1 << 2)
456#define SUPPORTED_100baseT_Full         (1 << 3)
457#define SUPPORTED_1000baseT_Half        (1 << 4)
458#define SUPPORTED_1000baseT_Full        (1 << 5)
459#define SUPPORTED_Autoneg               (1 << 6)
460#define SUPPORTED_TP                    (1 << 7)
461#define SUPPORTED_AUI                   (1 << 8)
462#define SUPPORTED_MII                   (1 << 9)
463#define SUPPORTED_FIBRE                 (1 << 10)
464#define SUPPORTED_BNC                   (1 << 11)
465#define SUPPORTED_10000baseT_Full       (1 << 12)
466#define SUPPORTED_Pause                 (1 << 13)
467#define SUPPORTED_Asym_Pause            (1 << 14)
468
469/* Indicates what features are advertised by the interface. */
470#define ADVERTISED_10baseT_Half         (1 << 0)
471#define ADVERTISED_10baseT_Full         (1 << 1)
472#define ADVERTISED_100baseT_Half        (1 << 2)
473#define ADVERTISED_100baseT_Full        (1 << 3)
474#define ADVERTISED_1000baseT_Half       (1 << 4)
475#define ADVERTISED_1000baseT_Full       (1 << 5)
476#define ADVERTISED_Autoneg              (1 << 6)
477#define ADVERTISED_TP                   (1 << 7)
478#define ADVERTISED_AUI                  (1 << 8)
479#define ADVERTISED_MII                  (1 << 9)
480#define ADVERTISED_FIBRE                (1 << 10)
481#define ADVERTISED_BNC                  (1 << 11)
482#define ADVERTISED_10000baseT_Full      (1 << 12)
483#define ADVERTISED_Pause                (1 << 13)
484#define ADVERTISED_Asym_Pause           (1 << 14)
485
486/* Enable or disable autonegotiation.  If this is set to enable,
487 * the forced link modes above are completely ignored.
488 */
489#define AUTONEG_DISABLE         0x00
490#define AUTONEG_ENABLE          0x01
491
492#define SPEED_10		10
493#define SPEED_100		100
494#define SPEED_1000		1000
495#define SPEED_10000		10000
496#define DUPLEX_HALF		0
497#define DUPLEX_FULL		1
498
499#endif
500