cxgb_osdep.h revision 178800
1167514Skmacy/************************************************************************** 2167514Skmacy 3167514SkmacyCopyright (c) 2007, Chelsio Inc. 4167514SkmacyAll rights reserved. 5167514Skmacy 6167514SkmacyRedistribution and use in source and binary forms, with or without 7167514Skmacymodification, are permitted provided that the following conditions are met: 8167514Skmacy 9167514Skmacy 1. Redistributions of source code must retain the above copyright notice, 10167514Skmacy this list of conditions and the following disclaimer. 11167514Skmacy 12169978Skmacy 2. Neither the name of the Chelsio Corporation nor the names of its 13167514Skmacy contributors may be used to endorse or promote products derived from 14167514Skmacy this software without specific prior written permission. 15167514Skmacy 16167514SkmacyTHIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17167514SkmacyAND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18167514SkmacyIMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19167514SkmacyARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 20167514SkmacyLIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21167514SkmacyCONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22167514SkmacySUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23167514SkmacyINTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24167514SkmacyCONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25167514SkmacyARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26167514SkmacyPOSSIBILITY OF SUCH DAMAGE. 27167514Skmacy 28167514Skmacy 29167514Skmacy$FreeBSD: head/sys/dev/cxgb/cxgb_osdep.h 178800 2008-05-05 22:37:21Z kmacy $ 30167514Skmacy 31167514Skmacy***************************************************************************/ 32167514Skmacy 33167514Skmacy#include <sys/param.h> 34167514Skmacy#include <sys/systm.h> 35167514Skmacy#include <sys/ctype.h> 36167514Skmacy#include <sys/endian.h> 37167514Skmacy#include <sys/bus.h> 38167514Skmacy 39174708Skmacy#include <sys/lock.h> 40174708Skmacy#include <sys/mutex.h> 41174708Skmacy 42167514Skmacy#include <dev/mii/mii.h> 43167514Skmacy 44171471Skmacy#ifdef CONFIG_DEFINED 45171471Skmacy#include <common/cxgb_version.h> 46171471Skmacy#include <cxgb_config.h> 47171471Skmacy#else 48167514Skmacy#include <dev/cxgb/common/cxgb_version.h> 49167526Skmacy#include <dev/cxgb/cxgb_config.h> 50171471Skmacy#endif 51167514Skmacy 52167514Skmacy#ifndef _CXGB_OSDEP_H_ 53167514Skmacy#define _CXGB_OSDEP_H_ 54167514Skmacy 55167514Skmacytypedef struct adapter adapter_t; 56167514Skmacystruct sge_rspq; 57167514Skmacy 58174708Skmacy 59172101Skmacystruct t3_mbuf_hdr { 60172101Skmacy struct mbuf *mh_head; 61172101Skmacy struct mbuf *mh_tail; 62172101Skmacy}; 63172101Skmacy 64178800Skmacy#ifndef PANIC_IF 65169978Skmacy#define PANIC_IF(exp) do { \ 66169978Skmacy if (exp) \ 67174626Skmacy panic("BUG: %s", #exp); \ 68169978Skmacy} while (0) 69178800Skmacy#endif 70169978Skmacy 71169978Skmacy#define m_get_priority(m) ((uintptr_t)(m)->m_pkthdr.rcvif) 72170038Skmacy#define m_set_priority(m, pri) ((m)->m_pkthdr.rcvif = (struct ifnet *)((uintptr_t)pri)) 73174638Skmacy#define m_set_sgl(m, sgl) ((m)->m_pkthdr.header = (sgl)) 74174638Skmacy#define m_get_sgl(m) ((bus_dma_segment_t *)(m)->m_pkthdr.header) 75174638Skmacy#define m_set_sgllen(m, len) ((m)->m_pkthdr.ether_vtag = len) 76174638Skmacy#define m_get_sgllen(m) ((m)->m_pkthdr.ether_vtag) 77169978Skmacy 78174638Skmacy/* 79174638Skmacy * XXX FIXME 80174638Skmacy */ 81174638Skmacy#define m_set_toep(m, a) ((m)->m_pkthdr.header = (a)) 82174638Skmacy#define m_get_toep(m) ((m)->m_pkthdr.header) 83174638Skmacy#define m_set_handler(m, handler) ((m)->m_pkthdr.header = (handler)) 84174638Skmacy 85174638Skmacy#define m_set_socket(m, a) ((m)->m_pkthdr.header = (a)) 86174638Skmacy#define m_get_socket(m) ((m)->m_pkthdr.header) 87174638Skmacy 88176472Skmacy#define KTR_CXGB KTR_SPARE2 89176472Skmacyvoid cxgb_log_tcb(struct adapter *sc, unsigned int tid); 90176472Skmacy 91174638Skmacy#define MT_DONTFREE 128 92174638Skmacy 93167514Skmacy#if __FreeBSD_version > 700030 94167514Skmacy#define INTR_FILTERS 95167514Skmacy#define FIRMWARE_LATEST 96167514Skmacy#endif 97167514Skmacy 98167514Skmacy#if ((__FreeBSD_version > 602103) && (__FreeBSD_version < 700000)) 99167514Skmacy#define FIRMWARE_LATEST 100167514Skmacy#endif 101167514Skmacy 102167514Skmacy#if __FreeBSD_version > 700000 103167514Skmacy#define MSI_SUPPORTED 104167514Skmacy#define TSO_SUPPORTED 105167514Skmacy#define VLAN_SUPPORTED 106167514Skmacy#define TASKQUEUE_CURRENT 107172109Skmacy#else 108172109Skmacy#define if_name(ifp) (ifp)->if_xname 109172109Skmacy#define M_SANITY(m, n) 110167514Skmacy#endif 111167514Skmacy 112169978Skmacy#define __read_mostly __attribute__((__section__(".data.read_mostly"))) 113169978Skmacy 114167514Skmacy/* 115167514Skmacy * Workaround for weird Chelsio issue 116167514Skmacy */ 117167514Skmacy#if __FreeBSD_version > 700029 118167514Skmacy#define PRIV_SUPPORTED 119167514Skmacy#endif 120167514Skmacy 121169978Skmacy#define CXGB_TX_CLEANUP_THRESHOLD 32 122167514Skmacy 123174708Skmacy 124167514Skmacy#ifdef DEBUG_PRINT 125167514Skmacy#define DPRINTF printf 126167514Skmacy#else 127167514Skmacy#define DPRINTF(...) 128167514Skmacy#endif 129167514Skmacy 130167514Skmacy#define TX_MAX_SIZE (1 << 16) /* 64KB */ 131167514Skmacy#define TX_MAX_SEGS 36 /* maximum supported by card */ 132174708Skmacy 133167514Skmacy#define TX_MAX_DESC 4 /* max descriptors per packet */ 134171471Skmacy 135174708Skmacy 136171471Skmacy#define TX_START_MIN_DESC (TX_MAX_DESC << 2) 137171469Skmacy#define TX_START_MAX_DESC (TX_MAX_DESC << 3) /* maximum number of descriptors 138167514Skmacy * call to start used per */ 139171471Skmacy 140170038Skmacy#define TX_CLEAN_MAX_DESC (TX_MAX_DESC << 4) /* maximum tx descriptors 141167514Skmacy * to clean per iteration */ 142174708Skmacy#define TX_WR_SIZE_MAX 11*1024 /* the maximum total size of packets aggregated into a single 143174708Skmacy * TX WR 144174708Skmacy */ 145174708Skmacy#define TX_WR_COUNT_MAX 7 /* the maximum total number of packets that can be 146174708Skmacy * aggregated into a single TX WR 147174708Skmacy */ 148167514Skmacy 149167514Skmacy 150167514Skmacy#if defined(__i386__) || defined(__amd64__) 151167514Skmacy#define mb() __asm volatile("mfence":::"memory") 152167514Skmacy#define rmb() __asm volatile("lfence":::"memory") 153167514Skmacy#define wmb() __asm volatile("sfence" ::: "memory") 154167514Skmacy#define smp_mb() mb() 155167526Skmacy 156174708Skmacy#define L1_CACHE_BYTES 128 157167526Skmacystatic __inline 158167526Skmacyvoid prefetch(void *x) 159167526Skmacy{ 160167526Skmacy __asm volatile("prefetcht0 %0" :: "m" (*(unsigned long *)x)); 161167526Skmacy} 162167560Skmacy 163169978Skmacyextern void kdb_backtrace(void); 164169978Skmacy 165169978Skmacy#define WARN_ON(condition) do { \ 166178800Skmacy if (__predict_false((condition)!=0)) { \ 167169978Skmacy log(LOG_WARNING, "BUG: warning at %s:%d/%s()\n", __FILE__, __LINE__, __FUNCTION__); \ 168169978Skmacy kdb_backtrace(); \ 169169978Skmacy } \ 170169978Skmacy} while (0) 171169978Skmacy 172169978Skmacy 173167528Skmacy#else /* !i386 && !amd64 */ 174167528Skmacy#define mb() 175167528Skmacy#define rmb() 176167528Skmacy#define wmb() 177167528Skmacy#define smp_mb() 178167560Skmacy#define prefetch(x) 179167561Skmacy#define L1_CACHE_BYTES 32 180167526Skmacy#endif 181174708Skmacy 182174708Skmacystruct buf_ring { 183174708Skmacy caddr_t *br_ring; 184174708Skmacy volatile uint32_t br_cons; 185174708Skmacy volatile uint32_t br_prod; 186174708Skmacy int br_size; 187174708Skmacy struct mtx br_lock; 188174708Skmacy}; 189174708Skmacy 190174708Skmacystruct buf_ring *buf_ring_alloc(int count, int flags); 191174708Skmacyvoid buf_ring_free(struct buf_ring *); 192174708Skmacy 193174708Skmacystatic __inline int 194174708Skmacybuf_ring_count(struct buf_ring *mr) 195174708Skmacy{ 196174708Skmacy int size = mr->br_size; 197175311Skmacy uint32_t mask = size - 1; 198174708Skmacy 199174708Skmacy return ((size + mr->br_prod - mr->br_cons) & mask); 200174708Skmacy} 201174708Skmacy 202174708Skmacystatic __inline int 203174708Skmacybuf_ring_empty(struct buf_ring *mr) 204174708Skmacy{ 205174708Skmacy return (mr->br_cons == mr->br_prod); 206174708Skmacy} 207174708Skmacy 208175304Skmacystatic __inline int 209175304Skmacybuf_ring_full(struct buf_ring *mr) 210175304Skmacy{ 211175311Skmacy uint32_t mask; 212175311Skmacy 213175311Skmacy mask = mr->br_size - 1; 214175311Skmacy return (mr->br_cons == ((mr->br_prod + 1) & mask)); 215175304Skmacy} 216175304Skmacy 217174708Skmacy/* 218174708Skmacy * The producer and consumer are independently locked 219174708Skmacy * this relies on the consumer providing his own serialization 220174708Skmacy * 221174708Skmacy */ 222174708Skmacystatic __inline void * 223174708Skmacybuf_ring_dequeue(struct buf_ring *mr) 224174708Skmacy{ 225175311Skmacy uint32_t prod, cons, mask; 226174708Skmacy caddr_t *ring, m; 227174708Skmacy 228174708Skmacy ring = (caddr_t *)mr->br_ring; 229174708Skmacy mask = mr->br_size - 1; 230174708Skmacy cons = mr->br_cons; 231175304Skmacy mb(); 232174708Skmacy prod = mr->br_prod; 233174708Skmacy m = NULL; 234174708Skmacy if (cons != prod) { 235174708Skmacy m = ring[cons]; 236175311Skmacy ring[cons] = NULL; 237174708Skmacy mr->br_cons = (cons + 1) & mask; 238174708Skmacy mb(); 239174708Skmacy } 240174708Skmacy return (m); 241174708Skmacy} 242174708Skmacy 243175311Skmacy#ifdef DEBUG_BUFRING 244175311Skmacystatic __inline void 245175311Skmacy__buf_ring_scan(struct buf_ring *mr, void *m, char *file, int line) 246175311Skmacy{ 247175311Skmacy int i; 248174708Skmacy 249175311Skmacy for (i = 0; i < mr->br_size; i++) 250175311Skmacy if (m == mr->br_ring[i]) 251175311Skmacy panic("%s:%d m=%p present prod=%d cons=%d idx=%d", file, 252175311Skmacy line, m, mr->br_prod, mr->br_cons, i); 253175311Skmacy} 254175311Skmacy 255175311Skmacystatic __inline void 256175311Skmacybuf_ring_scan(struct buf_ring *mr, void *m, char *file, int line) 257175311Skmacy{ 258175311Skmacy mtx_lock(&mr->br_lock); 259175311Skmacy __buf_ring_scan(mr, m, file, line); 260175311Skmacy mtx_unlock(&mr->br_lock); 261175311Skmacy} 262175311Skmacy 263175311Skmacy#else 264175311Skmacystatic __inline void 265175311Skmacy__buf_ring_scan(struct buf_ring *mr, void *m, char *file, int line) 266175311Skmacy{ 267175311Skmacy} 268175311Skmacy 269175311Skmacystatic __inline void 270175311Skmacybuf_ring_scan(struct buf_ring *mr, void *m, char *file, int line) 271175311Skmacy{ 272175311Skmacy} 273175311Skmacy#endif 274175311Skmacy 275174708Skmacystatic __inline int 276175311Skmacy__buf_ring_enqueue(struct buf_ring *mr, void *m, char *file, int line) 277174708Skmacy{ 278174708Skmacy 279175311Skmacy uint32_t prod, cons, mask; 280175311Skmacy int err; 281174708Skmacy 282175304Skmacy mask = mr->br_size - 1; 283175304Skmacy prod = mr->br_prod; 284175304Skmacy mb(); 285174708Skmacy cons = mr->br_cons; 286175311Skmacy __buf_ring_scan(mr, m, file, line); 287174708Skmacy if (((prod + 1) & mask) != cons) { 288175311Skmacy KASSERT(mr->br_ring[prod] == NULL, ("overwriting entry")); 289174708Skmacy mr->br_ring[prod] = m; 290174708Skmacy mb(); 291174708Skmacy mr->br_prod = (prod + 1) & mask; 292174708Skmacy err = 0; 293174708Skmacy } else 294174708Skmacy err = ENOBUFS; 295174708Skmacy 296174708Skmacy return (err); 297174708Skmacy} 298174708Skmacy 299174708Skmacystatic __inline int 300175311Skmacybuf_ring_enqueue_(struct buf_ring *mr, void *m, char *file, int line) 301174708Skmacy{ 302174708Skmacy int err; 303174708Skmacy 304174708Skmacy mtx_lock(&mr->br_lock); 305175311Skmacy err = __buf_ring_enqueue(mr, m, file, line); 306174708Skmacy mtx_unlock(&mr->br_lock); 307174708Skmacy 308174708Skmacy return (err); 309174708Skmacy} 310174708Skmacy 311175311Skmacy#define buf_ring_enqueue(mr, m) buf_ring_enqueue_((mr), (m), __FILE__, __LINE__) 312175311Skmacy 313175311Skmacy 314174708Skmacystatic __inline void * 315174708Skmacybuf_ring_peek(struct buf_ring *mr) 316174708Skmacy{ 317174708Skmacy int prod, cons, mask; 318174708Skmacy caddr_t *ring, m; 319174708Skmacy 320174708Skmacy ring = (caddr_t *)mr->br_ring; 321174708Skmacy mask = mr->br_size - 1; 322174708Skmacy cons = mr->br_cons; 323174708Skmacy prod = mr->br_prod; 324174708Skmacy m = NULL; 325174708Skmacy if (cons != prod) 326174708Skmacy m = ring[cons]; 327174708Skmacy 328174708Skmacy return (m); 329174708Skmacy} 330174708Skmacy 331167514Skmacy#define DBG_RX (1 << 0) 332167514Skmacystatic const int debug_flags = DBG_RX; 333167514Skmacy 334167514Skmacy#ifdef DEBUG_PRINT 335167514Skmacy#define DBG(flag, msg) do { \ 336167514Skmacy if ((flag & debug_flags)) \ 337167514Skmacy printf msg; \ 338167514Skmacy} while (0) 339167514Skmacy#else 340167514Skmacy#define DBG(...) 341167514Skmacy#endif 342167514Skmacy 343176472Skmacy#include <sys/syslog.h> 344176472Skmacy 345167514Skmacy#define promisc_rx_mode(rm) ((rm)->port->ifp->if_flags & IFF_PROMISC) 346167514Skmacy#define allmulti_rx_mode(rm) ((rm)->port->ifp->if_flags & IFF_ALLMULTI) 347167514Skmacy 348176472Skmacy#define CH_ERR(adap, fmt, ...) log(LOG_ERR, fmt, ##__VA_ARGS__) 349176472Skmacy#define CH_WARN(adap, fmt, ...) log(LOG_WARNING, fmt, ##__VA_ARGS__) 350176472Skmacy#define CH_ALERT(adap, fmt, ...) log(LOG_ALERT, fmt, ##__VA_ARGS__) 351167514Skmacy 352167514Skmacy#define t3_os_sleep(x) DELAY((x) * 1000) 353167514Skmacy 354174708Skmacy#define test_and_clear_bit(bit, p) atomic_cmpset_int((p), ((*(p)) | (1<<bit)), ((*(p)) & ~(1<<bit))) 355169978Skmacy 356167746Skmacy#define max_t(type, a, b) (type)max((a), (b)) 357169978Skmacy#define net_device ifnet 358171471Skmacy#define cpu_to_be32 htobe32 359167746Skmacy 360167514Skmacy/* Standard PHY definitions */ 361167514Skmacy#define BMCR_LOOPBACK BMCR_LOOP 362167514Skmacy#define BMCR_ISOLATE BMCR_ISO 363167514Skmacy#define BMCR_ANENABLE BMCR_AUTOEN 364167514Skmacy#define BMCR_SPEED1000 BMCR_SPEED1 365167514Skmacy#define BMCR_SPEED100 BMCR_SPEED0 366167514Skmacy#define BMCR_ANRESTART BMCR_STARTNEG 367167514Skmacy#define BMCR_FULLDPLX BMCR_FDX 368167514Skmacy#define BMSR_LSTATUS BMSR_LINK 369167514Skmacy#define BMSR_ANEGCOMPLETE BMSR_ACOMP 370167514Skmacy 371167514Skmacy#define MII_LPA MII_ANLPAR 372167514Skmacy#define MII_ADVERTISE MII_ANAR 373167514Skmacy#define MII_CTRL1000 MII_100T2CR 374167514Skmacy 375167514Skmacy#define ADVERTISE_PAUSE_CAP ANAR_FC 376176472Skmacy#define ADVERTISE_PAUSE_ASYM ANAR_X_PAUSE_ASYM 377176472Skmacy#define ADVERTISE_PAUSE ANAR_X_PAUSE_SYM 378167514Skmacy#define ADVERTISE_1000HALF ANAR_X_HD 379167514Skmacy#define ADVERTISE_1000FULL ANAR_X_FD 380167514Skmacy#define ADVERTISE_10FULL ANAR_10_FD 381167514Skmacy#define ADVERTISE_10HALF ANAR_10 382167514Skmacy#define ADVERTISE_100FULL ANAR_TX_FD 383167514Skmacy#define ADVERTISE_100HALF ANAR_TX 384167514Skmacy 385176472Skmacy 386176472Skmacy#define ADVERTISE_1000XHALF ANAR_X_HD 387176472Skmacy#define ADVERTISE_1000XFULL ANAR_X_FD 388176472Skmacy#define ADVERTISE_1000XPSE_ASYM ANAR_X_PAUSE_ASYM 389176472Skmacy#define ADVERTISE_1000XPAUSE ANAR_X_PAUSE_SYM 390176472Skmacy 391176472Skmacy 392167514Skmacy/* Standard PCI Extended Capaibilities definitions */ 393167514Skmacy#define PCI_CAP_ID_VPD 0x03 394167514Skmacy#define PCI_VPD_ADDR 2 395167514Skmacy#define PCI_VPD_ADDR_F 0x8000 396167514Skmacy#define PCI_VPD_DATA 4 397167514Skmacy 398167514Skmacy#define PCI_CAP_ID_EXP 0x10 399167514Skmacy#define PCI_EXP_DEVCTL 8 400167514Skmacy#define PCI_EXP_DEVCTL_PAYLOAD 0x00e0 401167514Skmacy#define PCI_EXP_LNKCTL 16 402167514Skmacy#define PCI_EXP_LNKSTA 18 403167514Skmacy 404167514Skmacy/* 405167514Skmacy * Linux compatibility macros 406167514Skmacy */ 407167514Skmacy 408167514Skmacy/* Some simple translations */ 409167514Skmacy#define __devinit 410167514Skmacy#define udelay(x) DELAY(x) 411167514Skmacy#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) 412167514Skmacy#define le32_to_cpu(x) le32toh(x) 413176472Skmacy#define le16_to_cpu(x) le16toh(x) 414167514Skmacy#define cpu_to_le32(x) htole32(x) 415167514Skmacy#define swab32(x) bswap32(x) 416167514Skmacy#define simple_strtoul strtoul 417167514Skmacy 418174708Skmacy 419176472Skmacy#ifndef LINUX_TYPES_DEFINED 420176472Skmacytypedef uint8_t u8; 421176472Skmacytypedef uint16_t u16; 422176472Skmacytypedef uint32_t u32; 423176472Skmacytypedef uint64_t u64; 424174708Skmacy 425176472Skmacytypedef uint8_t __u8; 426176472Skmacytypedef uint16_t __u16; 427176472Skmacytypedef uint32_t __u32; 428176472Skmacytypedef uint8_t __be8; 429176472Skmacytypedef uint16_t __be16; 430176472Skmacytypedef uint32_t __be32; 431176472Skmacytypedef uint64_t __be64; 432176472Skmacy#endif 433167514Skmacy 434174708Skmacy 435167514Skmacy#if BYTE_ORDER == BIG_ENDIAN 436167514Skmacy#define __BIG_ENDIAN_BITFIELD 437167514Skmacy#elif BYTE_ORDER == LITTLE_ENDIAN 438167514Skmacy#define __LITTLE_ENDIAN_BITFIELD 439167514Skmacy#else 440167514Skmacy#error "Must set BYTE_ORDER" 441167514Skmacy#endif 442167514Skmacy 443167514Skmacy/* Indicates what features are supported by the interface. */ 444167514Skmacy#define SUPPORTED_10baseT_Half (1 << 0) 445167514Skmacy#define SUPPORTED_10baseT_Full (1 << 1) 446167514Skmacy#define SUPPORTED_100baseT_Half (1 << 2) 447167514Skmacy#define SUPPORTED_100baseT_Full (1 << 3) 448167514Skmacy#define SUPPORTED_1000baseT_Half (1 << 4) 449167514Skmacy#define SUPPORTED_1000baseT_Full (1 << 5) 450167514Skmacy#define SUPPORTED_Autoneg (1 << 6) 451167514Skmacy#define SUPPORTED_TP (1 << 7) 452167514Skmacy#define SUPPORTED_AUI (1 << 8) 453167514Skmacy#define SUPPORTED_MII (1 << 9) 454167514Skmacy#define SUPPORTED_FIBRE (1 << 10) 455167514Skmacy#define SUPPORTED_BNC (1 << 11) 456167514Skmacy#define SUPPORTED_10000baseT_Full (1 << 12) 457167514Skmacy#define SUPPORTED_Pause (1 << 13) 458167514Skmacy#define SUPPORTED_Asym_Pause (1 << 14) 459167514Skmacy 460167514Skmacy/* Indicates what features are advertised by the interface. */ 461167514Skmacy#define ADVERTISED_10baseT_Half (1 << 0) 462167514Skmacy#define ADVERTISED_10baseT_Full (1 << 1) 463167514Skmacy#define ADVERTISED_100baseT_Half (1 << 2) 464167514Skmacy#define ADVERTISED_100baseT_Full (1 << 3) 465167514Skmacy#define ADVERTISED_1000baseT_Half (1 << 4) 466167514Skmacy#define ADVERTISED_1000baseT_Full (1 << 5) 467167514Skmacy#define ADVERTISED_Autoneg (1 << 6) 468167514Skmacy#define ADVERTISED_TP (1 << 7) 469167514Skmacy#define ADVERTISED_AUI (1 << 8) 470167514Skmacy#define ADVERTISED_MII (1 << 9) 471167514Skmacy#define ADVERTISED_FIBRE (1 << 10) 472167514Skmacy#define ADVERTISED_BNC (1 << 11) 473167514Skmacy#define ADVERTISED_10000baseT_Full (1 << 12) 474167514Skmacy#define ADVERTISED_Pause (1 << 13) 475167514Skmacy#define ADVERTISED_Asym_Pause (1 << 14) 476167514Skmacy 477167514Skmacy/* Enable or disable autonegotiation. If this is set to enable, 478167514Skmacy * the forced link modes above are completely ignored. 479167514Skmacy */ 480167514Skmacy#define AUTONEG_DISABLE 0x00 481167514Skmacy#define AUTONEG_ENABLE 0x01 482167514Skmacy 483167514Skmacy#define SPEED_10 10 484167514Skmacy#define SPEED_100 100 485167514Skmacy#define SPEED_1000 1000 486167514Skmacy#define SPEED_10000 10000 487167514Skmacy#define DUPLEX_HALF 0 488167514Skmacy#define DUPLEX_FULL 1 489167514Skmacy 490167514Skmacy#endif 491