cxgb_osdep.h revision 175304
1/************************************************************************** 2 3Copyright (c) 2007, Chelsio Inc. 4All rights reserved. 5 6Redistribution and use in source and binary forms, with or without 7modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Neither the name of the Chelsio Corporation nor the names of its 13 contributors may be used to endorse or promote products derived from 14 this software without specific prior written permission. 15 16THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 20LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26POSSIBILITY OF SUCH DAMAGE. 27 28 29$FreeBSD: head/sys/dev/cxgb/cxgb_osdep.h 175304 2008-01-13 22:37:09Z kmacy $ 30 31***************************************************************************/ 32 33#include <sys/param.h> 34#include <sys/systm.h> 35#include <sys/ctype.h> 36#include <sys/endian.h> 37#include <sys/bus.h> 38 39#include <sys/lock.h> 40#include <sys/mutex.h> 41 42#include <dev/mii/mii.h> 43 44#ifdef CONFIG_DEFINED 45#include <common/cxgb_version.h> 46#include <cxgb_config.h> 47#else 48#include <dev/cxgb/common/cxgb_version.h> 49#include <dev/cxgb/cxgb_config.h> 50#endif 51 52#ifndef _CXGB_OSDEP_H_ 53#define _CXGB_OSDEP_H_ 54 55typedef struct adapter adapter_t; 56struct sge_rspq; 57 58 59struct t3_mbuf_hdr { 60 struct mbuf *mh_head; 61 struct mbuf *mh_tail; 62}; 63 64#define PANIC_IF(exp) do { \ 65 if (exp) \ 66 panic("BUG: %s", #exp); \ 67} while (0) 68 69#define m_get_priority(m) ((uintptr_t)(m)->m_pkthdr.rcvif) 70#define m_set_priority(m, pri) ((m)->m_pkthdr.rcvif = (struct ifnet *)((uintptr_t)pri)) 71#define m_set_sgl(m, sgl) ((m)->m_pkthdr.header = (sgl)) 72#define m_get_sgl(m) ((bus_dma_segment_t *)(m)->m_pkthdr.header) 73#define m_set_sgllen(m, len) ((m)->m_pkthdr.ether_vtag = len) 74#define m_get_sgllen(m) ((m)->m_pkthdr.ether_vtag) 75 76/* 77 * XXX FIXME 78 */ 79#define m_set_toep(m, a) ((m)->m_pkthdr.header = (a)) 80#define m_get_toep(m) ((m)->m_pkthdr.header) 81#define m_set_handler(m, handler) ((m)->m_pkthdr.header = (handler)) 82 83#define m_set_socket(m, a) ((m)->m_pkthdr.header = (a)) 84#define m_get_socket(m) ((m)->m_pkthdr.header) 85 86#define MT_DONTFREE 128 87 88#if __FreeBSD_version > 700030 89#define INTR_FILTERS 90#define FIRMWARE_LATEST 91#endif 92 93#if ((__FreeBSD_version > 602103) && (__FreeBSD_version < 700000)) 94#define FIRMWARE_LATEST 95#endif 96 97#if __FreeBSD_version > 700000 98#define MSI_SUPPORTED 99#define TSO_SUPPORTED 100#define VLAN_SUPPORTED 101#define TASKQUEUE_CURRENT 102#else 103#define if_name(ifp) (ifp)->if_xname 104#define M_SANITY(m, n) 105#endif 106 107#define __read_mostly __attribute__((__section__(".data.read_mostly"))) 108 109/* 110 * Workaround for weird Chelsio issue 111 */ 112#if __FreeBSD_version > 700029 113#define PRIV_SUPPORTED 114#endif 115 116#define CXGB_TX_CLEANUP_THRESHOLD 32 117 118 119#ifdef DEBUG_PRINT 120#define DPRINTF printf 121#else 122#define DPRINTF(...) 123#endif 124 125#define TX_MAX_SIZE (1 << 16) /* 64KB */ 126#define TX_MAX_SEGS 36 /* maximum supported by card */ 127 128#define TX_MAX_DESC 4 /* max descriptors per packet */ 129 130 131#define TX_START_MIN_DESC (TX_MAX_DESC << 2) 132 133 134 135#define TX_START_MAX_DESC (TX_MAX_DESC << 3) /* maximum number of descriptors 136 * call to start used per */ 137 138#define TX_CLEAN_MAX_DESC (TX_MAX_DESC << 4) /* maximum tx descriptors 139 * to clean per iteration */ 140#define TX_WR_SIZE_MAX 11*1024 /* the maximum total size of packets aggregated into a single 141 * TX WR 142 */ 143#define TX_WR_COUNT_MAX 7 /* the maximum total number of packets that can be 144 * aggregated into a single TX WR 145 */ 146 147 148#if defined(__i386__) || defined(__amd64__) 149#define mb() __asm volatile("mfence":::"memory") 150#define rmb() __asm volatile("lfence":::"memory") 151#define wmb() __asm volatile("sfence" ::: "memory") 152#define smp_mb() mb() 153 154#define L1_CACHE_BYTES 128 155static __inline 156void prefetch(void *x) 157{ 158 __asm volatile("prefetcht0 %0" :: "m" (*(unsigned long *)x)); 159} 160 161extern void kdb_backtrace(void); 162 163#define WARN_ON(condition) do { \ 164 if (unlikely((condition)!=0)) { \ 165 log(LOG_WARNING, "BUG: warning at %s:%d/%s()\n", __FILE__, __LINE__, __FUNCTION__); \ 166 kdb_backtrace(); \ 167 } \ 168} while (0) 169 170 171#else /* !i386 && !amd64 */ 172#define mb() 173#define rmb() 174#define wmb() 175#define smp_mb() 176#define prefetch(x) 177#define L1_CACHE_BYTES 32 178#endif 179 180struct buf_ring { 181 caddr_t *br_ring; 182 volatile uint32_t br_cons; 183 volatile uint32_t br_prod; 184 int br_size; 185 struct mtx br_lock; 186}; 187 188struct buf_ring *buf_ring_alloc(int count, int flags); 189void buf_ring_free(struct buf_ring *); 190 191static __inline int 192buf_ring_count(struct buf_ring *mr) 193{ 194 int size = mr->br_size; 195 int mask = size - 1; 196 197 return ((size + mr->br_prod - mr->br_cons) & mask); 198} 199 200static __inline int 201buf_ring_empty(struct buf_ring *mr) 202{ 203 return (mr->br_cons == mr->br_prod); 204} 205 206static __inline int 207buf_ring_full(struct buf_ring *mr) 208{ 209 return (mr->br_cons == (mr->br_prod + 1)); 210} 211 212/* 213 * The producer and consumer are independently locked 214 * this relies on the consumer providing his own serialization 215 * 216 */ 217static __inline void * 218buf_ring_dequeue(struct buf_ring *mr) 219{ 220 int prod, cons, mask; 221 caddr_t *ring, m; 222 223 ring = (caddr_t *)mr->br_ring; 224 mask = mr->br_size - 1; 225 cons = mr->br_cons; 226 mb(); 227 prod = mr->br_prod; 228 m = NULL; 229 if (cons != prod) { 230 m = ring[cons]; 231 mr->br_cons = (cons + 1) & mask; 232 mb(); 233 } 234 return (m); 235} 236 237 238static __inline int 239__buf_ring_enqueue(struct buf_ring *mr, void *m) 240{ 241 242 int prod, cons, mask, err; 243 244 mask = mr->br_size - 1; 245 prod = mr->br_prod; 246 mb(); 247 cons = mr->br_cons; 248 if (((prod + 1) & mask) != cons) { 249 mr->br_ring[prod] = m; 250 mb(); 251 mr->br_prod = (prod + 1) & mask; 252 err = 0; 253 } else 254 err = ENOBUFS; 255 256 return (err); 257} 258 259static __inline int 260buf_ring_enqueue(struct buf_ring *mr, void *m) 261{ 262 int err; 263 264 mtx_lock(&mr->br_lock); 265 err = __buf_ring_enqueue(mr, m); 266 mtx_unlock(&mr->br_lock); 267 268 return (err); 269} 270 271static __inline void * 272buf_ring_peek(struct buf_ring *mr) 273{ 274 int prod, cons, mask; 275 caddr_t *ring, m; 276 277 ring = (caddr_t *)mr->br_ring; 278 mask = mr->br_size - 1; 279 cons = mr->br_cons; 280 prod = mr->br_prod; 281 m = NULL; 282 if (cons != prod) 283 m = ring[cons]; 284 285 return (m); 286} 287 288#define DBG_RX (1 << 0) 289static const int debug_flags = DBG_RX; 290 291#ifdef DEBUG_PRINT 292#define DBG(flag, msg) do { \ 293 if ((flag & debug_flags)) \ 294 printf msg; \ 295} while (0) 296#else 297#define DBG(...) 298#endif 299 300#define promisc_rx_mode(rm) ((rm)->port->ifp->if_flags & IFF_PROMISC) 301#define allmulti_rx_mode(rm) ((rm)->port->ifp->if_flags & IFF_ALLMULTI) 302 303#define CH_ERR(adap, fmt, ...)device_printf(adap->dev, fmt, ##__VA_ARGS__); 304 305#define CH_WARN(adap, fmt, ...) device_printf(adap->dev, fmt, ##__VA_ARGS__) 306#define CH_ALERT(adap, fmt, ...) device_printf(adap->dev, fmt, ##__VA_ARGS__) 307 308#define t3_os_sleep(x) DELAY((x) * 1000) 309 310#define test_and_clear_bit(bit, p) atomic_cmpset_int((p), ((*(p)) | (1<<bit)), ((*(p)) & ~(1<<bit))) 311 312#define max_t(type, a, b) (type)max((a), (b)) 313#define net_device ifnet 314#define cpu_to_be32 htobe32 315 316/* Standard PHY definitions */ 317#define BMCR_LOOPBACK BMCR_LOOP 318#define BMCR_ISOLATE BMCR_ISO 319#define BMCR_ANENABLE BMCR_AUTOEN 320#define BMCR_SPEED1000 BMCR_SPEED1 321#define BMCR_SPEED100 BMCR_SPEED0 322#define BMCR_ANRESTART BMCR_STARTNEG 323#define BMCR_FULLDPLX BMCR_FDX 324#define BMSR_LSTATUS BMSR_LINK 325#define BMSR_ANEGCOMPLETE BMSR_ACOMP 326 327#define MII_LPA MII_ANLPAR 328#define MII_ADVERTISE MII_ANAR 329#define MII_CTRL1000 MII_100T2CR 330 331#define ADVERTISE_PAUSE_CAP ANAR_FC 332#define ADVERTISE_PAUSE_ASYM 0x0800 333#define ADVERTISE_1000HALF ANAR_X_HD 334#define ADVERTISE_1000FULL ANAR_X_FD 335#define ADVERTISE_10FULL ANAR_10_FD 336#define ADVERTISE_10HALF ANAR_10 337#define ADVERTISE_100FULL ANAR_TX_FD 338#define ADVERTISE_100HALF ANAR_TX 339 340/* Standard PCI Extended Capaibilities definitions */ 341#define PCI_CAP_ID_VPD 0x03 342#define PCI_VPD_ADDR 2 343#define PCI_VPD_ADDR_F 0x8000 344#define PCI_VPD_DATA 4 345 346#define PCI_CAP_ID_EXP 0x10 347#define PCI_EXP_DEVCTL 8 348#define PCI_EXP_DEVCTL_PAYLOAD 0x00e0 349#define PCI_EXP_LNKCTL 16 350#define PCI_EXP_LNKSTA 18 351 352/* 353 * Linux compatibility macros 354 */ 355 356/* Some simple translations */ 357#define __devinit 358#define udelay(x) DELAY(x) 359#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) 360#define le32_to_cpu(x) le32toh(x) 361#define cpu_to_le32(x) htole32(x) 362#define swab32(x) bswap32(x) 363#define simple_strtoul strtoul 364 365 366typedef uint8_t u8; 367typedef uint16_t u16; 368typedef uint32_t u32; 369typedef uint64_t u64; 370 371typedef uint8_t __u8; 372typedef uint16_t __u16; 373typedef uint32_t __u32; 374typedef uint8_t __be8; 375typedef uint16_t __be16; 376typedef uint32_t __be32; 377typedef uint64_t __be64; 378 379 380#if BYTE_ORDER == BIG_ENDIAN 381#define __BIG_ENDIAN_BITFIELD 382#elif BYTE_ORDER == LITTLE_ENDIAN 383#define __LITTLE_ENDIAN_BITFIELD 384#else 385#error "Must set BYTE_ORDER" 386#endif 387 388/* Indicates what features are supported by the interface. */ 389#define SUPPORTED_10baseT_Half (1 << 0) 390#define SUPPORTED_10baseT_Full (1 << 1) 391#define SUPPORTED_100baseT_Half (1 << 2) 392#define SUPPORTED_100baseT_Full (1 << 3) 393#define SUPPORTED_1000baseT_Half (1 << 4) 394#define SUPPORTED_1000baseT_Full (1 << 5) 395#define SUPPORTED_Autoneg (1 << 6) 396#define SUPPORTED_TP (1 << 7) 397#define SUPPORTED_AUI (1 << 8) 398#define SUPPORTED_MII (1 << 9) 399#define SUPPORTED_FIBRE (1 << 10) 400#define SUPPORTED_BNC (1 << 11) 401#define SUPPORTED_10000baseT_Full (1 << 12) 402#define SUPPORTED_Pause (1 << 13) 403#define SUPPORTED_Asym_Pause (1 << 14) 404 405/* Indicates what features are advertised by the interface. */ 406#define ADVERTISED_10baseT_Half (1 << 0) 407#define ADVERTISED_10baseT_Full (1 << 1) 408#define ADVERTISED_100baseT_Half (1 << 2) 409#define ADVERTISED_100baseT_Full (1 << 3) 410#define ADVERTISED_1000baseT_Half (1 << 4) 411#define ADVERTISED_1000baseT_Full (1 << 5) 412#define ADVERTISED_Autoneg (1 << 6) 413#define ADVERTISED_TP (1 << 7) 414#define ADVERTISED_AUI (1 << 8) 415#define ADVERTISED_MII (1 << 9) 416#define ADVERTISED_FIBRE (1 << 10) 417#define ADVERTISED_BNC (1 << 11) 418#define ADVERTISED_10000baseT_Full (1 << 12) 419#define ADVERTISED_Pause (1 << 13) 420#define ADVERTISED_Asym_Pause (1 << 14) 421 422/* Enable or disable autonegotiation. If this is set to enable, 423 * the forced link modes above are completely ignored. 424 */ 425#define AUTONEG_DISABLE 0x00 426#define AUTONEG_ENABLE 0x01 427 428#define SPEED_10 10 429#define SPEED_100 100 430#define SPEED_1000 1000 431#define SPEED_10000 10000 432#define DUPLEX_HALF 0 433#define DUPLEX_FULL 1 434 435#endif 436