cxgb_osdep.h revision 174638
1/**************************************************************************
2
3Copyright (c) 2007, Chelsio Inc.
4All rights reserved.
5
6Redistribution and use in source and binary forms, with or without
7modification, are permitted provided that the following conditions are met:
8
9 1. Redistributions of source code must retain the above copyright notice,
10    this list of conditions and the following disclaimer.
11
12 2. Neither the name of the Chelsio Corporation nor the names of its
13    contributors may be used to endorse or promote products derived from
14    this software without specific prior written permission.
15
16THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
20LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26POSSIBILITY OF SUCH DAMAGE.
27
28
29$FreeBSD: head/sys/dev/cxgb/cxgb_osdep.h 174638 2007-12-16 05:11:42Z kmacy $
30
31***************************************************************************/
32
33#include <sys/param.h>
34#include <sys/systm.h>
35#include <sys/ctype.h>
36#include <sys/endian.h>
37#include <sys/bus.h>
38
39#include <dev/mii/mii.h>
40
41#ifdef CONFIG_DEFINED
42#include <common/cxgb_version.h>
43#include <cxgb_config.h>
44#else
45#include <dev/cxgb/common/cxgb_version.h>
46#include <dev/cxgb/cxgb_config.h>
47#endif
48
49#ifndef _CXGB_OSDEP_H_
50#define _CXGB_OSDEP_H_
51
52typedef struct adapter adapter_t;
53struct sge_rspq;
54
55struct t3_mbuf_hdr {
56	struct mbuf *mh_head;
57	struct mbuf *mh_tail;
58};
59
60
61#define PANIC_IF(exp) do {                  \
62	if (exp)                            \
63		panic("BUG: %s", #exp);      \
64} while (0)
65
66
67#define m_get_priority(m) ((uintptr_t)(m)->m_pkthdr.rcvif)
68#define m_set_priority(m, pri) ((m)->m_pkthdr.rcvif = (struct ifnet *)((uintptr_t)pri))
69#define m_set_sgl(m, sgl) ((m)->m_pkthdr.header = (sgl))
70#define m_get_sgl(m) ((bus_dma_segment_t *)(m)->m_pkthdr.header)
71#define m_set_sgllen(m, len) ((m)->m_pkthdr.ether_vtag = len)
72#define m_get_sgllen(m) ((m)->m_pkthdr.ether_vtag)
73
74/*
75 * XXX FIXME
76 */
77#define m_set_toep(m, a) ((m)->m_pkthdr.header = (a))
78#define m_get_toep(m) ((m)->m_pkthdr.header)
79#define m_set_handler(m, handler) ((m)->m_pkthdr.header = (handler))
80
81#define m_set_socket(m, a) ((m)->m_pkthdr.header = (a))
82#define m_get_socket(m) ((m)->m_pkthdr.header)
83
84#define MT_DONTFREE  128
85
86#if __FreeBSD_version > 700030
87#define INTR_FILTERS
88#define FIRMWARE_LATEST
89#endif
90
91#if ((__FreeBSD_version > 602103) && (__FreeBSD_version < 700000))
92#define FIRMWARE_LATEST
93#endif
94
95#if __FreeBSD_version > 700000
96#define MSI_SUPPORTED
97#define TSO_SUPPORTED
98#define VLAN_SUPPORTED
99#define TASKQUEUE_CURRENT
100#else
101#define if_name(ifp) (ifp)->if_xname
102#define M_SANITY(m, n)
103#endif
104
105#define __read_mostly __attribute__((__section__(".data.read_mostly")))
106
107/*
108 * Workaround for weird Chelsio issue
109 */
110#if __FreeBSD_version > 700029
111#define PRIV_SUPPORTED
112#endif
113
114#define CXGB_TX_CLEANUP_THRESHOLD        32
115
116#ifdef DEBUG_PRINT
117#define DPRINTF printf
118#else
119#define DPRINTF(...)
120#endif
121
122#define TX_MAX_SIZE                (1 << 16)    /* 64KB                          */
123#define TX_MAX_SEGS                      36     /* maximum supported by card     */
124#define TX_MAX_DESC                       4     /* max descriptors per packet    */
125
126#define TX_START_MIN_DESC  (TX_MAX_DESC << 2)
127
128#if 0
129#define TX_START_MAX_DESC (TX_ETH_Q_SIZE >> 2)  /* maximum number of descriptors */
130#endif
131
132#define TX_START_MAX_DESC (TX_MAX_DESC << 3)    /* maximum number of descriptors
133						 * call to start used per 	 */
134
135#define TX_CLEAN_MAX_DESC (TX_MAX_DESC << 4)    /* maximum tx descriptors
136						 * to clean per iteration        */
137
138
139#if defined(__i386__) || defined(__amd64__)
140#define mb()    __asm volatile("mfence":::"memory")
141#define rmb()   __asm volatile("lfence":::"memory")
142#define wmb()   __asm volatile("sfence" ::: "memory")
143#define smp_mb() mb()
144
145#define L1_CACHE_BYTES 64
146static __inline
147void prefetch(void *x)
148{
149        __asm volatile("prefetcht0 %0" :: "m" (*(unsigned long *)x));
150}
151
152extern void kdb_backtrace(void);
153
154#define WARN_ON(condition) do { \
155        if (unlikely((condition)!=0)) { \
156                log(LOG_WARNING, "BUG: warning at %s:%d/%s()\n", __FILE__, __LINE__, __FUNCTION__); \
157                kdb_backtrace(); \
158        } \
159} while (0)
160
161
162#else /* !i386 && !amd64 */
163#define mb()
164#define rmb()
165#define wmb()
166#define smp_mb()
167#define prefetch(x)
168#define L1_CACHE_BYTES 32
169#endif
170#define DBG_RX          (1 << 0)
171static const int debug_flags = DBG_RX;
172
173#ifdef DEBUG_PRINT
174#define DBG(flag, msg) do {	\
175	if ((flag & debug_flags))	\
176		printf msg; \
177} while (0)
178#else
179#define DBG(...)
180#endif
181
182#define promisc_rx_mode(rm)  ((rm)->port->ifp->if_flags & IFF_PROMISC)
183#define allmulti_rx_mode(rm) ((rm)->port->ifp->if_flags & IFF_ALLMULTI)
184
185#define CH_ERR(adap, fmt, ...)device_printf(adap->dev, fmt, ##__VA_ARGS__);
186
187#define CH_WARN(adap, fmt, ...)	device_printf(adap->dev, fmt, ##__VA_ARGS__)
188#define CH_ALERT(adap, fmt, ...) device_printf(adap->dev, fmt, ##__VA_ARGS__)
189
190#define t3_os_sleep(x) DELAY((x) * 1000)
191
192#define test_and_clear_bit(bit, p) atomic_cmpset_int((p), ((*(p)) | bit), ((*(p)) & ~bit))
193
194
195#define max_t(type, a, b) (type)max((a), (b))
196#define net_device ifnet
197#define cpu_to_be32            htobe32
198
199
200
201/* Standard PHY definitions */
202#define BMCR_LOOPBACK		BMCR_LOOP
203#define BMCR_ISOLATE		BMCR_ISO
204#define BMCR_ANENABLE		BMCR_AUTOEN
205#define BMCR_SPEED1000		BMCR_SPEED1
206#define BMCR_SPEED100		BMCR_SPEED0
207#define BMCR_ANRESTART		BMCR_STARTNEG
208#define BMCR_FULLDPLX		BMCR_FDX
209#define BMSR_LSTATUS		BMSR_LINK
210#define BMSR_ANEGCOMPLETE	BMSR_ACOMP
211
212#define MII_LPA			MII_ANLPAR
213#define MII_ADVERTISE		MII_ANAR
214#define MII_CTRL1000		MII_100T2CR
215
216#define ADVERTISE_PAUSE_CAP	ANAR_FC
217#define ADVERTISE_PAUSE_ASYM	0x0800
218#define ADVERTISE_1000HALF	ANAR_X_HD
219#define ADVERTISE_1000FULL	ANAR_X_FD
220#define ADVERTISE_10FULL	ANAR_10_FD
221#define ADVERTISE_10HALF	ANAR_10
222#define ADVERTISE_100FULL	ANAR_TX_FD
223#define ADVERTISE_100HALF	ANAR_TX
224
225/* Standard PCI Extended Capaibilities definitions */
226#define PCI_CAP_ID_VPD	0x03
227#define PCI_VPD_ADDR	2
228#define PCI_VPD_ADDR_F	0x8000
229#define PCI_VPD_DATA	4
230
231#define PCI_CAP_ID_EXP	0x10
232#define PCI_EXP_DEVCTL	8
233#define PCI_EXP_DEVCTL_PAYLOAD 0x00e0
234#define PCI_EXP_LNKCTL	16
235#define PCI_EXP_LNKSTA	18
236
237/*
238 * Linux compatibility macros
239 */
240
241/* Some simple translations */
242#define __devinit
243#define udelay(x) DELAY(x)
244#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
245#define le32_to_cpu(x) le32toh(x)
246#define cpu_to_le32(x) htole32(x)
247#define swab32(x) bswap32(x)
248#define simple_strtoul strtoul
249
250/* More types and endian definitions */
251typedef uint8_t u8;
252typedef uint16_t u16;
253typedef uint32_t u32;
254typedef uint64_t u64;
255
256typedef uint8_t	__u8;
257typedef uint16_t __u16;
258typedef uint32_t __u32;
259typedef uint8_t __be8;
260typedef uint16_t __be16;
261typedef uint32_t __be32;
262typedef uint64_t __be64;
263
264#if BYTE_ORDER == BIG_ENDIAN
265#define __BIG_ENDIAN_BITFIELD
266#elif BYTE_ORDER == LITTLE_ENDIAN
267#define __LITTLE_ENDIAN_BITFIELD
268#else
269#error "Must set BYTE_ORDER"
270#endif
271
272/* Indicates what features are supported by the interface. */
273#define SUPPORTED_10baseT_Half          (1 << 0)
274#define SUPPORTED_10baseT_Full          (1 << 1)
275#define SUPPORTED_100baseT_Half         (1 << 2)
276#define SUPPORTED_100baseT_Full         (1 << 3)
277#define SUPPORTED_1000baseT_Half        (1 << 4)
278#define SUPPORTED_1000baseT_Full        (1 << 5)
279#define SUPPORTED_Autoneg               (1 << 6)
280#define SUPPORTED_TP                    (1 << 7)
281#define SUPPORTED_AUI                   (1 << 8)
282#define SUPPORTED_MII                   (1 << 9)
283#define SUPPORTED_FIBRE                 (1 << 10)
284#define SUPPORTED_BNC                   (1 << 11)
285#define SUPPORTED_10000baseT_Full       (1 << 12)
286#define SUPPORTED_Pause                 (1 << 13)
287#define SUPPORTED_Asym_Pause            (1 << 14)
288
289/* Indicates what features are advertised by the interface. */
290#define ADVERTISED_10baseT_Half         (1 << 0)
291#define ADVERTISED_10baseT_Full         (1 << 1)
292#define ADVERTISED_100baseT_Half        (1 << 2)
293#define ADVERTISED_100baseT_Full        (1 << 3)
294#define ADVERTISED_1000baseT_Half       (1 << 4)
295#define ADVERTISED_1000baseT_Full       (1 << 5)
296#define ADVERTISED_Autoneg              (1 << 6)
297#define ADVERTISED_TP                   (1 << 7)
298#define ADVERTISED_AUI                  (1 << 8)
299#define ADVERTISED_MII                  (1 << 9)
300#define ADVERTISED_FIBRE                (1 << 10)
301#define ADVERTISED_BNC                  (1 << 11)
302#define ADVERTISED_10000baseT_Full      (1 << 12)
303#define ADVERTISED_Pause                (1 << 13)
304#define ADVERTISED_Asym_Pause           (1 << 14)
305
306/* Enable or disable autonegotiation.  If this is set to enable,
307 * the forced link modes above are completely ignored.
308 */
309#define AUTONEG_DISABLE         0x00
310#define AUTONEG_ENABLE          0x01
311
312#define SPEED_10		10
313#define SPEED_100		100
314#define SPEED_1000		1000
315#define SPEED_10000		10000
316#define DUPLEX_HALF		0
317#define DUPLEX_FULL		1
318
319#endif
320