if_ath_pci.c revision 246453
1148382Spjd/*- 2148382Spjd * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting 3148382Spjd * All rights reserved. 4148382Spjd * 5148382Spjd * Redistribution and use in source and binary forms, with or without 6148382Spjd * modification, are permitted provided that the following conditions 7148382Spjd * are met: 8148382Spjd * 1. Redistributions of source code must retain the above copyright 9148382Spjd * notice, this list of conditions and the following disclaimer, 10148382Spjd * without modification. 11148382Spjd * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12148382Spjd * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 13155174Spjd * redistribution must be conditioned upon including a substantially 14148382Spjd * similar Disclaimer requirement for further binary redistribution. 15148382Spjd * 16148382Spjd * NO WARRANTY 17148382Spjd * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18148382Spjd * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19148382Spjd * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 20148382Spjd * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 21148382Spjd * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 22148382Spjd * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23148382Spjd * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24148382Spjd * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 25148382Spjd * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26148382Spjd * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27154473Spjd * THE POSSIBILITY OF SUCH DAMAGES. 28154473Spjd */ 29154473Spjd 30148382Spjd#include <sys/cdefs.h> 31148382Spjd__FBSDID("$FreeBSD: head/sys/dev/ath/if_ath_pci.c 246453 2013-02-07 07:50:16Z adrian $"); 32148382Spjd 33148382Spjd/* 34148382Spjd * PCI/Cardbus front-end for the Atheros Wireless LAN controller driver. 35148382Spjd */ 36148382Spjd#include "opt_ath.h" 37148382Spjd 38148382Spjd#include <sys/param.h> 39148382Spjd#include <sys/systm.h> 40148382Spjd#include <sys/module.h> 41148382Spjd#include <sys/kernel.h> 42148382Spjd#include <sys/lock.h> 43148382Spjd#include <sys/mutex.h> 44254936Smav#include <sys/errno.h> 45254936Smav 46148382Spjd#include <machine/bus.h> 47227309Sed#include <machine/resource.h> 48227309Sed#include <sys/bus.h> 49153251Spjd#include <sys/rman.h> 50254936Smav 51254936Smav#include <sys/socket.h> 52153251Spjd 53153251Spjd#include <net/if.h> 54153251Spjd#include <net/if_media.h> 55148382Spjd#include <net/if_arp.h> 56254936Smav 57254936Smav#include <net80211/ieee80211_var.h> 58254936Smav 59254936Smav#include <dev/ath/if_athvar.h> 60254936Smav 61254936Smav#include <dev/pci/pcivar.h> 62254936Smav#include <dev/pci/pcireg.h> 63254936Smav 64254936Smav/* For EEPROM firmware */ 65254936Smav#ifdef ATH_EEPROM_FIRMWARE 66254936Smav#include <sys/linker.h> 67254936Smav#include <sys/firmware.h> 68254936Smav#endif /* ATH_EEPROM_FIRMWARE */ 69254936Smav 70254936Smav/* 71254936Smav * PCI glue. 72254936Smav */ 73254936Smav 74254936Smavstruct ath_pci_softc { 75148382Spjd struct ath_softc sc_sc; 76148382Spjd struct resource *sc_sr; /* memory resource */ 77148382Spjd struct resource *sc_irq; /* irq resource */ 78148382Spjd void *sc_ih; /* interrupt handler */ 79148382Spjd}; 80148382Spjd 81148382Spjd#define BS_BAR 0x10 82254936Smav#define PCIR_RETRY_TIMEOUT 0x41 83153251Spjd#define PCIR_CFG_PMCSR 0x48 84148382Spjd 85148382Spjd#define DEFAULT_CACHESIZE 32 86148382Spjd 87148382Spjdstatic void 88148382Spjdath_pci_setup(device_t dev) 89148382Spjd{ 90148382Spjd uint8_t cz; 91148382Spjd 92148382Spjd /* XXX TODO: need to override the _system_ saved copies of this */ 93148382Spjd 94148382Spjd /* 95148382Spjd * If the cache line size is 0, force it to a reasonable 96148382Spjd * value. 97148382Spjd */ 98148382Spjd cz = pci_read_config(dev, PCIR_CACHELNSZ, 1); 99148382Spjd if (cz == 0) { 100148382Spjd pci_write_config(dev, PCIR_CACHELNSZ, 101148382Spjd DEFAULT_CACHESIZE / 4, 1); 102148382Spjd } 103148382Spjd 104148382Spjd /* Override the system latency timer */ 105148382Spjd pci_write_config(dev, PCIR_LATTIMER, 0xa8, 1); 106148382Spjd 107148382Spjd /* If a PCI NIC, force wakeup */ 108254936Smav#ifdef ATH_PCI_WAKEUP_WAR 109260385Sscottl /* XXX TODO: don't do this for non-PCI (ie, PCIe, Cardbus!) */ 110254936Smav if (1) { 111254936Smav uint16_t pmcsr; 112148382Spjd pmcsr = pci_read_config(dev, PCIR_CFG_PMCSR, 2); 113148382Spjd pmcsr |= 3; 114148382Spjd pci_write_config(dev, PCIR_CFG_PMCSR, pmcsr, 2); 115148382Spjd pmcsr &= ~3; 116148382Spjd pci_write_config(dev, PCIR_CFG_PMCSR, pmcsr, 2); 117148382Spjd } 118148382Spjd#endif 119148382Spjd 120148382Spjd /* 121148382Spjd * Disable retry timeout to keep PCI Tx retries from 122148382Spjd * interfering with C3 CPU state. 123148382Spjd */ 124148382Spjd pci_write_config(dev, PCIR_RETRY_TIMEOUT, 0, 1); 125148382Spjd} 126148382Spjd 127148382Spjdstatic int 128148382Spjdath_pci_probe(device_t dev) 129148382Spjd{ 130148382Spjd const char* devname; 131254936Smav 132148382Spjd devname = ath_hal_probe(pci_get_vendor(dev), pci_get_device(dev)); 133207877Sjh if (devname != NULL) { 134148382Spjd device_set_desc(dev, devname); 135148382Spjd return BUS_PROBE_DEFAULT; 136148382Spjd } 137148382Spjd return ENXIO; 138148382Spjd} 139148382Spjd 140148382Spjdstatic int 141148382Spjdath_pci_attach(device_t dev) 142148382Spjd{ 143148382Spjd struct ath_pci_softc *psc = device_get_softc(dev); 144 struct ath_softc *sc = &psc->sc_sc; 145 int error = ENXIO; 146 int rid; 147#ifdef ATH_EEPROM_FIRMWARE 148 const struct firmware *fw = NULL; 149 const char *buf; 150#endif 151 152 sc->sc_dev = dev; 153 154 /* 155 * Enable bus mastering. 156 */ 157 pci_enable_busmaster(dev); 158 159 /* 160 * Setup other PCI bus configuration parameters. 161 */ 162 ath_pci_setup(dev); 163 164 /* 165 * Setup memory-mapping of PCI registers. 166 */ 167 rid = BS_BAR; 168 psc->sc_sr = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 169 RF_ACTIVE); 170 if (psc->sc_sr == NULL) { 171 device_printf(dev, "cannot map register space\n"); 172 goto bad; 173 } 174 /* XXX uintptr_t is a bandaid for ia64; to be fixed */ 175 sc->sc_st = (HAL_BUS_TAG)(uintptr_t) rman_get_bustag(psc->sc_sr); 176 sc->sc_sh = (HAL_BUS_HANDLE) rman_get_bushandle(psc->sc_sr); 177 /* 178 * Mark device invalid so any interrupts (shared or otherwise) 179 * that arrive before the HAL is setup are discarded. 180 */ 181 sc->sc_invalid = 1; 182 183 /* 184 * Arrange interrupt line. 185 */ 186 rid = 0; 187 psc->sc_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 188 RF_SHAREABLE|RF_ACTIVE); 189 if (psc->sc_irq == NULL) { 190 device_printf(dev, "could not map interrupt\n"); 191 goto bad1; 192 } 193 if (bus_setup_intr(dev, psc->sc_irq, 194 INTR_TYPE_NET | INTR_MPSAFE, 195 NULL, ath_intr, sc, &psc->sc_ih)) { 196 device_printf(dev, "could not establish interrupt\n"); 197 goto bad2; 198 } 199 200 /* 201 * Setup DMA descriptor area. 202 */ 203 if (bus_dma_tag_create(bus_get_dma_tag(dev), /* parent */ 204 1, 0, /* alignment, bounds */ 205 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ 206 BUS_SPACE_MAXADDR, /* highaddr */ 207 NULL, NULL, /* filter, filterarg */ 208 0x3ffff, /* maxsize XXX */ 209 ATH_MAX_SCATTER, /* nsegments */ 210 0x3ffff, /* maxsegsize XXX */ 211 BUS_DMA_ALLOCNOW, /* flags */ 212 NULL, /* lockfunc */ 213 NULL, /* lockarg */ 214 &sc->sc_dmat)) { 215 device_printf(dev, "cannot allocate DMA tag\n"); 216 goto bad3; 217 } 218 219#ifdef ATH_EEPROM_FIRMWARE 220 /* 221 * If there's an EEPROM firmware image, load that in. 222 */ 223 if (resource_string_value(device_get_name(dev), device_get_unit(dev), 224 "eeprom_firmware", &buf) == 0) { 225 if (bootverbose) 226 device_printf(dev, "%s: looking up firmware @ '%s'\n", 227 __func__, buf); 228 229 fw = firmware_get(buf); 230 if (fw == NULL) { 231 device_printf(dev, "%s: couldn't find firmware\n", 232 __func__); 233 goto bad3; 234 } 235 236 device_printf(dev, "%s: EEPROM firmware @ %p\n", 237 __func__, fw->data); 238 sc->sc_eepromdata = 239 malloc(fw->datasize, M_TEMP, M_WAITOK | M_ZERO); 240 if (! sc->sc_eepromdata) { 241 device_printf(dev, "%s: can't malloc eepromdata\n", 242 __func__); 243 goto bad3; 244 } 245 memcpy(sc->sc_eepromdata, fw->data, fw->datasize); 246 firmware_put(fw, 0); 247 } 248#endif /* ATH_EEPROM_FIRMWARE */ 249 250 ATH_LOCK_INIT(sc); 251 ATH_PCU_LOCK_INIT(sc); 252 ATH_RX_LOCK_INIT(sc); 253 ATH_TX_LOCK_INIT(sc); 254 ATH_TX_IC_LOCK_INIT(sc); 255 ATH_TXSTATUS_LOCK_INIT(sc); 256 257 error = ath_attach(pci_get_device(dev), sc); 258 if (error == 0) /* success */ 259 return 0; 260 261 ATH_TXSTATUS_LOCK_DESTROY(sc); 262 ATH_PCU_LOCK_DESTROY(sc); 263 ATH_RX_LOCK_DESTROY(sc); 264 ATH_TX_IC_LOCK_DESTROY(sc); 265 ATH_TX_LOCK_DESTROY(sc); 266 ATH_LOCK_DESTROY(sc); 267 bus_dma_tag_destroy(sc->sc_dmat); 268bad3: 269 bus_teardown_intr(dev, psc->sc_irq, psc->sc_ih); 270bad2: 271 bus_release_resource(dev, SYS_RES_IRQ, 0, psc->sc_irq); 272bad1: 273 bus_release_resource(dev, SYS_RES_MEMORY, BS_BAR, psc->sc_sr); 274bad: 275 return (error); 276} 277 278static int 279ath_pci_detach(device_t dev) 280{ 281 struct ath_pci_softc *psc = device_get_softc(dev); 282 struct ath_softc *sc = &psc->sc_sc; 283 284 /* check if device was removed */ 285 sc->sc_invalid = !bus_child_present(dev); 286 287 /* 288 * Do a config read to clear pre-existing pci error status. 289 */ 290 (void) pci_read_config(dev, PCIR_COMMAND, 4); 291 292 ath_detach(sc); 293 294 bus_generic_detach(dev); 295 bus_teardown_intr(dev, psc->sc_irq, psc->sc_ih); 296 bus_release_resource(dev, SYS_RES_IRQ, 0, psc->sc_irq); 297 298 bus_dma_tag_destroy(sc->sc_dmat); 299 bus_release_resource(dev, SYS_RES_MEMORY, BS_BAR, psc->sc_sr); 300 301 if (sc->sc_eepromdata) 302 free(sc->sc_eepromdata, M_TEMP); 303 304 ATH_TXSTATUS_LOCK_DESTROY(sc); 305 ATH_PCU_LOCK_DESTROY(sc); 306 ATH_RX_LOCK_DESTROY(sc); 307 ATH_TX_IC_LOCK_DESTROY(sc); 308 ATH_TX_LOCK_DESTROY(sc); 309 ATH_LOCK_DESTROY(sc); 310 311 return (0); 312} 313 314static int 315ath_pci_shutdown(device_t dev) 316{ 317 struct ath_pci_softc *psc = device_get_softc(dev); 318 319 ath_shutdown(&psc->sc_sc); 320 return (0); 321} 322 323static int 324ath_pci_suspend(device_t dev) 325{ 326 struct ath_pci_softc *psc = device_get_softc(dev); 327 328 ath_suspend(&psc->sc_sc); 329 330 return (0); 331} 332 333static int 334ath_pci_resume(device_t dev) 335{ 336 struct ath_pci_softc *psc = device_get_softc(dev); 337 338 /* 339 * Suspend/resume resets the PCI configuration space. 340 */ 341 ath_pci_setup(dev); 342 343 ath_resume(&psc->sc_sc); 344 345 return (0); 346} 347 348static device_method_t ath_pci_methods[] = { 349 /* Device interface */ 350 DEVMETHOD(device_probe, ath_pci_probe), 351 DEVMETHOD(device_attach, ath_pci_attach), 352 DEVMETHOD(device_detach, ath_pci_detach), 353 DEVMETHOD(device_shutdown, ath_pci_shutdown), 354 DEVMETHOD(device_suspend, ath_pci_suspend), 355 DEVMETHOD(device_resume, ath_pci_resume), 356 357 { 0,0 } 358}; 359static driver_t ath_pci_driver = { 360 "ath", 361 ath_pci_methods, 362 sizeof (struct ath_pci_softc) 363}; 364static devclass_t ath_devclass; 365DRIVER_MODULE(ath_pci, pci, ath_pci_driver, ath_devclass, 0, 0); 366MODULE_VERSION(ath_pci, 1); 367MODULE_DEPEND(ath_pci, wlan, 1, 1, 1); /* 802.11 media layer */ 368MODULE_DEPEND(ath_pci, if_ath, 1, 1, 1); /* if_ath driver */ 369