ar5211_attach.c revision 190096 
1/*
2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
3 * Copyright (c) 2002-2006 Atheros Communications, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 *
17 * $FreeBSD: head/sys/dev/ath/ath_hal/ar5211/ar5211_attach.c 190096 2009-03-19 19:29:10Z sam $
18 */
19#include "opt_ah.h"
20
21#include "ah.h"
22#include "ah_internal.h"
23#include "ah_devid.h"
24
25#include "ar5211/ar5211.h"
26#include "ar5211/ar5211reg.h"
27#include "ar5211/ar5211phy.h"
28
29#include "ah_eeprom_v3.h"
30
31static HAL_BOOL ar5211GetChannelEdges(struct ath_hal *ah,
32		uint16_t flags, uint16_t *low, uint16_t *high);
33static HAL_BOOL ar5211GetChipPowerLimits(struct ath_hal *ah,
34		struct ieee80211_channel *chan);
35
36static void ar5211ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore);
37static void ar5211DisablePCIE(struct ath_hal *ah);
38
39static const struct ath_hal_private ar5211hal = {{
40	.ah_magic			= AR5211_MAGIC,
41
42	.ah_getRateTable		= ar5211GetRateTable,
43	.ah_detach			= ar5211Detach,
44
45	/* Reset Functions */
46	.ah_reset			= ar5211Reset,
47	.ah_phyDisable			= ar5211PhyDisable,
48	.ah_disable			= ar5211Disable,
49	.ah_configPCIE			= ar5211ConfigPCIE,
50	.ah_disablePCIE			= ar5211DisablePCIE,
51	.ah_setPCUConfig		= ar5211SetPCUConfig,
52	.ah_perCalibration		= ar5211PerCalibration,
53	.ah_perCalibrationN		= ar5211PerCalibrationN,
54	.ah_resetCalValid		= ar5211ResetCalValid,
55	.ah_setTxPowerLimit		= ar5211SetTxPowerLimit,
56	.ah_getChanNoise		= ath_hal_getChanNoise,
57
58	/* Transmit functions */
59	.ah_updateTxTrigLevel		= ar5211UpdateTxTrigLevel,
60	.ah_setupTxQueue		= ar5211SetupTxQueue,
61	.ah_setTxQueueProps             = ar5211SetTxQueueProps,
62	.ah_getTxQueueProps             = ar5211GetTxQueueProps,
63	.ah_releaseTxQueue		= ar5211ReleaseTxQueue,
64	.ah_resetTxQueue		= ar5211ResetTxQueue,
65	.ah_getTxDP			= ar5211GetTxDP,
66	.ah_setTxDP			= ar5211SetTxDP,
67	.ah_numTxPending		= ar5211NumTxPending,
68	.ah_startTxDma			= ar5211StartTxDma,
69	.ah_stopTxDma			= ar5211StopTxDma,
70	.ah_setupTxDesc			= ar5211SetupTxDesc,
71	.ah_setupXTxDesc		= ar5211SetupXTxDesc,
72	.ah_fillTxDesc			= ar5211FillTxDesc,
73	.ah_procTxDesc			= ar5211ProcTxDesc,
74	.ah_getTxIntrQueue		= ar5211GetTxIntrQueue,
75	.ah_reqTxIntrDesc 		= ar5211IntrReqTxDesc,
76
77	/* RX Functions */
78	.ah_getRxDP			= ar5211GetRxDP,
79	.ah_setRxDP			= ar5211SetRxDP,
80	.ah_enableReceive		= ar5211EnableReceive,
81	.ah_stopDmaReceive		= ar5211StopDmaReceive,
82	.ah_startPcuReceive		= ar5211StartPcuReceive,
83	.ah_stopPcuReceive		= ar5211StopPcuReceive,
84	.ah_setMulticastFilter		= ar5211SetMulticastFilter,
85	.ah_setMulticastFilterIndex	= ar5211SetMulticastFilterIndex,
86	.ah_clrMulticastFilterIndex	= ar5211ClrMulticastFilterIndex,
87	.ah_getRxFilter			= ar5211GetRxFilter,
88	.ah_setRxFilter			= ar5211SetRxFilter,
89	.ah_setupRxDesc			= ar5211SetupRxDesc,
90	.ah_procRxDesc			= ar5211ProcRxDesc,
91	.ah_rxMonitor			= ar5211AniPoll,
92	.ah_procMibEvent		= ar5211MibEvent,
93
94	/* Misc Functions */
95	.ah_getCapability		= ar5211GetCapability,
96	.ah_setCapability		= ar5211SetCapability,
97	.ah_getDiagState		= ar5211GetDiagState,
98	.ah_getMacAddress		= ar5211GetMacAddress,
99	.ah_setMacAddress		= ar5211SetMacAddress,
100	.ah_getBssIdMask		= ar5211GetBssIdMask,
101	.ah_setBssIdMask		= ar5211SetBssIdMask,
102	.ah_setRegulatoryDomain		= ar5211SetRegulatoryDomain,
103	.ah_setLedState			= ar5211SetLedState,
104	.ah_writeAssocid		= ar5211WriteAssocid,
105	.ah_gpioCfgInput		= ar5211GpioCfgInput,
106	.ah_gpioCfgOutput		= ar5211GpioCfgOutput,
107	.ah_gpioGet			= ar5211GpioGet,
108	.ah_gpioSet			= ar5211GpioSet,
109	.ah_gpioSetIntr			= ar5211GpioSetIntr,
110	.ah_getTsf32			= ar5211GetTsf32,
111	.ah_getTsf64			= ar5211GetTsf64,
112	.ah_resetTsf			= ar5211ResetTsf,
113	.ah_detectCardPresent		= ar5211DetectCardPresent,
114	.ah_updateMibCounters		= ar5211UpdateMibCounters,
115	.ah_getRfGain			= ar5211GetRfgain,
116	.ah_getDefAntenna		= ar5211GetDefAntenna,
117	.ah_setDefAntenna		= ar5211SetDefAntenna,
118	.ah_getAntennaSwitch		= ar5211GetAntennaSwitch,
119	.ah_setAntennaSwitch		= ar5211SetAntennaSwitch,
120	.ah_setSifsTime			= ar5211SetSifsTime,
121	.ah_getSifsTime			= ar5211GetSifsTime,
122	.ah_setSlotTime			= ar5211SetSlotTime,
123	.ah_getSlotTime			= ar5211GetSlotTime,
124	.ah_setAckTimeout		= ar5211SetAckTimeout,
125	.ah_getAckTimeout		= ar5211GetAckTimeout,
126	.ah_setAckCTSRate		= ar5211SetAckCTSRate,
127	.ah_getAckCTSRate		= ar5211GetAckCTSRate,
128	.ah_setCTSTimeout		= ar5211SetCTSTimeout,
129	.ah_getCTSTimeout		= ar5211GetCTSTimeout,
130	.ah_setDecompMask               = ar5211SetDecompMask,
131	.ah_setCoverageClass            = ar5211SetCoverageClass,
132
133	/* Key Cache Functions */
134	.ah_getKeyCacheSize		= ar5211GetKeyCacheSize,
135	.ah_resetKeyCacheEntry		= ar5211ResetKeyCacheEntry,
136	.ah_isKeyCacheEntryValid	= ar5211IsKeyCacheEntryValid,
137	.ah_setKeyCacheEntry		= ar5211SetKeyCacheEntry,
138	.ah_setKeyCacheEntryMac		= ar5211SetKeyCacheEntryMac,
139
140	/* Power Management Functions */
141	.ah_setPowerMode		= ar5211SetPowerMode,
142	.ah_getPowerMode		= ar5211GetPowerMode,
143
144	/* Beacon Functions */
145	.ah_setBeaconTimers		= ar5211SetBeaconTimers,
146	.ah_beaconInit			= ar5211BeaconInit,
147	.ah_setStationBeaconTimers	= ar5211SetStaBeaconTimers,
148	.ah_resetStationBeaconTimers	= ar5211ResetStaBeaconTimers,
149
150	/* Interrupt Functions */
151	.ah_isInterruptPending		= ar5211IsInterruptPending,
152	.ah_getPendingInterrupts	= ar5211GetPendingInterrupts,
153	.ah_getInterrupts		= ar5211GetInterrupts,
154	.ah_setInterrupts		= ar5211SetInterrupts },
155
156	.ah_getChannelEdges		= ar5211GetChannelEdges,
157	.ah_getWirelessModes		= ar5211GetWirelessModes,
158	.ah_eepromRead			= ar5211EepromRead,
159#ifdef AH_SUPPORT_WRITE_EEPROM
160	.ah_eepromWrite			= ar5211EepromWrite,
161#endif
162	.ah_getChipPowerLimits		= ar5211GetChipPowerLimits,
163};
164
165static HAL_BOOL ar5211ChipTest(struct ath_hal *);
166static HAL_BOOL ar5211FillCapabilityInfo(struct ath_hal *ah);
167
168/*
169 * Return the revsion id for the radio chip.  This
170 * fetched via the PHY.
171 */
172static uint32_t
173ar5211GetRadioRev(struct ath_hal *ah)
174{
175	uint32_t val;
176	int i;
177
178	OS_REG_WRITE(ah, (AR_PHY_BASE + (0x34 << 2)), 0x00001c16);
179	for (i = 0; i < 8; i++)
180		OS_REG_WRITE(ah, (AR_PHY_BASE + (0x20 << 2)), 0x00010000);
181	val = (OS_REG_READ(ah, AR_PHY_BASE + (256 << 2)) >> 24) & 0xff;
182	val = ((val & 0xf0) >> 4) | ((val & 0x0f) << 4);
183	return ath_hal_reverseBits(val, 8);
184}
185
186/*
187 * Attach for an AR5211 part.
188 */
189static struct ath_hal *
190ar5211Attach(uint16_t devid, HAL_SOFTC sc,
191	HAL_BUS_TAG st, HAL_BUS_HANDLE sh, HAL_STATUS *status)
192{
193#define	N(a)	(sizeof(a)/sizeof(a[0]))
194	struct ath_hal_5211 *ahp;
195	struct ath_hal *ah;
196	uint32_t val;
197	uint16_t eeval;
198	HAL_STATUS ecode;
199
200	HALDEBUG(AH_NULL, HAL_DEBUG_ATTACH, "%s: sc %p st %p sh %p\n",
201	    __func__, sc, (void*) st, (void*) sh);
202
203	/* NB: memory is returned zero'd */
204	ahp = ath_hal_malloc(sizeof (struct ath_hal_5211));
205	if (ahp == AH_NULL) {
206		HALDEBUG(AH_NULL, HAL_DEBUG_ANY,
207		    "%s: cannot allocate memory for state block\n", __func__);
208		ecode = HAL_ENOMEM;
209		goto bad;
210	}
211	ah = &ahp->ah_priv.h;
212	/* set initial values */
213	OS_MEMCPY(&ahp->ah_priv, &ar5211hal, sizeof(struct ath_hal_private));
214	ah->ah_sc = sc;
215	ah->ah_st = st;
216	ah->ah_sh = sh;
217
218	ah->ah_devid = devid;			/* NB: for AH_DEBUG_ALQ */
219	AH_PRIVATE(ah)->ah_devid = devid;
220	AH_PRIVATE(ah)->ah_subvendorid = 0;	/* XXX */
221
222	AH_PRIVATE(ah)->ah_powerLimit = MAX_RATE_POWER;
223	AH_PRIVATE(ah)->ah_tpScale = HAL_TP_SCALE_MAX;	/* no scaling */
224
225	ahp->ah_diversityControl = HAL_ANT_VARIABLE;
226	ahp->ah_staId1Defaults = 0;
227	ahp->ah_rssiThr = INIT_RSSI_THR;
228	ahp->ah_sifstime = (u_int) -1;
229	ahp->ah_slottime = (u_int) -1;
230	ahp->ah_acktimeout = (u_int) -1;
231	ahp->ah_ctstimeout = (u_int) -1;
232
233	if (!ar5211ChipReset(ah, AH_NULL)) {	/* reset chip */
234		HALDEBUG(ah, HAL_DEBUG_ANY, "%s: chip reset failed\n", __func__);
235		ecode = HAL_EIO;
236		goto bad;
237	}
238	if (AH_PRIVATE(ah)->ah_devid == AR5211_FPGA11B) {
239		/* set it back to OFDM mode to be able to read analog rev id */
240		OS_REG_WRITE(ah, AR5211_PHY_MODE, AR5211_PHY_MODE_OFDM);
241		OS_REG_WRITE(ah, AR_PHY_PLL_CTL, AR_PHY_PLL_CTL_44);
242		OS_DELAY(1000);
243	}
244
245	/* Read Revisions from Chips */
246	val = OS_REG_READ(ah, AR_SREV) & AR_SREV_ID_M;
247	AH_PRIVATE(ah)->ah_macVersion = val >> AR_SREV_ID_S;
248	AH_PRIVATE(ah)->ah_macRev = val & AR_SREV_REVISION_M;
249
250	if (AH_PRIVATE(ah)->ah_macVersion < AR_SREV_VERSION_MAUI_2 ||
251	    AH_PRIVATE(ah)->ah_macVersion > AR_SREV_VERSION_OAHU) {
252		HALDEBUG(ah, HAL_DEBUG_ANY,
253		    "%s: Mac Chip Rev 0x%x is not supported by this driver\n",
254		    __func__, AH_PRIVATE(ah)->ah_macVersion);
255		ecode = HAL_ENOTSUPP;
256		goto bad;
257	}
258
259	AH_PRIVATE(ah)->ah_phyRev = OS_REG_READ(ah, AR_PHY_CHIP_ID);
260
261	if (!ar5211ChipTest(ah)) {
262		HALDEBUG(ah, HAL_DEBUG_ANY, "%s: hardware self-test failed\n",
263		    __func__);
264		ecode = HAL_ESELFTEST;
265		goto bad;
266	}
267
268	/* Set correct Baseband to analog shift setting to access analog chips. */
269	if (AH_PRIVATE(ah)->ah_macVersion >= AR_SREV_VERSION_OAHU) {
270		OS_REG_WRITE(ah, AR_PHY_BASE, 0x00000007);
271	} else {
272		OS_REG_WRITE(ah, AR_PHY_BASE, 0x00000047);
273	}
274	OS_DELAY(2000);
275
276	/* Read Radio Chip Rev Extract */
277	AH_PRIVATE(ah)->ah_analog5GhzRev = ar5211GetRadioRev(ah);
278	if ((AH_PRIVATE(ah)->ah_analog5GhzRev & 0xf0) != RAD5_SREV_MAJOR) {
279		HALDEBUG(ah, HAL_DEBUG_ANY,
280		    "%s: 5G Radio Chip Rev 0x%02X is not supported by this "
281		    "driver\n", __func__, AH_PRIVATE(ah)->ah_analog5GhzRev);
282		ecode = HAL_ENOTSUPP;
283		goto bad;
284	}
285
286	val = (OS_REG_READ(ah, AR_PCICFG) & AR_PCICFG_EEPROM_SIZE_M) >>
287               AR_PCICFG_EEPROM_SIZE_S;
288	if (val != AR_PCICFG_EEPROM_SIZE_16K) {
289		HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unsupported EEPROM size "
290		    "%u (0x%x) found\n", __func__, val, val);
291		ecode = HAL_EESIZE;
292		goto bad;
293	}
294	ecode = ath_hal_legacyEepromAttach(ah);
295	if (ecode != HAL_OK) {
296		goto bad;
297	}
298
299        /* If Bmode and AR5211, verify 2.4 analog exists */
300	if (AH_PRIVATE(ah)->ah_macVersion >= AR_SREV_VERSION_OAHU &&
301	    ath_hal_eepromGetFlag(ah, AR_EEP_BMODE)) {
302		/* Set correct Baseband to analog shift setting to access analog chips. */
303		OS_REG_WRITE(ah, AR_PHY_BASE, 0x00004007);
304		OS_DELAY(2000);
305		AH_PRIVATE(ah)->ah_analog2GhzRev = ar5211GetRadioRev(ah);
306
307		/* Set baseband for 5GHz chip */
308		OS_REG_WRITE(ah, AR_PHY_BASE, 0x00000007);
309		OS_DELAY(2000);
310		if ((AH_PRIVATE(ah)->ah_analog2GhzRev & 0xF0) != RAD2_SREV_MAJOR) {
311			HALDEBUG(ah, HAL_DEBUG_ANY,
312			    "%s: 2G Radio Chip Rev 0x%x is not supported by "
313			    "this driver\n", __func__,
314			    AH_PRIVATE(ah)->ah_analog2GhzRev);
315			ecode = HAL_ENOTSUPP;
316			goto bad;
317		}
318	} else {
319		ath_hal_eepromSet(ah, AR_EEP_BMODE, AH_FALSE);
320        }
321
322	ecode = ath_hal_eepromGet(ah, AR_EEP_REGDMN_0, &eeval);
323	if (ecode != HAL_OK) {
324		HALDEBUG(ah, HAL_DEBUG_ANY,
325		    "%s: cannot read regulatory domain from EEPROM\n",
326		    __func__);
327		goto bad;
328        }
329	AH_PRIVATE(ah)->ah_currentRD = eeval;
330	AH_PRIVATE(ah)->ah_getNfAdjust = ar5211GetNfAdjust;
331
332	/*
333	 * Got everything we need now to setup the capabilities.
334	 */
335	(void) ar5211FillCapabilityInfo(ah);
336
337	/* Initialize gain ladder thermal calibration structure */
338	ar5211InitializeGainValues(ah);
339
340	ecode = ath_hal_eepromGet(ah, AR_EEP_MACADDR, ahp->ah_macaddr);
341	if (ecode != HAL_OK) {
342		HALDEBUG(ah, HAL_DEBUG_ANY,
343		    "%s: error getting mac address from EEPROM\n", __func__);
344		goto bad;
345        }
346
347	HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s: return\n", __func__);
348
349	return ah;
350bad:
351	if (ahp)
352		ar5211Detach((struct ath_hal *) ahp);
353	if (status)
354		*status = ecode;
355	return AH_NULL;
356#undef N
357}
358
359void
360ar5211Detach(struct ath_hal *ah)
361{
362	HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s:\n", __func__);
363
364	HALASSERT(ah != AH_NULL);
365	HALASSERT(ah->ah_magic == AR5211_MAGIC);
366
367	ath_hal_eepromDetach(ah);
368	ath_hal_free(ah);
369}
370
371static HAL_BOOL
372ar5211ChipTest(struct ath_hal *ah)
373{
374	uint32_t regAddr[2] = { AR_STA_ID0, AR_PHY_BASE+(8 << 2) };
375	uint32_t regHold[2];
376	uint32_t patternData[4] =
377	    { 0x55555555, 0xaaaaaaaa, 0x66666666, 0x99999999 };
378	int i, j;
379
380	/* Test PHY & MAC registers */
381	for (i = 0; i < 2; i++) {
382		uint32_t addr = regAddr[i];
383		uint32_t wrData, rdData;
384
385		regHold[i] = OS_REG_READ(ah, addr);
386		for (j = 0; j < 0x100; j++) {
387			wrData = (j << 16) | j;
388			OS_REG_WRITE(ah, addr, wrData);
389			rdData = OS_REG_READ(ah, addr);
390			if (rdData != wrData) {
391				HALDEBUG(ah, HAL_DEBUG_ANY,
392"%s: address test failed addr: 0x%08x - wr:0x%08x != rd:0x%08x\n",
393				__func__, addr, wrData, rdData);
394				return AH_FALSE;
395			}
396		}
397		for (j = 0; j < 4; j++) {
398			wrData = patternData[j];
399			OS_REG_WRITE(ah, addr, wrData);
400			rdData = OS_REG_READ(ah, addr);
401			if (wrData != rdData) {
402				HALDEBUG(ah, HAL_DEBUG_ANY,
403"%s: address test failed addr: 0x%08x - wr:0x%08x != rd:0x%08x\n",
404					__func__, addr, wrData, rdData);
405				return AH_FALSE;
406			}
407		}
408		OS_REG_WRITE(ah, regAddr[i], regHold[i]);
409	}
410	OS_DELAY(100);
411	return AH_TRUE;
412}
413
414/*
415 * Store the channel edges for the requested operational mode
416 */
417static HAL_BOOL
418ar5211GetChannelEdges(struct ath_hal *ah,
419	uint16_t flags, uint16_t *low, uint16_t *high)
420{
421	if (flags & IEEE80211_CHAN_5GHZ) {
422		*low = 4920;
423		*high = 6100;
424		return AH_TRUE;
425	}
426	if (flags & IEEE80211_CHAN_2GHZ &&
427	    ath_hal_eepromGetFlag(ah, AR_EEP_BMODE)) {
428		*low = 2312;
429		*high = 2732;
430		return AH_TRUE;
431	}
432	return AH_FALSE;
433}
434
435static HAL_BOOL
436ar5211GetChipPowerLimits(struct ath_hal *ah, struct ieee80211_channel *chan)
437{
438	/* XXX fill in, this is just a placeholder */
439	HALDEBUG(ah, HAL_DEBUG_ATTACH,
440	    "%s: no min/max power for %u/0x%x\n",
441	    __func__, chan->ic_freq, chan->ic_flags);
442	chan->ic_maxpower = MAX_RATE_POWER;
443	chan->ic_minpower = 0;
444	return AH_TRUE;
445}
446
447static void
448ar5211ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore)
449{
450}
451
452static void
453ar5211DisablePCIE(struct ath_hal *ah)
454{
455}
456
457/*
458 * Fill all software cached or static hardware state information.
459 */
460static HAL_BOOL
461ar5211FillCapabilityInfo(struct ath_hal *ah)
462{
463	struct ath_hal_private *ahpriv = AH_PRIVATE(ah);
464	HAL_CAPABILITIES *pCap = &ahpriv->ah_caps;
465
466	/* Construct wireless mode from EEPROM */
467	pCap->halWirelessModes = 0;
468	if (ath_hal_eepromGetFlag(ah, AR_EEP_AMODE)) {
469		pCap->halWirelessModes |= HAL_MODE_11A;
470		if (!ath_hal_eepromGetFlag(ah, AR_EEP_TURBO5DISABLE))
471			pCap->halWirelessModes |= HAL_MODE_TURBO;
472	}
473	if (ath_hal_eepromGetFlag(ah, AR_EEP_BMODE))
474		pCap->halWirelessModes |= HAL_MODE_11B;
475
476	pCap->halLow2GhzChan = 2312;
477	pCap->halHigh2GhzChan = 2732;
478	pCap->halLow5GhzChan = 4920;
479	pCap->halHigh5GhzChan = 6100;
480
481	pCap->halChanSpreadSupport = AH_TRUE;
482	pCap->halSleepAfterBeaconBroken = AH_TRUE;
483	pCap->halPSPollBroken = AH_TRUE;
484	pCap->halVEOLSupport = AH_TRUE;
485
486	pCap->halTotalQueues = HAL_NUM_TX_QUEUES;
487	pCap->halKeyCacheSize = 128;
488
489	/* XXX not needed */
490	pCap->halChanHalfRate = AH_FALSE;
491	pCap->halChanQuarterRate = AH_FALSE;
492
493	if (ath_hal_eepromGetFlag(ah, AR_EEP_RFKILL) &&
494	    ath_hal_eepromGet(ah, AR_EEP_RFSILENT, &ahpriv->ah_rfsilent) == HAL_OK) {
495		/* NB: enabled by default */
496		ahpriv->ah_rfkillEnabled = AH_TRUE;
497		pCap->halRfSilentSupport = AH_TRUE;
498	}
499
500	pCap->halTstampPrecision = 13;
501
502	/* XXX might be ok w/ some chip revs */
503	ahpriv->ah_rxornIsFatal = AH_TRUE;
504	return AH_TRUE;
505}
506
507static const char*
508ar5211Probe(uint16_t vendorid, uint16_t devid)
509{
510	if (vendorid == ATHEROS_VENDOR_ID) {
511		if (devid == AR5211_DEVID || devid == AR5311_DEVID ||
512		    devid == AR5211_DEFAULT)
513			return "Atheros 5211";
514		if (devid == AR5211_FPGA11B)
515			return "Atheros 5211 (FPGA)";
516	}
517	return AH_NULL;
518}
519AH_CHIP(AR5211, ar5211Probe, ar5211Attach);
520