ah_osdep.c revision 256281 
1/*-
2 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer,
10 *    without modification.
11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
12 *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
13 *    redistribution must be conditioned upon including a substantially
14 *    similar Disclaimer requirement for further binary redistribution.
15 *
16 * NO WARRANTY
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
20 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
27 * THE POSSIBILITY OF SUCH DAMAGES.
28 *
29 * $FreeBSD: stable/10/sys/dev/ath/ah_osdep.c 237864 2012-07-01 02:34:32Z adrian $
30 */
31#include "opt_ah.h"
32
33#include <sys/param.h>
34#include <sys/systm.h>
35#include <sys/kernel.h>
36#include <sys/module.h>
37#include <sys/sysctl.h>
38#include <sys/bus.h>
39#include <sys/malloc.h>
40#include <sys/proc.h>
41#include <sys/pcpu.h>
42#include <sys/lock.h>
43#include <sys/mutex.h>
44
45#include <machine/stdarg.h>
46
47#include <net/ethernet.h>		/* XXX for ether_sprintf */
48
49#include <dev/ath/ath_hal/ah.h>
50#include <dev/ath/ath_hal/ah_debug.h>
51
52/*
53 * WiSoC boards overload the bus tag with information about the
54 * board layout.  We must extract the bus space tag from that
55 * indirect structure.  For everyone else the tag is passed in
56 * directly.
57 * XXX cache indirect ref privately
58 */
59#ifdef AH_SUPPORT_AR5312
60#define	BUSTAG(ah) \
61	((bus_space_tag_t) ((struct ar531x_config *)((ah)->ah_st))->tag)
62#else
63#define	BUSTAG(ah)	((ah)->ah_st)
64#endif
65
66/*
67 * This lock is used to seralise register access for chips which have
68 * problems w/ SMP CPUs issuing concurrent PCI transactions.
69 *
70 * XXX This is a global lock for now; it should be pushed to
71 * a per-device lock in some platform-independent fashion.
72 */
73struct mtx ah_regser_mtx;
74MTX_SYSINIT(ah_regser, &ah_regser_mtx, "Atheros register access mutex",
75    MTX_SPIN);
76
77extern	void ath_hal_printf(struct ath_hal *, const char*, ...)
78		__printflike(2,3);
79extern	void ath_hal_vprintf(struct ath_hal *, const char*, __va_list)
80		__printflike(2, 0);
81extern	const char* ath_hal_ether_sprintf(const u_int8_t *mac);
82extern	void *ath_hal_malloc(size_t);
83extern	void ath_hal_free(void *);
84#ifdef AH_ASSERT
85extern	void ath_hal_assert_failed(const char* filename,
86		int lineno, const char* msg);
87#endif
88#ifdef AH_DEBUG
89extern	void DO_HALDEBUG(struct ath_hal *ah, u_int mask, const char* fmt, ...);
90#endif /* AH_DEBUG */
91
92/* NB: put this here instead of the driver to avoid circular references */
93SYSCTL_NODE(_hw, OID_AUTO, ath, CTLFLAG_RD, 0, "Atheros driver parameters");
94static SYSCTL_NODE(_hw_ath, OID_AUTO, hal, CTLFLAG_RD, 0,
95    "Atheros HAL parameters");
96
97#ifdef AH_DEBUG
98int ath_hal_debug = 0;
99SYSCTL_INT(_hw_ath_hal, OID_AUTO, debug, CTLFLAG_RW, &ath_hal_debug,
100    0, "Atheros HAL debugging printfs");
101TUNABLE_INT("hw.ath.hal.debug", &ath_hal_debug);
102#endif /* AH_DEBUG */
103
104static MALLOC_DEFINE(M_ATH_HAL, "ath_hal", "ath hal data");
105
106void*
107ath_hal_malloc(size_t size)
108{
109	return malloc(size, M_ATH_HAL, M_NOWAIT | M_ZERO);
110}
111
112void
113ath_hal_free(void* p)
114{
115	free(p, M_ATH_HAL);
116}
117
118void
119ath_hal_vprintf(struct ath_hal *ah, const char* fmt, va_list ap)
120{
121	vprintf(fmt, ap);
122}
123
124void
125ath_hal_printf(struct ath_hal *ah, const char* fmt, ...)
126{
127	va_list ap;
128	va_start(ap, fmt);
129	ath_hal_vprintf(ah, fmt, ap);
130	va_end(ap);
131}
132
133const char*
134ath_hal_ether_sprintf(const u_int8_t *mac)
135{
136	return ether_sprintf(mac);
137}
138
139#ifdef AH_DEBUG
140
141void
142DO_HALDEBUG(struct ath_hal *ah, u_int mask, const char* fmt, ...)
143{
144	if ((mask == HAL_DEBUG_UNMASKABLE) ||
145	    (ah != NULL && ah->ah_config.ah_debug & mask) ||
146	    (ath_hal_debug & mask)) {
147		__va_list ap;
148		va_start(ap, fmt);
149		ath_hal_vprintf(ah, fmt, ap);
150		va_end(ap);
151	}
152}
153#undef	HAL_DEBUG_UNMASKABLE
154#endif /* AH_DEBUG */
155
156#ifdef AH_DEBUG_ALQ
157/*
158 * ALQ register tracing support.
159 *
160 * Setting hw.ath.hal.alq=1 enables tracing of all register reads and
161 * writes to the file /tmp/ath_hal.log.  The file format is a simple
162 * fixed-size array of records.  When done logging set hw.ath.hal.alq=0
163 * and then decode the file with the arcode program (that is part of the
164 * HAL).  If you start+stop tracing the data will be appended to an
165 * existing file.
166 *
167 * NB: doesn't handle multiple devices properly; only one DEVICE record
168 *     is emitted and the different devices are not identified.
169 */
170#include <sys/alq.h>
171#include <sys/pcpu.h>
172#include <dev/ath/ath_hal/ah_decode.h>
173
174static	struct alq *ath_hal_alq;
175static	int ath_hal_alq_emitdev;	/* need to emit DEVICE record */
176static	u_int ath_hal_alq_lost;		/* count of lost records */
177static	char ath_hal_logfile[MAXPATHLEN] = "/tmp/ath_hal.log";
178
179SYSCTL_STRING(_hw_ath_hal, OID_AUTO, alq_logfile, CTLFLAG_RW,
180    &ath_hal_logfile, sizeof(kernelname), "Name of ALQ logfile");
181
182static	u_int ath_hal_alq_qsize = 64*1024;
183
184static int
185ath_hal_setlogging(int enable)
186{
187	int error;
188
189	if (enable) {
190		error = alq_open(&ath_hal_alq, ath_hal_logfile,
191			curthread->td_ucred, ALQ_DEFAULT_CMODE,
192			sizeof (struct athregrec), ath_hal_alq_qsize);
193		ath_hal_alq_lost = 0;
194		ath_hal_alq_emitdev = 1;
195		printf("ath_hal: logging to %s enabled\n",
196			ath_hal_logfile);
197	} else {
198		if (ath_hal_alq)
199			alq_close(ath_hal_alq);
200		ath_hal_alq = NULL;
201		printf("ath_hal: logging disabled\n");
202		error = 0;
203	}
204	return (error);
205}
206
207static int
208sysctl_hw_ath_hal_log(SYSCTL_HANDLER_ARGS)
209{
210	int error, enable;
211
212	enable = (ath_hal_alq != NULL);
213        error = sysctl_handle_int(oidp, &enable, 0, req);
214        if (error || !req->newptr)
215                return (error);
216	else
217		return (ath_hal_setlogging(enable));
218}
219SYSCTL_PROC(_hw_ath_hal, OID_AUTO, alq, CTLTYPE_INT|CTLFLAG_RW,
220	0, 0, sysctl_hw_ath_hal_log, "I", "Enable HAL register logging");
221SYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_size, CTLFLAG_RW,
222	&ath_hal_alq_qsize, 0, "In-memory log size (#records)");
223SYSCTL_INT(_hw_ath_hal, OID_AUTO, alq_lost, CTLFLAG_RW,
224	&ath_hal_alq_lost, 0, "Register operations not logged");
225
226static struct ale *
227ath_hal_alq_get(struct ath_hal *ah)
228{
229	struct ale *ale;
230
231	if (ath_hal_alq_emitdev) {
232		ale = alq_get(ath_hal_alq, ALQ_NOWAIT);
233		if (ale) {
234			struct athregrec *r =
235				(struct athregrec *) ale->ae_data;
236			r->op = OP_DEVICE;
237			r->reg = 0;
238			r->val = ah->ah_devid;
239			alq_post(ath_hal_alq, ale);
240			ath_hal_alq_emitdev = 0;
241		} else
242			ath_hal_alq_lost++;
243	}
244	ale = alq_get(ath_hal_alq, ALQ_NOWAIT);
245	if (!ale)
246		ath_hal_alq_lost++;
247	return ale;
248}
249
250void
251ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val)
252{
253	bus_space_tag_t tag = BUSTAG(ah);
254	bus_space_handle_t h = ah->ah_sh;
255
256	if (ath_hal_alq) {
257		struct ale *ale = ath_hal_alq_get(ah);
258		if (ale) {
259			struct athregrec *r = (struct athregrec *) ale->ae_data;
260			r->threadid = curthread->td_tid;
261			r->op = OP_WRITE;
262			r->reg = reg;
263			r->val = val;
264			alq_post(ath_hal_alq, ale);
265		}
266	}
267	if (ah->ah_config.ah_serialise_reg_war)
268		mtx_lock_spin(&ah_regser_mtx);
269	bus_space_write_4(tag, h, reg, val);
270	if (ah->ah_config.ah_serialise_reg_war)
271		mtx_unlock_spin(&ah_regser_mtx);
272}
273
274u_int32_t
275ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg)
276{
277	bus_space_tag_t tag = BUSTAG(ah);
278	bus_space_handle_t h = ah->ah_sh;
279	u_int32_t val;
280
281	if (ah->ah_config.ah_serialise_reg_war)
282		mtx_lock_spin(&ah_regser_mtx);
283	val = bus_space_read_4(tag, h, reg);
284	if (ah->ah_config.ah_serialise_reg_war)
285		mtx_unlock_spin(&ah_regser_mtx);
286	if (ath_hal_alq) {
287		struct ale *ale = ath_hal_alq_get(ah);
288		if (ale) {
289			struct athregrec *r = (struct athregrec *) ale->ae_data;
290			r->threadid = curthread->td_tid;
291			r->op = OP_READ;
292			r->reg = reg;
293			r->val = val;
294			alq_post(ath_hal_alq, ale);
295		}
296	}
297	return val;
298}
299
300void
301OS_MARK(struct ath_hal *ah, u_int id, u_int32_t v)
302{
303	if (ath_hal_alq) {
304		struct ale *ale = ath_hal_alq_get(ah);
305		if (ale) {
306			struct athregrec *r = (struct athregrec *) ale->ae_data;
307			r->threadid = curthread->td_tid;
308			r->op = OP_MARK;
309			r->reg = id;
310			r->val = v;
311			alq_post(ath_hal_alq, ale);
312		}
313	}
314}
315#elif defined(AH_DEBUG) || defined(AH_REGOPS_FUNC)
316/*
317 * Memory-mapped device register read/write.  These are here
318 * as routines when debugging support is enabled and/or when
319 * explicitly configured to use function calls.  The latter is
320 * for architectures that might need to do something before
321 * referencing memory (e.g. remap an i/o window).
322 *
323 * NB: see the comments in ah_osdep.h about byte-swapping register
324 *     reads and writes to understand what's going on below.
325 */
326
327void
328ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val)
329{
330	bus_space_tag_t tag = BUSTAG(ah);
331	bus_space_handle_t h = ah->ah_sh;
332
333	if (ah->ah_config.ah_serialise_reg_war)
334		mtx_lock_spin(&ah_regser_mtx);
335	bus_space_write_4(tag, h, reg, val);
336	if (ah->ah_config.ah_serialise_reg_war)
337		mtx_unlock_spin(&ah_regser_mtx);
338}
339
340u_int32_t
341ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg)
342{
343	bus_space_tag_t tag = BUSTAG(ah);
344	bus_space_handle_t h = ah->ah_sh;
345	u_int32_t val;
346
347	if (ah->ah_config.ah_serialise_reg_war)
348		mtx_lock_spin(&ah_regser_mtx);
349	val = bus_space_read_4(tag, h, reg);
350	if (ah->ah_config.ah_serialise_reg_war)
351		mtx_unlock_spin(&ah_regser_mtx);
352	return val;
353}
354#endif /* AH_DEBUG || AH_REGOPS_FUNC */
355
356#ifdef AH_ASSERT
357void
358ath_hal_assert_failed(const char* filename, int lineno, const char *msg)
359{
360	printf("Atheros HAL assertion failure: %s: line %u: %s\n",
361		filename, lineno, msg);
362	panic("ath_hal_assert");
363}
364#endif /* AH_ASSERT */
365