acpi_cpu.c revision 196403
16081Sphk/*- 28857Srgrimes * Copyright (c) 2003-2005 Nate Lawson (SDG) 319983Smckay * Copyright (c) 2001 Michael Smith 419983Smckay * All rights reserved. 519983Smckay * 619983Smckay * Redistribution and use in source and binary forms, with or without 76081Sphk * modification, are permitted provided that the following conditions 86081Sphk * are met: 96081Sphk * 1. Redistributions of source code must retain the above copyright 108857Srgrimes * notice, this list of conditions and the following disclaimer. 118857Srgrimes * 2. Redistributions in binary form must reproduce the above copyright 128857Srgrimes * notice, this list of conditions and the following disclaimer in the 1316880Sgpalmer * documentation and/or other materials provided with the distribution. 1450479Speter * 156081Sphk * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 166081Sphk * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 176081Sphk * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 1816880Sgpalmer * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 196081Sphk * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 206290Sphk * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2116880Sgpalmer * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 226081Sphk * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 236081Sphk * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 246081Sphk * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 256081Sphk * SUCH DAMAGE. 2619983Smckay */ 276081Sphk 286081Sphk#include <sys/cdefs.h> 296081Sphk__FBSDID("$FreeBSD: head/sys/dev/acpica/acpi_cpu.c 196403 2009-08-20 19:17:53Z jhb $"); 306081Sphk 316081Sphk#include "opt_acpi.h" 3219983Smckay#include <sys/param.h> 336081Sphk#include <sys/bus.h> 3419983Smckay#include <sys/cpu.h> 3519983Smckay#include <sys/kernel.h> 3619983Smckay#include <sys/malloc.h> 376081Sphk#include <sys/module.h> 3819983Smckay#include <sys/pcpu.h> 3919983Smckay#include <sys/power.h> 4019983Smckay#include <sys/proc.h> 4119983Smckay#include <sys/sbuf.h> 426081Sphk#include <sys/smp.h> 436081Sphk 446081Sphk#include <dev/pci/pcivar.h> 4519983Smckay#include <machine/atomic.h> 466081Sphk#include <machine/bus.h> 476081Sphk#include <sys/rman.h> 486081Sphk 496081Sphk#include <contrib/dev/acpica/include/acpi.h> 506290Sphk#include <contrib/dev/acpica/include/accommon.h> 516081Sphk 526081Sphk#include <dev/acpica/acpivar.h> 5319983Smckay 546081Sphk/* 556081Sphk * Support for ACPI Processor devices, including C[1-3] sleep states. 566081Sphk */ 576081Sphk 586081Sphk/* Hooks for the ACPI CA debugging infrastructure */ 5916880Sgpalmer#define _COMPONENT ACPI_PROCESSOR 6019983SmckayACPI_MODULE_NAME("PROCESSOR") 6119983Smckay 626081Sphkstruct acpi_cx { 636081Sphk struct resource *p_lvlx; /* Register to read to enter state. */ 646081Sphk uint32_t type; /* C1-3 (C4 and up treated as C3). */ 656081Sphk uint32_t trans_lat; /* Transition latency (usec). */ 6616880Sgpalmer uint32_t power; /* Power consumed (mW). */ 676081Sphk int res_type; /* Resource type for p_lvlx. */ 686081Sphk}; 696081Sphk#define MAX_CX_STATES 8 7016880Sgpalmer 716081Sphkstruct acpi_cpu_softc { 726081Sphk device_t cpu_dev; 736081Sphk ACPI_HANDLE cpu_handle; 746081Sphk struct pcpu *cpu_pcpu; 756081Sphk uint32_t cpu_acpi_id; /* ACPI processor id */ 766081Sphk uint32_t cpu_p_blk; /* ACPI P_BLK location */ 776081Sphk uint32_t cpu_p_blk_len; /* P_BLK length (must be 6). */ 786081Sphk struct acpi_cx cpu_cx_states[MAX_CX_STATES]; 796081Sphk int cpu_cx_count; /* Number of valid Cx states. */ 806081Sphk int cpu_prev_sleep;/* Last idle sleep duration. */ 816081Sphk int cpu_features; /* Child driver supported features. */ 8219983Smckay /* Runtime state. */ 8319983Smckay int cpu_non_c3; /* Index of lowest non-C3 state. */ 8419983Smckay u_int cpu_cx_stats[MAX_CX_STATES];/* Cx usage history. */ 8519983Smckay /* Values for sysctl. */ 8619983Smckay struct sysctl_ctx_list cpu_sysctl_ctx; 8719983Smckay struct sysctl_oid *cpu_sysctl_tree; 886081Sphk int cpu_cx_lowest; 8919983Smckay char cpu_cx_supported[64]; 906081Sphk int cpu_rid; 916081Sphk}; 928857Srgrimes 936081Sphkstruct acpi_cpu_device { 9419983Smckay struct resource_list ad_rl; 956081Sphk}; 9619983Smckay 9719983Smckay#define CPU_GET_REG(reg, width) \ 986081Sphk (bus_space_read_ ## width(rman_get_bustag((reg)), \ 9919983Smckay rman_get_bushandle((reg)), 0)) 10019983Smckay#define CPU_SET_REG(reg, width, val) \ 10119983Smckay (bus_space_write_ ## width(rman_get_bustag((reg)), \ 1026081Sphk rman_get_bushandle((reg)), 0, (val))) 1036081Sphk 1046081Sphk#define PM_USEC(x) ((x) >> 2) /* ~4 clocks per usec (3.57955 Mhz) */ 1056081Sphk 10619983Smckay#define ACPI_NOTIFY_CX_STATES 0x81 /* _CST changed. */ 10719983Smckay 1086081Sphk#define CPU_QUIRK_NO_C3 (1<<0) /* C3-type states are not usable. */ 10919983Smckay#define CPU_QUIRK_NO_BM_CTRL (1<<2) /* No bus mastering control. */ 11019983Smckay 11119983Smckay#define PCI_VENDOR_INTEL 0x8086 1126081Sphk#define PCI_DEVICE_82371AB_3 0x7113 /* PIIX4 chipset for quirks. */ 1136081Sphk#define PCI_REVISION_A_STEP 0 1146081Sphk#define PCI_REVISION_B_STEP 1 1156081Sphk#define PCI_REVISION_4E 2 11619983Smckay#define PCI_REVISION_4M 3 1176081Sphk#define PIIX4_DEVACTB_REG 0x58 11816880Sgpalmer#define PIIX4_BRLD_EN_IRQ0 (1<<0) 11919983Smckay#define PIIX4_BRLD_EN_IRQ (1<<1) 12016880Sgpalmer#define PIIX4_BRLD_EN_IRQ8 (1<<5) 1216081Sphk#define PIIX4_STOP_BREAK_MASK (PIIX4_BRLD_EN_IRQ0 | PIIX4_BRLD_EN_IRQ | PIIX4_BRLD_EN_IRQ8) 1226081Sphk#define PIIX4_PCNTRL_BST_EN (1<<10) 1236081Sphk 1246081Sphk/* Platform hardware resource information. */ 1256081Sphkstatic uint32_t cpu_smi_cmd; /* Value to write to SMI_CMD. */ 1266081Sphkstatic uint8_t cpu_cst_cnt; /* Indicate we are _CST aware. */ 1276081Sphkstatic int cpu_quirks; /* Indicate any hardware bugs. */ 1286081Sphk 1296081Sphk/* Runtime state. */ 1306081Sphkstatic int cpu_disable_idle; /* Disable entry to idle function */ 1316081Sphkstatic int cpu_cx_count; /* Number of valid Cx states */ 1326081Sphk 1336081Sphk/* Values for sysctl. */ 13419983Smckaystatic struct sysctl_ctx_list cpu_sysctl_ctx; 13519983Smckaystatic struct sysctl_oid *cpu_sysctl_tree; 13619983Smckaystatic int cpu_cx_generic; 1376081Sphkstatic int cpu_cx_lowest; 13819983Smckay 13919983Smckaystatic device_t *cpu_devices; 14019983Smckaystatic int cpu_ndevices; 14119983Smckaystatic struct acpi_cpu_softc **cpu_softc; 1426081SphkACPI_SERIAL_DECL(cpu, "ACPI CPU"); 1436081Sphk 14419983Smckaystatic int acpi_cpu_probe(device_t dev); 14519983Smckaystatic int acpi_cpu_attach(device_t dev); 14618120Speterstatic int acpi_cpu_suspend(device_t dev); 14719983Smckaystatic int acpi_cpu_resume(device_t dev); 14819983Smckaystatic int acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id, 14919983Smckay uint32_t *cpu_id); 15019983Smckaystatic struct resource_list *acpi_cpu_get_rlist(device_t dev, device_t child); 15119983Smckaystatic device_t acpi_cpu_add_child(device_t dev, int order, const char *name, 15219983Smckay int unit); 15319983Smckaystatic int acpi_cpu_read_ivar(device_t dev, device_t child, int index, 15419983Smckay uintptr_t *result); 15519983Smckaystatic int acpi_cpu_shutdown(device_t dev); 15619983Smckaystatic void acpi_cpu_cx_probe(struct acpi_cpu_softc *sc); 15719983Smckaystatic void acpi_cpu_generic_cx_probe(struct acpi_cpu_softc *sc); 15819983Smckaystatic int acpi_cpu_cx_cst(struct acpi_cpu_softc *sc); 15919983Smckaystatic void acpi_cpu_startup(void *arg); 16019983Smckaystatic void acpi_cpu_startup_cx(struct acpi_cpu_softc *sc); 16119983Smckaystatic void acpi_cpu_cx_list(struct acpi_cpu_softc *sc); 16219983Smckaystatic void acpi_cpu_idle(void); 16319983Smckaystatic void acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context); 16419983Smckaystatic int acpi_cpu_quirks(void); 16519983Smckaystatic int acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS); 1666081Sphkstatic int acpi_cpu_set_cx_lowest(struct acpi_cpu_softc *sc, int val); 1676081Sphkstatic int acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS); 16819983Smckaystatic int acpi_cpu_global_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS); 16919983Smckay 17019983Smckaystatic device_method_t acpi_cpu_methods[] = { 17119983Smckay /* Device interface */ 17219983Smckay DEVMETHOD(device_probe, acpi_cpu_probe), 1736081Sphk DEVMETHOD(device_attach, acpi_cpu_attach), 17419983Smckay DEVMETHOD(device_detach, bus_generic_detach), 17519983Smckay DEVMETHOD(device_shutdown, acpi_cpu_shutdown), 17619983Smckay DEVMETHOD(device_suspend, acpi_cpu_suspend), 17719983Smckay DEVMETHOD(device_resume, acpi_cpu_resume), 17819983Smckay 17919983Smckay /* Bus interface */ 18019983Smckay DEVMETHOD(bus_add_child, acpi_cpu_add_child), 18119983Smckay DEVMETHOD(bus_read_ivar, acpi_cpu_read_ivar), 1826081Sphk DEVMETHOD(bus_get_resource_list, acpi_cpu_get_rlist), 1836081Sphk DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource), 18419983Smckay DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource), 1856081Sphk DEVMETHOD(bus_alloc_resource, bus_generic_rl_alloc_resource), 1866081Sphk DEVMETHOD(bus_release_resource, bus_generic_rl_release_resource), 18719983Smckay DEVMETHOD(bus_driver_added, bus_generic_driver_added), 18819983Smckay DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 18919983Smckay DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 19016880Sgpalmer DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 19119983Smckay DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 19219983Smckay 1936081Sphk {0, 0} 19419983Smckay}; 19519983Smckay 19619983Smckaystatic driver_t acpi_cpu_driver = { 19719983Smckay "cpu", 19819983Smckay acpi_cpu_methods, 19919983Smckay sizeof(struct acpi_cpu_softc), 20019983Smckay}; 20119983Smckay 20219983Smckaystatic devclass_t acpi_cpu_devclass; 20319983SmckayDRIVER_MODULE(cpu, acpi, acpi_cpu_driver, acpi_cpu_devclass, 0, 0); 20419983SmckayMODULE_DEPEND(cpu, acpi, 1, 1, 1); 20519983Smckay 20619983Smckaystatic int 20719983Smckayacpi_cpu_probe(device_t dev) 20819983Smckay{ 20919983Smckay int acpi_id, cpu_id; 21016880Sgpalmer ACPI_BUFFER buf; 21119983Smckay ACPI_HANDLE handle; 21219983Smckay ACPI_OBJECT *obj; 21316880Sgpalmer ACPI_STATUS status; 21416880Sgpalmer 21519983Smckay if (acpi_disabled("cpu") || acpi_get_type(dev) != ACPI_TYPE_PROCESSOR) 21619983Smckay return (ENXIO); 21719983Smckay 21816880Sgpalmer handle = acpi_get_handle(dev); 21919983Smckay if (cpu_softc == NULL) 22019983Smckay cpu_softc = malloc(sizeof(struct acpi_cpu_softc *) * 22119983Smckay (mp_maxid + 1), M_TEMP /* XXX */, M_WAITOK | M_ZERO); 22216880Sgpalmer 22319983Smckay /* Get our Processor object. */ 22419983Smckay buf.Pointer = NULL; 22519983Smckay buf.Length = ACPI_ALLOCATE_BUFFER; 22619983Smckay status = AcpiEvaluateObject(handle, NULL, NULL, &buf); 22719983Smckay if (ACPI_FAILURE(status)) { 22819983Smckay device_printf(dev, "probe failed to get Processor obj - %s\n", 22916880Sgpalmer AcpiFormatException(status)); 23019983Smckay return (ENXIO); 23119983Smckay } 23219983Smckay obj = (ACPI_OBJECT *)buf.Pointer; 23319983Smckay if (obj->Type != ACPI_TYPE_PROCESSOR) { 23419983Smckay device_printf(dev, "Processor object has bad type %d\n", obj->Type); 23519983Smckay AcpiOsFree(obj); 23619983Smckay return (ENXIO); 23719983Smckay } 23819983Smckay 23919983Smckay /* 24019983Smckay * Find the processor associated with our unit. We could use the 24119983Smckay * ProcId as a key, however, some boxes do not have the same values 24219983Smckay * in their Processor object as the ProcId values in the MADT. 24319983Smckay */ 24419983Smckay acpi_id = obj->Processor.ProcId; 24519983Smckay AcpiOsFree(obj); 24619983Smckay if (acpi_pcpu_get_id(device_get_unit(dev), &acpi_id, &cpu_id) != 0) 24719983Smckay return (ENXIO); 24819983Smckay 24919983Smckay /* 25019983Smckay * Check if we already probed this processor. We scan the bus twice 25116880Sgpalmer * so it's possible we've already seen this one. 25219983Smckay */ 25319983Smckay if (cpu_softc[cpu_id] != NULL) 25419983Smckay return (ENXIO); 25516880Sgpalmer 25619983Smckay /* Mark this processor as in-use and save our derived id for attach. */ 25719983Smckay cpu_softc[cpu_id] = (void *)1; 25819983Smckay acpi_set_magic(dev, cpu_id); 25919983Smckay device_set_desc(dev, "ACPI CPU"); 26019983Smckay 26119983Smckay return (0); 26219983Smckay} 26319983Smckay 26419983Smckaystatic int 26519983Smckayacpi_cpu_attach(device_t dev) 26619983Smckay{ 26719983Smckay ACPI_BUFFER buf; 26816880Sgpalmer ACPI_OBJECT arg[4], *obj; 26916880Sgpalmer ACPI_OBJECT_LIST arglist; 27016880Sgpalmer struct pcpu *pcpu_data; 27119983Smckay struct acpi_cpu_softc *sc; 27219983Smckay struct acpi_softc *acpi_sc; 27319983Smckay ACPI_STATUS status; 27419983Smckay u_int features; 27519983Smckay int cpu_id, drv_count, i; 27616880Sgpalmer driver_t **drivers; 27719983Smckay uint32_t cap_set[3]; 27819983Smckay 27916880Sgpalmer /* UUID needed by _OSC evaluation */ 28019983Smckay static uint8_t cpu_oscuuid[16] = { 0x16, 0xA6, 0x77, 0x40, 0x0C, 0x29, 28119983Smckay 0xBE, 0x47, 0x9E, 0xBD, 0xD8, 0x70, 28216880Sgpalmer 0x58, 0x71, 0x39, 0x53 }; 28319983Smckay 28419983Smckay ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 28519983Smckay 28616880Sgpalmer sc = device_get_softc(dev); 28716880Sgpalmer sc->cpu_dev = dev; 28816880Sgpalmer sc->cpu_handle = acpi_get_handle(dev); 28916880Sgpalmer cpu_id = acpi_get_magic(dev); 2906081Sphk cpu_softc[cpu_id] = sc; 2916081Sphk pcpu_data = pcpu_find(cpu_id); 2926081Sphk pcpu_data->pc_device = dev; 2936081Sphk sc->cpu_pcpu = pcpu_data; 2946081Sphk cpu_smi_cmd = AcpiGbl_FADT.SmiCommand; 2956081Sphk cpu_cst_cnt = AcpiGbl_FADT.CstControl; 2966081Sphk 2976081Sphk buf.Pointer = NULL; 2986081Sphk buf.Length = ACPI_ALLOCATE_BUFFER; 2996081Sphk status = AcpiEvaluateObject(sc->cpu_handle, NULL, NULL, &buf); 3006081Sphk if (ACPI_FAILURE(status)) { 3016081Sphk device_printf(dev, "attach failed to get Processor obj - %s\n", 3026081Sphk AcpiFormatException(status)); 3036081Sphk return (ENXIO); 3046081Sphk } 3056081Sphk obj = (ACPI_OBJECT *)buf.Pointer; 3066081Sphk sc->cpu_p_blk = obj->Processor.PblkAddress; 3076081Sphk sc->cpu_p_blk_len = obj->Processor.PblkLength; 3086081Sphk sc->cpu_acpi_id = obj->Processor.ProcId; 3096081Sphk AcpiOsFree(obj); 3106081Sphk ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_BLK at %#x/%d\n", 3116081Sphk device_get_unit(dev), sc->cpu_p_blk, sc->cpu_p_blk_len)); 3126081Sphk 3136081Sphk /* 31419983Smckay * If this is the first cpu we attach, create and initialize the generic 31519983Smckay * resources that will be used by all acpi cpu devices. 3166081Sphk */ 3176081Sphk if (device_get_unit(dev) == 0) { 3186081Sphk /* Assume we won't be using generic Cx mode by default */ 3196081Sphk cpu_cx_generic = FALSE; 3206081Sphk 3216081Sphk /* Install hw.acpi.cpu sysctl tree */ 3226081Sphk acpi_sc = acpi_device_get_parent_softc(dev); 3236081Sphk sysctl_ctx_init(&cpu_sysctl_ctx); 3246081Sphk cpu_sysctl_tree = SYSCTL_ADD_NODE(&cpu_sysctl_ctx, 3256081Sphk SYSCTL_CHILDREN(acpi_sc->acpi_sysctl_tree), OID_AUTO, "cpu", 3266081Sphk CTLFLAG_RD, 0, "node for CPU children"); 3276081Sphk 3286081Sphk /* Queue post cpu-probing task handler */ 3296081Sphk AcpiOsExecute(OSL_NOTIFY_HANDLER, acpi_cpu_startup, NULL); 3306081Sphk } 3316081Sphk 3326081Sphk /* 3336081Sphk * Before calling any CPU methods, collect child driver feature hints 3346081Sphk * and notify ACPI of them. We support unified SMP power control 3356081Sphk * so advertise this ourselves. Note this is not the same as independent 3366081Sphk * SMP control where each CPU can have different settings. 3376081Sphk */ 3386081Sphk sc->cpu_features = ACPI_CAP_SMP_SAME | ACPI_CAP_SMP_SAME_C3; 3396081Sphk if (devclass_get_drivers(acpi_cpu_devclass, &drivers, &drv_count) == 0) { 3406081Sphk for (i = 0; i < drv_count; i++) { 3416081Sphk if (ACPI_GET_FEATURES(drivers[i], &features) == 0) 3426081Sphk sc->cpu_features |= features; 3436081Sphk } 3446081Sphk free(drivers, M_TEMP); 3456081Sphk } 3466081Sphk 3476081Sphk /* 3486081Sphk * CPU capabilities are specified as a buffer of 32-bit integers: 3496081Sphk * revision, count, and one or more capabilities. The revision of 3506081Sphk * "1" is not specified anywhere but seems to match Linux. 3516081Sphk */ 3526081Sphk if (sc->cpu_features) { 3536081Sphk arglist.Pointer = arg; 3546081Sphk arglist.Count = 1; 3556081Sphk arg[0].Type = ACPI_TYPE_BUFFER; 3566081Sphk arg[0].Buffer.Length = sizeof(cap_set); 3576081Sphk arg[0].Buffer.Pointer = (uint8_t *)cap_set; 3586081Sphk cap_set[0] = 1; /* revision */ 3596081Sphk cap_set[1] = 1; /* number of capabilities integers */ 3606081Sphk cap_set[2] = sc->cpu_features; 3616081Sphk AcpiEvaluateObject(sc->cpu_handle, "_PDC", &arglist, NULL); 3626081Sphk 3636081Sphk /* 3646081Sphk * On some systems we need to evaluate _OSC so that the ASL 3656081Sphk * loads the _PSS and/or _PDC methods at runtime. 3666081Sphk * 3676081Sphk * TODO: evaluate failure of _OSC. 3686081Sphk */ 3696081Sphk arglist.Pointer = arg; 37019983Smckay arglist.Count = 4; 3716081Sphk arg[0].Type = ACPI_TYPE_BUFFER; 3726081Sphk arg[0].Buffer.Length = sizeof(cpu_oscuuid); 37319983Smckay arg[0].Buffer.Pointer = cpu_oscuuid; /* UUID */ 3746081Sphk arg[1].Type = ACPI_TYPE_INTEGER; 37519983Smckay arg[1].Integer.Value = 1; /* revision */ 3766081Sphk arg[2].Type = ACPI_TYPE_INTEGER; 3776081Sphk arg[2].Integer.Value = 1; /* count */ 3786081Sphk arg[3].Type = ACPI_TYPE_BUFFER; 3796081Sphk arg[3].Buffer.Length = sizeof(cap_set); /* Capabilities buffer */ 3806081Sphk arg[3].Buffer.Pointer = (uint8_t *)cap_set; 3816081Sphk cap_set[0] = 0; 3826081Sphk AcpiEvaluateObject(sc->cpu_handle, "_OSC", &arglist, NULL); 3836081Sphk } 3846081Sphk 3856457Sphk /* Probe for Cx state support. */ 3866081Sphk acpi_cpu_cx_probe(sc); 38719983Smckay 3886081Sphk /* Finally, call identify and probe/attach for child devices. */ 38919983Smckay bus_generic_probe(dev); 3906081Sphk bus_generic_attach(dev); 3916081Sphk 3926081Sphk return (0); 3936081Sphk} 3946081Sphk 3956081Sphk/* 3966081Sphk * Disable any entry to the idle function during suspend and re-enable it 3976081Sphk * during resume. 3986081Sphk */ 3996081Sphkstatic int 4006081Sphkacpi_cpu_suspend(device_t dev) 4016081Sphk{ 4026081Sphk int error; 4036081Sphk 4046081Sphk error = bus_generic_suspend(dev); 40519983Smckay if (error) 4066081Sphk return (error); 40719983Smckay cpu_disable_idle = TRUE; 4086081Sphk return (0); 4096081Sphk} 4106081Sphk 4116081Sphkstatic int 4126081Sphkacpi_cpu_resume(device_t dev) 4136081Sphk{ 41419983Smckay 4156081Sphk cpu_disable_idle = FALSE; 41619983Smckay return (bus_generic_resume(dev)); 4176081Sphk} 41819983Smckay 4196081Sphk/* 42019983Smckay * Find the nth present CPU and return its pc_cpuid as well as set the 4216081Sphk * pc_acpi_id from the most reliable source. 42219983Smckay */ 42319983Smckaystatic int 4246081Sphkacpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id, uint32_t *cpu_id) 4256081Sphk{ 42619983Smckay struct pcpu *pcpu_data; 42719983Smckay uint32_t i; 42819983Smckay 4296081Sphk KASSERT(acpi_id != NULL, ("Null acpi_id")); 4306081Sphk KASSERT(cpu_id != NULL, ("Null cpu_id")); 4316081Sphk for (i = 0; i <= mp_maxid; i++) { 4326081Sphk if (CPU_ABSENT(i)) 4336081Sphk continue; 4346081Sphk pcpu_data = pcpu_find(i); 4356081Sphk KASSERT(pcpu_data != NULL, ("no pcpu data for %d", i)); 4366081Sphk if (idx-- == 0) { 4376081Sphk /* 4386081Sphk * If pc_acpi_id was not initialized (e.g., a non-APIC UP box) 4396081Sphk * override it with the value from the ASL. Otherwise, if the 4406081Sphk * two don't match, prefer the MADT-derived value. Finally, 4416081Sphk * return the pc_cpuid to reference this processor. 44218110Speter */ 4436081Sphk if (pcpu_data->pc_acpi_id == 0xffffffff) 4446081Sphk pcpu_data->pc_acpi_id = *acpi_id; 4456081Sphk else if (pcpu_data->pc_acpi_id != *acpi_id) 4466081Sphk *acpi_id = pcpu_data->pc_acpi_id; 4476081Sphk *cpu_id = pcpu_data->pc_cpuid; 4486081Sphk return (0); 4496081Sphk } 4506081Sphk } 4516081Sphk 4526081Sphk return (ESRCH); 4536081Sphk} 4546081Sphk 4556081Sphkstatic struct resource_list * 4566081Sphkacpi_cpu_get_rlist(device_t dev, device_t child) 4576081Sphk{ 4586081Sphk struct acpi_cpu_device *ad; 4596081Sphk 4606081Sphk ad = device_get_ivars(child); 4616081Sphk if (ad == NULL) 4626081Sphk return (NULL); 4636081Sphk return (&ad->ad_rl); 4646081Sphk} 4656081Sphk 4666081Sphkstatic device_t 4676081Sphkacpi_cpu_add_child(device_t dev, int order, const char *name, int unit) 4686081Sphk{ 4696081Sphk struct acpi_cpu_device *ad; 470 device_t child; 471 472 if ((ad = malloc(sizeof(*ad), M_TEMP, M_NOWAIT | M_ZERO)) == NULL) 473 return (NULL); 474 475 resource_list_init(&ad->ad_rl); 476 477 child = device_add_child_ordered(dev, order, name, unit); 478 if (child != NULL) 479 device_set_ivars(child, ad); 480 else 481 free(ad, M_TEMP); 482 return (child); 483} 484 485static int 486acpi_cpu_read_ivar(device_t dev, device_t child, int index, uintptr_t *result) 487{ 488 struct acpi_cpu_softc *sc; 489 490 sc = device_get_softc(dev); 491 switch (index) { 492 case ACPI_IVAR_HANDLE: 493 *result = (uintptr_t)sc->cpu_handle; 494 break; 495 case CPU_IVAR_PCPU: 496 *result = (uintptr_t)sc->cpu_pcpu; 497 break; 498 default: 499 return (ENOENT); 500 } 501 return (0); 502} 503 504static int 505acpi_cpu_shutdown(device_t dev) 506{ 507 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 508 509 /* Allow children to shutdown first. */ 510 bus_generic_shutdown(dev); 511 512 /* 513 * Disable any entry to the idle function. There is a small race where 514 * an idle thread have passed this check but not gone to sleep. This 515 * is ok since device_shutdown() does not free the softc, otherwise 516 * we'd have to be sure all threads were evicted before returning. 517 */ 518 cpu_disable_idle = TRUE; 519 520 return_VALUE (0); 521} 522 523static void 524acpi_cpu_cx_probe(struct acpi_cpu_softc *sc) 525{ 526 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 527 528 /* Use initial sleep value of 1 sec. to start with lowest idle state. */ 529 sc->cpu_prev_sleep = 1000000; 530 sc->cpu_cx_lowest = 0; 531 532 /* 533 * Check for the ACPI 2.0 _CST sleep states object. If we can't find 534 * any, we'll revert to generic FADT/P_BLK Cx control method which will 535 * be handled by acpi_cpu_startup. We need to defer to after having 536 * probed all the cpus in the system before probing for generic Cx 537 * states as we may already have found cpus with valid _CST packages 538 */ 539 if (!cpu_cx_generic && acpi_cpu_cx_cst(sc) != 0) { 540 /* 541 * We were unable to find a _CST package for this cpu or there 542 * was an error parsing it. Switch back to generic mode. 543 */ 544 cpu_cx_generic = TRUE; 545 if (bootverbose) 546 device_printf(sc->cpu_dev, "switching to generic Cx mode\n"); 547 } 548 549 /* 550 * TODO: _CSD Package should be checked here. 551 */ 552} 553 554static void 555acpi_cpu_generic_cx_probe(struct acpi_cpu_softc *sc) 556{ 557 ACPI_GENERIC_ADDRESS gas; 558 struct acpi_cx *cx_ptr; 559 560 sc->cpu_cx_count = 0; 561 cx_ptr = sc->cpu_cx_states; 562 563 /* Use initial sleep value of 1 sec. to start with lowest idle state. */ 564 sc->cpu_prev_sleep = 1000000; 565 566 /* C1 has been required since just after ACPI 1.0 */ 567 cx_ptr->type = ACPI_STATE_C1; 568 cx_ptr->trans_lat = 0; 569 cx_ptr++; 570 sc->cpu_cx_count++; 571 572 /* 573 * The spec says P_BLK must be 6 bytes long. However, some systems 574 * use it to indicate a fractional set of features present so we 575 * take 5 as C2. Some may also have a value of 7 to indicate 576 * another C3 but most use _CST for this (as required) and having 577 * "only" C1-C3 is not a hardship. 578 */ 579 if (sc->cpu_p_blk_len < 5) 580 return; 581 582 /* Validate and allocate resources for C2 (P_LVL2). */ 583 gas.SpaceId = ACPI_ADR_SPACE_SYSTEM_IO; 584 gas.BitWidth = 8; 585 if (AcpiGbl_FADT.C2Latency <= 100) { 586 gas.Address = sc->cpu_p_blk + 4; 587 acpi_bus_alloc_gas(sc->cpu_dev, &cx_ptr->res_type, &sc->cpu_rid, 588 &gas, &cx_ptr->p_lvlx, RF_SHAREABLE); 589 if (cx_ptr->p_lvlx != NULL) { 590 sc->cpu_rid++; 591 cx_ptr->type = ACPI_STATE_C2; 592 cx_ptr->trans_lat = AcpiGbl_FADT.C2Latency; 593 cx_ptr++; 594 sc->cpu_cx_count++; 595 } 596 } 597 if (sc->cpu_p_blk_len < 6) 598 return; 599 600 /* Validate and allocate resources for C3 (P_LVL3). */ 601 if (AcpiGbl_FADT.C3Latency <= 1000 && !(cpu_quirks & CPU_QUIRK_NO_C3)) { 602 gas.Address = sc->cpu_p_blk + 5; 603 acpi_bus_alloc_gas(sc->cpu_dev, &cx_ptr->res_type, &sc->cpu_rid, &gas, 604 &cx_ptr->p_lvlx, RF_SHAREABLE); 605 if (cx_ptr->p_lvlx != NULL) { 606 sc->cpu_rid++; 607 cx_ptr->type = ACPI_STATE_C3; 608 cx_ptr->trans_lat = AcpiGbl_FADT.C3Latency; 609 cx_ptr++; 610 sc->cpu_cx_count++; 611 } 612 } 613} 614 615/* 616 * Parse a _CST package and set up its Cx states. Since the _CST object 617 * can change dynamically, our notify handler may call this function 618 * to clean up and probe the new _CST package. 619 */ 620static int 621acpi_cpu_cx_cst(struct acpi_cpu_softc *sc) 622{ 623 struct acpi_cx *cx_ptr; 624 ACPI_STATUS status; 625 ACPI_BUFFER buf; 626 ACPI_OBJECT *top; 627 ACPI_OBJECT *pkg; 628 uint32_t count; 629 int i; 630 631 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 632 633 buf.Pointer = NULL; 634 buf.Length = ACPI_ALLOCATE_BUFFER; 635 status = AcpiEvaluateObject(sc->cpu_handle, "_CST", NULL, &buf); 636 if (ACPI_FAILURE(status)) 637 return (ENXIO); 638 639 /* _CST is a package with a count and at least one Cx package. */ 640 top = (ACPI_OBJECT *)buf.Pointer; 641 if (!ACPI_PKG_VALID(top, 2) || acpi_PkgInt32(top, 0, &count) != 0) { 642 device_printf(sc->cpu_dev, "invalid _CST package\n"); 643 AcpiOsFree(buf.Pointer); 644 return (ENXIO); 645 } 646 if (count != top->Package.Count - 1) { 647 device_printf(sc->cpu_dev, "invalid _CST state count (%d != %d)\n", 648 count, top->Package.Count - 1); 649 count = top->Package.Count - 1; 650 } 651 if (count > MAX_CX_STATES) { 652 device_printf(sc->cpu_dev, "_CST has too many states (%d)\n", count); 653 count = MAX_CX_STATES; 654 } 655 656 /* Set up all valid states. */ 657 sc->cpu_cx_count = 0; 658 cx_ptr = sc->cpu_cx_states; 659 for (i = 0; i < count; i++) { 660 pkg = &top->Package.Elements[i + 1]; 661 if (!ACPI_PKG_VALID(pkg, 4) || 662 acpi_PkgInt32(pkg, 1, &cx_ptr->type) != 0 || 663 acpi_PkgInt32(pkg, 2, &cx_ptr->trans_lat) != 0 || 664 acpi_PkgInt32(pkg, 3, &cx_ptr->power) != 0) { 665 666 device_printf(sc->cpu_dev, "skipping invalid Cx state package\n"); 667 continue; 668 } 669 670 /* Validate the state to see if we should use it. */ 671 switch (cx_ptr->type) { 672 case ACPI_STATE_C1: 673 sc->cpu_non_c3 = i; 674 cx_ptr++; 675 sc->cpu_cx_count++; 676 continue; 677 case ACPI_STATE_C2: 678 if (cx_ptr->trans_lat > 100) { 679 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 680 "acpi_cpu%d: C2[%d] not available.\n", 681 device_get_unit(sc->cpu_dev), i)); 682 continue; 683 } 684 sc->cpu_non_c3 = i; 685 break; 686 case ACPI_STATE_C3: 687 default: 688 if (cx_ptr->trans_lat > 1000 || 689 (cpu_quirks & CPU_QUIRK_NO_C3) != 0) { 690 691 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 692 "acpi_cpu%d: C3[%d] not available.\n", 693 device_get_unit(sc->cpu_dev), i)); 694 continue; 695 } 696 break; 697 } 698 699#ifdef notyet 700 /* Free up any previous register. */ 701 if (cx_ptr->p_lvlx != NULL) { 702 bus_release_resource(sc->cpu_dev, 0, 0, cx_ptr->p_lvlx); 703 cx_ptr->p_lvlx = NULL; 704 } 705#endif 706 707 /* Allocate the control register for C2 or C3. */ 708 acpi_PkgGas(sc->cpu_dev, pkg, 0, &cx_ptr->res_type, &sc->cpu_rid, 709 &cx_ptr->p_lvlx, RF_SHAREABLE); 710 if (cx_ptr->p_lvlx) { 711 sc->cpu_rid++; 712 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 713 "acpi_cpu%d: Got C%d - %d latency\n", 714 device_get_unit(sc->cpu_dev), cx_ptr->type, 715 cx_ptr->trans_lat)); 716 cx_ptr++; 717 sc->cpu_cx_count++; 718 } 719 } 720 AcpiOsFree(buf.Pointer); 721 722 return (0); 723} 724 725/* 726 * Call this *after* all CPUs have been attached. 727 */ 728static void 729acpi_cpu_startup(void *arg) 730{ 731 struct acpi_cpu_softc *sc; 732 int i; 733 734 /* Get set of CPU devices */ 735 devclass_get_devices(acpi_cpu_devclass, &cpu_devices, &cpu_ndevices); 736 737 /* 738 * Setup any quirks that might necessary now that we have probed 739 * all the CPUs 740 */ 741 acpi_cpu_quirks(); 742 743 cpu_cx_count = 0; 744 if (cpu_cx_generic) { 745 /* 746 * We are using generic Cx mode, probe for available Cx states 747 * for all processors. 748 */ 749 for (i = 0; i < cpu_ndevices; i++) { 750 sc = device_get_softc(cpu_devices[i]); 751 acpi_cpu_generic_cx_probe(sc); 752 if (sc->cpu_cx_count > cpu_cx_count) 753 cpu_cx_count = sc->cpu_cx_count; 754 } 755 756 /* 757 * Find the highest Cx state common to all CPUs 758 * in the system, taking quirks into account. 759 */ 760 for (i = 0; i < cpu_ndevices; i++) { 761 sc = device_get_softc(cpu_devices[i]); 762 if (sc->cpu_cx_count < cpu_cx_count) 763 cpu_cx_count = sc->cpu_cx_count; 764 } 765 } else { 766 /* 767 * We are using _CST mode, remove C3 state if necessary. 768 * Update the largest Cx state supported in the global cpu_cx_count. 769 * It will be used in the global Cx sysctl handler. 770 * As we now know for sure that we will be using _CST mode 771 * install our notify handler. 772 */ 773 for (i = 0; i < cpu_ndevices; i++) { 774 sc = device_get_softc(cpu_devices[i]); 775 if (cpu_quirks & CPU_QUIRK_NO_C3) { 776 sc->cpu_cx_count = sc->cpu_non_c3 + 1; 777 } 778 if (sc->cpu_cx_count > cpu_cx_count) 779 cpu_cx_count = sc->cpu_cx_count; 780 AcpiInstallNotifyHandler(sc->cpu_handle, ACPI_DEVICE_NOTIFY, 781 acpi_cpu_notify, sc); 782 } 783 } 784 785 /* Perform Cx final initialization. */ 786 for (i = 0; i < cpu_ndevices; i++) { 787 sc = device_get_softc(cpu_devices[i]); 788 acpi_cpu_startup_cx(sc); 789 } 790 791 /* Add a sysctl handler to handle global Cx lowest setting */ 792 SYSCTL_ADD_PROC(&cpu_sysctl_ctx, SYSCTL_CHILDREN(cpu_sysctl_tree), 793 OID_AUTO, "cx_lowest", CTLTYPE_STRING | CTLFLAG_RW, 794 NULL, 0, acpi_cpu_global_cx_lowest_sysctl, "A", 795 "Global lowest Cx sleep state to use"); 796 797 /* Take over idling from cpu_idle_default(). */ 798 cpu_cx_lowest = 0; 799 cpu_disable_idle = FALSE; 800 cpu_idle_hook = acpi_cpu_idle; 801} 802 803static void 804acpi_cpu_cx_list(struct acpi_cpu_softc *sc) 805{ 806 struct sbuf sb; 807 int i; 808 809 /* 810 * Set up the list of Cx states 811 */ 812 sc->cpu_non_c3 = 0; 813 sbuf_new(&sb, sc->cpu_cx_supported, sizeof(sc->cpu_cx_supported), 814 SBUF_FIXEDLEN); 815 for (i = 0; i < sc->cpu_cx_count; i++) { 816 sbuf_printf(&sb, "C%d/%d ", i + 1, sc->cpu_cx_states[i].trans_lat); 817 if (sc->cpu_cx_states[i].type < ACPI_STATE_C3) 818 sc->cpu_non_c3 = i; 819 } 820 sbuf_trim(&sb); 821 sbuf_finish(&sb); 822} 823 824static void 825acpi_cpu_startup_cx(struct acpi_cpu_softc *sc) 826{ 827 acpi_cpu_cx_list(sc); 828 829 SYSCTL_ADD_STRING(&sc->cpu_sysctl_ctx, 830 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->cpu_dev)), 831 OID_AUTO, "cx_supported", CTLFLAG_RD, 832 sc->cpu_cx_supported, 0, 833 "Cx/microsecond values for supported Cx states"); 834 SYSCTL_ADD_PROC(&sc->cpu_sysctl_ctx, 835 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->cpu_dev)), 836 OID_AUTO, "cx_lowest", CTLTYPE_STRING | CTLFLAG_RW, 837 (void *)sc, 0, acpi_cpu_cx_lowest_sysctl, "A", 838 "lowest Cx sleep state to use"); 839 SYSCTL_ADD_PROC(&sc->cpu_sysctl_ctx, 840 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->cpu_dev)), 841 OID_AUTO, "cx_usage", CTLTYPE_STRING | CTLFLAG_RD, 842 (void *)sc, 0, acpi_cpu_usage_sysctl, "A", 843 "percent usage for each Cx state"); 844 845#ifdef notyet 846 /* Signal platform that we can handle _CST notification. */ 847 if (!cpu_cx_generic && cpu_cst_cnt != 0) { 848 ACPI_LOCK(acpi); 849 AcpiOsWritePort(cpu_smi_cmd, cpu_cst_cnt, 8); 850 ACPI_UNLOCK(acpi); 851 } 852#endif 853} 854 855/* 856 * Idle the CPU in the lowest state possible. This function is called with 857 * interrupts disabled. Note that once it re-enables interrupts, a task 858 * switch can occur so do not access shared data (i.e. the softc) after 859 * interrupts are re-enabled. 860 */ 861static void 862acpi_cpu_idle() 863{ 864 struct acpi_cpu_softc *sc; 865 struct acpi_cx *cx_next; 866 uint32_t start_time, end_time; 867 int bm_active, cx_next_idx, i; 868 869 /* If disabled, return immediately. */ 870 if (cpu_disable_idle) { 871 ACPI_ENABLE_IRQS(); 872 return; 873 } 874 875 /* 876 * Look up our CPU id to get our softc. If it's NULL, we'll use C1 877 * since there is no ACPI processor object for this CPU. This occurs 878 * for logical CPUs in the HTT case. 879 */ 880 sc = cpu_softc[PCPU_GET(cpuid)]; 881 if (sc == NULL) { 882 acpi_cpu_c1(); 883 return; 884 } 885 886 /* Find the lowest state that has small enough latency. */ 887 cx_next_idx = 0; 888 for (i = sc->cpu_cx_lowest; i >= 0; i--) { 889 if (sc->cpu_cx_states[i].trans_lat * 3 <= sc->cpu_prev_sleep) { 890 cx_next_idx = i; 891 break; 892 } 893 } 894 895 /* 896 * Check for bus master activity. If there was activity, clear 897 * the bit and use the lowest non-C3 state. Note that the USB 898 * driver polling for new devices keeps this bit set all the 899 * time if USB is loaded. 900 */ 901 if ((cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) { 902 AcpiReadBitRegister(ACPI_BITREG_BUS_MASTER_STATUS, &bm_active); 903 if (bm_active != 0) { 904 AcpiWriteBitRegister(ACPI_BITREG_BUS_MASTER_STATUS, 1); 905 cx_next_idx = min(cx_next_idx, sc->cpu_non_c3); 906 } 907 } 908 909 /* Select the next state and update statistics. */ 910 cx_next = &sc->cpu_cx_states[cx_next_idx]; 911 sc->cpu_cx_stats[cx_next_idx]++; 912 KASSERT(cx_next->type != ACPI_STATE_C0, ("acpi_cpu_idle: C0 sleep")); 913 914 /* 915 * Execute HLT (or equivalent) and wait for an interrupt. We can't 916 * calculate the time spent in C1 since the place we wake up is an 917 * ISR. Assume we slept half of quantum and return. 918 */ 919 if (cx_next->type == ACPI_STATE_C1) { 920 sc->cpu_prev_sleep = (sc->cpu_prev_sleep * 3 + 500000 / hz) / 4; 921 acpi_cpu_c1(); 922 return; 923 } 924 925 /* 926 * For C3, disable bus master arbitration and enable bus master wake 927 * if BM control is available, otherwise flush the CPU cache. 928 */ 929 if (cx_next->type == ACPI_STATE_C3) { 930 if ((cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) { 931 AcpiWriteBitRegister(ACPI_BITREG_ARB_DISABLE, 1); 932 AcpiWriteBitRegister(ACPI_BITREG_BUS_MASTER_RLD, 1); 933 } else 934 ACPI_FLUSH_CPU_CACHE(); 935 } 936 937 /* 938 * Read from P_LVLx to enter C2(+), checking time spent asleep. 939 * Use the ACPI timer for measuring sleep time. Since we need to 940 * get the time very close to the CPU start/stop clock logic, this 941 * is the only reliable time source. 942 */ 943 AcpiRead(&start_time, &AcpiGbl_FADT.XPmTimerBlock); 944 CPU_GET_REG(cx_next->p_lvlx, 1); 945 946 /* 947 * Read the end time twice. Since it may take an arbitrary time 948 * to enter the idle state, the first read may be executed before 949 * the processor has stopped. Doing it again provides enough 950 * margin that we are certain to have a correct value. 951 */ 952 AcpiRead(&end_time, &AcpiGbl_FADT.XPmTimerBlock); 953 AcpiRead(&end_time, &AcpiGbl_FADT.XPmTimerBlock); 954 955 /* Enable bus master arbitration and disable bus master wakeup. */ 956 if (cx_next->type == ACPI_STATE_C3 && 957 (cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) { 958 AcpiWriteBitRegister(ACPI_BITREG_ARB_DISABLE, 0); 959 AcpiWriteBitRegister(ACPI_BITREG_BUS_MASTER_RLD, 0); 960 } 961 ACPI_ENABLE_IRQS(); 962 963 /* Find the actual time asleep in microseconds. */ 964 end_time = acpi_TimerDelta(end_time, start_time); 965 sc->cpu_prev_sleep = (sc->cpu_prev_sleep * 3 + PM_USEC(end_time)) / 4; 966} 967 968/* 969 * Re-evaluate the _CST object when we are notified that it changed. 970 * 971 * XXX Re-evaluation disabled until locking is done. 972 */ 973static void 974acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context) 975{ 976 struct acpi_cpu_softc *sc = (struct acpi_cpu_softc *)context; 977 struct acpi_cpu_softc *isc; 978 int i; 979 980 if (notify != ACPI_NOTIFY_CX_STATES) 981 return; 982 983 /* Update the list of Cx states. */ 984 acpi_cpu_cx_cst(sc); 985 acpi_cpu_cx_list(sc); 986 987 /* Update the new lowest useable Cx state for all CPUs. */ 988 ACPI_SERIAL_BEGIN(cpu); 989 cpu_cx_count = 0; 990 for (i = 0; i < cpu_ndevices; i++) { 991 isc = device_get_softc(cpu_devices[i]); 992 if (isc->cpu_cx_count > cpu_cx_count) 993 cpu_cx_count = isc->cpu_cx_count; 994 } 995 ACPI_SERIAL_END(cpu); 996} 997 998static int 999acpi_cpu_quirks(void) 1000{ 1001 device_t acpi_dev; 1002 uint32_t val; 1003 1004 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 1005 1006 /* 1007 * Bus mastering arbitration control is needed to keep caches coherent 1008 * while sleeping in C3. If it's not present but a working flush cache 1009 * instruction is present, flush the caches before entering C3 instead. 1010 * Otherwise, just disable C3 completely. 1011 */ 1012 if (AcpiGbl_FADT.Pm2ControlBlock == 0 || 1013 AcpiGbl_FADT.Pm2ControlLength == 0) { 1014 if ((AcpiGbl_FADT.Flags & ACPI_FADT_WBINVD) && 1015 (AcpiGbl_FADT.Flags & ACPI_FADT_WBINVD_FLUSH) == 0) { 1016 cpu_quirks |= CPU_QUIRK_NO_BM_CTRL; 1017 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 1018 "acpi_cpu: no BM control, using flush cache method\n")); 1019 } else { 1020 cpu_quirks |= CPU_QUIRK_NO_C3; 1021 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 1022 "acpi_cpu: no BM control, C3 not available\n")); 1023 } 1024 } 1025 1026 /* 1027 * If we are using generic Cx mode, C3 on multiple CPUs requires using 1028 * the expensive flush cache instruction. 1029 */ 1030 if (cpu_cx_generic && mp_ncpus > 1) { 1031 cpu_quirks |= CPU_QUIRK_NO_BM_CTRL; 1032 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 1033 "acpi_cpu: SMP, using flush cache mode for C3\n")); 1034 } 1035 1036 /* Look for various quirks of the PIIX4 part. */ 1037 acpi_dev = pci_find_device(PCI_VENDOR_INTEL, PCI_DEVICE_82371AB_3); 1038 if (acpi_dev != NULL) { 1039 switch (pci_get_revid(acpi_dev)) { 1040 /* 1041 * Disable C3 support for all PIIX4 chipsets. Some of these parts 1042 * do not report the BMIDE status to the BM status register and 1043 * others have a livelock bug if Type-F DMA is enabled. Linux 1044 * works around the BMIDE bug by reading the BM status directly 1045 * but we take the simpler approach of disabling C3 for these 1046 * parts. 1047 * 1048 * See erratum #18 ("C3 Power State/BMIDE and Type-F DMA 1049 * Livelock") from the January 2002 PIIX4 specification update. 1050 * Applies to all PIIX4 models. 1051 * 1052 * Also, make sure that all interrupts cause a "Stop Break" 1053 * event to exit from C2 state. 1054 * Also, BRLD_EN_BM (ACPI_BITREG_BUS_MASTER_RLD in ACPI-speak) 1055 * should be set to zero, otherwise it causes C2 to short-sleep. 1056 * PIIX4 doesn't properly support C3 and bus master activity 1057 * need not break out of C2. 1058 */ 1059 case PCI_REVISION_A_STEP: 1060 case PCI_REVISION_B_STEP: 1061 case PCI_REVISION_4E: 1062 case PCI_REVISION_4M: 1063 cpu_quirks |= CPU_QUIRK_NO_C3; 1064 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 1065 "acpi_cpu: working around PIIX4 bug, disabling C3\n")); 1066 1067 val = pci_read_config(acpi_dev, PIIX4_DEVACTB_REG, 4); 1068 if ((val & PIIX4_STOP_BREAK_MASK) != PIIX4_STOP_BREAK_MASK) { 1069 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 1070 "acpi_cpu: PIIX4: enabling IRQs to generate Stop Break\n")); 1071 val |= PIIX4_STOP_BREAK_MASK; 1072 pci_write_config(acpi_dev, PIIX4_DEVACTB_REG, val, 4); 1073 } 1074 AcpiReadBitRegister(ACPI_BITREG_BUS_MASTER_RLD, &val); 1075 if (val) { 1076 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 1077 "acpi_cpu: PIIX4: reset BRLD_EN_BM\n")); 1078 AcpiWriteBitRegister(ACPI_BITREG_BUS_MASTER_RLD, 0); 1079 } 1080 break; 1081 default: 1082 break; 1083 } 1084 } 1085 1086 return (0); 1087} 1088 1089static int 1090acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS) 1091{ 1092 struct acpi_cpu_softc *sc; 1093 struct sbuf sb; 1094 char buf[128]; 1095 int i; 1096 uintmax_t fract, sum, whole; 1097 1098 sc = (struct acpi_cpu_softc *) arg1; 1099 sum = 0; 1100 for (i = 0; i < sc->cpu_cx_count; i++) 1101 sum += sc->cpu_cx_stats[i]; 1102 sbuf_new(&sb, buf, sizeof(buf), SBUF_FIXEDLEN); 1103 for (i = 0; i < sc->cpu_cx_count; i++) { 1104 if (sum > 0) { 1105 whole = (uintmax_t)sc->cpu_cx_stats[i] * 100; 1106 fract = (whole % sum) * 100; 1107 sbuf_printf(&sb, "%u.%02u%% ", (u_int)(whole / sum), 1108 (u_int)(fract / sum)); 1109 } else 1110 sbuf_printf(&sb, "0.00%% "); 1111 } 1112 sbuf_printf(&sb, "last %dus", sc->cpu_prev_sleep); 1113 sbuf_trim(&sb); 1114 sbuf_finish(&sb); 1115 sysctl_handle_string(oidp, sbuf_data(&sb), sbuf_len(&sb), req); 1116 sbuf_delete(&sb); 1117 1118 return (0); 1119} 1120 1121static int 1122acpi_cpu_set_cx_lowest(struct acpi_cpu_softc *sc, int val) 1123{ 1124 int i; 1125 1126 ACPI_SERIAL_ASSERT(cpu); 1127 sc->cpu_cx_lowest = val; 1128 1129 /* If not disabling, cache the new lowest non-C3 state. */ 1130 sc->cpu_non_c3 = 0; 1131 for (i = sc->cpu_cx_lowest; i >= 0; i--) { 1132 if (sc->cpu_cx_states[i].type < ACPI_STATE_C3) { 1133 sc->cpu_non_c3 = i; 1134 break; 1135 } 1136 } 1137 1138 /* Reset the statistics counters. */ 1139 bzero(sc->cpu_cx_stats, sizeof(sc->cpu_cx_stats)); 1140 return (0); 1141} 1142 1143static int 1144acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS) 1145{ 1146 struct acpi_cpu_softc *sc; 1147 char state[8]; 1148 int val, error; 1149 1150 sc = (struct acpi_cpu_softc *) arg1; 1151 snprintf(state, sizeof(state), "C%d", sc->cpu_cx_lowest + 1); 1152 error = sysctl_handle_string(oidp, state, sizeof(state), req); 1153 if (error != 0 || req->newptr == NULL) 1154 return (error); 1155 if (strlen(state) < 2 || toupper(state[0]) != 'C') 1156 return (EINVAL); 1157 val = (int) strtol(state + 1, NULL, 10) - 1; 1158 if (val < 0 || val > sc->cpu_cx_count - 1) 1159 return (EINVAL); 1160 1161 ACPI_SERIAL_BEGIN(cpu); 1162 acpi_cpu_set_cx_lowest(sc, val); 1163 ACPI_SERIAL_END(cpu); 1164 1165 return (0); 1166} 1167 1168static int 1169acpi_cpu_global_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS) 1170{ 1171 struct acpi_cpu_softc *sc; 1172 char state[8]; 1173 int val, error, i; 1174 1175 snprintf(state, sizeof(state), "C%d", cpu_cx_lowest + 1); 1176 error = sysctl_handle_string(oidp, state, sizeof(state), req); 1177 if (error != 0 || req->newptr == NULL) 1178 return (error); 1179 if (strlen(state) < 2 || toupper(state[0]) != 'C') 1180 return (EINVAL); 1181 val = (int) strtol(state + 1, NULL, 10) - 1; 1182 if (val < 0 || val > cpu_cx_count - 1) 1183 return (EINVAL); 1184 cpu_cx_lowest = val; 1185 1186 /* Update the new lowest useable Cx state for all CPUs. */ 1187 ACPI_SERIAL_BEGIN(cpu); 1188 for (i = 0; i < cpu_ndevices; i++) { 1189 sc = device_get_softc(cpu_devices[i]); 1190 acpi_cpu_set_cx_lowest(sc, val); 1191 } 1192 ACPI_SERIAL_END(cpu); 1193 1194 return (0); 1195} 1196