acpi_cpu.c revision 141411
1/*- 2 * Copyright (c) 2003-2005 Nate Lawson (SDG) 3 * Copyright (c) 2001 Michael Smith 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28#include <sys/cdefs.h> 29__FBSDID("$FreeBSD: head/sys/dev/acpica/acpi_cpu.c 141411 2005-02-06 20:12:28Z njl $"); 30 31#include "opt_acpi.h" 32#include <sys/param.h> 33#include <sys/bus.h> 34#include <sys/cpu.h> 35#include <sys/kernel.h> 36#include <sys/malloc.h> 37#include <sys/module.h> 38#include <sys/pcpu.h> 39#include <sys/power.h> 40#include <sys/proc.h> 41#include <sys/sbuf.h> 42#include <sys/smp.h> 43 44#include <dev/pci/pcivar.h> 45#include <machine/atomic.h> 46#include <machine/bus.h> 47#include <sys/rman.h> 48 49#include "acpi.h" 50#include <dev/acpica/acpivar.h> 51 52/* 53 * Support for ACPI Processor devices, including ACPI 2.0 throttling 54 * and C[1-3] sleep states. 55 * 56 * TODO: implement scans of all CPUs to be sure all Cx states are 57 * equivalent. 58 */ 59 60/* Hooks for the ACPI CA debugging infrastructure */ 61#define _COMPONENT ACPI_PROCESSOR 62ACPI_MODULE_NAME("PROCESSOR") 63 64struct acpi_cx { 65 struct resource *p_lvlx; /* Register to read to enter state. */ 66 uint32_t type; /* C1-3 (C4 and up treated as C3). */ 67 uint32_t trans_lat; /* Transition latency (usec). */ 68 uint32_t power; /* Power consumed (mW). */ 69 int res_type; /* Resource type for p_lvlx. */ 70}; 71#define MAX_CX_STATES 8 72 73struct acpi_cpu_softc { 74 device_t cpu_dev; 75 ACPI_HANDLE cpu_handle; 76 struct pcpu *cpu_pcpu; 77 uint32_t cpu_acpi_id; /* ACPI processor id */ 78 uint32_t cpu_p_blk; /* ACPI P_BLK location */ 79 uint32_t cpu_p_blk_len; /* P_BLK length (must be 6). */ 80 struct resource *cpu_p_cnt; /* Throttling control register */ 81 int cpu_p_type; /* Resource type for cpu_p_cnt. */ 82 struct acpi_cx cpu_cx_states[MAX_CX_STATES]; 83 int cpu_cx_count; /* Number of valid Cx states. */ 84 int cpu_prev_sleep;/* Last idle sleep duration. */ 85}; 86 87struct acpi_cpu_device { 88 struct resource_list ad_rl; 89}; 90 91#define CPU_GET_REG(reg, width) \ 92 (bus_space_read_ ## width(rman_get_bustag((reg)), \ 93 rman_get_bushandle((reg)), 0)) 94#define CPU_SET_REG(reg, width, val) \ 95 (bus_space_write_ ## width(rman_get_bustag((reg)), \ 96 rman_get_bushandle((reg)), 0, (val))) 97 98/* 99 * Speeds are stored in counts, from 1 to CPU_MAX_SPEED, and 100 * reported to the user in tenths of a percent. 101 */ 102static uint32_t cpu_duty_offset; 103static uint32_t cpu_duty_width; 104#define CPU_MAX_SPEED (1 << cpu_duty_width) 105#define CPU_SPEED_PERCENT(x) ((1000 * (x)) / CPU_MAX_SPEED) 106#define CPU_SPEED_PRINTABLE(x) (CPU_SPEED_PERCENT(x) / 10), \ 107 (CPU_SPEED_PERCENT(x) % 10) 108#define CPU_P_CNT_THT_EN (1<<4) 109#define PM_USEC(x) ((x) >> 2) /* ~4 clocks per usec (3.57955 Mhz) */ 110 111#define ACPI_CPU_NOTIFY_PERF_STATES 0x80 /* _PSS changed. */ 112#define ACPI_CPU_NOTIFY_CX_STATES 0x81 /* _CST changed. */ 113 114#define CPU_QUIRK_NO_C3 (1<<0) /* C3-type states are not usable. */ 115#define CPU_QUIRK_NO_THROTTLE (1<<1) /* Throttling is not usable. */ 116#define CPU_QUIRK_NO_BM_CTRL (1<<2) /* No bus mastering control. */ 117 118#define PCI_VENDOR_INTEL 0x8086 119#define PCI_DEVICE_82371AB_3 0x7113 /* PIIX4 chipset for quirks. */ 120#define PCI_REVISION_A_STEP 0 121#define PCI_REVISION_B_STEP 1 122#define PCI_REVISION_4E 2 123#define PCI_REVISION_4M 3 124 125/* Platform hardware resource information. */ 126static uint32_t cpu_smi_cmd; /* Value to write to SMI_CMD. */ 127static uint8_t cpu_cst_cnt; /* Indicate we are _CST aware. */ 128static int cpu_rid; /* Driver-wide resource id. */ 129static int cpu_quirks; /* Indicate any hardware bugs. */ 130 131/* Runtime state. */ 132static int cpu_cx_count; /* Number of valid states */ 133static int cpu_non_c3; /* Index of lowest non-C3 state. */ 134static u_int cpu_cx_stats[MAX_CX_STATES];/* Cx usage history. */ 135 136/* Values for sysctl. */ 137static struct sysctl_ctx_list acpi_cpu_sysctl_ctx; 138static struct sysctl_oid *acpi_cpu_sysctl_tree; 139static uint32_t cpu_throttle_state; 140static uint32_t cpu_throttle_max; 141static int cpu_cx_lowest; 142static char cpu_cx_supported[64]; 143 144static device_t *cpu_devices; 145static int cpu_ndevices; 146static struct acpi_cpu_softc **cpu_softc; 147ACPI_SERIAL_DECL(cpu, "ACPI CPU"); 148 149static int acpi_cpu_probe(device_t dev); 150static int acpi_cpu_attach(device_t dev); 151static int acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id, 152 uint32_t *cpu_id); 153static struct resource_list *acpi_cpu_get_rlist(device_t dev, device_t child); 154static device_t acpi_cpu_add_child(device_t dev, int order, const char *name, 155 int unit); 156static int acpi_cpu_read_ivar(device_t dev, device_t child, int index, 157 uintptr_t *result); 158static int acpi_cpu_shutdown(device_t dev); 159static int acpi_cpu_throttle_probe(struct acpi_cpu_softc *sc); 160static int acpi_cpu_cx_probe(struct acpi_cpu_softc *sc); 161static int acpi_cpu_cx_cst(struct acpi_cpu_softc *sc); 162static void acpi_cpu_startup(void *arg); 163static void acpi_cpu_startup_throttling(void); 164static void acpi_cpu_startup_cx(void); 165static void acpi_cpu_throttle_set(uint32_t speed); 166static void acpi_cpu_idle(void); 167static void acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context); 168static int acpi_cpu_quirks(struct acpi_cpu_softc *sc); 169static int acpi_cpu_throttle_sysctl(SYSCTL_HANDLER_ARGS); 170static int acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS); 171static int acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS); 172 173static device_method_t acpi_cpu_methods[] = { 174 /* Device interface */ 175 DEVMETHOD(device_probe, acpi_cpu_probe), 176 DEVMETHOD(device_attach, acpi_cpu_attach), 177 DEVMETHOD(device_detach, bus_generic_detach), 178 DEVMETHOD(device_shutdown, acpi_cpu_shutdown), 179 DEVMETHOD(device_suspend, bus_generic_suspend), 180 DEVMETHOD(device_resume, bus_generic_resume), 181 182 /* Bus interface */ 183 DEVMETHOD(bus_add_child, acpi_cpu_add_child), 184 DEVMETHOD(bus_read_ivar, acpi_cpu_read_ivar), 185 DEVMETHOD(bus_get_resource_list, acpi_cpu_get_rlist), 186 DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource), 187 DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource), 188 DEVMETHOD(bus_alloc_resource, bus_generic_rl_alloc_resource), 189 DEVMETHOD(bus_release_resource, bus_generic_rl_release_resource), 190 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 191 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 192 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 193 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 194 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 195 196 {0, 0} 197}; 198 199static driver_t acpi_cpu_driver = { 200 "cpu", 201 acpi_cpu_methods, 202 sizeof(struct acpi_cpu_softc), 203}; 204 205static devclass_t acpi_cpu_devclass; 206DRIVER_MODULE(cpu, acpi, acpi_cpu_driver, acpi_cpu_devclass, 0, 0); 207MODULE_DEPEND(cpu, acpi, 1, 1, 1); 208 209static int 210acpi_cpu_probe(device_t dev) 211{ 212 int acpi_id, cpu_id, cx_count; 213 ACPI_BUFFER buf; 214 ACPI_HANDLE handle; 215 char msg[32]; 216 ACPI_OBJECT *obj; 217 ACPI_STATUS status; 218 219 if (acpi_disabled("cpu") || acpi_get_type(dev) != ACPI_TYPE_PROCESSOR) 220 return (ENXIO); 221 222 handle = acpi_get_handle(dev); 223 if (cpu_softc == NULL) 224 cpu_softc = malloc(sizeof(struct acpi_cpu_softc *) * 225 (mp_maxid + 1), M_TEMP /* XXX */, M_WAITOK | M_ZERO); 226 227 /* Get our Processor object. */ 228 buf.Pointer = NULL; 229 buf.Length = ACPI_ALLOCATE_BUFFER; 230 status = AcpiEvaluateObject(handle, NULL, NULL, &buf); 231 if (ACPI_FAILURE(status)) { 232 device_printf(dev, "probe failed to get Processor obj - %s\n", 233 AcpiFormatException(status)); 234 return (ENXIO); 235 } 236 obj = (ACPI_OBJECT *)buf.Pointer; 237 if (obj->Type != ACPI_TYPE_PROCESSOR) { 238 device_printf(dev, "Processor object has bad type %d\n", obj->Type); 239 AcpiOsFree(obj); 240 return (ENXIO); 241 } 242 243 /* 244 * Find the processor associated with our unit. We could use the 245 * ProcId as a key, however, some boxes do not have the same values 246 * in their Processor object as the ProcId values in the MADT. 247 */ 248 acpi_id = obj->Processor.ProcId; 249 AcpiOsFree(obj); 250 if (acpi_pcpu_get_id(device_get_unit(dev), &acpi_id, &cpu_id) != 0) 251 return (ENXIO); 252 253 /* 254 * Check if we already probed this processor. We scan the bus twice 255 * so it's possible we've already seen this one. 256 */ 257 if (cpu_softc[cpu_id] != NULL) 258 return (ENXIO); 259 260 /* Get a count of Cx states for our device string. */ 261 cx_count = 0; 262 buf.Pointer = NULL; 263 buf.Length = ACPI_ALLOCATE_BUFFER; 264 status = AcpiEvaluateObject(handle, "_CST", NULL, &buf); 265 if (ACPI_SUCCESS(status)) { 266 obj = (ACPI_OBJECT *)buf.Pointer; 267 if (ACPI_PKG_VALID(obj, 2)) 268 acpi_PkgInt32(obj, 0, &cx_count); 269 AcpiOsFree(obj); 270 } else { 271 if (AcpiGbl_FADT->Plvl2Lat <= 100) 272 cx_count++; 273 if (AcpiGbl_FADT->Plvl3Lat <= 1000) 274 cx_count++; 275 if (cx_count > 0) 276 cx_count++; 277 } 278 if (cx_count > 0) 279 snprintf(msg, sizeof(msg), "ACPI CPU (%d Cx states)", cx_count); 280 else 281 strlcpy(msg, "ACPI CPU", sizeof(msg)); 282 device_set_desc_copy(dev, msg); 283 284 /* Mark this processor as in-use and save our derived id for attach. */ 285 cpu_softc[cpu_id] = (void *)1; 286 acpi_set_magic(dev, cpu_id); 287 288 return (0); 289} 290 291static int 292acpi_cpu_attach(device_t dev) 293{ 294 ACPI_BUFFER buf; 295 ACPI_OBJECT *obj; 296 struct pcpu *pcpu_data; 297 struct acpi_cpu_softc *sc; 298 struct acpi_softc *acpi_sc; 299 ACPI_STATUS status; 300 int cx_ret, cpu_id, thr_ret; 301 302 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 303 304 sc = device_get_softc(dev); 305 sc->cpu_dev = dev; 306 sc->cpu_handle = acpi_get_handle(dev); 307 cpu_id = acpi_get_magic(dev); 308 cpu_softc[cpu_id] = sc; 309 pcpu_data = pcpu_find(cpu_id); 310 pcpu_data->pc_device = dev; 311 sc->cpu_pcpu = pcpu_data; 312 313 buf.Pointer = NULL; 314 buf.Length = ACPI_ALLOCATE_BUFFER; 315 status = AcpiEvaluateObject(sc->cpu_handle, NULL, NULL, &buf); 316 if (ACPI_FAILURE(status)) { 317 device_printf(dev, "attach failed to get Processor obj - %s\n", 318 AcpiFormatException(status)); 319 return (ENXIO); 320 } 321 obj = (ACPI_OBJECT *)buf.Pointer; 322 sc->cpu_p_blk = obj->Processor.PblkAddress; 323 sc->cpu_p_blk_len = obj->Processor.PblkLength; 324 sc->cpu_acpi_id = obj->Processor.ProcId; 325 AcpiOsFree(obj); 326 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_BLK at %#x/%d\n", 327 device_get_unit(dev), sc->cpu_p_blk, sc->cpu_p_blk_len)); 328 329 acpi_sc = acpi_device_get_parent_softc(dev); 330 sysctl_ctx_init(&acpi_cpu_sysctl_ctx); 331 acpi_cpu_sysctl_tree = SYSCTL_ADD_NODE(&acpi_cpu_sysctl_ctx, 332 SYSCTL_CHILDREN(acpi_sc->acpi_sysctl_tree), OID_AUTO, "cpu", 333 CTLFLAG_RD, 0, ""); 334 335 /* 336 * Probe for throttling and Cx state support. 337 * If none of these is present, free up unused resources. 338 */ 339 thr_ret = acpi_cpu_throttle_probe(sc); 340 cx_ret = acpi_cpu_cx_probe(sc); 341 if (thr_ret == 0 || cx_ret == 0) { 342 status = AcpiInstallNotifyHandler(sc->cpu_handle, ACPI_DEVICE_NOTIFY, 343 acpi_cpu_notify, sc); 344 if (device_get_unit(dev) == 0) 345 AcpiOsQueueForExecution(OSD_PRIORITY_LO, acpi_cpu_startup, NULL); 346 } else { 347 sysctl_ctx_free(&acpi_cpu_sysctl_ctx); 348 } 349 350 /* Call identify and then probe/attach for cpu child drivers. */ 351 bus_generic_probe(dev); 352 bus_generic_attach(dev); 353 354 return (0); 355} 356 357/* 358 * Find the nth present CPU and return its pc_cpuid as well as set the 359 * pc_acpi_id from the most reliable source. 360 */ 361static int 362acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id, uint32_t *cpu_id) 363{ 364 struct pcpu *pcpu_data; 365 uint32_t i; 366 367 KASSERT(acpi_id != NULL, ("Null acpi_id")); 368 KASSERT(cpu_id != NULL, ("Null cpu_id")); 369 for (i = 0; i <= mp_maxid; i++) { 370 if (CPU_ABSENT(i)) 371 continue; 372 pcpu_data = pcpu_find(i); 373 KASSERT(pcpu_data != NULL, ("no pcpu data for %d", i)); 374 if (idx-- == 0) { 375 /* 376 * If pc_acpi_id was not initialized (e.g., a non-APIC UP box) 377 * override it with the value from the ASL. Otherwise, if the 378 * two don't match, prefer the MADT-derived value. Finally, 379 * return the pc_cpuid to reference this processor. 380 */ 381 if (pcpu_data->pc_acpi_id == 0xffffffff) 382 pcpu_data->pc_acpi_id = *acpi_id; 383 else if (pcpu_data->pc_acpi_id != *acpi_id) 384 *acpi_id = pcpu_data->pc_acpi_id; 385 *cpu_id = pcpu_data->pc_cpuid; 386 return (0); 387 } 388 } 389 390 return (ESRCH); 391} 392 393static struct resource_list * 394acpi_cpu_get_rlist(device_t dev, device_t child) 395{ 396 struct acpi_cpu_device *ad; 397 398 ad = device_get_ivars(child); 399 if (ad == NULL) 400 return (NULL); 401 return (&ad->ad_rl); 402} 403 404static device_t 405acpi_cpu_add_child(device_t dev, int order, const char *name, int unit) 406{ 407 struct acpi_cpu_device *ad; 408 device_t child; 409 410 if ((ad = malloc(sizeof(*ad), M_TEMP, M_NOWAIT | M_ZERO)) == NULL) 411 return (NULL); 412 413 resource_list_init(&ad->ad_rl); 414 415 child = device_add_child_ordered(dev, order, name, unit); 416 if (child != NULL) 417 device_set_ivars(child, ad); 418 return (child); 419} 420 421static int 422acpi_cpu_read_ivar(device_t dev, device_t child, int index, uintptr_t *result) 423{ 424 struct acpi_cpu_softc *sc; 425 426 sc = device_get_softc(dev); 427 switch (index) { 428 case ACPI_IVAR_HANDLE: 429 *result = (uintptr_t)sc->cpu_handle; 430 break; 431 case CPU_IVAR_PCPU: 432 *result = (uintptr_t)sc->cpu_pcpu; 433 break; 434 default: 435 return (ENOENT); 436 } 437 return (0); 438} 439 440static int 441acpi_cpu_shutdown(device_t dev) 442{ 443 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 444 445 /* Allow children to shutdown first. */ 446 bus_generic_shutdown(dev); 447 448 /* Disable any entry to the idle function. */ 449 cpu_cx_count = 0; 450 451 /* Signal and wait for all processors to exit acpi_cpu_idle(). */ 452 smp_rendezvous(NULL, NULL, NULL, NULL); 453 454 return_VALUE (0); 455} 456 457static int 458acpi_cpu_throttle_probe(struct acpi_cpu_softc *sc) 459{ 460 uint32_t duty_end; 461 ACPI_BUFFER buf; 462 ACPI_OBJECT obj; 463 ACPI_GENERIC_ADDRESS gas; 464 ACPI_STATUS status; 465 466 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 467 468 /* Get throttling parameters from the FADT. 0 means not supported. */ 469 if (device_get_unit(sc->cpu_dev) == 0) { 470 cpu_smi_cmd = AcpiGbl_FADT->SmiCmd; 471 cpu_cst_cnt = AcpiGbl_FADT->CstCnt; 472 cpu_duty_offset = AcpiGbl_FADT->DutyOffset; 473 cpu_duty_width = AcpiGbl_FADT->DutyWidth; 474 } 475 if (cpu_duty_width == 0 || (cpu_quirks & CPU_QUIRK_NO_THROTTLE) != 0) 476 return (ENXIO); 477 478 /* Validate the duty offset/width. */ 479 duty_end = cpu_duty_offset + cpu_duty_width - 1; 480 if (duty_end > 31) { 481 device_printf(sc->cpu_dev, "CLK_VAL field overflows P_CNT register\n"); 482 return (ENXIO); 483 } 484 if (cpu_duty_offset <= 4 && duty_end >= 4) { 485 device_printf(sc->cpu_dev, "CLK_VAL field overlaps THT_EN bit\n"); 486 return (ENXIO); 487 } 488 489 /* 490 * If not present, fall back to using the processor's P_BLK to find 491 * the P_CNT register. 492 * 493 * Note that some systems seem to duplicate the P_BLK pointer 494 * across multiple CPUs, so not getting the resource is not fatal. 495 */ 496 buf.Pointer = &obj; 497 buf.Length = sizeof(obj); 498 status = AcpiEvaluateObject(sc->cpu_handle, "_PTC", NULL, &buf); 499 if (ACPI_SUCCESS(status)) { 500 if (obj.Buffer.Length < sizeof(ACPI_GENERIC_ADDRESS) + 3) { 501 device_printf(sc->cpu_dev, "_PTC buffer too small\n"); 502 return (ENXIO); 503 } 504 memcpy(&gas, obj.Buffer.Pointer + 3, sizeof(gas)); 505 acpi_bus_alloc_gas(sc->cpu_dev, &sc->cpu_p_type, &cpu_rid, &gas, 506 &sc->cpu_p_cnt); 507 if (sc->cpu_p_cnt != NULL) { 508 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_CNT from _PTC\n", 509 device_get_unit(sc->cpu_dev))); 510 } 511 } 512 513 /* If _PTC not present or other failure, try the P_BLK. */ 514 if (sc->cpu_p_cnt == NULL) { 515 /* 516 * The spec says P_BLK must be 6 bytes long. However, some 517 * systems use it to indicate a fractional set of features 518 * present so we take anything >= 4. 519 */ 520 if (sc->cpu_p_blk_len < 4) 521 return (ENXIO); 522 gas.Address = sc->cpu_p_blk; 523 gas.AddressSpaceId = ACPI_ADR_SPACE_SYSTEM_IO; 524 gas.RegisterBitWidth = 32; 525 acpi_bus_alloc_gas(sc->cpu_dev, &sc->cpu_p_type, &cpu_rid, &gas, 526 &sc->cpu_p_cnt); 527 if (sc->cpu_p_cnt != NULL) { 528 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_CNT from P_BLK\n", 529 device_get_unit(sc->cpu_dev))); 530 } else { 531 device_printf(sc->cpu_dev, "Failed to attach throttling P_CNT\n"); 532 return (ENXIO); 533 } 534 } 535 cpu_rid++; 536 537 return (0); 538} 539 540static int 541acpi_cpu_cx_probe(struct acpi_cpu_softc *sc) 542{ 543 ACPI_GENERIC_ADDRESS gas; 544 struct acpi_cx *cx_ptr; 545 int error; 546 547 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 548 549 /* 550 * Bus mastering arbitration control is needed to keep caches coherent 551 * while sleeping in C3. If it's not present but a working flush cache 552 * instruction is present, flush the caches before entering C3 instead. 553 * Otherwise, just disable C3 completely. 554 */ 555 if (AcpiGbl_FADT->V1_Pm2CntBlk == 0 || AcpiGbl_FADT->Pm2CntLen == 0) { 556 if (AcpiGbl_FADT->WbInvd && AcpiGbl_FADT->WbInvdFlush == 0) { 557 cpu_quirks |= CPU_QUIRK_NO_BM_CTRL; 558 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 559 "acpi_cpu%d: no BM control, using flush cache method\n", 560 device_get_unit(sc->cpu_dev))); 561 } else { 562 cpu_quirks |= CPU_QUIRK_NO_C3; 563 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 564 "acpi_cpu%d: no BM control, C3 not available\n", 565 device_get_unit(sc->cpu_dev))); 566 } 567 } 568 569 /* 570 * First, check for the ACPI 2.0 _CST sleep states object. 571 * If not usable, fall back to the P_BLK's P_LVL2 and P_LVL3. 572 */ 573 sc->cpu_cx_count = 0; 574 error = acpi_cpu_cx_cst(sc); 575 if (error != 0) { 576 cx_ptr = sc->cpu_cx_states; 577 578 /* C1 has been required since just after ACPI 1.0 */ 579 cx_ptr->type = ACPI_STATE_C1; 580 cx_ptr->trans_lat = 0; 581 cpu_non_c3 = 0; 582 cx_ptr++; 583 sc->cpu_cx_count++; 584 585 /* 586 * The spec says P_BLK must be 6 bytes long. However, some systems 587 * use it to indicate a fractional set of features present so we 588 * take 5 as C2. Some may also have a value of 7 to indicate 589 * another C3 but most use _CST for this (as required) and having 590 * "only" C1-C3 is not a hardship. 591 */ 592 if (sc->cpu_p_blk_len < 5) 593 goto done; 594 595 /* Validate and allocate resources for C2 (P_LVL2). */ 596 gas.AddressSpaceId = ACPI_ADR_SPACE_SYSTEM_IO; 597 gas.RegisterBitWidth = 8; 598 if (AcpiGbl_FADT->Plvl2Lat <= 100) { 599 gas.Address = sc->cpu_p_blk + 4; 600 acpi_bus_alloc_gas(sc->cpu_dev, &cx_ptr->res_type, &cpu_rid, &gas, 601 &cx_ptr->p_lvlx); 602 if (cx_ptr->p_lvlx != NULL) { 603 cpu_rid++; 604 cx_ptr->type = ACPI_STATE_C2; 605 cx_ptr->trans_lat = AcpiGbl_FADT->Plvl2Lat; 606 cpu_non_c3 = 1; 607 cx_ptr++; 608 sc->cpu_cx_count++; 609 } 610 } 611 if (sc->cpu_p_blk_len < 6) 612 goto done; 613 614 /* Validate and allocate resources for C3 (P_LVL3). */ 615 if (AcpiGbl_FADT->Plvl3Lat <= 1000 && 616 (cpu_quirks & CPU_QUIRK_NO_C3) == 0) { 617 gas.Address = sc->cpu_p_blk + 5; 618 acpi_bus_alloc_gas(sc->cpu_dev, &cx_ptr->res_type, &cpu_rid, &gas, 619 &cx_ptr->p_lvlx); 620 if (cx_ptr->p_lvlx != NULL) { 621 cpu_rid++; 622 cx_ptr->type = ACPI_STATE_C3; 623 cx_ptr->trans_lat = AcpiGbl_FADT->Plvl3Lat; 624 cx_ptr++; 625 sc->cpu_cx_count++; 626 } 627 } 628 } 629 630done: 631 /* If no valid registers were found, don't attach. */ 632 if (sc->cpu_cx_count == 0) 633 return (ENXIO); 634 635 /* Use initial sleep value of 1 sec. to start with lowest idle state. */ 636 sc->cpu_prev_sleep = 1000000; 637 638 return (0); 639} 640 641/* 642 * Parse a _CST package and set up its Cx states. Since the _CST object 643 * can change dynamically, our notify handler may call this function 644 * to clean up and probe the new _CST package. 645 */ 646static int 647acpi_cpu_cx_cst(struct acpi_cpu_softc *sc) 648{ 649 struct acpi_cx *cx_ptr; 650 ACPI_STATUS status; 651 ACPI_BUFFER buf; 652 ACPI_OBJECT *top; 653 ACPI_OBJECT *pkg; 654 uint32_t count; 655 int i; 656 657 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); 658 659 buf.Pointer = NULL; 660 buf.Length = ACPI_ALLOCATE_BUFFER; 661 status = AcpiEvaluateObject(sc->cpu_handle, "_CST", NULL, &buf); 662 if (ACPI_FAILURE(status)) 663 return (ENXIO); 664 665 /* _CST is a package with a count and at least one Cx package. */ 666 top = (ACPI_OBJECT *)buf.Pointer; 667 if (!ACPI_PKG_VALID(top, 2) || acpi_PkgInt32(top, 0, &count) != 0) { 668 device_printf(sc->cpu_dev, "Invalid _CST package\n"); 669 AcpiOsFree(buf.Pointer); 670 return (ENXIO); 671 } 672 if (count != top->Package.Count - 1) { 673 device_printf(sc->cpu_dev, "Invalid _CST state count (%d != %d)\n", 674 count, top->Package.Count - 1); 675 count = top->Package.Count - 1; 676 } 677 if (count > MAX_CX_STATES) { 678 device_printf(sc->cpu_dev, "_CST has too many states (%d)\n", count); 679 count = MAX_CX_STATES; 680 } 681 682 /* Set up all valid states. */ 683 sc->cpu_cx_count = 0; 684 cx_ptr = sc->cpu_cx_states; 685 for (i = 0; i < count; i++) { 686 pkg = &top->Package.Elements[i + 1]; 687 if (!ACPI_PKG_VALID(pkg, 4) || 688 acpi_PkgInt32(pkg, 1, &cx_ptr->type) != 0 || 689 acpi_PkgInt32(pkg, 2, &cx_ptr->trans_lat) != 0 || 690 acpi_PkgInt32(pkg, 3, &cx_ptr->power) != 0) { 691 692 device_printf(sc->cpu_dev, "Skipping invalid Cx state package\n"); 693 continue; 694 } 695 696 /* Validate the state to see if we should use it. */ 697 switch (cx_ptr->type) { 698 case ACPI_STATE_C1: 699 cpu_non_c3 = i; 700 cx_ptr++; 701 sc->cpu_cx_count++; 702 continue; 703 case ACPI_STATE_C2: 704 if (cx_ptr->trans_lat > 100) { 705 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 706 "acpi_cpu%d: C2[%d] not available.\n", 707 device_get_unit(sc->cpu_dev), i)); 708 continue; 709 } 710 cpu_non_c3 = i; 711 break; 712 case ACPI_STATE_C3: 713 default: 714 if (cx_ptr->trans_lat > 1000 || 715 (cpu_quirks & CPU_QUIRK_NO_C3) != 0) { 716 717 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 718 "acpi_cpu%d: C3[%d] not available.\n", 719 device_get_unit(sc->cpu_dev), i)); 720 continue; 721 } 722 break; 723 } 724 725#ifdef notyet 726 /* Free up any previous register. */ 727 if (cx_ptr->p_lvlx != NULL) { 728 bus_release_resource(sc->cpu_dev, 0, 0, cx_ptr->p_lvlx); 729 cx_ptr->p_lvlx = NULL; 730 } 731#endif 732 733 /* Allocate the control register for C2 or C3. */ 734 acpi_PkgGas(sc->cpu_dev, pkg, 0, &cx_ptr->res_type, &cpu_rid, 735 &cx_ptr->p_lvlx); 736 if (cx_ptr->p_lvlx) { 737 cpu_rid++; 738 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 739 "acpi_cpu%d: Got C%d - %d latency\n", 740 device_get_unit(sc->cpu_dev), cx_ptr->type, 741 cx_ptr->trans_lat)); 742 cx_ptr++; 743 sc->cpu_cx_count++; 744 } 745 } 746 AcpiOsFree(buf.Pointer); 747 748 return (0); 749} 750 751/* 752 * Call this *after* all CPUs have been attached. 753 */ 754static void 755acpi_cpu_startup(void *arg) 756{ 757 struct acpi_cpu_softc *sc; 758 int count, i; 759 760 /* Get set of CPU devices */ 761 devclass_get_devices(acpi_cpu_devclass, &cpu_devices, &cpu_ndevices); 762 763 /* Check for quirks via the first CPU device. */ 764 sc = device_get_softc(cpu_devices[0]); 765 acpi_cpu_quirks(sc); 766 767 /* 768 * Make sure all the processors' Cx counts match. We should probably 769 * also check the contents of each. However, no known systems have 770 * non-matching Cx counts so we'll deal with this later. 771 */ 772 count = MAX_CX_STATES; 773 for (i = 0; i < cpu_ndevices; i++) { 774 sc = device_get_softc(cpu_devices[i]); 775 count = min(sc->cpu_cx_count, count); 776 } 777 cpu_cx_count = count; 778 779 /* Perform throttling and Cx final initialization. */ 780 sc = device_get_softc(cpu_devices[0]); 781 if (sc->cpu_p_cnt != NULL) 782 acpi_cpu_startup_throttling(); 783 if (cpu_cx_count > 0) 784 acpi_cpu_startup_cx(); 785} 786 787/* 788 * Takes the ACPI lock to avoid fighting anyone over the SMI command 789 * port. 790 */ 791static void 792acpi_cpu_startup_throttling() 793{ 794 795 /* If throttling is not usable, don't initialize it. */ 796 if (cpu_quirks & CPU_QUIRK_NO_THROTTLE) 797 return; 798 799 /* Initialise throttling states */ 800 cpu_throttle_max = CPU_MAX_SPEED; 801 cpu_throttle_state = CPU_MAX_SPEED; 802 803 SYSCTL_ADD_INT(&acpi_cpu_sysctl_ctx, 804 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree), 805 OID_AUTO, "throttle_max", CTLFLAG_RD, 806 &cpu_throttle_max, 0, "maximum CPU speed"); 807 SYSCTL_ADD_PROC(&acpi_cpu_sysctl_ctx, 808 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree), 809 OID_AUTO, "throttle_state", 810 CTLTYPE_INT | CTLFLAG_RW, &cpu_throttle_state, 811 0, acpi_cpu_throttle_sysctl, "I", "current CPU speed"); 812 813 /* Set initial speed to maximum. */ 814 ACPI_SERIAL_BEGIN(cpu); 815 acpi_cpu_throttle_set(cpu_throttle_max); 816 ACPI_SERIAL_END(cpu); 817 818 printf("acpi_cpu: throttling enabled, %d steps (100%% to %d.%d%%), " 819 "currently %d.%d%%\n", CPU_MAX_SPEED, CPU_SPEED_PRINTABLE(1), 820 CPU_SPEED_PRINTABLE(cpu_throttle_state)); 821} 822 823static void 824acpi_cpu_startup_cx() 825{ 826 struct acpi_cpu_softc *sc; 827 struct sbuf sb; 828 int i; 829 830 /* 831 * Set up the list of Cx states, eliminating C3 states by truncating 832 * cpu_cx_count if quirks indicate C3 is not usable. 833 */ 834 sc = device_get_softc(cpu_devices[0]); 835 sbuf_new(&sb, cpu_cx_supported, sizeof(cpu_cx_supported), SBUF_FIXEDLEN); 836 for (i = 0; i < cpu_cx_count; i++) { 837 if ((cpu_quirks & CPU_QUIRK_NO_C3) == 0 || 838 sc->cpu_cx_states[i].type != ACPI_STATE_C3) 839 sbuf_printf(&sb, "C%d/%d ", i + 1, sc->cpu_cx_states[i].trans_lat); 840 else 841 cpu_cx_count = i; 842 } 843 sbuf_trim(&sb); 844 sbuf_finish(&sb); 845 SYSCTL_ADD_STRING(&acpi_cpu_sysctl_ctx, 846 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree), 847 OID_AUTO, "cx_supported", CTLFLAG_RD, cpu_cx_supported, 848 0, "Cx/microsecond values for supported Cx states"); 849 SYSCTL_ADD_PROC(&acpi_cpu_sysctl_ctx, 850 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree), 851 OID_AUTO, "cx_lowest", CTLTYPE_STRING | CTLFLAG_RW, 852 NULL, 0, acpi_cpu_cx_lowest_sysctl, "A", 853 "lowest Cx sleep state to use"); 854 SYSCTL_ADD_PROC(&acpi_cpu_sysctl_ctx, 855 SYSCTL_CHILDREN(acpi_cpu_sysctl_tree), 856 OID_AUTO, "cx_usage", CTLTYPE_STRING | CTLFLAG_RD, 857 NULL, 0, acpi_cpu_usage_sysctl, "A", 858 "percent usage for each Cx state"); 859 860#ifdef notyet 861 /* Signal platform that we can handle _CST notification. */ 862 if (cpu_cst_cnt != 0) { 863 ACPI_LOCK(acpi); 864 AcpiOsWritePort(cpu_smi_cmd, cpu_cst_cnt, 8); 865 ACPI_UNLOCK(acpi); 866 } 867#endif 868 869 /* Take over idling from cpu_idle_default(). */ 870 cpu_idle_hook = acpi_cpu_idle; 871} 872 873/* 874 * Set CPUs to the new state. 875 * 876 * Must be called with the ACPI lock held. 877 */ 878static void 879acpi_cpu_throttle_set(uint32_t speed) 880{ 881 struct acpi_cpu_softc *sc; 882 int i; 883 uint32_t p_cnt, clk_val; 884 885 ACPI_SERIAL_ASSERT(cpu); 886 887 /* Iterate over processors */ 888 for (i = 0; i < cpu_ndevices; i++) { 889 sc = device_get_softc(cpu_devices[i]); 890 if (sc->cpu_p_cnt == NULL) 891 continue; 892 893 /* Get the current P_CNT value and disable throttling */ 894 p_cnt = CPU_GET_REG(sc->cpu_p_cnt, 4); 895 p_cnt &= ~CPU_P_CNT_THT_EN; 896 CPU_SET_REG(sc->cpu_p_cnt, 4, p_cnt); 897 898 /* If we're at maximum speed, that's all */ 899 if (speed < CPU_MAX_SPEED) { 900 /* Mask the old CLK_VAL off and or-in the new value */ 901 clk_val = (CPU_MAX_SPEED - 1) << cpu_duty_offset; 902 p_cnt &= ~clk_val; 903 p_cnt |= (speed << cpu_duty_offset); 904 905 /* Write the new P_CNT value and then enable throttling */ 906 CPU_SET_REG(sc->cpu_p_cnt, 4, p_cnt); 907 p_cnt |= CPU_P_CNT_THT_EN; 908 CPU_SET_REG(sc->cpu_p_cnt, 4, p_cnt); 909 } 910 ACPI_VPRINT(sc->cpu_dev, acpi_device_get_parent_softc(sc->cpu_dev), 911 "set speed to %d.%d%%\n", CPU_SPEED_PRINTABLE(speed)); 912 } 913 cpu_throttle_state = speed; 914} 915 916/* 917 * Idle the CPU in the lowest state possible. This function is called with 918 * interrupts disabled. Note that once it re-enables interrupts, a task 919 * switch can occur so do not access shared data (i.e. the softc) after 920 * interrupts are re-enabled. 921 */ 922static void 923acpi_cpu_idle() 924{ 925 struct acpi_cpu_softc *sc; 926 struct acpi_cx *cx_next; 927 uint32_t start_time, end_time; 928 int bm_active, cx_next_idx, i; 929 930 /* If disabled, return immediately. */ 931 if (cpu_cx_count == 0) { 932 ACPI_ENABLE_IRQS(); 933 return; 934 } 935 936 /* 937 * Look up our CPU id to get our softc. If it's NULL, we'll use C1 938 * since there is no ACPI processor object for this CPU. This occurs 939 * for logical CPUs in the HTT case. 940 */ 941 sc = cpu_softc[PCPU_GET(cpuid)]; 942 if (sc == NULL) { 943 acpi_cpu_c1(); 944 return; 945 } 946 947 /* 948 * If we slept 100 us or more, use the lowest Cx state. Otherwise, 949 * find the lowest state that has a latency less than or equal to 950 * the length of our last sleep. 951 */ 952 cx_next_idx = cpu_cx_lowest; 953 if (sc->cpu_prev_sleep < 100) 954 for (i = cpu_cx_lowest; i >= 0; i--) 955 if (sc->cpu_cx_states[i].trans_lat <= sc->cpu_prev_sleep) { 956 cx_next_idx = i; 957 break; 958 } 959 960 /* 961 * Check for bus master activity. If there was activity, clear 962 * the bit and use the lowest non-C3 state. Note that the USB 963 * driver polling for new devices keeps this bit set all the 964 * time if USB is loaded. 965 */ 966 if ((cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) { 967 AcpiGetRegister(ACPI_BITREG_BUS_MASTER_STATUS, &bm_active, 968 ACPI_MTX_DO_NOT_LOCK); 969 if (bm_active != 0) { 970 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_STATUS, 1, 971 ACPI_MTX_DO_NOT_LOCK); 972 cx_next_idx = min(cx_next_idx, cpu_non_c3); 973 } 974 } 975 976 /* Select the next state and update statistics. */ 977 cx_next = &sc->cpu_cx_states[cx_next_idx]; 978 cpu_cx_stats[cx_next_idx]++; 979 KASSERT(cx_next->type != ACPI_STATE_C0, ("acpi_cpu_idle: C0 sleep")); 980 981 /* 982 * Execute HLT (or equivalent) and wait for an interrupt. We can't 983 * calculate the time spent in C1 since the place we wake up is an 984 * ISR. Assume we slept one quantum and return. 985 */ 986 if (cx_next->type == ACPI_STATE_C1) { 987 sc->cpu_prev_sleep = 1000000 / hz; 988 acpi_cpu_c1(); 989 return; 990 } 991 992 /* 993 * For C3, disable bus master arbitration and enable bus master wake 994 * if BM control is available, otherwise flush the CPU cache. 995 */ 996 if (cx_next->type == ACPI_STATE_C3) { 997 if ((cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) { 998 AcpiSetRegister(ACPI_BITREG_ARB_DISABLE, 1, ACPI_MTX_DO_NOT_LOCK); 999 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_RLD, 1, 1000 ACPI_MTX_DO_NOT_LOCK); 1001 } else 1002 ACPI_FLUSH_CPU_CACHE(); 1003 } 1004 1005 /* 1006 * Read from P_LVLx to enter C2(+), checking time spent asleep. 1007 * Use the ACPI timer for measuring sleep time. Since we need to 1008 * get the time very close to the CPU start/stop clock logic, this 1009 * is the only reliable time source. 1010 */ 1011 AcpiHwLowLevelRead(32, &start_time, &AcpiGbl_FADT->XPmTmrBlk); 1012 CPU_GET_REG(cx_next->p_lvlx, 1); 1013 1014 /* 1015 * Read the end time twice. Since it may take an arbitrary time 1016 * to enter the idle state, the first read may be executed before 1017 * the processor has stopped. Doing it again provides enough 1018 * margin that we are certain to have a correct value. 1019 */ 1020 AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT->XPmTmrBlk); 1021 AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT->XPmTmrBlk); 1022 1023 /* Enable bus master arbitration and disable bus master wakeup. */ 1024 if (cx_next->type == ACPI_STATE_C3 && 1025 (cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) { 1026 AcpiSetRegister(ACPI_BITREG_ARB_DISABLE, 0, ACPI_MTX_DO_NOT_LOCK); 1027 AcpiSetRegister(ACPI_BITREG_BUS_MASTER_RLD, 0, ACPI_MTX_DO_NOT_LOCK); 1028 } 1029 1030 /* Find the actual time asleep in microseconds, minus overhead. */ 1031 end_time = acpi_TimerDelta(end_time, start_time); 1032 sc->cpu_prev_sleep = PM_USEC(end_time) - cx_next->trans_lat; 1033 ACPI_ENABLE_IRQS(); 1034} 1035 1036/* 1037 * Re-evaluate the _PSS and _CST objects when we are notified that they 1038 * have changed. 1039 * 1040 * XXX Re-evaluation disabled until locking is done. 1041 */ 1042static void 1043acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context) 1044{ 1045 struct acpi_cpu_softc *sc = (struct acpi_cpu_softc *)context; 1046 1047 switch (notify) { 1048 case ACPI_CPU_NOTIFY_PERF_STATES: 1049 device_printf(sc->cpu_dev, "Performance states changed\n"); 1050 /* acpi_cpu_px_available(sc); */ 1051 break; 1052 case ACPI_CPU_NOTIFY_CX_STATES: 1053 device_printf(sc->cpu_dev, "Cx states changed\n"); 1054 /* acpi_cpu_cx_cst(sc); */ 1055 break; 1056 default: 1057 device_printf(sc->cpu_dev, "Unknown notify %#x\n", notify); 1058 break; 1059 } 1060} 1061 1062static int 1063acpi_cpu_quirks(struct acpi_cpu_softc *sc) 1064{ 1065 device_t acpi_dev; 1066 1067 /* 1068 * C3 on multiple CPUs requires using the expensive flush cache 1069 * instruction. 1070 */ 1071 if (mp_ncpus > 1) 1072 cpu_quirks |= CPU_QUIRK_NO_BM_CTRL; 1073 1074 /* Look for various quirks of the PIIX4 part. */ 1075 acpi_dev = pci_find_device(PCI_VENDOR_INTEL, PCI_DEVICE_82371AB_3); 1076 if (acpi_dev != NULL) { 1077 switch (pci_get_revid(acpi_dev)) { 1078 /* 1079 * Disable throttling control on PIIX4 A and B-step. 1080 * See specification changes #13 ("Manual Throttle Duty Cycle") 1081 * and #14 ("Enabling and Disabling Manual Throttle"), plus 1082 * erratum #5 ("STPCLK# Deassertion Time") from the January 1083 * 2002 PIIX4 specification update. Note that few (if any) 1084 * mobile systems ever used this part. 1085 */ 1086 case PCI_REVISION_A_STEP: 1087 case PCI_REVISION_B_STEP: 1088 cpu_quirks |= CPU_QUIRK_NO_THROTTLE; 1089 /* FALLTHROUGH */ 1090 /* 1091 * Disable C3 support for all PIIX4 chipsets. Some of these parts 1092 * do not report the BMIDE status to the BM status register and 1093 * others have a livelock bug if Type-F DMA is enabled. Linux 1094 * works around the BMIDE bug by reading the BM status directly 1095 * but we take the simpler approach of disabling C3 for these 1096 * parts. 1097 * 1098 * See erratum #18 ("C3 Power State/BMIDE and Type-F DMA 1099 * Livelock") from the January 2002 PIIX4 specification update. 1100 * Applies to all PIIX4 models. 1101 */ 1102 case PCI_REVISION_4E: 1103 case PCI_REVISION_4M: 1104 cpu_quirks |= CPU_QUIRK_NO_C3; 1105 break; 1106 default: 1107 break; 1108 } 1109 } 1110 1111 return (0); 1112} 1113 1114/* Handle changes in the CPU throttling setting. */ 1115static int 1116acpi_cpu_throttle_sysctl(SYSCTL_HANDLER_ARGS) 1117{ 1118 uint32_t *argp; 1119 uint32_t arg; 1120 int error; 1121 1122 argp = (uint32_t *)oidp->oid_arg1; 1123 arg = *argp; 1124 error = sysctl_handle_int(oidp, &arg, 0, req); 1125 1126 /* Error or no new value */ 1127 if (error != 0 || req->newptr == NULL) 1128 return (error); 1129 if (arg < 1 || arg > cpu_throttle_max) 1130 return (EINVAL); 1131 1132 /* If throttling changed, notify the BIOS of the new rate. */ 1133 ACPI_SERIAL_BEGIN(cpu); 1134 if (*argp != arg) { 1135 *argp = arg; 1136 acpi_cpu_throttle_set(arg); 1137 } 1138 ACPI_SERIAL_END(cpu); 1139 1140 return (0); 1141} 1142 1143static int 1144acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS) 1145{ 1146 struct sbuf sb; 1147 char buf[128]; 1148 int i; 1149 uintmax_t fract, sum, whole; 1150 1151 sum = 0; 1152 for (i = 0; i < cpu_cx_count; i++) 1153 sum += cpu_cx_stats[i]; 1154 sbuf_new(&sb, buf, sizeof(buf), SBUF_FIXEDLEN); 1155 for (i = 0; i < cpu_cx_count; i++) { 1156 if (sum > 0) { 1157 whole = (uintmax_t)cpu_cx_stats[i] * 100; 1158 fract = (whole % sum) * 100; 1159 sbuf_printf(&sb, "%u.%02u%% ", (u_int)(whole / sum), 1160 (u_int)(fract / sum)); 1161 } else 1162 sbuf_printf(&sb, "0%% "); 1163 } 1164 sbuf_trim(&sb); 1165 sbuf_finish(&sb); 1166 sysctl_handle_string(oidp, sbuf_data(&sb), sbuf_len(&sb), req); 1167 sbuf_delete(&sb); 1168 1169 return (0); 1170} 1171 1172static int 1173acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS) 1174{ 1175 struct acpi_cpu_softc *sc; 1176 char state[8]; 1177 int val, error, i; 1178 1179 sc = device_get_softc(cpu_devices[0]); 1180 snprintf(state, sizeof(state), "C%d", cpu_cx_lowest + 1); 1181 error = sysctl_handle_string(oidp, state, sizeof(state), req); 1182 if (error != 0 || req->newptr == NULL) 1183 return (error); 1184 if (strlen(state) < 2 || toupper(state[0]) != 'C') 1185 return (EINVAL); 1186 val = (int) strtol(state + 1, NULL, 10) - 1; 1187 if (val < 0 || val > cpu_cx_count - 1) 1188 return (EINVAL); 1189 1190 ACPI_SERIAL_BEGIN(cpu); 1191 cpu_cx_lowest = val; 1192 1193 /* If not disabling, cache the new lowest non-C3 state. */ 1194 cpu_non_c3 = 0; 1195 for (i = cpu_cx_lowest; i >= 0; i--) { 1196 if (sc->cpu_cx_states[i].type < ACPI_STATE_C3) { 1197 cpu_non_c3 = i; 1198 break; 1199 } 1200 } 1201 1202 /* Reset the statistics counters. */ 1203 bzero(cpu_cx_stats, sizeof(cpu_cx_stats)); 1204 ACPI_SERIAL_END(cpu); 1205 1206 return (0); 1207} 1208